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1.1 ! root 1: /* ! 2: * Mach Operating System ! 3: * Copyright (c) 1991,1990,1989 Carnegie Mellon University ! 4: * All Rights Reserved. ! 5: * ! 6: * Permission to use, copy, modify and distribute this software and its ! 7: * documentation is hereby granted, provided that both the copyright ! 8: * notice and this permission notice appear in all copies of the ! 9: * software, derivative works or modified versions, and any portions ! 10: * thereof, and that both notices appear in supporting documentation. ! 11: * ! 12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" ! 13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR ! 14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. ! 15: * ! 16: * Carnegie Mellon requests users of this software to return to ! 17: * ! 18: * Software Distribution Coordinator or [email protected] ! 19: * School of Computer Science ! 20: * Carnegie Mellon University ! 21: * Pittsburgh PA 15213-3890 ! 22: * ! 23: * any improvements or extensions that they make and grant Carnegie Mellon ! 24: * the rights to redistribute these changes. ! 25: */ ! 26: /* ! 27: Copyright 1988, 1989 by Intel Corporation, Santa Clara, California. ! 28: ! 29: All Rights Reserved ! 30: ! 31: Permission to use, copy, modify, and distribute this software and ! 32: its documentation for any purpose and without fee is hereby ! 33: granted, provided that the above copyright notice appears in all ! 34: copies and that both the copyright notice and this permission notice ! 35: appear in supporting documentation, and that the name of Intel ! 36: not be used in advertising or publicity pertaining to distribution ! 37: of the software without specific, written prior permission. ! 38: ! 39: INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE ! 40: INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, ! 41: IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR ! 42: CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM ! 43: LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, ! 44: NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION ! 45: WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ! 46: */ ! 47: ! 48: /* ! 49: * Header file for i8250 chip ! 50: */ ! 51: ! 52: /* port offsets from the base i/o address */ ! 53: ! 54: #define RDAT 0 ! 55: #define RIE 1 ! 56: #define RID 2 ! 57: #define RFC 2 ! 58: #define RLC 3 ! 59: #define RMC 4 ! 60: #define RLS 5 ! 61: #define RMS 6 ! 62: #define RDLSB 0 ! 63: #define RDMSB 1 ! 64: ! 65: /* interrupt control register */ ! 66: ! 67: #define IERD 0x01 /* read int */ ! 68: #define IETX 0x02 /* xmit int */ ! 69: #define IELS 0x04 /* line status int */ ! 70: #define IEMS 0x08 /* modem int */ ! 71: ! 72: /* interrupt status register */ ! 73: ! 74: #define IDIP 0x01 /* not interrupt pending */ ! 75: #define IDMS 0x00 /* modem int */ ! 76: #define IDTX 0x02 /* xmit int */ ! 77: #define IDRD 0x04 /* read int */ ! 78: #define IDLS 0x06 /* line status int */ ! 79: #define IDMASK 0x0f /* interrupt ID mask */ ! 80: ! 81: /* line control register */ ! 82: ! 83: #define LC5 0x00 /* word length 5 */ ! 84: #define LC6 0x01 /* word length 6 */ ! 85: #define LC7 0x02 /* word length 7 */ ! 86: #define LC8 0x03 /* word length 8 */ ! 87: #define LCSTB 0x04 /* 2 stop */ ! 88: #define LCPEN 0x08 /* parity enable */ ! 89: #define LCEPS 0x10 /* even parity select */ ! 90: #define LCSP 0x20 /* stick parity */ ! 91: #define LCBRK 0x40 /* send break */ ! 92: #define LCDLAB 0x80 /* divisor latch access bit */ ! 93: #define LCPAR 0x38 /* parity mask */ ! 94: ! 95: /* line status register */ ! 96: ! 97: #define LSDR 0x01 /* data ready */ ! 98: #define LSOR 0x02 /* overrun error */ ! 99: #define LSPE 0x04 /* parity error */ ! 100: #define LSFE 0x08 /* framing error */ ! 101: #define LSBI 0x10 /* break interrupt */ ! 102: #define LSTHRE 0x20 /* xmit holding reg empty */ ! 103: #define LSTSRE 0x40 /* xmit shift reg empty */ ! 104: ! 105: /* modem control register */ ! 106: ! 107: #define MCDTR 0x01 /* DTR */ ! 108: #define MCRTS 0x02 /* RTS */ ! 109: #define MCOUT1 0x04 /* OUT1 */ ! 110: #define MCOUT2 0x08 /* OUT2 */ ! 111: #define MCLOOP 0x10 /* loopback */ ! 112: ! 113: /* modem status register */ ! 114: ! 115: #define MSDCTS 0x01 /* delta CTS */ ! 116: #define MSDDSR 0x02 /* delta DSR */ ! 117: #define MSTERI 0x04 /* delta RE */ ! 118: #define MSDRLSD 0x08 /* delta CD */ ! 119: #define MSCTS 0x10 /* CTS */ ! 120: #define MSDSR 0x20 /* DSR */ ! 121: #define MSRI 0x40 /* RE */ ! 122: #define MSRLSD 0x80 /* CD */ ! 123: ! 124: /* divisor latch register settings for various baud rates */ ! 125: ! 126: #define BCNT1200 0x60 ! 127: #define BCNT2400 0x30 ! 128: #define BCNT4800 0x18 ! 129: #define BCNT9600 0x0c
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