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1.1 root 1: /*
2: * Mach Operating System
3: * Copyright (c) 1991,1990,1989 Carnegie Mellon University
4: * All Rights Reserved.
5: *
6: * Permission to use, copy, modify and distribute this software and its
7: * documentation is hereby granted, provided that both the copyright
8: * notice and this permission notice appear in all copies of the
9: * software, derivative works or modified versions, and any portions
10: * thereof, and that both notices appear in supporting documentation.
11: *
12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15: *
16: * Carnegie Mellon requests users of this software to return to
17: *
18: * Software Distribution Coordinator or [email protected]
19: * School of Computer Science
20: * Carnegie Mellon University
21: * Pittsburgh PA 15213-3890
22: *
23: * any improvements or extensions that they make and grant Carnegie Mellon
24: * the rights to redistribute these changes.
25: */
26: /*
27: Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
28:
29: All Rights Reserved
30:
31: Permission to use, copy, modify, and distribute this software and
32: its documentation for any purpose and without fee is hereby
33: granted, provided that the above copyright notice appears in all
34: copies and that both the copyright notice and this permission notice
35: appear in supporting documentation, and that the name of Intel
36: not be used in advertising or publicity pertaining to distribution
37: of the software without specific, written prior permission.
38:
39: INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
40: INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
41: IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
42: CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
43: LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
44: NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
45: WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
46: */
47:
48: /*
49: * Header file for i8250 chip
50: */
51:
1.1.1.2 ! root 52: #ifndef _I8250_H_
! 53: #define _I8250_H_
! 54:
1.1 root 55: /* port offsets from the base i/o address */
56:
57: #define RDAT 0
58: #define RIE 1
59: #define RID 2
60: #define RFC 2
61: #define RLC 3
62: #define RMC 4
63: #define RLS 5
64: #define RMS 6
65: #define RDLSB 0
66: #define RDMSB 1
67:
68: /* interrupt control register */
69:
70: #define IERD 0x01 /* read int */
71: #define IETX 0x02 /* xmit int */
72: #define IELS 0x04 /* line status int */
73: #define IEMS 0x08 /* modem int */
74:
75: /* interrupt status register */
76:
77: #define IDIP 0x01 /* not interrupt pending */
78: #define IDMS 0x00 /* modem int */
79: #define IDTX 0x02 /* xmit int */
80: #define IDRD 0x04 /* read int */
81: #define IDLS 0x06 /* line status int */
82: #define IDMASK 0x0f /* interrupt ID mask */
83:
84: /* line control register */
85:
86: #define LC5 0x00 /* word length 5 */
87: #define LC6 0x01 /* word length 6 */
88: #define LC7 0x02 /* word length 7 */
89: #define LC8 0x03 /* word length 8 */
90: #define LCSTB 0x04 /* 2 stop */
91: #define LCPEN 0x08 /* parity enable */
92: #define LCEPS 0x10 /* even parity select */
93: #define LCSP 0x20 /* stick parity */
94: #define LCBRK 0x40 /* send break */
95: #define LCDLAB 0x80 /* divisor latch access bit */
96: #define LCPAR 0x38 /* parity mask */
97:
98: /* line status register */
99:
100: #define LSDR 0x01 /* data ready */
101: #define LSOR 0x02 /* overrun error */
102: #define LSPE 0x04 /* parity error */
103: #define LSFE 0x08 /* framing error */
104: #define LSBI 0x10 /* break interrupt */
105: #define LSTHRE 0x20 /* xmit holding reg empty */
106: #define LSTSRE 0x40 /* xmit shift reg empty */
107:
108: /* modem control register */
109:
110: #define MCDTR 0x01 /* DTR */
111: #define MCRTS 0x02 /* RTS */
112: #define MCOUT1 0x04 /* OUT1 */
113: #define MCOUT2 0x08 /* OUT2 */
114: #define MCLOOP 0x10 /* loopback */
115:
116: /* modem status register */
117:
118: #define MSDCTS 0x01 /* delta CTS */
119: #define MSDDSR 0x02 /* delta DSR */
120: #define MSTERI 0x04 /* delta RE */
121: #define MSDRLSD 0x08 /* delta CD */
122: #define MSCTS 0x10 /* CTS */
123: #define MSDSR 0x20 /* DSR */
124: #define MSRI 0x40 /* RE */
125: #define MSRLSD 0x80 /* CD */
126:
127: /* divisor latch register settings for various baud rates */
128:
129: #define BCNT1200 0x60
130: #define BCNT2400 0x30
131: #define BCNT4800 0x18
132: #define BCNT9600 0x0c
1.1.1.2 ! root 133:
! 134: #endif /* _I8250_H_ */
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