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Annotation of Gnu-Mach/i386/i386at/if_ns8390.h, revision 1.1

1.1     ! root        1: /* 
        !             2:  * Mach Operating System
        !             3:  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
        !             4:  * All Rights Reserved.
        !             5:  * 
        !             6:  * Permission to use, copy, modify and distribute this software and its
        !             7:  * documentation is hereby granted, provided that both the copyright
        !             8:  * notice and this permission notice appear in all copies of the
        !             9:  * software, derivative works or modified versions, and any portions
        !            10:  * thereof, and that both notices appear in supporting documentation.
        !            11:  * 
        !            12:  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
        !            13:  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
        !            14:  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
        !            15:  * 
        !            16:  * Carnegie Mellon requests users of this software to return to
        !            17:  * 
        !            18:  *  Software Distribution Coordinator  or  [email protected]
        !            19:  *  School of Computer Science
        !            20:  *  Carnegie Mellon University
        !            21:  *  Pittsburgh PA 15213-3890
        !            22:  * 
        !            23:  * any improvements or extensions that they make and grant Carnegie Mellon
        !            24:  * the rights to redistribute these changes.
        !            25:  */
        !            26: /*
        !            27:  * Western Digital Mach Ethernet driver
        !            28:  * Copyright (c) 1990 OSF Research Institute 
        !            29:  */
        !            30: /*
        !            31:   Copyright 1990 by Open Software Foundation,
        !            32: Cambridge, MA.
        !            33: 
        !            34:                All Rights Reserved
        !            35: 
        !            36:   Permission to use, copy, modify, and distribute this software and
        !            37: its documentation for any purpose and without fee is hereby granted,
        !            38: provided that the above copyright notice appears in all copies and
        !            39: that both the copyright notice and this permission notice appear in
        !            40: supporting documentation, and that the name of OSF or Open Software
        !            41: Foundation not be used in advertising or publicity pertaining to
        !            42: distribution of the software without specific, written prior
        !            43: permission.
        !            44: 
        !            45:   OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
        !            46: INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
        !            47: IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
        !            48: CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
        !            49: LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
        !            50: NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
        !            51: WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
        !            52: */
        !            53: 
        !            54: /********************************************/
        !            55: /* Defines for the NIC 8390 Lan Controller  */
        !            56: /********************************************/
        !            57: 
        !            58: 
        !            59: /*--  page 0, rd --*/
        !            60: #define CR             0x00            /* Command Register     */
        !            61: #define CLDA0          0x01            /* Current Local DMA Address 0 */
        !            62: #define CLDA1          0x02            /* Current Local DMA Address 1 */
        !            63: #define BNRY           0x03            /* Boundary Pointer */
        !            64: #define TSR            0x04            /* Transmit Status Register */
        !            65: #define NCR            0x05            /* Number of Collisions Register */
        !            66: #define FIFO           0x06            /* FIFO */
        !            67: #define ISR            0x07            /* Interrupt Status Register */
        !            68: #define CRDA0          0x08            /* Current Remote DMA Address 0 */
        !            69: #define CRDA1          0x09            /* Current Remote DMA Address 1 */
        !            70: /*     0x0A is reserved */
        !            71: /*     0x0B is reserved */
        !            72: #define RSR            0x0C            /* Receive Status Register */
        !            73: #define CNTR0          0x0D            /* Frame Alignment Errors */
        !            74: #define CNTR1          0x0E            /* CRC Errors */
        !            75: #define CNTR2          0x0F            /* Missed Packet Errors */
        !            76: 
        !            77: /*-- page 0, wr --*/
        !            78: /*     CR              0x00               Command Register     */
        !            79: #define PSTART         0x01            /* Page Start Register */
        !            80: #define PSTOP          0x02            /* Page Stop Register */
        !            81: #define        BNDY            0x03            /* Boundary Pointer     */
        !            82: #define TPSR           0x04            /* Transmit Page Start Register */
        !            83: #define TBCR0          0x05            /* Transmit Byte Count Register 0*/
        !            84: #define TBCR1          0x06            /* Transmit Byte Count Register 1*/
        !            85: /*     ISR             0x07               Interrupt Status Register    */
        !            86: #define RSAR0          0x08            /* Remote Start Address Register 0 */
        !            87: #define RSAR1          0x09            /* Remote Start Address Register 1 */
        !            88: #define RBCR0          0x0A            /* Remote Byte Count Register 0 */
        !            89: #define RBCR1          0x0B            /* Remote Byte Count Register 1 */
        !            90: #define RCR            0x0C            /* Receive Configuration Register */
        !            91: #define TCR            0x0D            /* Transmit Configuration Register */
        !            92: #define DCR            0x0E            /* Data Configuration Register */
        !            93: #define IMR            0x0F            /* Interrupt Mask Register */
        !            94: 
        !            95: /*-- page 1, rd and wr */
        !            96: /*     CR              0x00               Control Register     */
        !            97: #define PAR0           0x01            /* Physical Address Register 0 */
        !            98: #define PAR1           0x02            /*                           1 */
        !            99: #define PAR2           0x03            /*                           2 */
        !           100: #define PAR3           0x04            /*                           3 */
        !           101: #define PAR4           0x05            /*                           4 */
        !           102: #define PAR5           0x06            /*                           5 */
        !           103: #define CURR           0x07            /* Current Page Register */
        !           104: #define        MAR0            0x08            /* Multicast Address Register 0 */
        !           105: #define MAR1           0x09            /*                            1 */
        !           106: #define MAR2           0x0A            /*                            2 */
        !           107: #define        MAR3            0x0B            /*                            3 */
        !           108: #define        MAR4            0x0C            /*                            4 */
        !           109: #define MAR5           0x0D            /*                            5 */
        !           110: #define MAR6           0x0E            /*                            6 */
        !           111: #define MAR7           0x0F            /*                            7 */
        !           112: 
        !           113: /*-- page 2, rd --*/
        !           114: 
        !           115: /*-- page 2, wr --*/
        !           116: 
        !           117: /*-- Command Register CR description */
        !           118: #define STP            0x01    /* stop; software reset */
        !           119: #define STA            0x02    /* start */
        !           120: #define TXP            0x04    /* transmit packet */
        !           121: #define        RD0             0x08
        !           122: #define        RD1             0x10
        !           123: #define        RD2             0x20
        !           124: #define RRD            0x08    /* remote DMA command - remote read */
        !           125: 
        !           126: #define RWR            0x10    /* remote DMA command - remote write */
        !           127: #define SPK            0x18    /* remote DMA command - send packet */
        !           128: #define ABR            0x20    /* remote DMA command - abrt/cmplt remote DMA */
        !           129: 
        !           130: #define PS0            0x00    /* register page select - 0 */
        !           131: #define PS1            0x40    /* register page select - 1 */
        !           132: #define PS2            0x80    /* register page select - 2 */
        !           133: 
        !           134: #define        PS0_STA         0x22    /* page select 0 with start bit maintained */
        !           135: #define        PS1_STA         0x62    /* page select 1 with start bit maintained */
        !           136: #define        PS2_STA         0x0A2   /* page select 2 with start bit maintained */
        !           137: 
        !           138: /*-- Interrupt Status Register ISR description */
        !           139: #define PRX            0x01    /* packet received no error */
        !           140: #define PTX            0x02    /* packet transmitted no error */
        !           141: #define RXE            0x04    /* receive error */
        !           142: #define TXE            0x08    /* transmit error */
        !           143: #define OVW            0x10    /* overwrite warning */
        !           144: #define CNT            0x20    /* counter overflow */
        !           145: #define RDC            0x40    /* remote DMA complete */
        !           146: #define RST            0x80    /* reset status */
        !           147: 
        !           148: /*-- Interrupt Mask Register IMR description */
        !           149: #define PRXE           0x01    /* packet received interrupt enable */
        !           150: #define PTXE           0x02    /* packet transmitted interrupt enable */
        !           151: #define RXEE           0x04    /* receive error interrupt enable */
        !           152: #define TXEE           0x08    /* transmit error interrupt enable */
        !           153: #define OVWE           0x10    /* overwrite warning interrupt enable */
        !           154: #define CNTE           0x20    /* counter overflow interrupt enable */
        !           155: #define RDCE           0x40    /* DMA complete interrupt enable */
        !           156: 
        !           157: /*-- Data Configuration Register DCR description */
        !           158: #define WTS            0x01    /* word transfer select */
        !           159: #define BOS            0x02    /* byte order select */
        !           160: #define LAS            0x04    /* long address select */
        !           161: #define BMS            0x08    /* burst DMA select */
        !           162: #define AINIT          0x10    /* autoinitialize remote */
        !           163: 
        !           164: #define FTB2           0x00    /* receive FIFO threshold select - 2 bytes */
        !           165: #define FTB4           0x20    /* receive FIFO threshold select - 4 bytes */
        !           166: #define FTB8           0x40    /* receive FIFO threshold select - 8 bytes */
        !           167: #define FTB12          0x60    /* receive FIFO threshold select - 12 bytes */
        !           168: 
        !           169: /*-- Transmit Configuration Register TCR description */
        !           170: #define MCRC           0x01    /* manual crc generation */
        !           171: #define LB1            0x02    /* mode 1; internal loopback LPBK=0 */
        !           172: #define LB2            0x04    /* mode 2; internal loopback LPBK=1 */
        !           173: #define LB3            0x06    /* mode 3; internal loopback LPBK=0 */
        !           174: 
        !           175: #define ATD            0x08    /* auto transmit disable */
        !           176: #define OFST           0x10    /* collision offset enable */
        !           177: 
        !           178: /*-- Transmit Status Register TSR description --*/
        !           179: #define XMT            0x01    /* packet transmitted without error */
        !           180: #define COL            0x04    /* transmit collided */
        !           181: #define ABT            0x08    /* transmit aborted */
        !           182: #define CRS            0x10    /* carrier sense lost - xmit not aborted */
        !           183: #define FU             0x20    /* FIFO underrun */
        !           184: #define CDH            0x40    /* CD heartbeat */
        !           185: #define OWC            0x80    /* out of window collision - xmit not aborted */
        !           186: 
        !           187: /*-- Receive Configuration Register RCR description --*/
        !           188: #define SEP            0x01    /* save error packets */
        !           189: #define AR             0x02    /* accept runt packet */
        !           190: #define AB             0x04    /* accept broadcast */
        !           191: #define AM             0x08    /* accept multicast */
        !           192: #define PRO            0x10    /* promiscuous physical */
        !           193: #define MON            0x20    /* monitor mode */
        !           194: 
        !           195: /*--Receive Status Register RSR description --*/
        !           196: #define RCV            0x01    /* packet received intact */
        !           197: #define CRC            0x02    /* CRC error */
        !           198: #define FAE            0x04    /* frame alignment error */
        !           199: #define FO             0x08    /* FIFO overrun */
        !           200: #define MPA            0x10    /* missed packet */
        !           201: #define PHY            0x20    /* physical/multicast address */
        !           202: #define DIS            0x40    /* receiver disable */
        !           203: #define DFR            0x80    /* deferring */

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