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1.1 root 1: /*
2: * Mach Operating System
3: * Copyright (c) 1991,1990 Carnegie Mellon University
4: * All Rights Reserved.
5: *
6: * Permission to use, copy, modify and distribute this software and its
7: * documentation is hereby granted, provided that both the copyright
8: * notice and this permission notice appear in all copies of the
9: * software, derivative works or modified versions, and any portions
10: * thereof, and that both notices appear in supporting documentation.
11: *
12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15: *
16: * Carnegie Mellon requests users of this software to return to
17: *
18: * Software Distribution Coordinator or [email protected]
19: * School of Computer Science
20: * Carnegie Mellon University
21: * Pittsburgh PA 15213-3890
22: *
23: * any improvements or extensions that they make and grant Carnegie Mellon
24: * the rights to redistribute these changes.
25: */
26:
27: #include <sys/types.h>
28: #include <i386/ipl.h>
29: #include <i386/pic.h>
1.1.1.2 root 30: #include <i386/fpu.h>
1.1.1.3 ! root 31: #include <i386/hardclock.h>
1.1.1.2 root 32: #include <i386at/kd.h>
1.1 root 33:
34: /* These interrupts are always present */
35:
1.1.1.2 root 36: void (*ivect[NINTR])() = {
1.1 root 37: /* 00 */ hardclock, /* always */
38: /* 01 */ kdintr, /* kdintr, ... */
39: /* 02 */ intnull,
40: /* 03 */ intnull, /* lnpoll, comintr, ... */
41:
42: /* 04 */ intnull, /* comintr, ... */
43: /* 05 */ intnull, /* comintr, wtintr, ... */
44: /* 06 */ intnull, /* fdintr, ... */
45: /* 07 */ prtnull, /* qdintr, ... */
46:
47: /* 08 */ intnull,
48: /* 09 */ intnull, /* ether */
49: /* 10 */ intnull,
50: /* 11 */ intnull,
51:
52: /* 12 */ intnull,
53: /* 13 */ fpintr, /* always */
54: /* 14 */ intnull, /* hdintr, ... */
55: /* 15 */ intnull, /* ??? */
56: };
57:
58: int intpri[NINTR] = {
59: /* 00 */ 0, SPL6, 0, 0,
60: /* 04 */ 0, 0, 0, 0,
61: /* 08 */ 0, 0, 0, 0,
62: /* 12 */ 0, SPL1, 0, 0,
63: };
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