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1.1 ! root 1: /* ! 2: * Mach Operating System ! 3: * Copyright (c) 1991,1990,1989 Carnegie Mellon University ! 4: * All Rights Reserved. ! 5: * ! 6: * Permission to use, copy, modify and distribute this software and its ! 7: * documentation is hereby granted, provided that both the copyright ! 8: * notice and this permission notice appear in all copies of the ! 9: * software, derivative works or modified versions, and any portions ! 10: * thereof, and that both notices appear in supporting documentation. ! 11: * ! 12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" ! 13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR ! 14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. ! 15: * ! 16: * Carnegie Mellon requests users of this software to return to ! 17: * ! 18: * Software Distribution Coordinator or [email protected] ! 19: * School of Computer Science ! 20: * Carnegie Mellon University ! 21: * Pittsburgh PA 15213-3890 ! 22: * ! 23: * any improvements or extensions that they make and grant Carnegie Mellon ! 24: * the rights to redistribute these changes. ! 25: */ ! 26: /* ! 27: Copyright (c) 1988,1989 Prime Computer, Inc. Natick, MA 01760 ! 28: All Rights Reserved. ! 29: ! 30: Permission to use, copy, modify, and distribute this ! 31: software and its documentation for any purpose and ! 32: without fee is hereby granted, provided that the above ! 33: copyright notice appears in all copies and that both the ! 34: copyright notice and this permission notice appear in ! 35: supporting documentation, and that the name of Prime ! 36: Computer, Inc. not be used in advertising or publicity ! 37: pertaining to distribution of the software without ! 38: specific, written prior permission. ! 39: ! 40: THIS SOFTWARE IS PROVIDED "AS IS", AND PRIME COMPUTER, ! 41: INC. DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS ! 42: SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ! 43: MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN ! 44: NO EVENT SHALL PRIME COMPUTER, INC. BE LIABLE FOR ANY ! 45: SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY ! 46: DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR ! 47: PROFITS, WHETHER IN ACTION OF CONTRACT, NEGLIGENCE, OR ! 48: OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION ! 49: WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ! 50: */ ! 51: ! 52: #include <mach/machine/pio.h> ! 53: ! 54: #include <sys/types.h> ! 55: ! 56: #include "ipl.h" ! 57: #include "pic.h" ! 58: ! 59: ! 60: u_short pic_mask[SPLHI+1]; ! 61: ! 62: int curr_ipl; ! 63: u_short curr_pic_mask; ! 64: ! 65: u_short orig_pic_mask; ! 66: int orig_pic_mask_initialized; ! 67: ! 68: u_char intpri[NINTR]; ! 69: ! 70: /* ! 71: ** picinit() - This routine ! 72: ** * Establishes a table of interrupt vectors ! 73: ** * Establishes a table of interrupt priority levels ! 74: ** * Establishes a table of interrupt masks to be put ! 75: ** in the PICs. ! 76: ** * Establishes location of PICs in the system ! 77: ** * Initialises them ! 78: ** ! 79: ** At this stage the interrupt functionality of this system should be ! 80: ** coplete. ! 81: ** ! 82: */ ! 83: ! 84: ! 85: /* ! 86: ** 1. First we form a table of PIC masks - rather then calling form_pic_mask() ! 87: ** each time there is a change of interrupt level - we will form a table ! 88: ** of pic masks, as there are only 7 interrupt priority levels. ! 89: ** ! 90: ** 2. The next thing we must do is to determine which of the PIC interrupt ! 91: ** request lines have to be masked out, this is done by calling ! 92: ** form_pic_mask() with a (int_lev) of zero, this will find all the ! 93: ** interrupt lines that have priority 0, (ie to be ignored). ! 94: ** Then we split this up for the master/slave PICs. ! 95: ** ! 96: ** 2. Initialise the PICs , master first, then the slave. ! 97: ** All the register field definitions are described in pic_jh.h, also ! 98: ** the settings of these fields for the various registers are selected. ! 99: ** ! 100: */ ! 101: ! 102: pic_init(int master_base, int slave_base) ! 103: { ! 104: u_short PICM_OCW1, PICS_OCW1 ; ! 105: u_short PICM_OCW2, PICS_OCW2 ; ! 106: u_short PICM_OCW3, PICS_OCW3 ; ! 107: u_short i; ! 108: ! 109: if (!orig_pic_mask_initialized) ! 110: { ! 111: unsigned omaster, oslave; ! 112: ! 113: omaster = inb(MASTER_OCW); ! 114: PIC_DELAY(); ! 115: oslave = inb(SLAVES_OCW); ! 116: PIC_DELAY(); ! 117: ! 118: orig_pic_mask = omaster | (oslave << 8); ! 119: orig_pic_mask_initialized = 1; ! 120: } ! 121: ! 122: ! 123: /* ! 124: ** 1. Form pic mask table ! 125: */ ! 126: ! 127: form_pic_mask(); ! 128: ! 129: /* ! 130: ** 1a. Select current SPL. ! 131: */ ! 132: ! 133: curr_ipl = SPLHI; ! 134: curr_pic_mask = pic_mask[SPLHI]; ! 135: ! 136: /* ! 137: ** 3. Select options for each ICW and each OCW for each PIC. ! 138: */ ! 139: ! 140: #if 0 ! 141: PICM_ICW1 = (ICW_TEMPLATE | EDGE_TRIGGER | ADDR_INTRVL8 ! 142: | CASCADE_MODE | ICW4__NEEDED); ! 143: ! 144: PICS_ICW1 = (ICW_TEMPLATE | EDGE_TRIGGER | ADDR_INTRVL8 ! 145: | CASCADE_MODE | ICW4__NEEDED); ! 146: ! 147: PICM_ICW2 = master_base; ! 148: PICS_ICW2 = slave_base; ! 149: ! 150: PICM_ICW3 = ( SLAVE_ON_IR2 ); ! 151: PICS_ICW3 = ( I_AM_SLAVE_2 ); ! 152: ! 153: PICM_ICW4 = (SNF_MODE_DIS | NONBUFD_MODE | NRML_EOI_MOD ! 154: | I8086_EMM_MOD); ! 155: PICS_ICW4 = (SNF_MODE_DIS | NONBUFD_MODE | NRML_EOI_MOD ! 156: | I8086_EMM_MOD); ! 157: #endif ! 158: ! 159: PICM_OCW1 = (curr_pic_mask & 0x00FF); ! 160: PICS_OCW1 = ((curr_pic_mask & 0xFF00)>>8); ! 161: ! 162: PICM_OCW2 = NON_SPEC_EOI; ! 163: PICS_OCW2 = NON_SPEC_EOI; ! 164: ! 165: PICM_OCW3 = (OCW_TEMPLATE | READ_NEXT_RD | READ_IR_ONRD ); ! 166: PICS_OCW3 = (OCW_TEMPLATE | READ_NEXT_RD | READ_IR_ONRD ); ! 167: ! 168: ! 169: /* ! 170: ** 4. Initialise master - send commands to master PIC ! 171: */ ! 172: ! 173: outb ( MASTER_ICW, PICM_ICW1 ); ! 174: PIC_DELAY(); ! 175: outb ( MASTER_OCW, master_base ); ! 176: PIC_DELAY(); ! 177: outb ( MASTER_OCW, PICM_ICW3 ); ! 178: PIC_DELAY(); ! 179: outb ( MASTER_OCW, PICM_ICW4 ); ! 180: PIC_DELAY(); ! 181: ! 182: #if 0 ! 183: outb ( MASTER_OCW, PICM_MASK ); ! 184: PIC_DELAY(); ! 185: outb ( MASTER_ICW, PICM_OCW3 ); ! 186: PIC_DELAY(); ! 187: #endif ! 188: ! 189: /* ! 190: ** 5. Initialise slave - send commands to slave PIC ! 191: */ ! 192: ! 193: outb ( SLAVES_ICW, PICS_ICW1 ); ! 194: PIC_DELAY(); ! 195: outb ( SLAVES_OCW, slave_base ); ! 196: PIC_DELAY(); ! 197: outb ( SLAVES_OCW, PICS_ICW3 ); ! 198: PIC_DELAY(); ! 199: outb ( SLAVES_OCW, PICS_ICW4 ); ! 200: PIC_DELAY(); ! 201: ! 202: #if 0 ! 203: outb ( SLAVES_OCW, PICS_OCW1 ); ! 204: PIC_DELAY(); ! 205: outb ( SLAVES_ICW, PICS_OCW3 ); ! 206: PIC_DELAY(); ! 207: ! 208: /* ! 209: ** 6. Initialise interrupts ! 210: */ ! 211: outb ( MASTER_OCW, PICM_OCW1 ); ! 212: PIC_DELAY(); ! 213: #endif ! 214: ! 215: outb(MASTER_OCW, orig_pic_mask); ! 216: PIC_DELAY(); ! 217: outb(SLAVES_OCW, orig_pic_mask >> 8); ! 218: PIC_DELAY(); ! 219: ! 220: #if 0 ! 221: /* XXX */ ! 222: if (master_base != 8) ! 223: { ! 224: outb(0x21, 0xff); ! 225: PIC_DELAY(); ! 226: outb(0xa1, 0xff); ! 227: PIC_DELAY(); ! 228: } ! 229: #endif ! 230: ! 231: outb(MASTER_ICW, NON_SPEC_EOI); ! 232: PIC_DELAY(); ! 233: outb(SLAVES_ICW, NON_SPEC_EOI); ! 234: PIC_DELAY(); ! 235: ! 236: inb(0x60); ! 237: ! 238: } ! 239: ! 240: /* ! 241: ** form_pic_mask(int_lvl) ! 242: ** ! 243: ** For a given interrupt priority level (int_lvl), this routine goes out ! 244: ** and scans through the interrupt level table, and forms a mask based on the ! 245: ** entries it finds there that have the same or lower interrupt priority level ! 246: ** as (int_lvl). It returns a 16-bit mask which will have to be split up between ! 247: ** the 2 pics. ! 248: ** ! 249: */ ! 250: ! 251: #define SLAVEMASK (0xFFFF ^ SLAVE_ON_IR2) ! 252: #define SLAVEACTV 0xFF00 ! 253: ! 254: form_pic_mask() ! 255: { ! 256: unsigned short i, j, bit, mask; ! 257: ! 258: for (i=SPL0; i <= SPLHI; i++) { ! 259: for (j=0x00, bit=0x01, mask = 0; j < NINTR; j++, bit<<=1) ! 260: if (intpri[j] <= i) ! 261: mask |= bit; ! 262: ! 263: if ((mask & SLAVEACTV) != SLAVEACTV ) ! 264: mask &= SLAVEMASK; ! 265: ! 266: pic_mask[i] = mask; ! 267: } ! 268: } ! 269: ! 270: #if 0 ! 271: ! 272: intnull(unit_dev) ! 273: { ! 274: printf("intnull(%d)\n", unit_dev); ! 275: } ! 276: ! 277: int prtnull_count = 0; ! 278: prtnull(unit) ! 279: { ! 280: ++prtnull_count; ! 281: } ! 282: ! 283: #endif 0
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