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1.1 root 1: /*
2: * Copyright (c) 1995-1994 The University of Utah and
3: * the Computer Systems Laboratory at the University of Utah (CSL).
4: * All rights reserved.
5: *
6: * Permission to use, copy, modify and distribute this software is hereby
7: * granted provided that (1) source code retains these copyright, permission,
8: * and disclaimer notices, and (2) redistributions including binaries
9: * reproduce the notices in supporting documentation, and (3) all advertising
10: * materials mentioning features or use of this software display the following
11: * acknowledgement: ``This product includes software developed by the
12: * Computer Systems Laboratory at the University of Utah.''
13: *
14: * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
15: * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
16: * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17: *
18: * CSL requests users of this software to return to [email protected] any
19: * improvements that they make and grant CSL redistribution rights.
20: *
21: * Author: Bryan Ford, University of Utah CSL
22: */
23: #ifndef _I386_IDT_
24: #define _I386_IDT_
25:
26: #include <mach/vm_param.h>
27: #include <mach/machine/seg.h>
28:
29: #include "irq.h"
30:
31: /* On a standard PC, we only need 16 interrupt vectors,
32: because that's all the PIC hardware supports. */
33: #ifndef IDTSZ
34: #define IDTSZ (IDT_IRQ_BASE+IRQ_COUNT)
35: #endif
36:
37:
38: /* Fill a gate in a CPU's IDT. */
39: #define fill_idt_gate(cpu, int_num, entry, selector, access) \
40: fill_gate(&(cpu)->tables.idt[int_num], \
41: entry, selector, access, 0)
42:
43: #endif _I386_IDT_
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