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1.1 root 1: /*
2: * Mach Operating System
3: * Copyright (c) 1993,1992,1991,1990 Carnegie Mellon University
4: * Copyright (c) 1991 IBM Corporation
5: * All Rights Reserved.
6: *
7: * Permission to use, copy, modify and distribute this software and its
8: * documentation is hereby granted, provided that both the copyright
9: * notice and this permission notice appear in all copies of the
10: * software, derivative works or modified versions, and any portions
11: * thereof, and that both notices appear in supporting documentation,
12: * and that the nema IBM not be used in advertising or publicity
13: * pertaining to distribution of the software without specific, written
14: * prior permission.
15: *
16: * CARNEGIE MELLON AND IBM ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17: * CONDITION. CARNEGIE MELLON AND IBM DISCLAIM ANY LIABILITY OF ANY KIND FOR
18: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19: *
20: * Carnegie Mellon requests users of this software to return to
21: *
22: * Software Distribution Coordinator or [email protected]
23: * School of Computer Science
24: * Carnegie Mellon University
25: * Pittsburgh PA 15213-3890
26: *
27: * any improvements or extensions that they make and grant Carnegie Mellon
28: * the rights to redistribute these changes.
29: */
30:
31: #include <mach/machine/asm.h>
32: #include <mach/machine/eflags.h>
33: #include <mach/machine/trap.h>
34: #include <mach/machine/seg.h>
35:
36: #include "trap.h"
37: #include "idt_inittab.h"
38: #include "debug.h"
39:
40: /*
41: * This is a default idt_inittab
42: * that simply invokes panic_trap on any trap.
43: * All gates are interrupt gates,
44: * so that interrupts will be immediately turned off.
45: */
46:
47:
48: /*
49: * No error code. Clear error code and push trap number.
50: */
51: #define EXCEPTION(n,name) \
52: IDT_ENTRY(n,EXT(name),ACC_PL_K|ACC_INTR_GATE);\
53: ENTRY(name) ;\
54: pushl $(0) ;\
55: pushl $(n) ;\
56: jmp alltraps
57:
58: /*
59: * User-accessible exception. Otherwise, same as above.
60: */
61: #define EXCEP_USR(n,name) \
62: IDT_ENTRY(n,EXT(name),ACC_PL_U|ACC_INTR_GATE);\
63: ENTRY(name) ;\
64: pushl $(0) ;\
65: pushl $(n) ;\
66: jmp alltraps
67:
68: /*
69: * Error code has been pushed. Just push trap number.
70: */
71: #define EXCEP_ERR(n,name) \
72: IDT_ENTRY(n,EXT(name),ACC_PL_K|ACC_INTR_GATE);\
73: ENTRY(name) ;\
74: pushl $(n) ;\
75: jmp alltraps
76:
77: /*
78: * Special interrupt code: dispatches to a unique entrypoint,
79: * not defined automatically here.
80: */
81: #define EXCEP_SPC(n,name) \
82: IDT_ENTRY(n,EXT(name),ACC_PL_K|ACC_INTR_GATE)
83:
84:
85: IDT_INITTAB_BEGIN
86:
87: EXCEPTION(0x00,t_zero_div)
88: EXCEPTION(0x01,t_debug)
89: EXCEP_USR(0x03,t_int3)
90: EXCEP_USR(0x04,t_into)
91: EXCEP_USR(0x05,t_bounds)
92: EXCEPTION(0x06,t_invop)
93: EXCEPTION(0x07,t_nofpu)
94: EXCEPTION(0x08,a_dbl_fault)
95: EXCEPTION(0x09,a_fpu_over)
96: EXCEP_ERR(0x0a,a_inv_tss)
97: EXCEP_ERR(0x0b,t_segnp)
98: EXCEP_ERR(0x0c,t_stack_fault)
99: EXCEP_ERR(0x0d,t_gen_prot)
100: EXCEP_ERR(0x0e,t_page_fault)
101: EXCEPTION(0x0f,t_trap_0f)
102: EXCEPTION(0x10,t_fpu_err)
103: EXCEPTION(0x11,t_trap_11)
104: EXCEPTION(0x12,t_trap_12)
105: EXCEPTION(0x13,t_trap_13)
106: EXCEPTION(0x14,t_trap_14)
107: EXCEPTION(0x15,t_trap_15)
108: EXCEPTION(0x16,t_trap_16)
109: EXCEPTION(0x17,t_trap_17)
110: EXCEPTION(0x18,t_trap_18)
111: EXCEPTION(0x19,t_trap_19)
112: EXCEPTION(0x1a,t_trap_1a)
113: EXCEPTION(0x1b,t_trap_1b)
114: EXCEPTION(0x1c,t_trap_1c)
115: EXCEPTION(0x1d,t_trap_1d)
116: EXCEPTION(0x1e,t_trap_1e)
117: EXCEPTION(0x1f,t_trap_1f)
118:
119: IDT_INITTAB_END
120:
121: alltraps:
122: pusha
123: pushl %ds
124: pushl %es
125: pushl %fs
126: pushl %gs
127: jmp EXT(trap_handler)
128:
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