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1.1 root 1: /* drivers/net/eepro100.c: An Intel i82557-559 Ethernet driver for Linux. */
2: /*
3: NOTICE: this version of the driver is supposed to work with 2.2 kernels.
4: Written 1996-1999 by Donald Becker.
5:
6: This software may be used and distributed according to the terms
7: of the GNU Public License, incorporated herein by reference.
8:
9: This driver is for the Intel EtherExpress Pro100 (Speedo3) design.
10: It should work with all i82557/558/559 boards.
11:
12: To use as a module, use the compile-command at the end of the file.
13:
14: The author may be reached as [email protected], or C/O
15: Center of Excellence in Space Data and Information Sciences
16: Code 930.5, NASA Goddard Space Flight Center, Greenbelt MD 20771
17: For updates see
18: http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html
19: For installation instructions
20: http://cesdis.gsfc.nasa.gov/linux/misc/modules.html
21: There is a Majordomo mailing list based at
22: [email protected]
23:
24: The driver also contains updates by different kernel developers.
25: This driver clone is maintained by Andrey V. Savochkin <[email protected]>.
26: Please use this email address and linux-kernel mailing list for bug reports.
27:
28: Modification history:
29: 2000 Mar 24 Dragan Stancevic <[email protected]>
30: Disabled FC and ER, to avoid lockups when when we get FCP interrupts.
31: 2000 May 27 Andrey Moruga <[email protected]>
32: Code duplication for 82559ER support was removed.
33: Accurate handling of all supported chips was implemented.
34: Some fixes in 2.3 clone of the driver were ported.
35: 2000 May 30 Dragan Stancevic <[email protected]> and
36: Andrey Moruga <[email protected]>
37: Honor PortReset timing specification.
38: 2000 Jul 25 Dragan Stancevic <[email protected]>
39: Changed to MMIO, resized FIFOs, resized rings, changed ISR timeout
40: Problem reported by:
41: Marc MERLIN <[email protected]>
42: 2000 Nov 15 Dragan Stancevic <[email protected]>
43: Changed command completion time and added debug info as to which
44: CMD timed out. Problem reported by:
45: "Ulrich Windl" <[email protected]>
46: */
47:
48: #define USE_IO
49: static const char *version =
50: "eepro100.c:v1.09j-t 9/29/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html\n"
51: "eepro100.c: $Revision: 1.1 $ 2000/05/31 Modified by Andrey V. Savochkin <[email protected]> and others\n"
52: "eepro100.c: VA Linux custom, Dragan Stancevic <[email protected]> 2000/11/15\n";
53:
54: /* A few user-configurable values that apply to all boards.
55: First set is undocumented and spelled per Intel recommendations. */
56:
57: static int congenb = 0; /* Enable congestion control in the DP83840. */
58: static int txfifo = 0; /* Tx FIFO threshold in 4 byte units, 0-15 */
59: static int rxfifo = 0xF; /* Rx FIFO threshold, default 32 bytes. */
60: /* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */
61: static int txdmacount = 128;
62: static int rxdmacount = 0;
63:
64: /* Set the copy breakpoint for the copy-only-tiny-buffer Rx method.
65: Lower values use more memory, but are faster. */
66: #if defined(__alpha__) || defined(__sparc__)
67: /* force copying of all packets to avoid unaligned accesses on Alpha */
68: static int rx_copybreak = 1518;
69: #else
70: static int rx_copybreak = 200;
71: #endif
72:
73: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
74: static int max_interrupt_work = 200;
75:
76: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */
77: static int multicast_filter_limit = 64;
78:
79: /* 'options' is used to pass a transceiver override or full-duplex flag
80: e.g. "options=16" for FD, "options=32" for 100mbps-only. */
81: static int full_duplex[] = {-1, -1, -1, -1, -1, -1, -1, -1};
82: static int options[] = {-1, -1, -1, -1, -1, -1, -1, -1};
83: #ifdef MODULE
84: static int debug = -1; /* The debug level */
85: #endif
86:
87: /* A few values that may be tweaked. */
88: /* The ring sizes should be a power of two for efficiency. */
89: #define TX_RING_SIZE 64
90: #define RX_RING_SIZE 64
91: /* How much slots multicast filter setup may take.
92: Do not descrease without changing set_rx_mode() implementaion. */
93: #define TX_MULTICAST_SIZE 2
94: #define TX_MULTICAST_RESERV (TX_MULTICAST_SIZE*2)
95: /* Actual number of TX packets queued, must be
96: <= TX_RING_SIZE-TX_MULTICAST_RESERV. */
97: #define TX_QUEUE_LIMIT (TX_RING_SIZE-TX_MULTICAST_RESERV)
98: /* Hysteresis marking queue as no longer full. */
99: #define TX_QUEUE_UNFULL (TX_QUEUE_LIMIT-4)
100:
101: /* Operational parameters that usually are not changed. */
102:
103: /* Time in jiffies before concluding the transmitter is hung. */
104: #define TX_TIMEOUT (2*HZ)
105: /* Size of an pre-allocated Rx buffer: <Ethernet MTU> + slack.*/
106: #define PKT_BUF_SZ 1536
107:
108: #if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
109: #warning You must compile this file with the correct options!
110: #warning See the last lines of the source file.
111: #error You must compile this driver with "-O".
112: #endif
113:
114: #include <linux/version.h>
115: #include <linux/module.h>
116: #if defined(MODVERSIONS)
117: #include <linux/modversions.h>
118: #endif
119:
120: #include <linux/kernel.h>
121: #include <linux/string.h>
122: #include <linux/timer.h>
123: #include <linux/errno.h>
124: #include <linux/ioport.h>
125: #include <linux/malloc.h>
126: #include <linux/interrupt.h>
127: #include <linux/pci.h>
128: #include <linux/compatmac.h>
129: #include <asm/spinlock.h>
130: #include <asm/processor.h>
131: #include <asm/bitops.h>
132: #include <asm/io.h>
133: /* #include <asm/unaligned.h> */
134: /* #include <asm/byteorder.h> */
135: #define __LITTLE_ENDIAN
136: #include <asm/hardirq.h>
137:
138: #include <linux/netdevice.h>
139: #include <linux/etherdevice.h>
140: #include <linux/skbuff.h>
141: #include <linux/delay.h>
142:
143: #if defined(MODULE) && (LINUX_VERSION_CODE > 0x20115)
144: MODULE_AUTHOR("Maintainer: Andrey V. Savochkin <[email protected]>");
145: MODULE_DESCRIPTION("Intel i82557/i82558 PCI EtherExpressPro driver");
146: MODULE_PARM(debug, "i");
147: MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
148: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
149: MODULE_PARM(congenb, "i");
150: MODULE_PARM(txfifo, "i");
151: MODULE_PARM(rxfifo, "i");
152: MODULE_PARM(txdmacount, "i");
153: MODULE_PARM(rxdmacount, "i");
154: MODULE_PARM(rx_copybreak, "i");
155: MODULE_PARM(max_interrupt_work, "i");
156: MODULE_PARM(multicast_filter_limit, "i");
157: #endif
158:
159: #if (LINUX_VERSION_CODE >= 0x20100)
160: static char kernel_version[] = UTS_RELEASE;
161: #endif
162:
163: #if LINUX_VERSION_CODE < 0x20123
164: #define hard_smp_processor_id() smp_processor_id()
165: #define test_and_set_bit(val, addr) set_bit(val, addr)
166: #define le16_to_cpu(val) (val)
167: #define le32_to_cpu(val) (val)
168: #define cpu_to_le32(val) (val)
169: #define cpu_to_le16(val) (val)
170: #endif
171: #if LINUX_VERSION_CODE <= 0x20139
172: #define net_device_stats enet_statistics
173: #else
174: #define NETSTATS_VER2
175: #endif
176: #if LINUX_VERSION_CODE < 0x20155
177: /* Grrrr, the PCI code changed, but did not consider CardBus... */
178: #include <linux/bios32.h>
179: #define PCI_SUPPORT_VER1
180: #else
181: #define PCI_SUPPORT_VER2
182: #endif
183: #if LINUX_VERSION_CODE < 0x20159
184: #define dev_free_skb(skb) dev_kfree_skb(skb, FREE_WRITE);
185: #else
186: #define dev_free_skb(skb) dev_kfree_skb(skb);
187: #endif
188: #if ! defined(CAP_NET_ADMIN)
189: #define capable(CAP_XXX) (suser())
190: #endif
191:
192: #define RUN_AT(x) (jiffies + (x))
193: /* Condensed bus+endian portability operations. */
194: #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
195: #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
196:
197: #define net_device device
198: #define pci_base_address(p, n) (p)->base_address[n]
199:
200: #define netif_wake_queue(dev) do { \
201: clear_bit(0, (void*)&dev->tbusy); \
202: mark_bh(NET_BH); \
203: } while(0)
204: #define netif_start_queue(dev) clear_bit(0, (void*)&dev->tbusy)
205: #define netif_stop_queue(dev) set_bit(0, (void*)&dev->tbusy)
206: #ifndef PCI_DEVICE_ID_INTEL_82559ER
207: #define PCI_DEVICE_ID_INTEL_82559ER 0x1209
208: #endif
209: #ifndef PCI_DEVICE_ID_INTEL_ID1029
210: #define PCI_DEVICE_ID_INTEL_ID1029 0x1029
211: #endif
212: #ifndef PCI_DEVICE_ID_INTEL_ID1030
213: #define PCI_DEVICE_ID_INTEL_ID1030 0x1030
214: #endif
215: #ifndef PCI_DEVICE_ID_INTEL_ID2449
216: #define PCI_DEVICE_ID_INTEL_ID2449 0x2449
217: #endif
218:
219: /* The total I/O port extent of the board.
220: The registers beyond 0x18 only exist on the i82558. */
221: #define SPEEDO3_TOTAL_SIZE 0x20
222:
223: int speedo_debug = 1;
224:
225: /*
226: Theory of Operation
227:
228: I. Board Compatibility
229:
230: This device driver is designed for the Intel i82557 "Speedo3" chip, Intel's
231: single-chip fast Ethernet controller for PCI, as used on the Intel
232: EtherExpress Pro 100 adapter.
233:
234: II. Board-specific settings
235:
236: PCI bus devices are configured by the system at boot time, so no jumpers
237: need to be set on the board. The system BIOS should be set to assign the
238: PCI INTA signal to an otherwise unused system IRQ line. While it's
239: possible to share PCI interrupt lines, it negatively impacts performance and
240: only recent kernels support it.
241:
242: III. Driver operation
243:
244: IIIA. General
245: The Speedo3 is very similar to other Intel network chips, that is to say
246: "apparently designed on a different planet". This chips retains the complex
247: Rx and Tx descriptors and multiple buffers pointers as previous chips, but
248: also has simplified Tx and Rx buffer modes. This driver uses the "flexible"
249: Tx mode, but in a simplified lower-overhead manner: it associates only a
250: single buffer descriptor with each frame descriptor.
251:
252: Despite the extra space overhead in each receive skbuff, the driver must use
253: the simplified Rx buffer mode to assure that only a single data buffer is
254: associated with each RxFD. The driver implements this by reserving space
255: for the Rx descriptor at the head of each Rx skbuff.
256:
257: The Speedo-3 has receive and command unit base addresses that are added to
258: almost all descriptor pointers. The driver sets these to zero, so that all
259: pointer fields are absolute addresses.
260:
261: The System Control Block (SCB) of some previous Intel chips exists on the
262: chip in both PCI I/O and memory space. This driver uses the I/O space
263: registers, but might switch to memory mapped mode to better support non-x86
264: processors.
265:
266: IIIB. Transmit structure
267:
268: The driver must use the complex Tx command+descriptor mode in order to
269: have a indirect pointer to the skbuff data section. Each Tx command block
270: (TxCB) is associated with two immediately appended Tx Buffer Descriptor
271: (TxBD). A fixed ring of these TxCB+TxBD pairs are kept as part of the
272: speedo_private data structure for each adapter instance.
273:
274: The newer i82558 explicitly supports this structure, and can read the two
275: TxBDs in the same PCI burst as the TxCB.
276:
277: This ring structure is used for all normal transmit packets, but the
278: transmit packet descriptors aren't long enough for most non-Tx commands such
279: as CmdConfigure. This is complicated by the possibility that the chip has
280: already loaded the link address in the previous descriptor. So for these
281: commands we convert the next free descriptor on the ring to a NoOp, and point
282: that descriptor's link to the complex command.
283:
284: An additional complexity of these non-transmit commands are that they may be
285: added asynchronous to the normal transmit queue, so we disable interrupts
286: whenever the Tx descriptor ring is manipulated.
287:
288: A notable aspect of these special configure commands is that they do
289: work with the normal Tx ring entry scavenge method. The Tx ring scavenge
290: is done at interrupt time using the 'dirty_tx' index, and checking for the
291: command-complete bit. While the setup frames may have the NoOp command on the
292: Tx ring marked as complete, but not have completed the setup command, this
293: is not a problem. The tx_ring entry can be still safely reused, as the
294: tx_skbuff[] entry is always empty for config_cmd and mc_setup frames.
295:
296: Commands may have bits set e.g. CmdSuspend in the command word to either
297: suspend or stop the transmit/command unit. This driver always flags the last
298: command with CmdSuspend, erases the CmdSuspend in the previous command, and
299: then issues a CU_RESUME.
300: Note: Watch out for the potential race condition here: imagine
301: erasing the previous suspend
302: the chip processes the previous command
303: the chip processes the final command, and suspends
304: doing the CU_RESUME
305: the chip processes the next-yet-valid post-final-command.
306: So blindly sending a CU_RESUME is only safe if we do it immediately after
307: after erasing the previous CmdSuspend, without the possibility of an
308: intervening delay. Thus the resume command is always within the
309: interrupts-disabled region. This is a timing dependence, but handling this
310: condition in a timing-independent way would considerably complicate the code.
311:
312: Note: In previous generation Intel chips, restarting the command unit was a
313: notoriously slow process. This is presumably no longer true.
314:
315: IIIC. Receive structure
316:
317: Because of the bus-master support on the Speedo3 this driver uses the new
318: SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer.
319: This scheme allocates full-sized skbuffs as receive buffers. The value
320: SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to
321: trade-off the memory wasted by passing the full-sized skbuff to the queue
322: layer for all frames vs. the copying cost of copying a frame to a
323: correctly-sized skbuff.
324:
325: For small frames the copying cost is negligible (esp. considering that we
326: are pre-loading the cache with immediately useful header information), so we
327: allocate a new, minimally-sized skbuff. For large frames the copying cost
328: is non-trivial, and the larger copy might flush the cache of useful data, so
329: we pass up the skbuff the packet was received into.
330:
331: IV. Notes
332:
333: Thanks to Steve Williams of Intel for arranging the non-disclosure agreement
334: that stated that I could disclose the information. But I still resent
335: having to sign an Intel NDA when I'm helping Intel sell their own product!
336:
337: */
338:
339: /* This table drives the PCI probe routines. */
340: static struct net_device *speedo_found1(struct pci_dev *pdev, int pci_bus,
341: int pci_devfn, long ioaddr,
342: int chip_idx, int card_idx);
343:
344: #ifdef USE_IO
345: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_IO|PCI_ADDR1
346: #define SPEEDO_SIZE 32
347: #else
348: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_MEM|PCI_ADDR0
349: #define SPEEDO_SIZE 0x1000
350: #endif
351:
352: enum pci_flags_bit {
353: PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
354: PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
355: };
356: struct pci_id_info {
357: const char *name;
358: u16 vendor_id, device_id;
359: int pci_index;
360: } static pci_tbl[] = {
361: { "Intel PCI EtherExpress Pro100 82557",
362: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82557,
363: 0
364: },
365: { "Intel PCI EtherExpress Pro100 82559ER",
366: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82559ER,
367: 0
368: },
369: { "Intel PCI EtherExpress Pro100 ID1029",
370: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID1029,
371: 0
372: },
373: { "Intel Corporation 82559 InBusiness 10/100",
374: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID1030,
375: 0
376: },
377: { "Intel PCI EtherExpress Pro100 82562EM",
378: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID2449,
379: 0
380: },
381: {0,} /* 0 terminated list. */
382: };
383:
384: static inline unsigned int io_inw(unsigned long port)
385: {
386: return inw(port);
387: }
388: static inline void io_outw(unsigned int val, unsigned long port)
389: {
390: outw(val, port);
391: }
392:
393: #ifndef USE_IO
394: #undef inb
395: #undef inw
396: #undef inl
397: #undef outb
398: #undef outw
399: #undef outl
400: #define inb readb
401: #define inw readw
402: #define inl readl
403: #define outb writeb
404: #define outw writew
405: #define outl writel
406: #endif
407:
408: /* How to wait for the command unit to accept a command.
409: Typically this takes 0 ticks. */
410: static inline void wait_for_cmd_done(long cmd_ioaddr)
411: {
412: int wait = 20000;
413: char cmd_reg1, cmd_reg2;
414: do ;
415: while((cmd_reg1 = inb(cmd_ioaddr)) && (--wait >= 0));
416:
417: /* Last chance to change your mind --Dragan*/
418: if (wait < 0){
419: cmd_reg2 = inb(cmd_ioaddr);
420: if(cmd_reg2){
421: printk(KERN_ALERT "eepro100: cmd_wait for(%#2.2x) timedout with(%#2.2x)!\n",
422: cmd_reg1, cmd_reg2);
423:
424: }
425: }
426:
427: }
428:
429: /* Offsets to the various registers.
430: All accesses need not be longword aligned. */
431: enum speedo_offsets {
432: SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
433: SCBPointer = 4, /* General purpose pointer. */
434: SCBPort = 8, /* Misc. commands and operands. */
435: SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
436: SCBCtrlMDI = 16, /* MDI interface control. */
437: SCBEarlyRx = 20, /* Early receive byte count. */
438: };
439: /* Commands that can be put in a command list entry. */
440: enum commands {
441: CmdNOp = 0, CmdIASetup = 0x10000, CmdConfigure = 0x20000,
442: CmdMulticastList = 0x30000, CmdTx = 0x40000, CmdTDR = 0x50000,
443: CmdDump = 0x60000, CmdDiagnose = 0x70000,
444: CmdSuspend = 0x40000000, /* Suspend after completion. */
445: CmdIntr = 0x20000000, /* Interrupt after completion. */
446: CmdTxFlex = 0x00080000, /* Use "Flexible mode" for CmdTx command. */
447: };
448: /* Clear CmdSuspend (1<<30) avoiding interference with the card access to the
449: status bits. Previous driver versions used separate 16 bit fields for
450: commands and statuses. --SAW
451: */
452: #if defined(__LITTLE_ENDIAN)
453: #define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x4000
454: #elif defined(__BIG_ENDIAN)
455: #define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x0040
456: #else
457: #error Unsupported byteorder
458: #endif
459:
460: enum SCBCmdBits {
461: SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000,
462: SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400,
463: SCBTriggerIntr=0x0200, SCBMaskAll=0x0100,
464: /* The rest are Rx and Tx commands. */
465: CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, CUShowStats=0x0050,
466: CUCmdBase=0x0060, /* CU Base address (set to zero) . */
467: CUDumpStats=0x0070, /* Dump then reset stats counters. */
468: RxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006,
469: RxResumeNoResources=0x0007,
470: };
471:
472: enum SCBPort_cmds {
473: PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3,
474: };
475:
476: /* The Speedo3 Rx and Tx frame/buffer descriptors. */
477: struct descriptor { /* A generic descriptor. */
478: s32 cmd_status; /* All command and status fields. */
479: u32 link; /* struct descriptor * */
480: unsigned char params[0];
481: };
482:
483: /* The Speedo3 Rx and Tx buffer descriptors. */
484: struct RxFD { /* Receive frame descriptor. */
485: s32 status;
486: u32 link; /* struct RxFD * */
487: u32 rx_buf_addr; /* void * */
488: u32 count;
489: };
490:
491: /* Selected elements of the Tx/RxFD.status word. */
492: enum RxFD_bits {
493: RxComplete=0x8000, RxOK=0x2000,
494: RxErrCRC=0x0800, RxErrAlign=0x0400, RxErrTooBig=0x0200, RxErrSymbol=0x0010,
495: RxEth2Type=0x0020, RxNoMatch=0x0004, RxNoIAMatch=0x0002,
496: TxUnderrun=0x1000, StatusComplete=0x8000,
497: };
498:
499: struct TxFD { /* Transmit frame descriptor set. */
500: s32 status;
501: u32 link; /* void * */
502: u32 tx_desc_addr; /* Always points to the tx_buf_addr element. */
503: s32 count; /* # of TBD (=1), Tx start thresh., etc. */
504: /* This constitutes two "TBD" entries -- we only use one. */
505: u32 tx_buf_addr0; /* void *, frame to be transmitted. */
506: s32 tx_buf_size0; /* Length of Tx frame. */
507: u32 tx_buf_addr1; /* void *, frame to be transmitted. */
508: s32 tx_buf_size1; /* Length of Tx frame. */
509: };
510:
511: /* Multicast filter setting block. --SAW */
512: struct speedo_mc_block {
513: struct speedo_mc_block *next;
514: unsigned int tx;
515: struct descriptor frame __attribute__ ((__aligned__(16)));
516: };
517:
518: /* Elements of the dump_statistics block. This block must be lword aligned. */
519: struct speedo_stats {
520: u32 tx_good_frames;
521: u32 tx_coll16_errs;
522: u32 tx_late_colls;
523: u32 tx_underruns;
524: u32 tx_lost_carrier;
525: u32 tx_deferred;
526: u32 tx_one_colls;
527: u32 tx_multi_colls;
528: u32 tx_total_colls;
529: u32 rx_good_frames;
530: u32 rx_crc_errs;
531: u32 rx_align_errs;
532: u32 rx_resource_errs;
533: u32 rx_overrun_errs;
534: u32 rx_colls_errs;
535: u32 rx_runt_errs;
536: u32 done_marker;
537: };
538:
539: enum Rx_ring_state_bits {
540: RrNoMem=1, RrPostponed=2, RrNoResources=4, RrOOMReported=8,
541: };
542:
543: /* Do not change the position (alignment) of the first few elements!
544: The later elements are grouped for cache locality. */
545: struct speedo_private {
546: struct TxFD tx_ring[TX_RING_SIZE]; /* Commands (usually CmdTxPacket). */
547: struct RxFD *rx_ringp[RX_RING_SIZE]; /* Rx descriptor, used as ring. */
548: /* The addresses of a Tx/Rx-in-place packets/buffers. */
549: struct sk_buff* tx_skbuff[TX_RING_SIZE];
550: struct sk_buff* rx_skbuff[RX_RING_SIZE];
551: struct descriptor *last_cmd; /* Last command sent. */
552: unsigned int cur_tx, dirty_tx; /* The ring entries to be free()ed. */
553: spinlock_t lock; /* Group with Tx control cache line. */
554: u32 tx_threshold; /* The value for txdesc.count. */
555: struct RxFD *last_rxf; /* Last command sent. */
556: unsigned int cur_rx, dirty_rx; /* The next free ring entry */
557: long last_rx_time; /* Last Rx, in jiffies, to handle Rx hang. */
558: const char *product_name;
559: struct net_device *next_module;
560: void *priv_addr; /* Unaligned address for kfree */
561: struct enet_statistics stats;
562: struct speedo_stats lstats;
563: int chip_id;
564: unsigned char pci_bus, pci_devfn, acpi_pwr;
565: struct timer_list timer; /* Media selection timer. */
566: struct speedo_mc_block *mc_setup_head;/* Multicast setup frame list head. */
567: struct speedo_mc_block *mc_setup_tail;/* Multicast setup frame list tail. */
568: int in_interrupt; /* Word-aligned dev->interrupt */
569: char rx_mode; /* Current PROMISC/ALLMULTI setting. */
570: unsigned int tx_full:1; /* The Tx queue is full. */
571: unsigned int full_duplex:1; /* Full-duplex operation requested. */
572: unsigned int flow_ctrl:1; /* Use 802.3x flow control. */
573: unsigned int rx_bug:1; /* Work around receiver hang errata. */
574: unsigned int rx_bug10:1; /* Receiver might hang at 10mbps. */
575: unsigned int rx_bug100:1; /* Receiver might hang at 100mbps. */
576: unsigned char default_port:8; /* Last dev->if_port value. */
577: unsigned char rx_ring_state; /* RX ring status flags. */
578: unsigned short phy[2]; /* PHY media interfaces available. */
579: unsigned short advertising; /* Current PHY advertised caps. */
580: unsigned short partner; /* Link partner caps. */
581: };
582:
583: /* The parameters for a CmdConfigure operation.
584: There are so many options that it would be difficult to document each bit.
585: We mostly use the default or recommended settings. */
586: const char i82557_config_cmd[22] = {
587: 22, 0x08, 0, 0, 0, 0, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */
588: 0, 0x2E, 0, 0x60, 0,
589: 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */
590: 0x3f, 0x05, };
591: const char i82558_config_cmd[22] = {
592: 22, 0x08, 0, 1, 0, 0, 0x22, 0x03, 1, /* 1=Use MII 0=Use AUI */
593: 0, 0x2E, 0, 0x60, 0x08, 0x88,
594: 0x68, 0, 0x40, 0xf2, 0x84, /* Disable FC */
595: 0x31, 0x05, };
596:
597: /* PHY media interface chips. */
598: static const char *phys[] = {
599: "None", "i82553-A/B", "i82553-C", "i82503",
600: "DP83840", "80c240", "80c24", "i82555",
601: "unknown-8", "unknown-9", "DP83840A", "unknown-11",
602: "unknown-12", "unknown-13", "unknown-14", "unknown-15", };
603: enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,
604: S80C24, I82555, DP83840A=10, };
605: static const char is_mii[] = { 0, 1, 1, 0, 1, 1, 0, 1 };
606: #define EE_READ_CMD (6)
607:
608: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len);
609: static int mdio_read(long ioaddr, int phy_id, int location);
610: static int mdio_write(long ioaddr, int phy_id, int location, int value);
611: static int speedo_open(struct net_device *dev);
612: static void speedo_resume(struct net_device *dev);
613: static void speedo_timer(unsigned long data);
614: static void speedo_init_rx_ring(struct net_device *dev);
615: static void speedo_tx_timeout(struct net_device *dev);
616: static int speedo_start_xmit(struct sk_buff *skb, struct net_device *dev);
617: static void speedo_refill_rx_buffers(struct net_device *dev, int force);
618: static int speedo_rx(struct net_device *dev);
619: static void speedo_tx_buffer_gc(struct net_device *dev);
620: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
621: static int speedo_close(struct net_device *dev);
622: static struct enet_statistics *speedo_get_stats(struct net_device *dev);
623: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
624: static void set_rx_mode(struct net_device *dev);
625: static void speedo_show_state(struct net_device *dev);
626:
627:
628:
629: #ifdef honor_default_port
630: /* Optional driver feature to allow forcing the transceiver setting.
631: Not recommended. */
632: static int mii_ctrl[8] = { 0x3300, 0x3100, 0x0000, 0x0100,
633: 0x2000, 0x2100, 0x0400, 0x3100};
634: #endif
635:
636: /* A list of all installed Speedo devices, for removing the driver module. */
637: static struct net_device *root_speedo_dev = NULL;
638:
639: int eepro100_init(void)
640: {
641: int cards_found = 0;
642: int chip_idx;
643: struct pci_dev *pdev;
644: struct pci_dev rdev; pdev = &rdev;
645:
646: if (! pcibios_present())
647: return cards_found;
648:
649: for (chip_idx = 0; pci_tbl[chip_idx].name; chip_idx++) {
650: for (; pci_tbl[chip_idx].pci_index < 8; pci_tbl[chip_idx].pci_index++) {
651: unsigned char pci_bus, pci_device_fn, pci_latency;
652: unsigned long pciaddr;
653: long ioaddr;
654: int irq;
655:
656: u16 pci_command, new_command;
657:
658: if (pcibios_find_device(pci_tbl[chip_idx].vendor_id,
659: pci_tbl[chip_idx].device_id,
660: pci_tbl[chip_idx].pci_index, &pci_bus,
661: &pci_device_fn))
662: break;
663: {
664: #if defined(PCI_SUPPORT_VER2)
665: pdev = pci_find_slot(pci_bus, pci_device_fn);
666: #ifdef USE_IO
667: pciaddr = pci_base_address(pdev, 1); /* Use [0] to mem-map */
668: #else
669: pciaddr = pci_base_address(pdev, 0);
670: #endif
671: irq = pdev->irq;
672: #else
673: u32 pci_ioaddr;
674: u8 pci_irq_line;
675: #ifdef USE_IO
676: pcibios_read_config_dword(pci_bus, pci_device_fn,
677: PCI_BASE_ADDRESS_1, &pci_ioaddr);
678: #else
679: pcibios_read_config_dword(pci_bus, pci_device_fn,
680: PCI_BASE_ADDRESS_0, &pci_ioaddr);
681: #endif
682: pcibios_read_config_byte(pci_bus, pci_device_fn,
683: PCI_INTERRUPT_LINE, &pci_irq_line);
684: pciaddr = pci_ioaddr;
685: irq = pci_irq_line;
686: pdev->irq = irq;
687: #endif
688: }
689: /* Remove I/O space marker in bit 0. */
690: if (pciaddr & 1) {
691: ioaddr = pciaddr & ~3UL;
692: if (check_region(ioaddr, 32))
693: continue;
694: } else {
695: #ifdef __sparc__
696: /* ioremap is hosed in 2.2.x on Sparc. */
697: ioaddr = pciaddr & ~0xfUL;
698: #else
699: if ((ioaddr = (long)ioremap(pciaddr & ~0xfUL, 0x1000)) == 0) {
700: printk(KERN_INFO "Failed to map PCI address %#lx.\n",
701: pciaddr);
702: continue;
703: }
704: #endif
705: }
706: if (speedo_debug > 2)
707: printk("Found Intel i82557 PCI Speedo at I/O %#lx, IRQ %d.\n",
708: ioaddr, irq);
709:
710: /* Get and check the bus-master and latency values. */
711: pcibios_read_config_word(pci_bus, pci_device_fn,
712: PCI_COMMAND, &pci_command);
713: new_command = pci_command | PCI_COMMAND_MASTER|PCI_COMMAND_IO;
714: if (pci_command != new_command) {
715: printk(KERN_INFO " The PCI BIOS has not enabled this"
716: " device! Updating PCI command %4.4x->%4.4x.\n",
717: pci_command, new_command);
718: pcibios_write_config_word(pci_bus, pci_device_fn,
719: PCI_COMMAND, new_command);
720: }
721: pcibios_read_config_byte(pci_bus, pci_device_fn,
722: PCI_LATENCY_TIMER, &pci_latency);
723: if (pci_latency < 32) {
724: printk(" PCI latency timer (CFLT) is unreasonably low at %d."
725: " Setting to 32 clocks.\n", pci_latency);
726: pcibios_write_config_byte(pci_bus, pci_device_fn,
727: PCI_LATENCY_TIMER, 32);
728: } else if (speedo_debug > 1)
729: printk(" PCI latency timer (CFLT) is %#x.\n", pci_latency);
730:
731: if (speedo_found1(pdev, pci_bus, pci_device_fn, ioaddr, chip_idx, cards_found))
732: cards_found++;
733: }
734: }
735:
736: return cards_found;
737: }
738:
739: static struct net_device *speedo_found1(struct pci_dev *pdev, int pci_bus,
740: int pci_devfn, long ioaddr,
741: int chip_idx, int card_idx)
742: {
743: struct net_device *dev;
744: struct speedo_private *sp;
745: const char *product;
746: int i, option;
747: u16 eeprom[0x100];
748: int acpi_idle_state = 0;
749: #ifndef MODULE
750: static int did_version = 0; /* Already printed version info. */
751: if (speedo_debug > 0 && did_version++ == 0)
752: printk(version);
753: #endif
754:
755: dev = init_etherdev(NULL, sizeof(struct speedo_private));
756:
757: if (dev->mem_start > 0)
758: option = dev->mem_start;
759: else if (card_idx >= 0 && options[card_idx] >= 0)
760: option = options[card_idx];
761: else
762: option = 0;
763:
764: /* Read the station address EEPROM before doing the reset.
765: Nominally his should even be done before accepting the device, but
766: then we wouldn't have a device name with which to report the error.
767: The size test is for 6 bit vs. 8 bit address serial EEPROMs.
768: */
769: {
770: unsigned long iobase;
771: int read_cmd, ee_size;
772: u16 sum;
773: int j;
774:
775: /* Use IO only to avoid postponed writes and satisfy EEPROM timing
776: requirements. */
777: #if defined(PCI_SUPPORT_VER2)
778: iobase = pci_base_address(pdev, 1) & ~3UL;
779: #else
780: {
781: u32 pci_ioaddr;
782: pcibios_read_config_dword(pci_bus, pci_devfn,
783: PCI_BASE_ADDRESS_1, &pci_ioaddr);
784: iobase = pci_ioaddr & ~3UL;
785: }
786: #endif
787: if ((do_eeprom_cmd(iobase, EE_READ_CMD << 24, 27) & 0xffe0000)
788: == 0xffe0000) {
789: ee_size = 0x100;
790: read_cmd = EE_READ_CMD << 24;
791: } else {
792: ee_size = 0x40;
793: read_cmd = EE_READ_CMD << 22;
794: }
795:
796: for (j = 0, i = 0, sum = 0; i < ee_size; i++) {
797: u16 value = do_eeprom_cmd(iobase, read_cmd | (i << 16), 27);
798: eeprom[i] = value;
799: sum += value;
800: if (i < 3) {
801: dev->dev_addr[j++] = value;
802: dev->dev_addr[j++] = value >> 8;
803: }
804: }
805: if (sum != 0xBABA)
806: printk(KERN_WARNING "%s: Invalid EEPROM checksum %#4.4x, "
807: "check settings before activating this device!\n",
808: dev->name, sum);
809: /* Don't unregister_netdev(dev); as the EEPro may actually be
810: usable, especially if the MAC address is set later.
811: On the other hand, it may be unusable if MDI data is corrupted. */
812: }
813:
814: /* Reset the chip: stop Tx and Rx processes and clear counters.
815: This takes less than 10usec and will easily finish before the next
816: action. */
817: outl(PortReset, ioaddr + SCBPort);
818: inl(ioaddr + SCBPort);
819: /* Honor PortReset timing. */
820: udelay(10);
821:
822: if (eeprom[3] & 0x0100)
823: product = "OEM i82557/i82558 10/100 Ethernet";
824: else
825: product = pci_tbl[chip_idx].name;
826:
827: printk(KERN_INFO "%s: %s, ", dev->name, product);
828:
829: for (i = 0; i < 5; i++)
830: printk("%2.2X:", dev->dev_addr[i]);
831: printk("%2.2X, ", dev->dev_addr[i]);
832: #ifdef USE_IO
833: printk("I/O at %#3lx, ", ioaddr);
834: #endif
835: printk("IRQ %d.\n", pdev->irq);
836:
837: #if 1 || defined(kernel_bloat)
838: /* OK, this is pure kernel bloat. I don't like it when other drivers
839: waste non-pageable kernel space to emit similar messages, but I need
840: them for bug reports. */
841: {
842: const char *connectors[] = {" RJ45", " BNC", " AUI", " MII"};
843: /* The self-test results must be paragraph aligned. */
844: s32 str[6], *volatile self_test_results;
845: int boguscnt = 16000; /* Timeout for set-test. */
846: if ((eeprom[3] & 0x03) != 0x03)
847: printk(KERN_INFO " Receiver lock-up bug exists -- enabling"
848: " work-around.\n");
849: printk(KERN_INFO " Board assembly %4.4x%2.2x-%3.3d, Physical"
850: " connectors present:",
851: eeprom[8], eeprom[9]>>8, eeprom[9] & 0xff);
852: for (i = 0; i < 4; i++)
853: if (eeprom[5] & (1<<i))
854: printk(connectors[i]);
855: printk("\n"KERN_INFO" Primary interface chip %s PHY #%d.\n",
856: phys[(eeprom[6]>>8)&15], eeprom[6] & 0x1f);
857: if (eeprom[7] & 0x0700)
858: printk(KERN_INFO " Secondary interface chip %s.\n",
859: phys[(eeprom[7]>>8)&7]);
860: if (((eeprom[6]>>8) & 0x3f) == DP83840
861: || ((eeprom[6]>>8) & 0x3f) == DP83840A) {
862: int mdi_reg23 = mdio_read(ioaddr, eeprom[6] & 0x1f, 23) | 0x0422;
863: if (congenb)
864: mdi_reg23 |= 0x0100;
865: printk(KERN_INFO" DP83840 specific setup, setting register 23 to %4.4x.\n",
866: mdi_reg23);
867: mdio_write(ioaddr, eeprom[6] & 0x1f, 23, mdi_reg23);
868: }
869: if ((option >= 0) && (option & 0x70)) {
870: printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n",
871: (option & 0x20 ? 100 : 10),
872: (option & 0x10 ? "full" : "half"));
873: mdio_write(ioaddr, eeprom[6] & 0x1f, 0,
874: ((option & 0x20) ? 0x2000 : 0) | /* 100mbps? */
875: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
876: }
877:
878: /* Perform a system self-test. */
879: self_test_results = (s32*) ((((long) str) + 15) & ~0xf);
880: self_test_results[0] = 0;
881: self_test_results[1] = -1;
882: outl(virt_to_bus(self_test_results) | PortSelfTest, ioaddr + SCBPort);
883: do {
884: udelay(10);
885: } while (self_test_results[1] == -1 && --boguscnt >= 0);
886:
887: if (boguscnt < 0) { /* Test optimized out. */
888: printk(KERN_ERR "Self test failed, status %8.8x:\n"
889: KERN_ERR " Failure to initialize the i82557.\n"
890: KERN_ERR " Verify that the card is a bus-master"
891: " capable slot.\n",
892: self_test_results[1]);
893: } else
894: printk(KERN_INFO " General self-test: %s.\n"
895: KERN_INFO " Serial sub-system self-test: %s.\n"
896: KERN_INFO " Internal registers self-test: %s.\n"
897: KERN_INFO " ROM checksum self-test: %s (%#8.8x).\n",
898: self_test_results[1] & 0x1000 ? "failed" : "passed",
899: self_test_results[1] & 0x0020 ? "failed" : "passed",
900: self_test_results[1] & 0x0008 ? "failed" : "passed",
901: self_test_results[1] & 0x0004 ? "failed" : "passed",
902: self_test_results[0]);
903: }
904: #endif /* kernel_bloat */
905:
906: outl(PortReset, ioaddr + SCBPort);
907: inl(ioaddr + SCBPort);
908: /* Honor PortReset timing. */
909: udelay(10);
910:
911: /* We do a request_region() only to register /proc/ioports info. */
912: request_region(ioaddr, SPEEDO3_TOTAL_SIZE, "Intel Speedo3 Ethernet");
913:
914: dev->base_addr = ioaddr;
915: dev->irq = pdev->irq;
916:
917: sp = dev->priv;
918: if (dev->priv == NULL) {
919: void *mem = kmalloc(sizeof(*sp), GFP_KERNEL);
920: dev->priv = sp = mem; /* Cache align here if kmalloc does not. */
921: sp->priv_addr = mem;
922: }
923: memset(sp, 0, sizeof(*sp));
924: sp->next_module = root_speedo_dev;
925: root_speedo_dev = dev;
926:
927: sp->pci_bus = pci_bus;
928: sp->pci_devfn = pci_devfn;
929: sp->chip_id = chip_idx;
930: sp->acpi_pwr = acpi_idle_state;
931:
932: sp->full_duplex = option >= 0 && (option & 0x10) ? 1 : 0;
933: if (card_idx >= 0) {
934: if (full_duplex[card_idx] >= 0)
935: sp->full_duplex = full_duplex[card_idx];
936: }
937: sp->default_port = option >= 0 ? (option & 0x0f) : 0;
938:
939: sp->phy[0] = eeprom[6];
940: sp->phy[1] = eeprom[7];
941: sp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1;
942:
943: if (sp->rx_bug)
944: printk(KERN_INFO " Receiver lock-up workaround activated.\n");
945:
946: /* The Speedo-specific entries in the device structure. */
947: dev->open = &speedo_open;
948: dev->hard_start_xmit = &speedo_start_xmit;
949: #if defined(HAS_NETIF_QUEUE)
950: dev->tx_timeout = &speedo_tx_timeout;
951: dev->watchdog_timeo = TX_TIMEOUT;
952: #endif
953: dev->stop = &speedo_close;
954: dev->get_stats = &speedo_get_stats;
955: dev->set_multicast_list = &set_rx_mode;
956: dev->do_ioctl = &speedo_ioctl;
957:
958: return dev;
959: }
960:
961: /* Serial EEPROM section.
962: A "bit" grungy, but we work our way through bit-by-bit :->. */
963: /* EEPROM_Ctrl bits. */
964: #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
965: #define EE_CS 0x02 /* EEPROM chip select. */
966: #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
967: #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
968: #define EE_ENB (0x4800 | EE_CS)
969: #define EE_WRITE_0 0x4802
970: #define EE_WRITE_1 0x4806
971: #define EE_OFFSET SCBeeprom
972:
973: /* The fixes for the code were kindly provided by Dragan Stancevic
974: <[email protected]> to strictly follow Intel specifications of EEPROM
975: access timing.
976: The publicly available sheet 64486302 (sec. 3.1) specifies 1us access
977: interval for serial EEPROM. However, it looks like that there is an
978: additional requirement dictating larger udelay's in the code below.
979: 2000/05/24 SAW */
980: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
981: {
982: unsigned retval = 0;
983: long ee_addr = ioaddr + SCBeeprom;
984:
985: io_outw(EE_ENB, ee_addr); udelay(2);
986: io_outw(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2);
987:
988: /* Shift the command bits out. */
989: do {
990: short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
991: io_outw(dataval, ee_addr); udelay(2);
992: io_outw(dataval | EE_SHIFT_CLK, ee_addr); udelay(2);
993: retval = (retval << 1) | ((io_inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
994: } while (--cmd_len >= 0);
995: io_outw(EE_ENB, ee_addr); udelay(2);
996:
997: /* Terminate the EEPROM access. */
998: io_outw(EE_ENB & ~EE_CS, ee_addr);
999: return retval;
1000: }
1001:
1002: static int mdio_read(long ioaddr, int phy_id, int location)
1003: {
1004: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
1005: outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);
1006: do {
1007: val = inl(ioaddr + SCBCtrlMDI);
1008: if (--boguscnt < 0) {
1009: printk(KERN_ERR " mdio_read() timed out with val = %8.8x.\n", val);
1010: break;
1011: }
1012: } while (! (val & 0x10000000));
1013: return val & 0xffff;
1014: }
1015:
1016: static int mdio_write(long ioaddr, int phy_id, int location, int value)
1017: {
1018: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
1019: outl(0x04000000 | (location<<16) | (phy_id<<21) | value,
1020: ioaddr + SCBCtrlMDI);
1021: do {
1022: val = inl(ioaddr + SCBCtrlMDI);
1023: if (--boguscnt < 0) {
1024: printk(KERN_ERR" mdio_write() timed out with val = %8.8x.\n", val);
1025: break;
1026: }
1027: } while (! (val & 0x10000000));
1028: return val & 0xffff;
1029: }
1030:
1031:
1032: static int
1033: speedo_open(struct net_device *dev)
1034: {
1035: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1036: long ioaddr = dev->base_addr;
1037:
1038: if (speedo_debug > 1)
1039: printk(KERN_DEBUG "%s: speedo_open() irq %d.\n", dev->name, dev->irq);
1040:
1041: MOD_INC_USE_COUNT;
1042:
1043: /* Set up the Tx queue early.. */
1044: sp->cur_tx = 0;
1045: sp->dirty_tx = 0;
1046: sp->last_cmd = 0;
1047: sp->tx_full = 0;
1048: sp->lock = (spinlock_t) SPIN_LOCK_UNLOCKED;
1049: sp->in_interrupt = 0;
1050:
1051: /* .. we can safely take handler calls during init. */
1052: if (request_irq(dev->irq, &speedo_interrupt, SA_SHIRQ, dev->name, dev)) {
1053: MOD_DEC_USE_COUNT;
1054: return -EAGAIN;
1055: }
1056:
1057: dev->if_port = sp->default_port;
1058:
1059: #ifdef oh_no_you_dont_unless_you_honour_the_options_passed_in_to_us
1060: /* Retrigger negotiation to reset previous errors. */
1061: if ((sp->phy[0] & 0x8000) == 0) {
1062: int phy_addr = sp->phy[0] & 0x1f ;
1063: /* Use 0x3300 for restarting NWay, other values to force xcvr:
1064: 0x0000 10-HD
1065: 0x0100 10-FD
1066: 0x2000 100-HD
1067: 0x2100 100-FD
1068: */
1069: #ifdef honor_default_port
1070: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]);
1071: #else
1072: mdio_write(ioaddr, phy_addr, 0, 0x3300);
1073: #endif
1074: }
1075: #endif
1076:
1077: speedo_init_rx_ring(dev);
1078:
1079: /* Fire up the hardware. */
1080: outw(SCBMaskAll, ioaddr + SCBCmd);
1081: speedo_resume(dev);
1082:
1083: dev->interrupt = 0;
1084: dev->start = 1;
1085: netif_start_queue(dev);
1086:
1087: /* Setup the chip and configure the multicast list. */
1088: sp->mc_setup_head = NULL;
1089: sp->mc_setup_tail = NULL;
1090: sp->flow_ctrl = sp->partner = 0;
1091: sp->rx_mode = -1; /* Invalid -> always reset the mode. */
1092: set_rx_mode(dev);
1093: if ((sp->phy[0] & 0x8000) == 0)
1094: sp->advertising = mdio_read(ioaddr, sp->phy[0] & 0x1f, 4);
1095:
1096: if (speedo_debug > 2) {
1097: printk(KERN_DEBUG "%s: Done speedo_open(), status %8.8x.\n",
1098: dev->name, inw(ioaddr + SCBStatus));
1099: }
1100:
1101: /* Set the timer. The timer serves a dual purpose:
1102: 1) to monitor the media interface (e.g. link beat) and perhaps switch
1103: to an alternate media type
1104: 2) to monitor Rx activity, and restart the Rx process if the receiver
1105: hangs. */
1106: init_timer(&sp->timer);
1107: sp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1108: sp->timer.data = (unsigned long)dev;
1109: sp->timer.function = &speedo_timer; /* timer handler */
1110: add_timer(&sp->timer);
1111:
1112: /* No need to wait for the command unit to accept here. */
1113: if ((sp->phy[0] & 0x8000) == 0)
1114: mdio_read(ioaddr, sp->phy[0] & 0x1f, 0);
1115:
1116: return 0;
1117: }
1118:
1119: /* Start the chip hardware after a full reset. */
1120: static void speedo_resume(struct net_device *dev)
1121: {
1122: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1123: long ioaddr = dev->base_addr;
1124:
1125: /* Start with a Tx threshold of 256 (0x..20.... 8 byte units). */
1126: sp->tx_threshold = 0x01208000;
1127:
1128: /* Set the segment registers to '0'. */
1129: wait_for_cmd_done(ioaddr + SCBCmd);
1130: outl(0, ioaddr + SCBPointer);
1131: /* impose a delay to avoid a bug */
1132: inl(ioaddr + SCBPointer);
1133: udelay(10);
1134: outb(RxAddrLoad, ioaddr + SCBCmd);
1135: wait_for_cmd_done(ioaddr + SCBCmd);
1136: outb(CUCmdBase, ioaddr + SCBCmd);
1137: wait_for_cmd_done(ioaddr + SCBCmd);
1138:
1139: /* Load the statistics block and rx ring addresses. */
1140: outl(virt_to_bus(&sp->lstats), ioaddr + SCBPointer);
1141: outb(CUStatsAddr, ioaddr + SCBCmd);
1142: sp->lstats.done_marker = 0;
1143: wait_for_cmd_done(ioaddr + SCBCmd);
1144:
1145: if (sp->rx_ringp[sp->cur_rx % RX_RING_SIZE] == NULL) {
1146: if (speedo_debug > 2)
1147: printk(KERN_DEBUG "%s: NULL cur_rx in speedo_resume().\n",
1148: dev->name);
1149: } else {
1150: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1151: ioaddr + SCBPointer);
1152: outb(RxStart, ioaddr + SCBCmd);
1153: wait_for_cmd_done(ioaddr + SCBCmd);
1154: }
1155:
1156: outb(CUDumpStats, ioaddr + SCBCmd);
1157:
1158: /* Fill the first command with our physical address. */
1159: {
1160: struct descriptor *ias_cmd;
1161:
1162: ias_cmd =
1163: (struct descriptor *)&sp->tx_ring[sp->cur_tx++ % TX_RING_SIZE];
1164: /* Avoid a bug(?!) here by marking the command already completed. */
1165: ias_cmd->cmd_status = cpu_to_le32((CmdSuspend | CmdIASetup) | 0xa000);
1166: ias_cmd->link =
1167: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
1168: memcpy(ias_cmd->params, dev->dev_addr, 6);
1169: sp->last_cmd = ias_cmd;
1170: }
1171:
1172: /* Start the chip's Tx process and unmask interrupts. */
1173: wait_for_cmd_done(ioaddr + SCBCmd);
1174: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]),
1175: ioaddr + SCBPointer);
1176: /* We are not ACK-ing FCP and ER in the interrupt handler yet so they should
1177: remain masked --Dragan */
1178: outw(CUStart | SCBMaskEarlyRx | SCBMaskFlowCtl, ioaddr + SCBCmd);
1179: }
1180:
1181: /* Media monitoring and control. */
1182: static void speedo_timer(unsigned long data)
1183: {
1184: struct net_device *dev = (struct net_device *)data;
1185: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1186: long ioaddr = dev->base_addr;
1187: int phy_num = sp->phy[0] & 0x1f;
1188:
1189: /* We have MII and lost link beat. */
1190: if ((sp->phy[0] & 0x8000) == 0) {
1191: int partner = mdio_read(ioaddr, phy_num, 5);
1192: if (partner != sp->partner) {
1193: int flow_ctrl = sp->advertising & partner & 0x0400 ? 1 : 0;
1194: if (speedo_debug > 2) {
1195: printk(KERN_DEBUG "%s: Link status change.\n", dev->name);
1196: printk(KERN_DEBUG "%s: Old partner %x, new %x, adv %x.\n",
1197: dev->name, sp->partner, partner, sp->advertising);
1198: }
1199: sp->partner = partner;
1200: if (flow_ctrl != sp->flow_ctrl) {
1201: sp->flow_ctrl = flow_ctrl;
1202: sp->rx_mode = -1; /* Trigger a reload. */
1203: }
1204: /* Clear sticky bit. */
1205: mdio_read(ioaddr, phy_num, 1);
1206: /* If link beat has returned... */
1207: if (mdio_read(ioaddr, phy_num, 1) & 0x0004)
1208: dev->flags |= IFF_RUNNING;
1209: else
1210: dev->flags &= ~IFF_RUNNING;
1211: }
1212: }
1213: if (speedo_debug > 3) {
1214: printk(KERN_DEBUG "%s: Media control tick, status %4.4x.\n",
1215: dev->name, inw(ioaddr + SCBStatus));
1216: }
1217: if (sp->rx_mode < 0 ||
1218: (sp->rx_bug && jiffies - sp->last_rx_time > 2*HZ)) {
1219: /* We haven't received a packet in a Long Time. We might have been
1220: bitten by the receiver hang bug. This can be cleared by sending
1221: a set multicast list command. */
1222: if (speedo_debug > 2)
1223: printk(KERN_DEBUG "%s: Sending a multicast list set command"
1224: " from a timer routine.\n", dev->name);
1225: set_rx_mode(dev);
1226: }
1227: /* We must continue to monitor the media. */
1228: sp->timer.expires = RUN_AT(2*HZ); /* 2.0 sec. */
1229: add_timer(&sp->timer);
1230: }
1231:
1232: static void speedo_show_state(struct net_device *dev)
1233: {
1234: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1235: #if 0
1236: long ioaddr = dev->base_addr;
1237: int phy_num = sp->phy[0] & 0x1f;
1238: #endif
1239: int i;
1240:
1241: /* Print a few items for debugging. */
1242: if (speedo_debug > 0) {
1243: int i;
1244: printk(KERN_DEBUG "%s: Tx ring dump, Tx queue %u / %u:\n", dev->name,
1245: sp->cur_tx, sp->dirty_tx);
1246: for (i = 0; i < TX_RING_SIZE; i++)
1247: printk(KERN_DEBUG "%s: %c%c%2d %8.8x.\n", dev->name,
1248: i == sp->dirty_tx % TX_RING_SIZE ? '*' : ' ',
1249: i == sp->cur_tx % TX_RING_SIZE ? '=' : ' ',
1250: i, sp->tx_ring[i].status);
1251: }
1252: printk(KERN_DEBUG "%s: Printing Rx ring"
1253: " (next to receive into %u, dirty index %u).\n",
1254: dev->name, sp->cur_rx, sp->dirty_rx);
1255:
1256: for (i = 0; i < RX_RING_SIZE; i++)
1257: printk(KERN_DEBUG "%s: %c%c%c%2d %8.8x.\n", dev->name,
1258: sp->rx_ringp[i] == sp->last_rxf ? 'l' : ' ',
1259: i == sp->dirty_rx % RX_RING_SIZE ? '*' : ' ',
1260: i == sp->cur_rx % RX_RING_SIZE ? '=' : ' ',
1261: i, (sp->rx_ringp[i] != NULL) ?
1262: (unsigned)sp->rx_ringp[i]->status : 0);
1263:
1264: #if 0
1265: for (i = 0; i < 16; i++) {
1266: /* FIXME: what does it mean? --SAW */
1267: if (i == 6) i = 21;
1268: printk(KERN_DEBUG "%s: PHY index %d register %d is %4.4x.\n",
1269: dev->name, phy_num, i, mdio_read(ioaddr, phy_num, i));
1270: }
1271: #endif
1272:
1273: }
1274:
1275: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1276: static void
1277: speedo_init_rx_ring(struct net_device *dev)
1278: {
1279: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1280: struct RxFD *rxf, *last_rxf = NULL;
1281: int i;
1282:
1283: sp->cur_rx = 0;
1284:
1285: for (i = 0; i < RX_RING_SIZE; i++) {
1286: struct sk_buff *skb;
1287: skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD));
1288: sp->rx_skbuff[i] = skb;
1289: if (skb == NULL)
1290: break; /* OK. Just initially short of Rx bufs. */
1291: skb->dev = dev; /* Mark as being used by this device. */
1292: rxf = (struct RxFD *)skb->tail;
1293: sp->rx_ringp[i] = rxf;
1294: skb_reserve(skb, sizeof(struct RxFD));
1295: if (last_rxf)
1296: last_rxf->link = virt_to_le32desc(rxf);
1297: last_rxf = rxf;
1298: rxf->status = cpu_to_le32(0x00000001); /* '1' is flag value only. */
1299: rxf->link = 0; /* None yet. */
1300: /* This field unused by i82557. */
1301: rxf->rx_buf_addr = 0xffffffff;
1302: rxf->count = cpu_to_le32(PKT_BUF_SZ << 16);
1303: }
1304: sp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1305: /* Mark the last entry as end-of-list. */
1306: last_rxf->status = cpu_to_le32(0xC0000002); /* '2' is flag value only. */
1307: sp->last_rxf = last_rxf;
1308: }
1309:
1310: static void speedo_purge_tx(struct net_device *dev)
1311: {
1312: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1313: int entry;
1314:
1315: while ((int)(sp->cur_tx - sp->dirty_tx) > 0) {
1316: entry = sp->dirty_tx % TX_RING_SIZE;
1317: if (sp->tx_skbuff[entry]) {
1318: sp->stats.tx_errors++;
1319: dev_free_skb(sp->tx_skbuff[entry]);
1320: sp->tx_skbuff[entry] = 0;
1321: }
1322: sp->dirty_tx++;
1323: }
1324: while (sp->mc_setup_head != NULL) {
1325: struct speedo_mc_block *t;
1326: if (speedo_debug > 1)
1327: printk(KERN_DEBUG "%s: freeing mc frame.\n", dev->name);
1328: t = sp->mc_setup_head->next;
1329: kfree(sp->mc_setup_head);
1330: sp->mc_setup_head = t;
1331: }
1332: sp->mc_setup_tail = NULL;
1333: sp->tx_full = 0;
1334: netif_wake_queue(dev);
1335: }
1336:
1337: static void reset_mii(struct net_device *dev)
1338: {
1339: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1340: long ioaddr = dev->base_addr;
1341: /* Reset the MII transceiver, suggested by Fred Young @ scalable.com. */
1342: if ((sp->phy[0] & 0x8000) == 0) {
1343: int phy_addr = sp->phy[0] & 0x1f;
1344: int advertising = mdio_read(ioaddr, phy_addr, 4);
1345: int mii_bmcr = mdio_read(ioaddr, phy_addr, 0);
1346: mdio_write(ioaddr, phy_addr, 0, 0x0400);
1347: mdio_write(ioaddr, phy_addr, 1, 0x0000);
1348: mdio_write(ioaddr, phy_addr, 4, 0x0000);
1349: mdio_write(ioaddr, phy_addr, 0, 0x8000);
1350: #ifdef honor_default_port
1351: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]);
1352: #else
1353: mdio_read(ioaddr, phy_addr, 0);
1354: mdio_write(ioaddr, phy_addr, 0, mii_bmcr);
1355: mdio_write(ioaddr, phy_addr, 4, advertising);
1356: #endif
1357: }
1358: }
1359:
1360: static void speedo_tx_timeout(struct net_device *dev)
1361: {
1362: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1363: long ioaddr = dev->base_addr;
1364: int status = inw(ioaddr + SCBStatus);
1365: unsigned long flags;
1366:
1367: printk(KERN_WARNING "%s: Transmit timed out: status %4.4x "
1368: " %4.4x at %d/%d command %8.8x.\n",
1369: dev->name, status, inw(ioaddr + SCBCmd),
1370: sp->dirty_tx, sp->cur_tx,
1371: sp->tx_ring[sp->dirty_tx % TX_RING_SIZE].status);
1372:
1373: /* Trigger a stats dump to give time before the reset. */
1374: speedo_get_stats(dev);
1375:
1376: speedo_show_state(dev);
1377: #if 0
1378: if ((status & 0x00C0) != 0x0080
1379: && (status & 0x003C) == 0x0010) {
1380: /* Only the command unit has stopped. */
1381: printk(KERN_WARNING "%s: Trying to restart the transmitter...\n",
1382: dev->name);
1383: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]),
1384: ioaddr + SCBPointer);
1385: outw(CUStart, ioaddr + SCBCmd);
1386: reset_mii(dev);
1387: } else {
1388: #else
1389: {
1390: #endif
1391: start_bh_atomic();
1392: /* Ensure that timer routine doesn't run! */
1393: del_timer(&sp->timer);
1394: end_bh_atomic();
1395: /* Reset the Tx and Rx units. */
1396: outl(PortReset, ioaddr + SCBPort);
1397: /* We may get spurious interrupts here. But I don't think that they
1398: may do much harm. 1999/12/09 SAW */
1399: udelay(10);
1400: /* Disable interrupts. */
1401: outw(SCBMaskAll, ioaddr + SCBCmd);
1402: synchronize_irq();
1403: speedo_tx_buffer_gc(dev);
1404: /* Free as much as possible.
1405: It helps to recover from a hang because of out-of-memory.
1406: It also simplifies speedo_resume() in case TX ring is full or
1407: close-to-be full. */
1408: speedo_purge_tx(dev);
1409: speedo_refill_rx_buffers(dev, 1);
1410: spin_lock_irqsave(&sp->lock, flags);
1411: speedo_resume(dev);
1412: sp->rx_mode = -1;
1413: dev->trans_start = jiffies;
1414: spin_unlock_irqrestore(&sp->lock, flags);
1415: set_rx_mode(dev); /* it takes the spinlock itself --SAW */
1416: /* Reset MII transceiver. Do it before starting the timer to serialize
1417: mdio_xxx operations. Yes, it's a paranoya :-) 2000/05/09 SAW */
1418: reset_mii(dev);
1419: sp->timer.expires = RUN_AT(2*HZ);
1420: add_timer(&sp->timer);
1421: }
1422: return;
1423: }
1424:
1425: static int
1426: speedo_start_xmit(struct sk_buff *skb, struct net_device *dev)
1427: {
1428: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1429: long ioaddr = dev->base_addr;
1430: int entry;
1431:
1432: #if ! defined(HAS_NETIF_QUEUE)
1433: if (test_bit(0, (void*)&dev->tbusy) != 0) {
1434: int tickssofar = jiffies - dev->trans_start;
1435: if (tickssofar < TX_TIMEOUT - 2)
1436: return 1;
1437: if (tickssofar < TX_TIMEOUT) {
1438: /* Reap sent packets from the full Tx queue. */
1439: unsigned long flags;
1440: /* Take a spinlock to make wait_for_cmd_done and sending the
1441: command atomic. --SAW */
1442: spin_lock_irqsave(&sp->lock, flags);
1443: wait_for_cmd_done(ioaddr + SCBCmd);
1444: outw(SCBTriggerIntr, ioaddr + SCBCmd);
1445: spin_unlock_irqrestore(&sp->lock, flags);
1446: return 1;
1447: }
1448: speedo_tx_timeout(dev);
1449: return 1;
1450: }
1451: #endif
1452:
1453: { /* Prevent interrupts from changing the Tx ring from underneath us. */
1454: unsigned long flags;
1455:
1456: spin_lock_irqsave(&sp->lock, flags);
1457:
1458: /* Check if there are enough space. */
1459: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {
1460: printk(KERN_ERR "%s: incorrect tbusy state, fixed.\n", dev->name);
1461: netif_stop_queue(dev);
1462: sp->tx_full = 1;
1463: spin_unlock_irqrestore(&sp->lock, flags);
1464: return 1;
1465: }
1466:
1467: /* Calculate the Tx descriptor entry. */
1468: entry = sp->cur_tx++ % TX_RING_SIZE;
1469:
1470: sp->tx_skbuff[entry] = skb;
1471: sp->tx_ring[entry].status =
1472: cpu_to_le32(CmdSuspend | CmdTx | CmdTxFlex);
1473: if (!(entry & ((TX_RING_SIZE>>2)-1)))
1474: sp->tx_ring[entry].status |= cpu_to_le32(CmdIntr);
1475: sp->tx_ring[entry].link =
1476: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
1477: sp->tx_ring[entry].tx_desc_addr =
1478: virt_to_le32desc(&sp->tx_ring[entry].tx_buf_addr0);
1479: /* The data region is always in one buffer descriptor. */
1480: sp->tx_ring[entry].count = cpu_to_le32(sp->tx_threshold);
1481: sp->tx_ring[entry].tx_buf_addr0 = virt_to_le32desc(skb->data);
1482: sp->tx_ring[entry].tx_buf_size0 = cpu_to_le32(skb->len);
1483: /* Trigger the command unit resume. */
1484: wait_for_cmd_done(ioaddr + SCBCmd);
1485: clear_suspend(sp->last_cmd);
1486: /* We want the time window between clearing suspend flag on the previous
1487: command and resuming CU to be as small as possible.
1488: Interrupts in between are very undesired. --SAW */
1489: outb(CUResume, ioaddr + SCBCmd);
1490: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
1491:
1492: /* Leave room for set_rx_mode(). If there is no more space than reserved
1493: for multicast filter mark the ring as full. */
1494: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {
1495: netif_stop_queue(dev);
1496: sp->tx_full = 1;
1497: }
1498:
1499: spin_unlock_irqrestore(&sp->lock, flags);
1500: }
1501:
1502: dev->trans_start = jiffies;
1503:
1504: return 0;
1505: }
1506:
1507: static void speedo_tx_buffer_gc(struct net_device *dev)
1508: {
1509: unsigned int dirty_tx;
1510: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1511:
1512: dirty_tx = sp->dirty_tx;
1513: while ((int)(sp->cur_tx - dirty_tx) > 0) {
1514: int entry = dirty_tx % TX_RING_SIZE;
1515: int status = le32_to_cpu(sp->tx_ring[entry].status);
1516:
1517: if (speedo_debug > 5)
1518: printk(KERN_DEBUG " scavenge candidate %d status %4.4x.\n",
1519: entry, status);
1520: if ((status & StatusComplete) == 0)
1521: break; /* It still hasn't been processed. */
1522: if (status & TxUnderrun)
1523: if (sp->tx_threshold < 0x01e08000) {
1524: if (speedo_debug > 2)
1525: printk(KERN_DEBUG "%s: TX underrun, threshold adjusted.\n",
1526: dev->name);
1527: sp->tx_threshold += 0x00040000;
1528: }
1529: /* Free the original skb. */
1530: if (sp->tx_skbuff[entry]) {
1531: sp->stats.tx_packets++; /* Count only user packets. */
1532: /* sp->stats.tx_bytes += sp->tx_skbuff[entry]->len; */
1533: dev_free_skb(sp->tx_skbuff[entry]);
1534: sp->tx_skbuff[entry] = 0;
1535: }
1536: dirty_tx++;
1537: }
1538:
1539: if (speedo_debug && (int)(sp->cur_tx - dirty_tx) > TX_RING_SIZE) {
1540: printk(KERN_ERR "out-of-sync dirty pointer, %d vs. %d,"
1541: " full=%d.\n",
1542: dirty_tx, sp->cur_tx, sp->tx_full);
1543: dirty_tx += TX_RING_SIZE;
1544: }
1545:
1546: while (sp->mc_setup_head != NULL
1547: && (int)(dirty_tx - sp->mc_setup_head->tx - 1) > 0) {
1548: struct speedo_mc_block *t;
1549: if (speedo_debug > 1)
1550: printk(KERN_DEBUG "%s: freeing mc frame.\n", dev->name);
1551: t = sp->mc_setup_head->next;
1552: kfree(sp->mc_setup_head);
1553: sp->mc_setup_head = t;
1554: }
1555: if (sp->mc_setup_head == NULL)
1556: sp->mc_setup_tail = NULL;
1557:
1558: sp->dirty_tx = dirty_tx;
1559: }
1560:
1561: /* The interrupt handler does all of the Rx thread work and cleans up
1562: after the Tx thread. */
1563: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1564: {
1565: struct net_device *dev = (struct net_device *)dev_instance;
1566: struct speedo_private *sp;
1567: long ioaddr, boguscnt = max_interrupt_work;
1568: unsigned short status;
1569:
1570: #ifndef final_version
1571: if (dev == NULL) {
1572: printk(KERN_ERR "speedo_interrupt(): irq %d for unknown device.\n", irq);
1573: return;
1574: }
1575: #endif
1576:
1577: ioaddr = dev->base_addr;
1578: sp = (struct speedo_private *)dev->priv;
1579:
1580: #ifndef final_version
1581: /* A lock to prevent simultaneous entry on SMP machines. */
1582: if (test_and_set_bit(0, (void*)&sp->in_interrupt)) {
1583: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
1584: dev->name);
1585: sp->in_interrupt = 0; /* Avoid halting machine. */
1586: return;
1587: }
1588: dev->interrupt = 1;
1589: #endif
1590:
1591: do {
1592: status = inw(ioaddr + SCBStatus);
1593: /* Acknowledge all of the current interrupt sources ASAP. */
1594: /* Will change from 0xfc00 to 0xff00 when we start handling
1595: FCP and ER interrupts --Dragan */
1596: outw(status & 0xfc00, ioaddr + SCBStatus);
1597:
1598: if (speedo_debug > 3)
1599: printk(KERN_DEBUG "%s: interrupt status=%#4.4x.\n",
1600: dev->name, status);
1601:
1602: if ((status & 0xfc00) == 0)
1603: break;
1604:
1605: /* Always check if all rx buffers are allocated. --SAW */
1606: speedo_refill_rx_buffers(dev, 0);
1607:
1608: if ((status & 0x5000) || /* Packet received, or Rx error. */
1609: (sp->rx_ring_state&(RrNoMem|RrPostponed)) == RrPostponed)
1610: /* Need to gather the postponed packet. */
1611: speedo_rx(dev);
1612:
1613: if (status & 0x1000) {
1614: spin_lock(&sp->lock);
1615: if ((status & 0x003c) == 0x0028) { /* No more Rx buffers. */
1616: struct RxFD *rxf;
1617: printk(KERN_WARNING "%s: card reports no RX buffers.\n",
1618: dev->name);
1619: rxf = sp->rx_ringp[sp->cur_rx % RX_RING_SIZE];
1620: if (rxf == NULL) {
1621: if (speedo_debug > 2)
1622: printk(KERN_DEBUG
1623: "%s: NULL cur_rx in speedo_interrupt().\n",
1624: dev->name);
1625: sp->rx_ring_state |= RrNoMem|RrNoResources;
1626: } else if (rxf == sp->last_rxf) {
1627: if (speedo_debug > 2)
1628: printk(KERN_DEBUG
1629: "%s: cur_rx is last in speedo_interrupt().\n",
1630: dev->name);
1631: sp->rx_ring_state |= RrNoMem|RrNoResources;
1632: } else
1633: outb(RxResumeNoResources, ioaddr + SCBCmd);
1634: } else if ((status & 0x003c) == 0x0008) { /* No resources. */
1635: struct RxFD *rxf;
1636: printk(KERN_WARNING "%s: card reports no resources.\n",
1637: dev->name);
1638: rxf = sp->rx_ringp[sp->cur_rx % RX_RING_SIZE];
1639: if (rxf == NULL) {
1640: if (speedo_debug > 2)
1641: printk(KERN_DEBUG
1642: "%s: NULL cur_rx in speedo_interrupt().\n",
1643: dev->name);
1644: sp->rx_ring_state |= RrNoMem|RrNoResources;
1645: } else if (rxf == sp->last_rxf) {
1646: if (speedo_debug > 2)
1647: printk(KERN_DEBUG
1648: "%s: cur_rx is last in speedo_interrupt().\n",
1649: dev->name);
1650: sp->rx_ring_state |= RrNoMem|RrNoResources;
1651: } else {
1652: /* Restart the receiver. */
1653: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1654: ioaddr + SCBPointer);
1655: outb(RxStart, ioaddr + SCBCmd);
1656: }
1657: }
1658: sp->stats.rx_errors++;
1659: spin_unlock(&sp->lock);
1660: }
1661:
1662: if ((sp->rx_ring_state&(RrNoMem|RrNoResources)) == RrNoResources) {
1663: printk(KERN_WARNING
1664: "%s: restart the receiver after a possible hang.\n",
1665: dev->name);
1666: spin_lock(&sp->lock);
1667: /* Restart the receiver.
1668: I'm not sure if it's always right to restart the receiver
1669: here but I don't know another way to prevent receiver hangs.
1670: 1999/12/25 SAW */
1671: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1672: ioaddr + SCBPointer);
1673: outb(RxStart, ioaddr + SCBCmd);
1674: sp->rx_ring_state &= ~RrNoResources;
1675: spin_unlock(&sp->lock);
1676: }
1677:
1678: /* User interrupt, Command/Tx unit interrupt or CU not active. */
1679: if (status & 0xA400) {
1680: spin_lock(&sp->lock);
1681: speedo_tx_buffer_gc(dev);
1682: if (sp->tx_full
1683: && (int)(sp->cur_tx - sp->dirty_tx) < TX_QUEUE_UNFULL) {
1684: /* The ring is no longer full. */
1685: sp->tx_full = 0;
1686: netif_wake_queue(dev); /* Attention: under a spinlock. --SAW */
1687: }
1688: spin_unlock(&sp->lock);
1689: }
1690:
1691: if (--boguscnt < 0) {
1692: printk(KERN_ERR "%s: Too much work at interrupt, status=0x%4.4x.\n",
1693: dev->name, status);
1694: /* Clear all interrupt sources. */
1695: /* Will change from 0xfc00 to 0xff00 when we start handling
1696: FCP and ER interrupts --Dragan */
1697: outl(0xfc00, ioaddr + SCBStatus);
1698: break;
1699: }
1700: } while (1);
1701:
1702: if (speedo_debug > 3)
1703: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1704: dev->name, inw(ioaddr + SCBStatus));
1705:
1706: dev->interrupt = 0;
1707: clear_bit(0, (void*)&sp->in_interrupt);
1708: return;
1709: }
1710:
1711: static inline struct RxFD *speedo_rx_alloc(struct net_device *dev, int entry)
1712: {
1713: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1714: struct RxFD *rxf;
1715: struct sk_buff *skb;
1716: /* Get a fresh skbuff to replace the consumed one. */
1717: skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD));
1718: sp->rx_skbuff[entry] = skb;
1719: if (skb == NULL) {
1720: sp->rx_ringp[entry] = NULL;
1721: return NULL;
1722: }
1723: rxf = sp->rx_ringp[entry] = (struct RxFD *)skb->tail;
1724: skb->dev = dev;
1725: skb_reserve(skb, sizeof(struct RxFD));
1726: rxf->rx_buf_addr = virt_to_bus(skb->tail);
1727: return rxf;
1728: }
1729:
1730: static inline void speedo_rx_link(struct net_device *dev, int entry,
1731: struct RxFD *rxf)
1732: {
1733: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1734: rxf->status = cpu_to_le32(0xC0000001); /* '1' for driver use only. */
1735: rxf->link = 0; /* None yet. */
1736: rxf->count = cpu_to_le32(PKT_BUF_SZ << 16);
1737: sp->last_rxf->link = virt_to_le32desc(rxf);
1738: sp->last_rxf->status &= cpu_to_le32(~0xC0000000);
1739: sp->last_rxf = rxf;
1740: }
1741:
1742: static int speedo_refill_rx_buf(struct net_device *dev, int force)
1743: {
1744: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1745: int entry;
1746: struct RxFD *rxf;
1747:
1748: entry = sp->dirty_rx % RX_RING_SIZE;
1749: if (sp->rx_skbuff[entry] == NULL) {
1750: rxf = speedo_rx_alloc(dev, entry);
1751: if (rxf == NULL) {
1752: unsigned int forw;
1753: int forw_entry;
1754: if (speedo_debug > 2 || !(sp->rx_ring_state & RrOOMReported)) {
1755: printk(KERN_WARNING "%s: can't fill rx buffer (force %d)!\n",
1756: dev->name, force);
1757: speedo_show_state(dev);
1758: sp->rx_ring_state |= RrOOMReported;
1759: }
1760: if (!force)
1761: return -1; /* Better luck next time! */
1762: /* Borrow an skb from one of next entries. */
1763: for (forw = sp->dirty_rx + 1; forw != sp->cur_rx; forw++)
1764: if (sp->rx_skbuff[forw % RX_RING_SIZE] != NULL)
1765: break;
1766: if (forw == sp->cur_rx)
1767: return -1;
1768: forw_entry = forw % RX_RING_SIZE;
1769: sp->rx_skbuff[entry] = sp->rx_skbuff[forw_entry];
1770: sp->rx_skbuff[forw_entry] = NULL;
1771: rxf = sp->rx_ringp[forw_entry];
1772: sp->rx_ringp[forw_entry] = NULL;
1773: sp->rx_ringp[entry] = rxf;
1774: }
1775: } else {
1776: rxf = sp->rx_ringp[entry];
1777: }
1778: speedo_rx_link(dev, entry, rxf);
1779: sp->dirty_rx++;
1780: sp->rx_ring_state &= ~(RrNoMem|RrOOMReported); /* Mark the progress. */
1781: return 0;
1782: }
1783:
1784: static void speedo_refill_rx_buffers(struct net_device *dev, int force)
1785: {
1786: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1787:
1788: /* Refill the RX ring. */
1789: while ((int)(sp->cur_rx - sp->dirty_rx) > 0 &&
1790: speedo_refill_rx_buf(dev, force) != -1);
1791: }
1792:
1793: static int
1794: speedo_rx(struct net_device *dev)
1795: {
1796: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1797: int entry = sp->cur_rx % RX_RING_SIZE;
1798: int status;
1799: int rx_work_limit = sp->dirty_rx + RX_RING_SIZE - sp->cur_rx;
1800: int alloc_ok = 1;
1801:
1802: if (speedo_debug > 4)
1803: printk(KERN_DEBUG " In speedo_rx().\n");
1804: /* If we own the next entry, it's a new packet. Send it up. */
1805: while (sp->rx_ringp[entry] != NULL &&
1806: (status = le32_to_cpu(sp->rx_ringp[entry]->status)) & RxComplete) {
1807: int pkt_len = le32_to_cpu(sp->rx_ringp[entry]->count) & 0x3fff;
1808:
1809: if (--rx_work_limit < 0)
1810: break;
1811:
1812: /* Check for a rare out-of-memory case: the current buffer is
1813: the last buffer allocated in the RX ring. --SAW */
1814: if (sp->last_rxf == sp->rx_ringp[entry]) {
1815: /* Postpone the packet. It'll be reaped at an interrupt when this
1816: packet is no longer the last packet in the ring. */
1817: if (speedo_debug > 2)
1818: printk(KERN_DEBUG "%s: RX packet postponed!\n",
1819: dev->name);
1820: sp->rx_ring_state |= RrPostponed;
1821: break;
1822: }
1823:
1824: if (speedo_debug > 4)
1825: printk(KERN_DEBUG " speedo_rx() status %8.8x len %d.\n", status,
1826: pkt_len);
1827: if ((status & (RxErrTooBig|RxOK|0x0f90)) != RxOK) {
1828: if (status & RxErrTooBig)
1829: printk(KERN_ERR "%s: Ethernet frame overran the Rx buffer, "
1830: "status %8.8x!\n", dev->name, status);
1831: else if (! (status & RxOK)) {
1832: /* There was a fatal error. This *should* be impossible. */
1833: sp->stats.rx_errors++;
1834: printk(KERN_ERR "%s: Anomalous event in speedo_rx(), "
1835: "status %8.8x.\n",
1836: dev->name, status);
1837: }
1838: } else {
1839: struct sk_buff *skb;
1840:
1841: /* Check if the packet is long enough to just accept without
1842: copying to a properly sized skbuff. */
1843: if (pkt_len < rx_copybreak
1844: && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
1845: skb->dev = dev;
1846: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1847: /* 'skb_put()' points to the start of sk_buff data area. */
1848: #if !defined(__alpha__)
1849: /* Packet is in one chunk -- we can copy + cksum. */
1850: eth_copy_and_sum(skb, sp->rx_skbuff[entry]->tail, pkt_len, 0);
1851: skb_put(skb, pkt_len);
1852: #else
1853: memcpy(skb_put(skb, pkt_len), sp->rx_skbuff[entry]->tail,
1854: pkt_len);
1855: #endif
1856: } else {
1857: /* Pass up the already-filled skbuff. */
1858: skb = sp->rx_skbuff[entry];
1859: if (skb == NULL) {
1860: printk(KERN_ERR "%s: Inconsistent Rx descriptor chain.\n",
1861: dev->name);
1862: break;
1863: }
1864: sp->rx_skbuff[entry] = NULL;
1865: skb_put(skb, pkt_len);
1866: sp->rx_ringp[entry] = NULL;
1867: }
1868: skb->protocol = eth_type_trans(skb, dev);
1869: netif_rx(skb);
1870: sp->stats.rx_packets++;
1871: /* sp->stats.rx_bytes += pkt_len; */
1872: }
1873: entry = (++sp->cur_rx) % RX_RING_SIZE;
1874: sp->rx_ring_state &= ~RrPostponed;
1875: /* Refill the recently taken buffers.
1876: Do it one-by-one to handle traffic bursts better. */
1877: if (alloc_ok && speedo_refill_rx_buf(dev, 0) == -1)
1878: alloc_ok = 0;
1879: }
1880:
1881: /* Try hard to refill the recently taken buffers. */
1882: speedo_refill_rx_buffers(dev, 1);
1883:
1884: sp->last_rx_time = jiffies;
1885:
1886: return 0;
1887: }
1888:
1889: static int
1890: speedo_close(struct net_device *dev)
1891: {
1892: long ioaddr = dev->base_addr;
1893: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1894: int i;
1895:
1896: dev->start = 0;
1897: netif_stop_queue(dev);
1898:
1899: if (speedo_debug > 1)
1900: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n",
1901: dev->name, inw(ioaddr + SCBStatus));
1902:
1903: /* Shut off the media monitoring timer. */
1904: start_bh_atomic();
1905: del_timer(&sp->timer);
1906: end_bh_atomic();
1907:
1908: /* Shutting down the chip nicely fails to disable flow control. So.. */
1909: outl(PortPartialReset, ioaddr + SCBPort);
1910:
1911: free_irq(dev->irq, dev);
1912:
1913: /* Print a few items for debugging. */
1914: if (speedo_debug > 3)
1915: speedo_show_state(dev);
1916:
1917: /* Free all the skbuffs in the Rx and Tx queues. */
1918: for (i = 0; i < RX_RING_SIZE; i++) {
1919: struct sk_buff *skb = sp->rx_skbuff[i];
1920: sp->rx_skbuff[i] = 0;
1921: /* Clear the Rx descriptors. */
1922: if (skb)
1923: dev_free_skb(skb);
1924: }
1925:
1926: for (i = 0; i < TX_RING_SIZE; i++) {
1927: struct sk_buff *skb = sp->tx_skbuff[i];
1928: sp->tx_skbuff[i] = 0;
1929: /* Clear the Tx descriptors. */
1930: if (skb)
1931: dev_free_skb(skb);
1932: }
1933:
1934: /* Free multicast setting blocks. */
1935: for (i = 0; sp->mc_setup_head != NULL; i++) {
1936: struct speedo_mc_block *t;
1937: t = sp->mc_setup_head->next;
1938: kfree(sp->mc_setup_head);
1939: sp->mc_setup_head = t;
1940: }
1941: sp->mc_setup_tail = NULL;
1942: if (speedo_debug > 0)
1943: printk(KERN_DEBUG "%s: %d multicast blocks dropped.\n", dev->name, i);
1944:
1945: MOD_DEC_USE_COUNT;
1946:
1947: return 0;
1948: }
1949:
1950: /* The Speedo-3 has an especially awkward and unusable method of getting
1951: statistics out of the chip. It takes an unpredictable length of time
1952: for the dump-stats command to complete. To avoid a busy-wait loop we
1953: update the stats with the previous dump results, and then trigger a
1954: new dump.
1955:
1956: These problems are mitigated by the current /proc implementation, which
1957: calls this routine first to judge the output length, and then to emit the
1958: output.
1959:
1960: Oh, and incoming frames are dropped while executing dump-stats!
1961: */
1962: static struct enet_statistics *
1963: speedo_get_stats(struct net_device *dev)
1964: {
1965: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1966: long ioaddr = dev->base_addr;
1967:
1968: /* Update only if the previous dump finished. */
1969: if (sp->lstats.done_marker == le32_to_cpu(0xA007)) {
1970: sp->stats.tx_aborted_errors += le32_to_cpu(sp->lstats.tx_coll16_errs);
1971: sp->stats.tx_window_errors += le32_to_cpu(sp->lstats.tx_late_colls);
1972: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_underruns);
1973: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_lost_carrier);
1974: /*sp->stats.tx_deferred += le32_to_cpu(sp->lstats.tx_deferred);*/
1975: sp->stats.collisions += le32_to_cpu(sp->lstats.tx_total_colls);
1976: sp->stats.rx_crc_errors += le32_to_cpu(sp->lstats.rx_crc_errs);
1977: sp->stats.rx_frame_errors += le32_to_cpu(sp->lstats.rx_align_errs);
1978: sp->stats.rx_over_errors += le32_to_cpu(sp->lstats.rx_resource_errs);
1979: sp->stats.rx_fifo_errors += le32_to_cpu(sp->lstats.rx_overrun_errs);
1980: sp->stats.rx_length_errors += le32_to_cpu(sp->lstats.rx_runt_errs);
1981: sp->lstats.done_marker = 0x0000;
1982: if (dev->start) {
1983: unsigned long flags;
1984: /* Take a spinlock to make wait_for_cmd_done and sending the
1985: command atomic. --SAW */
1986: spin_lock_irqsave(&sp->lock, flags);
1987: wait_for_cmd_done(ioaddr + SCBCmd);
1988: outb(CUDumpStats, ioaddr + SCBCmd);
1989: spin_unlock_irqrestore(&sp->lock, flags);
1990: }
1991: }
1992: return &sp->stats;
1993: }
1994:
1995: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1996: {
1997: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1998: long ioaddr = dev->base_addr;
1999: u16 *data = (u16 *)&rq->ifr_data;
2000: int phy = sp->phy[0] & 0x1f;
2001:
2002: switch(cmd) {
2003: case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
2004: data[0] = phy;
2005: case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
2006: /* FIXME: these operations need to be serialized with MDIO
2007: access from the timeout handler.
2008: They are currently serialized only with MDIO access from the
2009: timer routine. 2000/05/09 SAW */
2010: start_bh_atomic();
2011: data[3] = mdio_read(ioaddr, data[0], data[1]);
2012: end_bh_atomic();
2013: return 0;
2014: case SIOCDEVPRIVATE+2: /* Write the specified MII register */
2015: if (!capable(CAP_NET_ADMIN))
2016: return -EPERM;
2017: start_bh_atomic();
2018: mdio_write(ioaddr, data[0], data[1], data[2]);
2019: end_bh_atomic();
2020: return 0;
2021: default:
2022: return -EOPNOTSUPP;
2023: }
2024: }
2025:
2026: /* Set or clear the multicast filter for this adaptor.
2027: This is very ugly with Intel chips -- we usually have to execute an
2028: entire configuration command, plus process a multicast command.
2029: This is complicated. We must put a large configuration command and
2030: an arbitrarily-sized multicast command in the transmit list.
2031: To minimize the disruption -- the previous command might have already
2032: loaded the link -- we convert the current command block, normally a Tx
2033: command, into a no-op and link it to the new command.
2034: */
2035: static void set_rx_mode(struct net_device *dev)
2036: {
2037: struct speedo_private *sp = (struct speedo_private *)dev->priv;
2038: long ioaddr = dev->base_addr;
2039: struct descriptor *last_cmd;
2040: char new_rx_mode;
2041: unsigned long flags;
2042: int entry, i;
2043:
2044: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
2045: new_rx_mode = 3;
2046: } else if ((dev->flags & IFF_ALLMULTI) ||
2047: dev->mc_count > multicast_filter_limit) {
2048: new_rx_mode = 1;
2049: } else
2050: new_rx_mode = 0;
2051:
2052: if (speedo_debug > 3)
2053: printk(KERN_DEBUG "%s: set_rx_mode %d -> %d\n", dev->name,
2054: sp->rx_mode, new_rx_mode);
2055:
2056: if ((int)(sp->cur_tx - sp->dirty_tx) > TX_RING_SIZE - TX_MULTICAST_SIZE) {
2057: /* The Tx ring is full -- don't add anything! Hope the mode will be
2058: * set again later. */
2059: sp->rx_mode = -1;
2060: return;
2061: }
2062:
2063: if (new_rx_mode != sp->rx_mode) {
2064: u8 *config_cmd_data;
2065:
2066: spin_lock_irqsave(&sp->lock, flags);
2067: entry = sp->cur_tx++ % TX_RING_SIZE;
2068: last_cmd = sp->last_cmd;
2069: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
2070:
2071: sp->tx_skbuff[entry] = 0; /* Redundant. */
2072: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdConfigure);
2073: sp->tx_ring[entry].link =
2074: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]);
2075: config_cmd_data = (void *)&sp->tx_ring[entry].tx_desc_addr;
2076: /* Construct a full CmdConfig frame. */
2077: memcpy(config_cmd_data, i82558_config_cmd, sizeof(i82558_config_cmd));
2078: config_cmd_data[1] = (txfifo << 4) | rxfifo;
2079: config_cmd_data[4] = rxdmacount;
2080: config_cmd_data[5] = txdmacount + 0x80;
2081: config_cmd_data[15] |= (new_rx_mode & 2) ? 1 : 0;
2082: /* 0x80 doesn't disable FC 0x84 does.
2083: Disable Flow control since we are not ACK-ing any FC interrupts
2084: for now. --Dragan */
2085: config_cmd_data[19] = 0x84;
2086: config_cmd_data[19] |= sp->full_duplex ? 0x40 : 0;
2087: config_cmd_data[21] = (new_rx_mode & 1) ? 0x0D : 0x05;
2088: if (sp->phy[0] & 0x8000) { /* Use the AUI port instead. */
2089: config_cmd_data[15] |= 0x80;
2090: config_cmd_data[8] = 0;
2091: }
2092: /* Trigger the command unit resume. */
2093: wait_for_cmd_done(ioaddr + SCBCmd);
2094: clear_suspend(last_cmd);
2095: outb(CUResume, ioaddr + SCBCmd);
2096: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {
2097: netif_stop_queue(dev);
2098: sp->tx_full = 1;
2099: }
2100: spin_unlock_irqrestore(&sp->lock, flags);
2101: }
2102:
2103: if (new_rx_mode == 0 && dev->mc_count < 4) {
2104: /* The simple case of 0-3 multicast list entries occurs often, and
2105: fits within one tx_ring[] entry. */
2106: struct dev_mc_list *mclist;
2107: u16 *setup_params, *eaddrs;
2108:
2109: spin_lock_irqsave(&sp->lock, flags);
2110: entry = sp->cur_tx++ % TX_RING_SIZE;
2111: last_cmd = sp->last_cmd;
2112: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
2113:
2114: sp->tx_skbuff[entry] = 0;
2115: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdMulticastList);
2116: sp->tx_ring[entry].link =
2117: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]);
2118: sp->tx_ring[entry].tx_desc_addr = 0; /* Really MC list count. */
2119: setup_params = (u16 *)&sp->tx_ring[entry].tx_desc_addr;
2120: *setup_params++ = cpu_to_le16(dev->mc_count*6);
2121: /* Fill in the multicast addresses. */
2122: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
2123: i++, mclist = mclist->next) {
2124: eaddrs = (u16 *)mclist->dmi_addr;
2125: *setup_params++ = *eaddrs++;
2126: *setup_params++ = *eaddrs++;
2127: *setup_params++ = *eaddrs++;
2128: }
2129:
2130: wait_for_cmd_done(ioaddr + SCBCmd);
2131: clear_suspend(last_cmd);
2132: /* Immediately trigger the command unit resume. */
2133: outb(CUResume, ioaddr + SCBCmd);
2134:
2135: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {
2136: netif_stop_queue(dev);
2137: sp->tx_full = 1;
2138: }
2139: spin_unlock_irqrestore(&sp->lock, flags);
2140: } else if (new_rx_mode == 0) {
2141: struct dev_mc_list *mclist;
2142: u16 *setup_params, *eaddrs;
2143: struct speedo_mc_block *mc_blk;
2144: struct descriptor *mc_setup_frm;
2145: int i;
2146:
2147: mc_blk = kmalloc(sizeof(*mc_blk) + 2 + multicast_filter_limit*6,
2148: GFP_ATOMIC);
2149: if (mc_blk == NULL) {
2150: printk(KERN_ERR "%s: Failed to allocate a setup frame.\n",
2151: dev->name);
2152: sp->rx_mode = -1; /* We failed, try again. */
2153: return;
2154: }
2155: mc_blk->next = NULL;
2156: mc_setup_frm = &mc_blk->frame;
2157:
2158: /* Fill the setup frame. */
2159: if (speedo_debug > 1)
2160: printk(KERN_DEBUG "%s: Constructing a setup frame at %p.\n",
2161: dev->name, mc_setup_frm);
2162: mc_setup_frm->cmd_status =
2163: cpu_to_le32(CmdSuspend | CmdIntr | CmdMulticastList);
2164: /* Link set below. */
2165: setup_params = (u16 *)&mc_setup_frm->params;
2166: *setup_params++ = cpu_to_le16(dev->mc_count*6);
2167: /* Fill in the multicast addresses. */
2168: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
2169: i++, mclist = mclist->next) {
2170: eaddrs = (u16 *)mclist->dmi_addr;
2171: *setup_params++ = *eaddrs++;
2172: *setup_params++ = *eaddrs++;
2173: *setup_params++ = *eaddrs++;
2174: }
2175:
2176: /* Disable interrupts while playing with the Tx Cmd list. */
2177: spin_lock_irqsave(&sp->lock, flags);
2178:
2179: if (sp->mc_setup_tail)
2180: sp->mc_setup_tail->next = mc_blk;
2181: else
2182: sp->mc_setup_head = mc_blk;
2183: sp->mc_setup_tail = mc_blk;
2184: mc_blk->tx = sp->cur_tx;
2185:
2186: entry = sp->cur_tx++ % TX_RING_SIZE;
2187: last_cmd = sp->last_cmd;
2188: sp->last_cmd = mc_setup_frm;
2189:
2190: /* Change the command to a NoOp, pointing to the CmdMulti command. */
2191: sp->tx_skbuff[entry] = 0;
2192: sp->tx_ring[entry].status = cpu_to_le32(CmdNOp);
2193: sp->tx_ring[entry].link = virt_to_le32desc(mc_setup_frm);
2194:
2195: /* Set the link in the setup frame. */
2196: mc_setup_frm->link =
2197: virt_to_le32desc(&(sp->tx_ring[(entry+1) % TX_RING_SIZE]));
2198:
2199: wait_for_cmd_done(ioaddr + SCBCmd);
2200: clear_suspend(last_cmd);
2201: /* Immediately trigger the command unit resume. */
2202: outb(CUResume, ioaddr + SCBCmd);
2203:
2204: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {
2205: netif_stop_queue(dev);
2206: sp->tx_full = 1;
2207: }
2208: spin_unlock_irqrestore(&sp->lock, flags);
2209:
2210: if (speedo_debug > 5)
2211: printk(" CmdMCSetup frame length %d in entry %d.\n",
2212: dev->mc_count, entry);
2213: }
2214:
2215: sp->rx_mode = new_rx_mode;
2216: }
2217:
2218: #ifdef MODULE
2219:
2220: int init_module(void)
2221: {
2222: int cards_found;
2223:
2224: if (debug >= 0 && speedo_debug != debug)
2225: printk(KERN_INFO "eepro100.c: Debug level is %d.\n", debug);
2226: if (debug >= 0)
2227: speedo_debug = debug;
2228: /* Always emit the version message. */
2229: if (speedo_debug)
2230: printk(KERN_INFO "%s", version);
2231:
2232: cards_found = eepro100_init();
2233: if (cards_found <= 0) {
2234: printk(KERN_INFO "eepro100: No cards found, driver not installed.\n");
2235: return -ENODEV;
2236: }
2237: return 0;
2238: }
2239:
2240: void
2241: cleanup_module(void)
2242: {
2243: struct net_device *next_dev;
2244:
2245: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
2246: while (root_speedo_dev) {
2247: struct speedo_private *sp = (void *)root_speedo_dev->priv;
2248: unregister_netdev(root_speedo_dev);
2249: release_region(root_speedo_dev->base_addr, SPEEDO3_TOTAL_SIZE);
2250: #ifndef USE_IO
2251: iounmap((char *)root_speedo_dev->base_addr);
2252: #endif
2253: next_dev = sp->next_module;
2254: if (sp->priv_addr)
2255: kfree(sp->priv_addr);
2256: kfree(root_speedo_dev);
2257: root_speedo_dev = next_dev;
2258: }
2259: }
2260:
2261: #else /* not MODULE */
2262:
2263: int eepro100_probe(void)
2264: {
2265: int cards_found = 0;
2266:
2267: cards_found = eepro100_init();
2268:
2269: if (speedo_debug > 0 && cards_found)
2270: printk(version);
2271:
2272: return cards_found ? 0 : -ENODEV;
2273: }
2274: #endif /* MODULE */
2275:
2276: /*
2277: * Local variables:
2278: * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
2279: * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
2280: * c-indent-level: 4
2281: * c-basic-offset: 4
2282: * tab-width: 4
2283: * End:
2284: */
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