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1.1 ! root 1: /************************************************************ ! 2: * * ! 3: * Linux EATA SCSI driver * ! 4: * * ! 5: * based on the CAM document CAM/89-004 rev. 2.0c, * ! 6: * DPT's driver kit, some internal documents and source, * ! 7: * and several other Linux scsi drivers and kernel docs. * ! 8: * * ! 9: * The driver currently: * ! 10: * -supports all ISA based EATA-DMA boards * ! 11: * like PM2011, PM2021, PM2041, PM3021 * ! 12: * -supports all EISA based EATA-DMA boards * ! 13: * like PM2012B, PM2022, PM2122, PM2322, PM2042, * ! 14: * PM3122, PM3222, PM3332 * ! 15: * -supports all PCI based EATA-DMA boards * ! 16: * like PM2024, PM2124, PM2044, PM2144, PM3224, * ! 17: * PM3334 * ! 18: * -supports the Wide, Ultra Wide and Differential * ! 19: * versions of the boards * ! 20: * -supports multiple HBAs with & without IRQ sharing * ! 21: * -supports all SCSI channels on multi channel boards * ! 22: * -supports ix86 and MIPS, untested on ALPHA * ! 23: * -needs identical IDs on all channels of a HBA * ! 24: * -can be loaded as module * ! 25: * -displays statistical and hardware information * ! 26: * in /proc/scsi/eata_dma * ! 27: * -provides rudimentary latency measurement * ! 28: * possibilities via /proc/scsi/eata_dma/<hostnum> * ! 29: * * ! 30: * (c)1993-96 Michael Neuffer * ! 31: * [email protected] * ! 32: * [email protected] * ! 33: * * ! 34: * This program is free software; you can redistribute it * ! 35: * and/or modify it under the terms of the GNU General * ! 36: * Public License as published by the Free Software * ! 37: * Foundation; either version 2 of the License, or * ! 38: * (at your option) any later version. * ! 39: * * ! 40: * This program is distributed in the hope that it will be * ! 41: * useful, but WITHOUT ANY WARRANTY; without even the * ! 42: * implied warranty of MERCHANTABILITY or FITNESS FOR A * ! 43: * PARTICULAR PURPOSE. See the GNU General Public License * ! 44: * for more details. * ! 45: * * ! 46: * You should have received a copy of the GNU General * ! 47: * Public License along with this kernel; if not, write to * ! 48: * the Free Software Foundation, Inc., 675 Mass Ave, * ! 49: * Cambridge, MA 02139, USA. * ! 50: * * ! 51: * I have to thank DPT for their excellent support. I took * ! 52: * me almost a year and a stopover at their HQ, on my first * ! 53: * trip to the USA, to get it, but since then they've been * ! 54: * very helpful and tried to give me all the infos and * ! 55: * support I need. * ! 56: * * ! 57: * Thanks also to Simon Shapiro, Greg Hosler and Mike * ! 58: * Jagdis who did a lot of testing and found quite a number * ! 59: * of bugs during the development. * ! 60: ************************************************************ ! 61: * last change: 96/10/21 OS: Linux 2.0.23 * ! 62: ************************************************************/ ! 63: ! 64: /* Look in eata_dma.h for configuration and revision information */ ! 65: ! 66: #include <linux/module.h> ! 67: #include <linux/kernel.h> ! 68: #include <linux/sched.h> ! 69: #include <linux/string.h> ! 70: #include <linux/ioport.h> ! 71: #include <linux/malloc.h> ! 72: #include <linux/in.h> ! 73: #include <linux/bios32.h> ! 74: #include <linux/pci.h> ! 75: #include <linux/proc_fs.h> ! 76: #include <linux/delay.h> ! 77: #include <asm/byteorder.h> ! 78: #include <asm/types.h> ! 79: #include <asm/io.h> ! 80: #include <asm/dma.h> ! 81: #ifdef MACH ! 82: #define flush_cache_all() ! 83: #else ! 84: #include <asm/pgtable.h> ! 85: #endif ! 86: #ifdef __mips__ ! 87: #include <asm/cachectl.h> ! 88: #endif ! 89: #include <linux/blk.h> ! 90: #include "scsi.h" ! 91: #include "sd.h" ! 92: #include "hosts.h" ! 93: #include "eata_dma.h" ! 94: #include "eata_dma_proc.h" ! 95: ! 96: #include <linux/stat.h> ! 97: #include <linux/config.h> /* for CONFIG_PCI */ ! 98: ! 99: struct proc_dir_entry proc_scsi_eata_dma = { ! 100: PROC_SCSI_EATA, 8, "eata_dma", ! 101: S_IFDIR | S_IRUGO | S_IXUGO, 2 ! 102: }; ! 103: ! 104: static u32 ISAbases[] = ! 105: {0x1F0, 0x170, 0x330, 0x230}; ! 106: static unchar EISAbases[] = ! 107: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; ! 108: static uint registered_HBAs = 0; ! 109: static struct Scsi_Host *last_HBA = NULL; ! 110: static struct Scsi_Host *first_HBA = NULL; ! 111: static unchar reg_IRQ[] = ! 112: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; ! 113: static unchar reg_IRQL[] = ! 114: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; ! 115: static struct eata_sp *status = 0; /* Statuspacket array */ ! 116: static void *dma_scratch = 0; ! 117: ! 118: static struct eata_register *fake_int_base; ! 119: static int fake_int_result; ! 120: static int fake_int_happened; ! 121: ! 122: static ulong int_counter = 0; ! 123: static ulong queue_counter = 0; ! 124: ! 125: void eata_scsi_done (Scsi_Cmnd * scmd) ! 126: { ! 127: scmd->request.rq_status = RQ_SCSI_DONE; ! 128: ! 129: if (scmd->request.sem != NULL) ! 130: up(scmd->request.sem); ! 131: ! 132: return; ! 133: } ! 134: ! 135: void eata_fake_int_handler(s32 irq, void *dev_id, struct pt_regs * regs) ! 136: { ! 137: fake_int_result = inb((ulong)fake_int_base + HA_RSTATUS); ! 138: fake_int_happened = TRUE; ! 139: DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %p" ! 140: " res %#x\n", irq, fake_int_base, fake_int_result)); ! 141: return; ! 142: } ! 143: ! 144: #include "eata_dma_proc.c" ! 145: ! 146: #ifdef MODULE ! 147: int eata_release(struct Scsi_Host *sh) ! 148: { ! 149: uint i; ! 150: if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq, NULL); ! 151: else reg_IRQ[sh->irq]--; ! 152: ! 153: scsi_init_free((void *)status, 512); ! 154: scsi_init_free((void *)dma_scratch - 4, 1024); ! 155: for (i = 0; i < sh->can_queue; i++){ /* Free all SG arrays */ ! 156: if(SD(sh)->ccb[i].sg_list != NULL) ! 157: scsi_init_free((void *) SD(sh)->ccb[i].sg_list, ! 158: sh->sg_tablesize * sizeof(struct eata_sg_list)); ! 159: } ! 160: ! 161: if (SD(sh)->channel == 0) { ! 162: if (sh->dma_channel != BUSMASTER) free_dma(sh->dma_channel); ! 163: if (sh->io_port && sh->n_io_port) ! 164: release_region(sh->io_port, sh->n_io_port); ! 165: } ! 166: return(TRUE); ! 167: } ! 168: #endif ! 169: ! 170: ! 171: inline void eata_latency_in(struct eata_ccb *cp, hostdata *hd) ! 172: { ! 173: uint time; ! 174: time = jiffies - cp->timestamp; ! 175: if(hd->all_lat[1] > time) ! 176: hd->all_lat[1] = time; ! 177: if(hd->all_lat[2] < time) ! 178: hd->all_lat[2] = time; ! 179: hd->all_lat[3] += time; ! 180: hd->all_lat[0]++; ! 181: if((cp->rw_latency) == WRITE) { /* was WRITE */ ! 182: if(hd->writes_lat[cp->sizeindex][1] > time) ! 183: hd->writes_lat[cp->sizeindex][1] = time; ! 184: if(hd->writes_lat[cp->sizeindex][2] < time) ! 185: hd->writes_lat[cp->sizeindex][2] = time; ! 186: hd->writes_lat[cp->sizeindex][3] += time; ! 187: hd->writes_lat[cp->sizeindex][0]++; ! 188: } else if((cp->rw_latency) == READ) { ! 189: if(hd->reads_lat[cp->sizeindex][1] > time) ! 190: hd->reads_lat[cp->sizeindex][1] = time; ! 191: if(hd->reads_lat[cp->sizeindex][2] < time) ! 192: hd->reads_lat[cp->sizeindex][2] = time; ! 193: hd->reads_lat[cp->sizeindex][3] += time; ! 194: hd->reads_lat[cp->sizeindex][0]++; ! 195: } ! 196: } ! 197: ! 198: inline void eata_latency_out(struct eata_ccb *cp, Scsi_Cmnd *cmd) ! 199: { ! 200: int x, z; ! 201: short *sho; ! 202: long *lon; ! 203: x = 0; /* just to keep GCC quiet */ ! 204: cp->timestamp = jiffies; /* For latency measurements */ ! 205: switch(cmd->cmnd[0]) { ! 206: case WRITE_6: ! 207: x = cmd->cmnd[4]/2; ! 208: cp->rw_latency = WRITE; ! 209: break; ! 210: case READ_6: ! 211: x = cmd->cmnd[4]/2; ! 212: cp->rw_latency = READ; ! 213: break; ! 214: case WRITE_10: ! 215: sho = (short *) &cmd->cmnd[7]; ! 216: x = ntohs(*sho)/2; ! 217: cp->rw_latency = WRITE; ! 218: break; ! 219: case READ_10: ! 220: sho = (short *) &cmd->cmnd[7]; ! 221: x = ntohs(*sho)/2; ! 222: cp->rw_latency = READ; ! 223: break; ! 224: case WRITE_12: ! 225: lon = (long *) &cmd->cmnd[6]; ! 226: x = ntohl(*lon)/2; ! 227: cp->rw_latency = WRITE; ! 228: break; ! 229: case READ_12: ! 230: lon = (long *) &cmd->cmnd[6]; ! 231: x = ntohl(*lon)/2; ! 232: cp->rw_latency = READ; ! 233: break; ! 234: default: ! 235: cp->rw_latency = OTHER; ! 236: break; ! 237: } ! 238: if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 || ! 239: cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 || ! 240: cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) { ! 241: for(z = 0; (x > (1 << z)) && (z <= 11); z++) ! 242: /* nothing */; ! 243: cp->sizeindex = z; ! 244: } ! 245: } ! 246: ! 247: ! 248: void eata_int_handler(int irq, void *dev_id, struct pt_regs * regs) ! 249: { ! 250: uint i, result = 0; ! 251: uint hba_stat, scsi_stat, eata_stat; ! 252: Scsi_Cmnd *cmd; ! 253: struct eata_ccb *ccb; ! 254: struct eata_sp *sp; ! 255: uint base; ! 256: uint x; ! 257: struct Scsi_Host *sh; ! 258: ! 259: for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) { ! 260: if (sh->irq != irq) ! 261: continue; ! 262: ! 263: while(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) { ! 264: ! 265: int_counter++; ! 266: ! 267: sp = &SD(sh)->sp; ! 268: #ifdef __mips__ ! 269: sys_cacheflush(sp, sizeof(struct eata_sp), 2); ! 270: #endif ! 271: ccb = sp->ccb; ! 272: ! 273: if(ccb == NULL) { ! 274: eata_stat = inb((uint)sh->base + HA_RSTATUS); ! 275: printk("eata_dma: int_handler, Spurious IRQ %d " ! 276: "received. CCB pointer not set.\n", irq); ! 277: break; ! 278: } ! 279: ! 280: cmd = ccb->cmd; ! 281: base = (uint) cmd->host->base; ! 282: hba_stat = sp->hba_stat; ! 283: ! 284: scsi_stat = (sp->scsi_stat >> 1) & 0x1f; ! 285: ! 286: if (sp->EOC == FALSE) { ! 287: eata_stat = inb(base + HA_RSTATUS); ! 288: printk(KERN_WARNING "eata_dma: int_handler, board: %x cmd %lx " ! 289: "returned unfinished.\n" ! 290: "EATA: %x HBA: %x SCSI: %x spadr %lx spadrirq %lx, " ! 291: "irq%d\n", base, (long)ccb, eata_stat, hba_stat, ! 292: scsi_stat,(long)&status, (long)&status[irq], irq); ! 293: cmd->result = DID_ERROR << 16; ! 294: ccb->status = FREE; ! 295: cmd->scsi_done(cmd); ! 296: break; ! 297: } ! 298: ! 299: sp->EOC = FALSE; /* Clean out this flag */ ! 300: ! 301: if (ccb->status == LOCKED || ccb->status == RESET) { ! 302: printk("eata_dma: int_handler, reseted command pid %ld returned" ! 303: "\n", cmd->pid); ! 304: DBG(DBG_INTR && DBG_DELAY, DELAY(1)); ! 305: } ! 306: ! 307: eata_stat = inb(base + HA_RSTATUS); ! 308: DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, " ! 309: "target: %x, lun: %x, ea_s: %#.2x, hba_s: " ! 310: "%#.2x \n", irq, base, cmd->pid, cmd->target, ! 311: cmd->lun, eata_stat, hba_stat)); ! 312: ! 313: switch (hba_stat) { ! 314: case HA_NO_ERROR: /* NO Error */ ! 315: if(HD(cmd)->do_latency == TRUE && ccb->timestamp) ! 316: eata_latency_in(ccb, HD(cmd)); ! 317: result = DID_OK << 16; ! 318: break; ! 319: case HA_ERR_SEL_TO: /* Selection Timeout */ ! 320: case HA_ERR_CMD_TO: /* Command Timeout */ ! 321: result = DID_TIME_OUT << 16; ! 322: break; ! 323: case HA_BUS_RESET: /* SCSI Bus Reset Received */ ! 324: result = DID_RESET << 16; ! 325: DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: BUS RESET " ! 326: "received on cmd %ld\n", ! 327: HD(cmd)->HBA_number, cmd->pid)); ! 328: break; ! 329: case HA_INIT_POWERUP: /* Initial Controller Power-up */ ! 330: if (cmd->device->type != TYPE_TAPE) ! 331: result = DID_BUS_BUSY << 16; ! 332: else ! 333: result = DID_ERROR << 16; ! 334: ! 335: for (i = 0; i < MAXTARGET; i++) ! 336: DBG(DBG_STATUS, printk(KERN_DEBUG "scsi%d: cmd pid %ld " ! 337: "returned with INIT_POWERUP\n", ! 338: HD(cmd)->HBA_number, cmd->pid)); ! 339: break; ! 340: case HA_CP_ABORT_NA: ! 341: case HA_CP_ABORTED: ! 342: result = DID_ABORT << 16; ! 343: DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: aborted cmd " ! 344: "returned\n", HD(cmd)->HBA_number)); ! 345: break; ! 346: case HA_CP_RESET_NA: ! 347: case HA_CP_RESET: ! 348: HD(cmd)->resetlevel[cmd->channel] = 0; ! 349: result = DID_RESET << 16; ! 350: DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: reseted cmd " ! 351: "pid %ldreturned\n", ! 352: HD(cmd)->HBA_number, cmd->pid)); ! 353: case HA_SCSI_HUNG: /* SCSI Hung */ ! 354: printk(KERN_ERR "scsi%d: SCSI hung\n", HD(cmd)->HBA_number); ! 355: result = DID_ERROR << 16; ! 356: break; ! 357: case HA_RSENSE_FAIL: /* Auto Request-Sense Failed */ ! 358: DBG(DBG_STATUS, printk(KERN_ERR "scsi%d: Auto Request Sense " ! 359: "Failed\n", HD(cmd)->HBA_number)); ! 360: result = DID_ERROR << 16; ! 361: break; ! 362: case HA_UNX_BUSPHASE: /* Unexpected Bus Phase */ ! 363: case HA_UNX_BUS_FREE: /* Unexpected Bus Free */ ! 364: case HA_BUS_PARITY: /* Bus Parity Error */ ! 365: case HA_UNX_MSGRJCT: /* Unexpected Message Reject */ ! 366: case HA_RESET_STUCK: /* SCSI Bus Reset Stuck */ ! 367: case HA_PARITY_ERR: /* Controller Ram Parity */ ! 368: default: ! 369: result = DID_ERROR << 16; ! 370: break; ! 371: } ! 372: cmd->result = result | (scsi_stat << 1); ! 373: ! 374: #if DBG_INTR2 ! 375: if (scsi_stat || result || hba_stat || eata_stat != 0x50 ! 376: || cmd->scsi_done == NULL || cmd->device->id == 7) ! 377: printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n" ! 378: "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, " ! 379: "sense_key: %#x, result: %#.8x\n", x, ! 380: cmd->device->channel, cmd->device->id, cmd->device->lun, ! 381: cmd->pid, eata_stat, hba_stat, scsi_stat, ! 382: cmd->sense_buffer[2] & 0xf, cmd->result); ! 383: DBG(DBG_INTR&&DBG_DELAY,DELAY(1)); ! 384: #endif ! 385: ! 386: ccb->status = FREE; /* now we can release the slot */ ! 387: cmd->scsi_done(cmd); ! 388: } ! 389: } ! 390: ! 391: return; ! 392: } ! 393: ! 394: inline int eata_send_command(u32 addr, u32 base, u8 command) ! 395: { ! 396: long loop = R_LIMIT; ! 397: ! 398: while (inb(base + HA_RAUXSTAT) & HA_ABUSY) ! 399: if (--loop == 0) ! 400: return(FALSE); ! 401: ! 402: if(addr != (u32) NULL) ! 403: addr = virt_to_bus((void *)addr); ! 404: ! 405: /* ! 406: * This is overkill.....but the MIPSen seem to need this ! 407: * and it will be optimized away for i86 and ALPHA machines. ! 408: */ ! 409: flush_cache_all(); ! 410: ! 411: /* And now the address in nice little byte chunks */ ! 412: #ifdef __LITTLE_ENDIAN ! 413: outb(addr, base + HA_WDMAADDR); ! 414: outb(addr >> 8, base + HA_WDMAADDR + 1); ! 415: outb(addr >> 16, base + HA_WDMAADDR + 2); ! 416: outb(addr >> 24, base + HA_WDMAADDR + 3); ! 417: #else ! 418: outb(addr >> 24, base + HA_WDMAADDR); ! 419: outb(addr >> 16, base + HA_WDMAADDR + 1); ! 420: outb(addr >> 8, base + HA_WDMAADDR + 2); ! 421: outb(addr, base + HA_WDMAADDR + 3); ! 422: #endif ! 423: outb(command, base + HA_WCOMMAND); ! 424: return(TRUE); ! 425: } ! 426: ! 427: inline int eata_send_immediate(u32 base, u32 addr, u8 ifc, u8 code, u8 code2) ! 428: { ! 429: if(addr != (u32) NULL) ! 430: addr = virt_to_bus((void *)addr); ! 431: ! 432: /* ! 433: * This is overkill.....but the MIPSen seem to need this ! 434: * and it will be optimized away for i86 and ALPHA machines. ! 435: */ ! 436: flush_cache_all(); ! 437: ! 438: outb(0x0, base + HA_WDMAADDR - 1); ! 439: if(addr){ ! 440: #ifdef __LITTLE_ENDIAN ! 441: outb(addr, base + HA_WDMAADDR); ! 442: outb(addr >> 8, base + HA_WDMAADDR + 1); ! 443: outb(addr >> 16, base + HA_WDMAADDR + 2); ! 444: outb(addr >> 24, base + HA_WDMAADDR + 3); ! 445: #else ! 446: outb(addr >> 24, base + HA_WDMAADDR); ! 447: outb(addr >> 16, base + HA_WDMAADDR + 1); ! 448: outb(addr >> 8, base + HA_WDMAADDR + 2); ! 449: outb(addr, base + HA_WDMAADDR + 3); ! 450: #endif ! 451: } else { ! 452: outb(0x0, base + HA_WDMAADDR); ! 453: outb(0x0, base + HA_WDMAADDR + 1); ! 454: outb(code2, base + HA_WCODE2); ! 455: outb(code, base + HA_WCODE); ! 456: } ! 457: ! 458: outb(ifc, base + HA_WIFC); ! 459: outb(EATA_CMD_IMMEDIATE, base + HA_WCOMMAND); ! 460: return(TRUE); ! 461: } ! 462: ! 463: int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *)) ! 464: { ! 465: unsigned int i, x, y; ! 466: ulong flags; ! 467: hostdata *hd; ! 468: struct Scsi_Host *sh; ! 469: struct eata_ccb *ccb; ! 470: struct scatterlist *sl; ! 471: ! 472: ! 473: save_flags(flags); ! 474: cli(); ! 475: ! 476: #if 0 ! 477: for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) { ! 478: if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) { ! 479: printk("eata_dma: scsi%d interrupt pending in eata_queue.\n" ! 480: " Calling interrupt handler.\n", sh->host_no); ! 481: eata_int_handler(sh->irq, 0, 0); ! 482: } ! 483: } ! 484: #endif ! 485: ! 486: queue_counter++; ! 487: ! 488: hd = HD(cmd); ! 489: sh = cmd->host; ! 490: ! 491: if (cmd->cmnd[0] == REQUEST_SENSE && cmd->sense_buffer[0] != 0) { ! 492: DBG(DBG_REQSENSE, printk(KERN_DEBUG "Tried to REQUEST SENSE\n")); ! 493: cmd->result = DID_OK << 16; ! 494: done(cmd); ! 495: ! 496: return(0); ! 497: } ! 498: ! 499: /* check for free slot */ ! 500: for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) { ! 501: if (y >= sh->can_queue) ! 502: y = 0; ! 503: if (hd->ccb[y].status == FREE) ! 504: break; ! 505: } ! 506: ! 507: hd->last_ccb = y; ! 508: ! 509: if (x >= sh->can_queue) { ! 510: cmd->result = DID_BUS_BUSY << 16; ! 511: DBG(DBG_QUEUE && DBG_ABNORM, ! 512: printk(KERN_CRIT "eata_queue pid %ld, HBA QUEUE FULL..., " ! 513: "returning DID_BUS_BUSY\n", cmd->pid)); ! 514: done(cmd); ! 515: restore_flags(flags); ! 516: return(0); ! 517: } ! 518: ccb = &hd->ccb[y]; ! 519: ! 520: memset(ccb, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *)); ! 521: ! 522: ccb->status = USED; /* claim free slot */ ! 523: ! 524: restore_flags(flags); ! 525: ! 526: DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n", ! 527: cmd->pid, cmd->target, cmd->lun, y)); ! 528: DBG(DBG_QUEUE && DBG_DELAY, DELAY(1)); ! 529: ! 530: if(hd->do_latency == TRUE) ! 531: eata_latency_out(ccb, cmd); ! 532: ! 533: cmd->scsi_done = (void *)done; ! 534: ! 535: switch (cmd->cmnd[0]) { ! 536: case CHANGE_DEFINITION: case COMPARE: case COPY: ! 537: case COPY_VERIFY: case LOG_SELECT: case MODE_SELECT: ! 538: case MODE_SELECT_10: case SEND_DIAGNOSTIC: case WRITE_BUFFER: ! 539: case FORMAT_UNIT: case REASSIGN_BLOCKS: case RESERVE: ! 540: case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW: ! 541: case WRITE_6: case WRITE_10: case WRITE_VERIFY: ! 542: case UPDATE_BLOCK: case WRITE_LONG: case WRITE_SAME: ! 543: case SEARCH_HIGH_12: case SEARCH_EQUAL_12: case SEARCH_LOW_12: ! 544: case WRITE_12: case WRITE_VERIFY_12: case SET_WINDOW: ! 545: case MEDIUM_SCAN: case SEND_VOLUME_TAG: ! 546: case 0xea: /* alternate number for WRITE LONG */ ! 547: ccb->DataOut = TRUE; /* Output mode */ ! 548: break; ! 549: case TEST_UNIT_READY: ! 550: default: ! 551: ccb->DataIn = TRUE; /* Input mode */ ! 552: } ! 553: ! 554: /* FIXME: This will have to be changed once the midlevel driver ! 555: * allows different HBA IDs on every channel. ! 556: */ ! 557: if (cmd->target == sh->this_id) ! 558: ccb->Interpret = TRUE; /* Interpret command */ ! 559: ! 560: if (cmd->use_sg) { ! 561: ccb->scatter = TRUE; /* SG mode */ ! 562: if (ccb->sg_list == NULL) { ! 563: ccb->sg_list = kmalloc(sh->sg_tablesize * sizeof(struct eata_sg_list), ! 564: GFP_ATOMIC | GFP_DMA); ! 565: } ! 566: if (ccb->sg_list == NULL) ! 567: panic("eata_dma: Run out of DMA memory for SG lists !\n"); ! 568: ccb->cp_dataDMA = htonl(virt_to_bus(ccb->sg_list)); ! 569: ! 570: ccb->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list)); ! 571: sl=(struct scatterlist *)cmd->request_buffer; ! 572: for(i = 0; i < cmd->use_sg; i++, sl++){ ! 573: ccb->sg_list[i].data = htonl(virt_to_bus(sl->address)); ! 574: ccb->sg_list[i].len = htonl((u32) sl->length); ! 575: } ! 576: } else { ! 577: ccb->scatter = FALSE; ! 578: ccb->cp_datalen = htonl(cmd->request_bufflen); ! 579: ccb->cp_dataDMA = htonl(virt_to_bus(cmd->request_buffer)); ! 580: } ! 581: ! 582: ccb->Auto_Req_Sen = TRUE; ! 583: ccb->cp_reqDMA = htonl(virt_to_bus(cmd->sense_buffer)); ! 584: ccb->reqlen = sizeof(cmd->sense_buffer); ! 585: ! 586: ccb->cp_id = cmd->target; ! 587: ccb->cp_channel = cmd->channel; ! 588: ccb->cp_lun = cmd->lun; ! 589: ccb->cp_dispri = TRUE; ! 590: ccb->cp_identify = TRUE; ! 591: memcpy(ccb->cp_cdb, cmd->cmnd, cmd->cmd_len); ! 592: ! 593: ccb->cp_statDMA = htonl(virt_to_bus(&(hd->sp))); ! 594: ! 595: ccb->cp_viraddr = ccb; /* This will be passed thru, so we don't need to ! 596: * convert it */ ! 597: ccb->cmd = cmd; ! 598: cmd->host_scribble = (char *)&hd->ccb[y]; ! 599: ! 600: if(eata_send_command((u32) ccb, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) { ! 601: cmd->result = DID_BUS_BUSY << 16; ! 602: DBG(DBG_QUEUE && DBG_ABNORM, ! 603: printk("eata_queue target %d, pid %ld, HBA busy, " ! 604: "returning DID_BUS_BUSY\n",cmd->target, cmd->pid)); ! 605: ccb->status = FREE; ! 606: done(cmd); ! 607: return(0); ! 608: } ! 609: DBG(DBG_QUEUE, printk("Queued base %#.4x pid: %ld target: %x lun: %x " ! 610: "slot %d irq %d\n", (s32)sh->base, cmd->pid, ! 611: cmd->target, cmd->lun, y, sh->irq)); ! 612: DBG(DBG_QUEUE && DBG_DELAY, DELAY(1)); ! 613: ! 614: return(0); ! 615: } ! 616: ! 617: ! 618: int eata_abort(Scsi_Cmnd * cmd) ! 619: { ! 620: ulong loop = HZ / 2; ! 621: ulong flags; ! 622: int x; ! 623: struct Scsi_Host *sh; ! 624: ! 625: save_flags(flags); ! 626: cli(); ! 627: ! 628: DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x" ! 629: " reason %x\n", cmd->pid, cmd->target, cmd->lun, ! 630: cmd->abort_reason)); ! 631: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 632: ! 633: /* Some interrupt controllers seem to loose interrupts */ ! 634: for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) { ! 635: if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) { ! 636: printk("eata_dma: scsi%d interrupt pending in eata_abort.\n" ! 637: " Calling interrupt handler.\n", sh->host_no); ! 638: eata_int_handler(sh->irq, 0, 0); ! 639: } ! 640: } ! 641: ! 642: while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY) { ! 643: if (--loop == 0) { ! 644: printk("eata_dma: abort, timeout error.\n"); ! 645: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 646: restore_flags(flags); ! 647: return (SCSI_ABORT_ERROR); ! 648: } ! 649: } ! 650: if (CD(cmd)->status == RESET) { ! 651: printk("eata_dma: abort, command reset error.\n"); ! 652: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 653: restore_flags(flags); ! 654: return (SCSI_ABORT_ERROR); ! 655: } ! 656: if (CD(cmd)->status == LOCKED) { ! 657: DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n")); ! 658: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 659: restore_flags(flags); ! 660: return (SCSI_ABORT_NOT_RUNNING); ! 661: } ! 662: if (CD(cmd)->status == USED) { ! 663: DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n")); ! 664: restore_flags(flags); ! 665: return (SCSI_ABORT_BUSY); /* SNOOZE */ ! 666: } ! 667: if (CD(cmd)->status == FREE) { ! 668: DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n")); ! 669: restore_flags(flags); ! 670: return (SCSI_ABORT_NOT_RUNNING); ! 671: } ! 672: restore_flags(flags); ! 673: panic("eata_dma: abort: invalid slot status\n"); ! 674: } ! 675: ! 676: int eata_reset(Scsi_Cmnd * cmd, unsigned int resetflags) ! 677: { ! 678: uint x; ! 679: ulong loop = loops_per_sec / 3; ! 680: ulong flags; ! 681: unchar success = FALSE; ! 682: Scsi_Cmnd *sp; ! 683: struct Scsi_Host *sh; ! 684: ! 685: save_flags(flags); ! 686: cli(); ! 687: ! 688: DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x" ! 689: " reason %x\n", cmd->pid, cmd->target, cmd->lun, ! 690: cmd->abort_reason)); ! 691: ! 692: for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) { ! 693: if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) { ! 694: printk("eata_dma: scsi%d interrupt pending in eata_reset.\n" ! 695: " Calling interrupt handler.\n", sh->host_no); ! 696: eata_int_handler(sh->irq, 0, 0); ! 697: } ! 698: } ! 699: ! 700: if (HD(cmd)->state == RESET) { ! 701: printk("eata_reset: exit, already in reset.\n"); ! 702: restore_flags(flags); ! 703: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 704: return (SCSI_RESET_ERROR); ! 705: } ! 706: ! 707: while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY) ! 708: if (--loop == 0) { ! 709: printk("eata_reset: exit, timeout error.\n"); ! 710: restore_flags(flags); ! 711: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 712: return (SCSI_RESET_ERROR); ! 713: } ! 714: ! 715: for (x = 0; x < cmd->host->can_queue; x++) { ! 716: if (HD(cmd)->ccb[x].status == FREE) ! 717: continue; ! 718: ! 719: if (HD(cmd)->ccb[x].status == LOCKED) { ! 720: HD(cmd)->ccb[x].status = FREE; ! 721: printk("eata_reset: locked slot %d forced free.\n", x); ! 722: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 723: continue; ! 724: } ! 725: ! 726: ! 727: sp = HD(cmd)->ccb[x].cmd; ! 728: HD(cmd)->ccb[x].status = RESET; ! 729: ! 730: if (sp == NULL) ! 731: panic("eata_reset: slot %d, sp==NULL.\n", x); ! 732: ! 733: printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid); ! 734: ! 735: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 736: ! 737: if (sp == cmd) ! 738: success = TRUE; ! 739: } ! 740: ! 741: /* hard reset the HBA */ ! 742: inb((u32) (cmd->host->base) + HA_RSTATUS); /* This might cause trouble */ ! 743: eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET); ! 744: ! 745: HD(cmd)->state = RESET; ! 746: ! 747: DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling " ! 748: "interrupts.\n")); ! 749: ! 750: DELAY(2); /* In theorie we should get interrupts and set free all ! 751: * used queueslots */ ! 752: ! 753: DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled again.\n")); ! 754: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 755: ! 756: for (x = 0; x < cmd->host->can_queue; x++) { ! 757: ! 758: /* Skip slots already set free by interrupt and those that ! 759: * are still LOCKED from the last reset */ ! 760: if (HD(cmd)->ccb[x].status != RESET) ! 761: continue; ! 762: ! 763: sp = HD(cmd)->ccb[x].cmd; ! 764: sp->result = DID_RESET << 16; ! 765: ! 766: /* This mailbox is still waiting for its interrupt */ ! 767: HD(cmd)->ccb[x].status = LOCKED; ! 768: ! 769: printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n", ! 770: x, sp->pid); ! 771: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 772: ! 773: sp->scsi_done(sp); ! 774: } ! 775: ! 776: HD(cmd)->state = FALSE; ! 777: restore_flags(flags); ! 778: ! 779: if (success) { ! 780: DBG(DBG_ABNORM, printk("eata_reset: exit, pending.\n")); ! 781: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 782: return (SCSI_RESET_PENDING); ! 783: } else { ! 784: DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n")); ! 785: DBG(DBG_ABNORM && DBG_DELAY, DELAY(1)); ! 786: return (SCSI_RESET_PUNT); ! 787: } ! 788: } ! 789: ! 790: /* Here we try to determine the optimum queue depth for ! 791: * each attached device. ! 792: * ! 793: * At the moment the algorithm is rather simple ! 794: */ ! 795: static void eata_select_queue_depths(struct Scsi_Host *host, ! 796: Scsi_Device *devicelist) ! 797: { ! 798: Scsi_Device *device; ! 799: int devcount = 0; ! 800: int factor = 0; ! 801: ! 802: #if CRIPPLE_QUEUE ! 803: for(device = devicelist; device != NULL; device = device->next) { ! 804: if(device->host == host) ! 805: device->queue_depth = 2; ! 806: } ! 807: #else ! 808: /* First we do a sample run go find out what we have */ ! 809: for(device = devicelist; device != NULL; device = device->next) { ! 810: if (device->host == host) { ! 811: devcount++; ! 812: switch(device->type) { ! 813: case TYPE_DISK: ! 814: case TYPE_MOD: ! 815: factor += TYPE_DISK_QUEUE; ! 816: break; ! 817: case TYPE_TAPE: ! 818: factor += TYPE_TAPE_QUEUE; ! 819: break; ! 820: case TYPE_WORM: ! 821: case TYPE_ROM: ! 822: factor += TYPE_ROM_QUEUE; ! 823: break; ! 824: case TYPE_PROCESSOR: ! 825: case TYPE_SCANNER: ! 826: default: ! 827: factor += TYPE_OTHER_QUEUE; ! 828: break; ! 829: } ! 830: } ! 831: } ! 832: ! 833: DBG(DBG_REGISTER, printk(KERN_DEBUG "scsi%d: needed queueslots %d\n", ! 834: host->host_no, factor)); ! 835: ! 836: if(factor == 0) /* We don't want to get a DIV BY ZERO error */ ! 837: factor = 1; ! 838: ! 839: factor = (SD(host)->queuesize * 10) / factor; ! 840: ! 841: DBG(DBG_REGISTER, printk(KERN_DEBUG "scsi%d: using factor %dE-1\n", ! 842: host->host_no, factor)); ! 843: ! 844: /* Now that have the factor we can set the individual queuesizes */ ! 845: for(device = devicelist; device != NULL; device = device->next) { ! 846: if(device->host == host) { ! 847: if(SD(device->host)->bustype != IS_ISA){ ! 848: switch(device->type) { ! 849: case TYPE_DISK: ! 850: case TYPE_MOD: ! 851: device->queue_depth = (TYPE_DISK_QUEUE * factor) / 10; ! 852: break; ! 853: case TYPE_TAPE: ! 854: device->queue_depth = (TYPE_TAPE_QUEUE * factor) / 10; ! 855: break; ! 856: case TYPE_WORM: ! 857: case TYPE_ROM: ! 858: device->queue_depth = (TYPE_ROM_QUEUE * factor) / 10; ! 859: break; ! 860: case TYPE_PROCESSOR: ! 861: case TYPE_SCANNER: ! 862: default: ! 863: device->queue_depth = (TYPE_OTHER_QUEUE * factor) / 10; ! 864: break; ! 865: } ! 866: } else /* ISA forces us to limit the queue depth because of the ! 867: * bounce buffer memory overhead. I know this is cruel */ ! 868: device->queue_depth = 2; ! 869: ! 870: /* ! 871: * It showed that we need to set an upper limit of commands ! 872: * we can allow to queue for a single device on the bus. ! 873: * If we get above that limit, the broken midlevel SCSI code ! 874: * will produce bogus timeouts and aborts en masse. :-( ! 875: */ ! 876: if(device->queue_depth > UPPER_DEVICE_QUEUE_LIMIT) ! 877: device->queue_depth = UPPER_DEVICE_QUEUE_LIMIT; ! 878: if(device->queue_depth == 0) ! 879: device->queue_depth = 1; ! 880: ! 881: printk(KERN_INFO "scsi%d: queue depth for target %d on channel %d " ! 882: "set to %d\n", host->host_no, device->id, device->channel, ! 883: device->queue_depth); ! 884: } ! 885: } ! 886: #endif ! 887: } ! 888: ! 889: #if CHECK_BLINK ! 890: int check_blink_state(long base) ! 891: { ! 892: ushort loops = 10; ! 893: u32 blinkindicator; ! 894: u32 state = 0x12345678; ! 895: u32 oldstate = 0; ! 896: ! 897: blinkindicator = htonl(0x54504442); ! 898: while ((loops--) && (state != oldstate)) { ! 899: oldstate = state; ! 900: state = inl((uint) base + 1); ! 901: } ! 902: ! 903: DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n", ! 904: (state == oldstate) && (state == blinkindicator))); ! 905: ! 906: if ((state == oldstate) && (state == blinkindicator)) ! 907: return(TRUE); ! 908: else ! 909: return (FALSE); ! 910: } ! 911: #endif ! 912: ! 913: char * get_board_data(u32 base, u32 irq, u32 id) ! 914: { ! 915: struct eata_ccb *cp; ! 916: struct eata_sp *sp; ! 917: static char *buff; ! 918: ulong i; ! 919: ! 920: cp = (struct eata_ccb *) scsi_init_malloc(sizeof(struct eata_ccb), ! 921: GFP_ATOMIC | GFP_DMA); ! 922: sp = (struct eata_sp *) scsi_init_malloc(sizeof(struct eata_sp), ! 923: GFP_ATOMIC | GFP_DMA); ! 924: ! 925: buff = dma_scratch; ! 926: ! 927: memset(cp, 0, sizeof(struct eata_ccb)); ! 928: memset(sp, 0, sizeof(struct eata_sp)); ! 929: memset(buff, 0, 256); ! 930: ! 931: cp->DataIn = TRUE; ! 932: cp->Interpret = TRUE; /* Interpret command */ ! 933: cp->cp_dispri = TRUE; ! 934: cp->cp_identify = TRUE; ! 935: ! 936: cp->cp_datalen = htonl(56); ! 937: cp->cp_dataDMA = htonl(virt_to_bus(buff)); ! 938: cp->cp_statDMA = htonl(virt_to_bus(sp)); ! 939: cp->cp_viraddr = cp; ! 940: ! 941: cp->cp_id = id; ! 942: cp->cp_lun = 0; ! 943: ! 944: cp->cp_cdb[0] = INQUIRY; ! 945: cp->cp_cdb[1] = 0; ! 946: cp->cp_cdb[2] = 0; ! 947: cp->cp_cdb[3] = 0; ! 948: cp->cp_cdb[4] = 56; ! 949: cp->cp_cdb[5] = 0; ! 950: ! 951: fake_int_base = (struct eata_register *) base; ! 952: fake_int_result = FALSE; ! 953: fake_int_happened = FALSE; ! 954: ! 955: eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP); ! 956: ! 957: i = jiffies + (3 * HZ); ! 958: while (fake_int_happened == FALSE && jiffies <= i) ! 959: barrier(); ! 960: ! 961: DBG(DBG_INTR3, printk(KERN_DEBUG "fake_int_result: %#x hbastat %#x " ! 962: "scsistat %#x, buff %p sp %p\n", ! 963: fake_int_result, (u32) (sp->hba_stat /*& 0x7f*/), ! 964: (u32) sp->scsi_stat, buff, sp)); ! 965: ! 966: scsi_init_free((void *)cp, sizeof(struct eata_ccb)); ! 967: scsi_init_free((void *)sp, sizeof(struct eata_sp)); ! 968: ! 969: if ((fake_int_result & HA_SERROR) || jiffies > i){ ! 970: printk(KERN_WARNING "eata_dma: trying to reset HBA at %x to clear " ! 971: "possible blink state\n", base); ! 972: /* hard reset the HBA */ ! 973: inb((u32) (base) + HA_RSTATUS); ! 974: eata_send_command(0, base, EATA_CMD_RESET); ! 975: DELAY(1); ! 976: return (NULL); ! 977: } else ! 978: return (buff); ! 979: } ! 980: ! 981: ! 982: int get_conf_PIO(u32 base, struct get_conf *buf) ! 983: { ! 984: ulong loop = R_LIMIT; ! 985: u16 *p; ! 986: ! 987: if(check_region(base, 9)) ! 988: return (FALSE); ! 989: ! 990: memset(buf, 0, sizeof(struct get_conf)); ! 991: ! 992: while (inb(base + HA_RSTATUS) & HA_SBUSY) ! 993: if (--loop == 0) ! 994: return (FALSE); ! 995: ! 996: fake_int_base = (struct eata_register *) base; ! 997: fake_int_result = FALSE; ! 998: fake_int_happened = FALSE; ! 999: ! 1000: DBG(DBG_PIO && DBG_PROBE, ! 1001: printk("Issuing PIO READ CONFIG to HBA at %#x\n", base)); ! 1002: eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG); ! 1003: ! 1004: loop = R_LIMIT; ! 1005: for (p = (u16 *) buf; ! 1006: (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) { ! 1007: while (!(inb(base + HA_RSTATUS) & HA_SDRQ)) ! 1008: if (--loop == 0) ! 1009: return (FALSE); ! 1010: ! 1011: loop = R_LIMIT; ! 1012: *p = inw(base + HA_RDATA); ! 1013: } ! 1014: ! 1015: if (!(inb(base + HA_RSTATUS) & HA_SERROR)) { /* Error ? */ ! 1016: if (htonl(EATA_SIGNATURE) == buf->signature) { ! 1017: DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x " ! 1018: "EATA Level: %x\n", (uint) base, ! 1019: (uint) (buf->version))); ! 1020: ! 1021: while (inb(base + HA_RSTATUS) & HA_SDRQ) ! 1022: inw(base + HA_RDATA); ! 1023: return (TRUE); ! 1024: } ! 1025: } else { ! 1026: DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer " ! 1027: "for HBA at %lx\n", (long)base)); ! 1028: } ! 1029: return (FALSE); ! 1030: } ! 1031: ! 1032: ! 1033: void print_config(struct get_conf *gc) ! 1034: { ! 1035: printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n", ! 1036: (u32) ntohl(gc->len), gc->version, ! 1037: gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support, ! 1038: gc->DMA_support); ! 1039: printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n", ! 1040: gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2], ! 1041: gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND); ! 1042: printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d " ! 1043: "MCH:%d MLUN:%d\n", ! 1044: gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR, ! 1045: gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN); ! 1046: printk("RIDQ:%d PCI:%d EISA:%d\n", ! 1047: gc->ID_qest, gc->is_PCI, gc->is_EISA); ! 1048: DBG(DPT_DEBUG, DELAY(14)); ! 1049: } ! 1050: ! 1051: short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt, ! 1052: u8 bustype) ! 1053: { ! 1054: ulong size = 0; ! 1055: unchar dma_channel = 0; ! 1056: char *buff = 0; ! 1057: unchar bugs = 0; ! 1058: struct Scsi_Host *sh; ! 1059: hostdata *hd; ! 1060: int x; ! 1061: ! 1062: ! 1063: DBG(DBG_REGISTER, print_config(gc)); ! 1064: ! 1065: if (gc->DMA_support == FALSE) { ! 1066: printk("The EATA HBA at %#.4x does not support DMA.\n" ! 1067: "Please use the EATA-PIO driver.\n", base); ! 1068: return (FALSE); ! 1069: } ! 1070: if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22) ! 1071: gc->MAX_CHAN = 0; ! 1072: ! 1073: if (reg_IRQ[gc->IRQ] == FALSE) { /* Interrupt already registered ? */ ! 1074: if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT, ! 1075: "eata_dma", NULL)){ ! 1076: reg_IRQ[gc->IRQ]++; ! 1077: if (!gc->IRQ_TR) ! 1078: reg_IRQL[gc->IRQ] = TRUE; /* IRQ is edge triggered */ ! 1079: } else { ! 1080: printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ); ! 1081: return (FALSE); ! 1082: } ! 1083: } else { /* More than one HBA on this IRQ */ ! 1084: if (reg_IRQL[gc->IRQ] == TRUE) { ! 1085: printk("Can't support more than one HBA on this IRQ,\n" ! 1086: " if the IRQ is edge triggered. Sorry.\n"); ! 1087: return (FALSE); ! 1088: } else ! 1089: reg_IRQ[gc->IRQ]++; ! 1090: } ! 1091: ! 1092: ! 1093: /* If DMA is supported but DMA_valid isn't set to indicate that ! 1094: * the channel number is given we must have pre 2.0 firmware (1.7?) ! 1095: * which leaves us to guess since the "newer ones" also don't set the ! 1096: * DMA_valid bit. ! 1097: */ ! 1098: if (gc->DMA_support && !gc->DMA_valid && gc->DMA_channel) { ! 1099: printk(KERN_WARNING "eata_dma: If you are using a pre 2.0 firmware " ! 1100: "please update it !\n" ! 1101: " You can get new firmware releases from ftp.dpt.com\n"); ! 1102: gc->DMA_channel = (base == 0x1f0 ? 3 /* DMA=5 */ : 2 /* DMA=6 */); ! 1103: gc->DMA_valid = TRUE; ! 1104: } ! 1105: ! 1106: /* if gc->DMA_valid it must be an ISA HBA and we have to register it */ ! 1107: dma_channel = BUSMASTER; ! 1108: if (gc->DMA_valid) { ! 1109: if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) { ! 1110: printk(KERN_WARNING "Unable to allocate DMA channel %d for ISA HBA" ! 1111: " at %#.4x.\n", dma_channel, base); ! 1112: reg_IRQ[gc->IRQ]--; ! 1113: if (reg_IRQ[gc->IRQ] == 0) ! 1114: free_irq(gc->IRQ, NULL); ! 1115: if (gc->IRQ_TR == FALSE) ! 1116: reg_IRQL[gc->IRQ] = FALSE; ! 1117: return (FALSE); ! 1118: } ! 1119: } ! 1120: ! 1121: if (dma_channel != BUSMASTER) { ! 1122: disable_dma(dma_channel); ! 1123: clear_dma_ff(dma_channel); ! 1124: set_dma_mode(dma_channel, DMA_MODE_CASCADE); ! 1125: enable_dma(dma_channel); ! 1126: } ! 1127: ! 1128: if (bustype != IS_EISA && bustype != IS_ISA) ! 1129: buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]); ! 1130: ! 1131: if (buff == NULL) { ! 1132: if (bustype == IS_EISA || bustype == IS_ISA) { ! 1133: bugs = bugs || BROKEN_INQUIRY; ! 1134: } else { ! 1135: if (gc->DMA_support == FALSE) ! 1136: printk(KERN_WARNING "HBA at %#.4x doesn't support DMA. " ! 1137: "Sorry\n", base); ! 1138: else ! 1139: printk(KERN_WARNING "HBA at %#.4x does not react on INQUIRY. " ! 1140: "Sorry.\n", base); ! 1141: if (gc->DMA_valid) ! 1142: free_dma(dma_channel); ! 1143: reg_IRQ[gc->IRQ]--; ! 1144: if (reg_IRQ[gc->IRQ] == 0) ! 1145: free_irq(gc->IRQ, NULL); ! 1146: if (gc->IRQ_TR == FALSE) ! 1147: reg_IRQL[gc->IRQ] = FALSE; ! 1148: return (FALSE); ! 1149: } ! 1150: } ! 1151: ! 1152: if (gc->DMA_support == FALSE && buff != NULL) ! 1153: printk(KERN_WARNING "HBA %.12sat %#.4x doesn't set the DMA_support " ! 1154: "flag correctly.\n", &buff[16], base); ! 1155: ! 1156: request_region(base, 9, "eata_dma"); /* We already checked the ! 1157: * availability, so this ! 1158: * should not fail. ! 1159: */ ! 1160: ! 1161: if(ntohs(gc->queuesiz) == 0) { ! 1162: gc->queuesiz = ntohs(64); ! 1163: printk(KERN_WARNING "Warning: Queue size has to be corrected. Assuming" ! 1164: " 64 queueslots\n" ! 1165: " This might be a PM2012B with a defective Firmware\n" ! 1166: " Contact DPT [email protected] for an upgrade\n"); ! 1167: } ! 1168: ! 1169: size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long)) ! 1170: * ntohs(gc->queuesiz)); ! 1171: ! 1172: DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size)); ! 1173: ! 1174: sh = scsi_register(tpnt, size); ! 1175: ! 1176: if(sh != NULL) { ! 1177: ! 1178: hd = SD(sh); ! 1179: ! 1180: memset(hd->reads, 0, sizeof(u32) * 26); ! 1181: ! 1182: sh->select_queue_depths = eata_select_queue_depths; ! 1183: ! 1184: hd->bustype = bustype; ! 1185: ! 1186: /* ! 1187: * If we are using a ISA board, we can't use extended SG, ! 1188: * because we would need excessive amounts of memory for ! 1189: * bounce buffers. ! 1190: */ ! 1191: if (gc->SG_64K==TRUE && ntohs(gc->SGsiz)==64 && hd->bustype!=IS_ISA){ ! 1192: sh->sg_tablesize = SG_SIZE_BIG; ! 1193: } else { ! 1194: sh->sg_tablesize = ntohs(gc->SGsiz); ! 1195: if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) { ! 1196: if (sh->sg_tablesize == 0) ! 1197: printk(KERN_WARNING "Warning: SG size had to be fixed.\n" ! 1198: "This might be a PM2012 with a defective Firmware" ! 1199: "\nContact DPT [email protected] for an upgrade\n"); ! 1200: sh->sg_tablesize = SG_SIZE; ! 1201: } ! 1202: } ! 1203: hd->sgsize = sh->sg_tablesize; ! 1204: } ! 1205: ! 1206: if(sh != NULL) { ! 1207: sh->can_queue = hd->queuesize = ntohs(gc->queuesiz); ! 1208: sh->cmd_per_lun = 0; ! 1209: } ! 1210: ! 1211: if(sh == NULL) { ! 1212: DBG(DBG_REGISTER, printk(KERN_NOTICE "eata_dma: couldn't register HBA" ! 1213: " at%x \n", base)); ! 1214: scsi_unregister(sh); ! 1215: if (gc->DMA_valid) ! 1216: free_dma(dma_channel); ! 1217: ! 1218: reg_IRQ[gc->IRQ]--; ! 1219: if (reg_IRQ[gc->IRQ] == 0) ! 1220: free_irq(gc->IRQ, NULL); ! 1221: if (gc->IRQ_TR == FALSE) ! 1222: reg_IRQL[gc->IRQ] = FALSE; ! 1223: return (FALSE); ! 1224: } ! 1225: ! 1226: ! 1227: hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY); ! 1228: ! 1229: if(hd->broken_INQUIRY == TRUE) { ! 1230: strcpy(hd->vendor, "DPT"); ! 1231: strcpy(hd->name, "??????????"); ! 1232: strcpy(hd->revision, "???.?"); ! 1233: hd->firmware_revision = 0; ! 1234: } else { ! 1235: strncpy(hd->vendor, &buff[8], 8); ! 1236: hd->vendor[8] = 0; ! 1237: strncpy(hd->name, &buff[16], 17); ! 1238: hd->name[17] = 0; ! 1239: hd->revision[0] = buff[32]; ! 1240: hd->revision[1] = buff[33]; ! 1241: hd->revision[2] = buff[34]; ! 1242: hd->revision[3] = '.'; ! 1243: hd->revision[4] = buff[35]; ! 1244: hd->revision[5] = 0; ! 1245: hd->firmware_revision = (buff[32] << 24) + (buff[33] << 16) ! 1246: + (buff[34] << 8) + buff[35]; ! 1247: } ! 1248: ! 1249: if (hd->firmware_revision >= (('0'<<24) + ('7'<<16) + ('G'<< 8) + '0')) ! 1250: hd->immediate_support = 1; ! 1251: else ! 1252: hd->immediate_support = 0; ! 1253: ! 1254: switch (ntohl(gc->len)) { ! 1255: case 0x1c: ! 1256: hd->EATA_revision = 'a'; ! 1257: break; ! 1258: case 0x1e: ! 1259: hd->EATA_revision = 'b'; ! 1260: break; ! 1261: case 0x22: ! 1262: hd->EATA_revision = 'c'; ! 1263: break; ! 1264: case 0x24: ! 1265: hd->EATA_revision = 'z'; ! 1266: default: ! 1267: hd->EATA_revision = '?'; ! 1268: } ! 1269: ! 1270: ! 1271: if(ntohl(gc->len) >= 0x22) { ! 1272: sh->max_id = gc->MAX_ID + 1; ! 1273: sh->max_lun = gc->MAX_LUN + 1; ! 1274: } else { ! 1275: sh->max_id = 8; ! 1276: sh->max_lun = 8; ! 1277: } ! 1278: ! 1279: hd->HBA_number = sh->host_no; ! 1280: hd->channel = gc->MAX_CHAN; ! 1281: sh->max_channel = gc->MAX_CHAN; ! 1282: sh->unique_id = base; ! 1283: sh->base = (char *) base; ! 1284: sh->io_port = base; ! 1285: sh->n_io_port = 9; ! 1286: sh->irq = gc->IRQ; ! 1287: sh->dma_channel = dma_channel; ! 1288: ! 1289: /* FIXME: ! 1290: * SCSI midlevel code should support different HBA ids on every channel ! 1291: */ ! 1292: sh->this_id = gc->scsi_id[3]; ! 1293: ! 1294: if (gc->SECOND) ! 1295: hd->primary = FALSE; ! 1296: else ! 1297: hd->primary = TRUE; ! 1298: ! 1299: sh->wish_block = FALSE; ! 1300: ! 1301: if (hd->bustype != IS_ISA) { ! 1302: sh->unchecked_isa_dma = FALSE; ! 1303: } else { ! 1304: sh->unchecked_isa_dma = TRUE; /* We're doing ISA DMA */ ! 1305: } ! 1306: ! 1307: for(x = 0; x <= 11; x++){ /* Initialize min. latency */ ! 1308: hd->writes_lat[x][1] = 0xffffffff; ! 1309: hd->reads_lat[x][1] = 0xffffffff; ! 1310: } ! 1311: hd->all_lat[1] = 0xffffffff; ! 1312: ! 1313: hd->next = NULL; /* build a linked list of all HBAs */ ! 1314: hd->prev = last_HBA; ! 1315: if(hd->prev != NULL) ! 1316: SD(hd->prev)->next = sh; ! 1317: last_HBA = sh; ! 1318: if (first_HBA == NULL) ! 1319: first_HBA = sh; ! 1320: registered_HBAs++; ! 1321: ! 1322: return (TRUE); ! 1323: } ! 1324: ! 1325: ! 1326: ! 1327: void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt) ! 1328: { ! 1329: u32 base; ! 1330: int i; ! 1331: ! 1332: #if CHECKPAL ! 1333: u8 pal1, pal2, pal3; ! 1334: #endif ! 1335: ! 1336: for (i = 0; i < MAXEISA; i++) { ! 1337: if (EISAbases[i] == TRUE) { /* Still a possibility ? */ ! 1338: ! 1339: base = 0x1c88 + (i * 0x1000); ! 1340: #if CHECKPAL ! 1341: pal1 = inb((u16)base - 8); ! 1342: pal2 = inb((u16)base - 7); ! 1343: pal3 = inb((u16)base - 6); ! 1344: ! 1345: if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) || ! 1346: ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) && (pal3 == NEC_ID3))|| ! 1347: ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) && (pal3 == ATT_ID3))){ ! 1348: DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n", ! 1349: (int)pal1, (int)pal2, (int)pal3)); ! 1350: #endif ! 1351: if (get_conf_PIO(base, buf) == TRUE) { ! 1352: if (buf->IRQ) { ! 1353: DBG(DBG_EISA, printk("Registering EISA HBA\n")); ! 1354: register_HBA(base, buf, tpnt, IS_EISA); ! 1355: } else ! 1356: printk("eata_dma: No valid IRQ. HBA removed from list\n"); ! 1357: } ! 1358: #if CHECK_BLINK ! 1359: else { ! 1360: if (check_blink_state(base)) ! 1361: printk("HBA is in BLINK state. Consult your HBAs " ! 1362: "Manual to correct this.\n"); ! 1363: } ! 1364: #endif ! 1365: /* Nothing found here so we take it from the list */ ! 1366: EISAbases[i] = 0; ! 1367: #if CHECKPAL ! 1368: } ! 1369: #endif ! 1370: } ! 1371: } ! 1372: return; ! 1373: } ! 1374: ! 1375: void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt) ! 1376: { ! 1377: int i; ! 1378: ! 1379: for (i = 0; i < MAXISA; i++) { ! 1380: if (ISAbases[i]) { ! 1381: if (get_conf_PIO(ISAbases[i],buf) == TRUE){ ! 1382: DBG(DBG_ISA, printk("Registering ISA HBA\n")); ! 1383: register_HBA(ISAbases[i], buf, tpnt, IS_ISA); ! 1384: } ! 1385: #if CHECK_BLINK ! 1386: else { ! 1387: if (check_blink_state(ISAbases[i])) ! 1388: printk("HBA is in BLINK state. Consult your HBAs " ! 1389: "Manual to correct this.\n"); ! 1390: } ! 1391: #endif ! 1392: ISAbases[i] = 0; ! 1393: } ! 1394: } ! 1395: return; ! 1396: } ! 1397: ! 1398: void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt) ! 1399: { ! 1400: ! 1401: #ifndef CONFIG_PCI ! 1402: printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n"); ! 1403: #else ! 1404: ! 1405: u8 pci_bus, pci_device_fn; ! 1406: static s16 pci_index = 0; /* Device index to PCI BIOS calls */ ! 1407: u32 base = 0; ! 1408: u16 com_adr; ! 1409: u16 rev_device; ! 1410: u32 error, i, x; ! 1411: u8 pal1, pal2, pal3; ! 1412: ! 1413: if (pcibios_present()) { ! 1414: for (i = 0; i <= MAXPCI; ++i, ++pci_index) { ! 1415: if (pcibios_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT, ! 1416: pci_index, &pci_bus, &pci_device_fn)) ! 1417: break; ! 1418: DBG(DBG_PROBE && DBG_PCI, ! 1419: printk("eata_dma: find_PCI, HBA at bus %d, device %d," ! 1420: " function %d, index %d\n", (s32)pci_bus, ! 1421: (s32)((pci_device_fn & 0xf8) >> 3), ! 1422: (s32)(pci_device_fn & 7), pci_index)); ! 1423: ! 1424: if (!(error = pcibios_read_config_word(pci_bus, pci_device_fn, ! 1425: PCI_CLASS_DEVICE, &rev_device))) { ! 1426: if (rev_device == PCI_CLASS_STORAGE_SCSI) { ! 1427: if (!(error = pcibios_read_config_word(pci_bus, ! 1428: pci_device_fn, PCI_COMMAND, ! 1429: (u16 *) & com_adr))) { ! 1430: if (!((com_adr & PCI_COMMAND_IO) && ! 1431: (com_adr & PCI_COMMAND_MASTER))) { ! 1432: printk("eata_dma: find_PCI, HBA has IO or" ! 1433: " BUSMASTER mode disabled\n"); ! 1434: continue; ! 1435: } ! 1436: } else ! 1437: printk("eata_dma: find_PCI, error %x while reading " ! 1438: "PCI_COMMAND\n", error); ! 1439: } else ! 1440: printk("eata_dma: find_PCI, DEVICECLASSID %x didn't match\n", ! 1441: rev_device); ! 1442: } else { ! 1443: printk("eata_dma: find_PCI, error %x while reading " ! 1444: "PCI_CLASS_BASE\n", ! 1445: error); ! 1446: continue; ! 1447: } ! 1448: ! 1449: if (!(error = pcibios_read_config_dword(pci_bus, pci_device_fn, ! 1450: PCI_BASE_ADDRESS_0, (int *) &base))){ ! 1451: ! 1452: /* Check if the address is valid */ ! 1453: if (base & 0x01) { ! 1454: base &= 0xfffffffe; ! 1455: /* EISA tag there ? */ ! 1456: pal1 = inb(base); ! 1457: pal2 = inb(base + 1); ! 1458: pal3 = inb(base + 2); ! 1459: if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) || ! 1460: ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) && ! 1461: (pal3 == NEC_ID3)) || ! 1462: ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) && ! 1463: (pal3 == ATT_ID3))) ! 1464: base += 0x08; ! 1465: else ! 1466: base += 0x10; /* Now, THIS is the real address */ ! 1467: ! 1468: if (base != 0x1f8) { ! 1469: /* We didn't find it in the primary search */ ! 1470: if (get_conf_PIO(base, buf) == TRUE) { ! 1471: ! 1472: /* OK. We made it till here, so we can go now ! 1473: * and register it. We only have to check and ! 1474: * eventually remove it from the EISA and ISA list ! 1475: */ ! 1476: DBG(DBG_PCI, printk("Registering PCI HBA\n")); ! 1477: register_HBA(base, buf, tpnt, IS_PCI); ! 1478: ! 1479: if (base < 0x1000) { ! 1480: for (x = 0; x < MAXISA; ++x) { ! 1481: if (ISAbases[x] == base) { ! 1482: ISAbases[x] = 0; ! 1483: break; ! 1484: } ! 1485: } ! 1486: } else if ((base & 0x0fff) == 0x0c88) ! 1487: EISAbases[(base >> 12) & 0x0f] = 0; ! 1488: continue; /* break; */ ! 1489: } ! 1490: #if CHECK_BLINK ! 1491: else if (check_blink_state(base) == TRUE) { ! 1492: printk("eata_dma: HBA is in BLINK state.\n" ! 1493: "Consult your HBAs manual to correct this.\n"); ! 1494: } ! 1495: #endif ! 1496: } ! 1497: } ! 1498: } else { ! 1499: printk("eata_dma: error %x while reading " ! 1500: "PCI_BASE_ADDRESS_0\n", error); ! 1501: } ! 1502: } ! 1503: } else { ! 1504: printk("eata_dma: No BIOS32 extensions present. This driver release " ! 1505: "still depends on it.\n" ! 1506: " Skipping scan for PCI HBAs. \n"); ! 1507: } ! 1508: #endif /* #ifndef CONFIG_PCI */ ! 1509: return; ! 1510: } ! 1511: ! 1512: int eata_detect(Scsi_Host_Template * tpnt) ! 1513: { ! 1514: struct Scsi_Host *HBA_ptr; ! 1515: struct get_conf gc; ! 1516: int i; ! 1517: ! 1518: DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG, ! 1519: printk("Using lots of delays to let you read the debugging output\n")); ! 1520: ! 1521: tpnt->proc_dir = &proc_scsi_eata_dma; ! 1522: ! 1523: status = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA); ! 1524: dma_scratch = scsi_init_malloc(1024, GFP_ATOMIC | GFP_DMA); ! 1525: ! 1526: if(status == NULL || dma_scratch == NULL) { ! 1527: printk("eata_dma: can't allocate enough memory to probe for hosts !\n"); ! 1528: return(0); ! 1529: } ! 1530: ! 1531: dma_scratch += 4; ! 1532: ! 1533: find_PCI(&gc, tpnt); ! 1534: ! 1535: find_EISA(&gc, tpnt); ! 1536: ! 1537: find_ISA(&gc, tpnt); ! 1538: ! 1539: for (i = 0; i <= MAXIRQ; i++) { /* Now that we know what we have, we */ ! 1540: if (reg_IRQ[i] >= 1){ /* exchange the interrupt handler which */ ! 1541: free_irq(i, NULL); /* we used for probing with the real one */ ! 1542: request_irq(i, (void *)(eata_int_handler), SA_INTERRUPT|SA_SHIRQ, ! 1543: "eata_dma", NULL); ! 1544: } ! 1545: } ! 1546: ! 1547: HBA_ptr = first_HBA; ! 1548: ! 1549: if (registered_HBAs != 0) { ! 1550: printk("EATA (Extended Attachment) driver version: %d.%d%s" ! 1551: "\ndeveloped in co-operation with DPT\n" ! 1552: "(c) 1993-96 Michael Neuffer, [email protected]\n", ! 1553: VER_MAJOR, VER_MINOR, VER_SUB); ! 1554: printk("Registered HBAs:"); ! 1555: printk("\nHBA no. Boardtype Revis EATA Bus BaseIO IRQ" ! 1556: " DMA Ch ID Pr QS S/G IS\n"); ! 1557: for (i = 1; i <= registered_HBAs; i++) { ! 1558: printk("scsi%-2d: %.12s v%s 2.0%c %s %#.4x %2d", ! 1559: HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision, ! 1560: SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')? ! 1561: "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ", ! 1562: (u32) HBA_ptr->base, HBA_ptr->irq); ! 1563: if(HBA_ptr->dma_channel != BUSMASTER) ! 1564: printk(" %2x ", HBA_ptr->dma_channel); ! 1565: else ! 1566: printk(" %s", "BMST"); ! 1567: printk(" %d %d %c %3d %3d %c\n", ! 1568: SD(HBA_ptr)->channel+1, HBA_ptr->this_id, ! 1569: (SD(HBA_ptr)->primary == TRUE)?'Y':'N', ! 1570: HBA_ptr->can_queue, HBA_ptr->sg_tablesize, ! 1571: (SD(HBA_ptr)->immediate_support == TRUE)?'Y':'N'); ! 1572: HBA_ptr = SD(HBA_ptr)->next; ! 1573: } ! 1574: } else { ! 1575: scsi_init_free((void *)status, 512); ! 1576: } ! 1577: ! 1578: scsi_init_free((void *)dma_scratch - 4, 1024); ! 1579: ! 1580: DBG(DPT_DEBUG, DELAY(12)); ! 1581: ! 1582: return(registered_HBAs); ! 1583: } ! 1584: ! 1585: #ifdef MODULE ! 1586: /* Eventually this will go into an include file, but this will be later */ ! 1587: Scsi_Host_Template driver_template = EATA_DMA; ! 1588: #include "scsi_module.c" ! 1589: #endif ! 1590: ! 1591: /* ! 1592: * Overrides for Emacs so that we almost follow Linus's tabbing style. ! 1593: * Emacs will notice this stuff at the end of the file and automatically ! 1594: * adjust the settings for this buffer only. This must remain at the end ! 1595: * of the file. ! 1596: * --------------------------------------------------------------------------- ! 1597: * Local variables: ! 1598: * c-indent-level: 4 ! 1599: * c-brace-imaginary-offset: 0 ! 1600: * c-brace-offset: -4 ! 1601: * c-argdecl-indent: 4 ! 1602: * c-label-offset: -4 ! 1603: * c-continued-statement-offset: 4 ! 1604: * c-continued-brace-offset: 0 ! 1605: * tab-width: 8 ! 1606: * End: ! 1607: */
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