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1.1 root 1: /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
2: /*
1.1.1.3 ! root 3: Written 1996-2003 by Donald Becker.
1.1 root 4:
1.1.1.3 ! root 5: This software may be used and distributed according to the terms of
! 6: the GNU General Public License (GPL), incorporated herein by reference.
! 7: Drivers based on or derived from this code fall under the GPL and must
! 8: retain the authorship, copyright and license notice. This file is not
! 9: a complete program and may only be used when the entire operating
! 10: system is licensed under the GPL.
1.1 root 11:
12: This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
13: Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
14: and the EtherLink XL 3c900 and 3c905 cards.
15:
1.1.1.3 ! root 16: The original author may be reached as [email protected], or C/O
! 17: Scyld Computing Corporation
! 18: 410 Severn Ave., Suite 210
! 19: Annapolis MD 21403
! 20:
! 21: Support information and updates are available at
! 22: http://www.scyld.com/network/vortex.html
1.1 root 23: */
24:
1.1.1.3 ! root 25: static const char versionA[] =
! 26: "3c59x.c:v0.99Za 4/17/2003 Donald Becker, [email protected]\n";
! 27: static const char versionB[] =
! 28: " http://www.scyld.com/network/vortex.html\n";
! 29:
! 30: /* The user-configurable values.
! 31: These may be modified when a driver module is loaded.*/
! 32:
! 33: /* Message enable level: 0..31 = no..all messages. See NETIF_MSG docs. */
! 34: static int debug = 2;
! 35:
! 36: /* This driver uses 'options' to pass the media type, full-duplex flag, etc.
! 37: See media_tbl[] and the web page for the possible types.
! 38: There is no limit on card count, MAX_UNITS limits only module options. */
! 39: #define MAX_UNITS 8
! 40: static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
! 41: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
! 42:
! 43: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
! 44: static int max_interrupt_work = 20;
1.1 root 45:
46: /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
47: Setting to > 1512 effectively disables this feature. */
48: static const int rx_copybreak = 200;
49:
1.1.1.3 ! root 50: /* Allow setting MTU to a larger size, bypassing the normal Ethernet setup. */
! 51: static const int mtu = 1500;
1.1 root 52:
1.1.1.3 ! root 53: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
! 54: Cyclones and later have a 64 or 256 element hash table based on the
! 55: Ethernet CRC. */
! 56: static int multicast_filter_limit = 64;
! 57:
! 58: /* Operational parameters that are set at compile time. */
! 59:
! 60: /* Keep the ring sizes a power of two for compile efficiency.
! 61: The compiler will convert <unsigned>'%'<2^N> into a bit mask.
! 62: Making the Tx ring too large decreases the effectiveness of channel
! 63: bonding and packet priority.
! 64: Do not increase the Tx ring beyond 256.
! 65: Large receive rings waste memory and confound network buffer limits.
! 66: These values have been carefully studied: changing these might mask a
! 67: problem, it won't fix it.
! 68: */
! 69: #define TX_RING_SIZE 16
! 70: #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
! 71: #define RX_RING_SIZE 32
1.1 root 72:
1.1.1.3 ! root 73: /* Operational parameters that usually are not changed. */
1.1 root 74: /* Time in jiffies before concluding the transmitter is hung. */
1.1.1.3 ! root 75: #define TX_TIMEOUT (6*HZ)
1.1 root 76:
1.1.1.3 ! root 77: /* Allocation size of Rx buffers with normal sized Ethernet frames.
! 78: Do not change this value without good reason. The 1536 value is not
! 79: a limit, or directly related to MTU, but rather a way to keep a
! 80: consistent allocation size among drivers.
! 81: */
! 82: #define PKT_BUF_SZ 1536
1.1 root 83:
1.1.1.3 ! root 84: #ifndef __KERNEL__
! 85: #define __KERNEL__
! 86: #endif
! 87: #if !defined(__OPTIMIZE__)
1.1.1.2 root 88: #warning You must compile this file with the correct options!
89: #warning See the last lines of the source file.
90: #error You must compile this driver with "-O".
91: #endif
92:
1.1 root 93: #include <linux/config.h>
1.1.1.3 ! root 94: #if defined(CONFIG_SMP) && ! defined(__SMP__)
! 95: #define __SMP__
1.1 root 96: #endif
1.1.1.3 ! root 97: #if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)
! 98: #define MODVERSIONS
! 99: #endif
! 100:
! 101: #include <linux/version.h>
! 102: #if LINUX_VERSION_CODE < 0x20300 && defined(MODVERSIONS)
1.1 root 103: #include <linux/module.h>
1.1.1.3 ! root 104: #include <linux/modversions.h>
1.1 root 105: #else
1.1.1.3 ! root 106: #include <linux/modversions.h>
! 107: #include <linux/module.h>
1.1 root 108: #endif
109:
110: #include <linux/kernel.h>
111: #include <linux/string.h>
112: #include <linux/timer.h>
113: #include <linux/errno.h>
114: #include <linux/ioport.h>
1.1.1.3 ! root 115: #if LINUX_VERSION_CODE >= 0x20400
! 116: #include <linux/slab.h>
! 117: #else
1.1 root 118: #include <linux/malloc.h>
1.1.1.3 ! root 119: #endif
1.1 root 120: #include <linux/interrupt.h>
121: #include <linux/pci.h>
122: #include <linux/netdevice.h>
123: #include <linux/etherdevice.h>
124: #include <linux/skbuff.h>
1.1.1.3 ! root 125: #include <asm/irq.h>
! 126: #include <asm/byteorder.h>
1.1 root 127: #include <asm/bitops.h>
128: #include <asm/io.h>
129:
1.1.1.3 ! root 130: #ifdef INLINE_PCISCAN
! 131: #include "k_compat.h"
! 132: #else
! 133: #include "pci-scan.h"
! 134: #include "kern_compat.h"
! 135: #endif
1.1 root 136:
1.1.1.3 ! root 137: /* Condensed operations for readability.
! 138: Compatibility defines are now in kern_compat.h */
1.1 root 139:
1.1.1.3 ! root 140: #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
! 141: #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
1.1 root 142:
1.1.1.3 ! root 143: #if (LINUX_VERSION_CODE >= 0x20100) && defined(MODULE)
1.1.1.2 root 144: char kernel_version[] = UTS_RELEASE;
145: #endif
1.1 root 146:
1.1.1.3 ! root 147: MODULE_AUTHOR("Donald Becker <[email protected]>");
! 148: MODULE_DESCRIPTION("3Com EtherLink XL (3c590/3c900 series) driver");
! 149: MODULE_LICENSE("GPL");
1.1 root 150: MODULE_PARM(debug, "i");
1.1.1.3 ! root 151: MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
! 152: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
1.1 root 153: MODULE_PARM(rx_copybreak, "i");
154: MODULE_PARM(max_interrupt_work, "i");
1.1.1.3 ! root 155: MODULE_PARM(multicast_filter_limit, "i");
! 156: #ifdef MODULE_PARM_DESC
! 157: MODULE_PARM_DESC(debug, "3c59x message level (0-31)");
! 158: MODULE_PARM_DESC(options, "3c59x force fixed media type");
! 159: MODULE_PARM_DESC(full_duplex,
! 160: "3c59x set to 1 to force full duplex (deprecated)");
! 161: MODULE_PARM_DESC(rx_copybreak,
! 162: "3c59x copy breakpoint for copy-only-tiny-frames");
! 163: MODULE_PARM_DESC(max_interrupt_work,
! 164: "3c59x maximum events handled per interrupt");
! 165: MODULE_PARM_DESC(multicast_filter_limit,
! 166: "Multicast address count before switching to Rx-all-multicast");
1.1 root 167: #endif
168:
169: /* Operational parameter that usually are not changed. */
170:
171: /* Set iff a MII transceiver on any interface requires mdio preamble.
172: This only set with the original DP83840 on older 3c905 boards, so the extra
173: code size of a per-interface flag is not worthwhile. */
174: static char mii_preamble_required = 0;
175:
1.1.1.3 ! root 176: /* Performance and path-coverage information. */
! 177: static int rx_nocopy = 0, rx_copy = 0, queued_packet = 0, rx_csumhits;
! 178:
1.1 root 179: /*
180: Theory of Operation
181:
182: I. Board Compatibility
183:
184: This device driver is designed for the 3Com FastEtherLink and FastEtherLink
185: XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
186: versions of the FastEtherLink cards. The supported product IDs are
1.1.1.3 ! root 187: in the pci_tbl[] list.
1.1 root 188:
189: The related ISA 3c515 is supported with a separate driver, 3c515.c, included
1.1.1.3 ! root 190: with the kernel source.
1.1 root 191:
192: II. Board-specific settings
193:
194: PCI bus devices are configured by the system at boot time, so no jumpers
195: need to be set on the board. The system BIOS should be set to assign the
196: PCI INTA signal to an otherwise unused system IRQ line.
197:
198: The EEPROM settings for media type and forced-full-duplex are observed.
199: The EEPROM media type should be left at the default "autoselect" unless using
200: 10base2 or AUI connections which cannot be reliably detected.
201:
202: III. Driver operation
203:
204: The 3c59x series use an interface that's very similar to the previous 3c5x9
205: series. The primary interface is two programmed-I/O FIFOs, with an
206: alternate single-contiguous-region bus-master transfer (see next).
207:
208: The 3c900 "Boomerang" series uses a full-bus-master interface with separate
209: lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
210: DEC Tulip and Intel Speedo3. The first chip version retains a compatible
211: programmed-I/O interface that has been removed in 'B' and subsequent board
212: revisions.
213:
214: One extension that is advertised in a very large font is that the adapters
215: are capable of being bus masters. On the Vortex chip this capability was
216: only for a single contiguous region making it far less useful than the full
217: bus master capability. There is a significant performance impact of taking
218: an extra interrupt or polling for the completion of each transfer, as well
219: as difficulty sharing the single transfer engine between the transmit and
220: receive threads. Using DMA transfers is a win only with large blocks or
221: with the flawed versions of the Intel Orion motherboard PCI controller.
222:
223: The Boomerang chip's full-bus-master interface is useful, and has the
224: currently-unused advantages over other similar chips that queued transmit
225: packets may be reordered and receive buffer groups are associated with a
226: single frame.
227:
228: With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
229: Rather than a fixed intermediate receive buffer, this scheme allocates
230: full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
231: the copying breakpoint: it is chosen to trade-off the memory wasted by
232: passing the full-sized skbuff to the queue layer for all frames vs. the
233: copying cost of copying a frame to a correctly-sized skbuff.
234:
235:
236: IIIC. Synchronization
237: The driver runs as two independent, single-threaded flows of control. One
238: is the send-packet routine, which enforces single-threaded use by the
239: dev->tbusy flag. The other thread is the interrupt handler, which is single
240: threaded by the hardware and other software.
241:
242: IV. Notes
243:
244: Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
245: 3c590, 3c595, and 3c900 boards.
246: The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
247: the EISA version is called "Demon". According to Terry these names come
248: from rides at the local amusement park.
249:
1.1.1.3 ! root 250: The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes.
! 251: This driver only supports ethernet packets on some kernels because of the
! 252: skbuff allocation limit of 4K.
1.1 root 253: */
254:
1.1.1.3 ! root 255: /* The Vortex size is twice that of the original EtherLinkIII series: the
! 256: runtime register window, window 1, is now always mapped in.
! 257: The Boomerang size is twice as large as the Vortex -- it has additional
! 258: bus master control registers. */
! 259: #define VORTEX_SIZE 0x20
! 260: #define BOOMERANG_SIZE 0x40
! 261: #define CYCLONE_SIZE 0x80
! 262: enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=0x804, IS_TORNADO=0x08,
! 263: HAS_PWR_CTRL=0x10, HAS_MII=0x20, HAS_NWAY=0x40, HAS_CB_FNS=0x80,
! 264: EEPROM_8BIT=0x200, INVERT_LED_PWR=0x400, MII_XCVR_PWR=0x4000,
! 265: HAS_V2_TX=0x800, WN0_XCVR_PWR=0x1000,
! 266: };
! 267: /* Base feature sets for the generations. */
! 268: #define FEATURE_BOOMERANG (HAS_MII) /* 905 */
! 269: #define FEATURE_CYCLONE (IS_CYCLONE|HAS_V2_TX) /* 905B */
! 270: #define FEATURE_TORNADO (IS_TORNADO|HAS_NWAY|HAS_V2_TX) /* 905C */
! 271:
! 272: static void *vortex_probe1(struct pci_dev *pdev, void *init_dev,
! 273: long ioaddr, int irq, int chip_idx, int find_cnt);
! 274: static int pwr_event(void *dev_instance, int event);
! 275: #ifdef USE_MEM_OPS
! 276: #define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_MEM | PCI_ADDR1)
! 277: #else
! 278: #define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0)
! 279: #endif
! 280:
1.1 root 281: static struct pci_id_info pci_tbl[] = {
1.1.1.3 ! root 282: {"3c590 Vortex 10Mbps", { 0x590010B7, 0xffffffff },
! 283: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 284: {"3c595 Vortex 100baseTx", { 0x595010B7, 0xffffffff },
! 285: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 286: {"3c595 Vortex 100baseT4", { 0x595110B7, 0xffffffff },
! 287: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 288: {"3c595 Vortex 100base-MII",{ 0x595210B7, 0xffffffff },
! 289: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 290: /* Change EISA_scan if these move from index 4 and 5. */
! 291: {"3c592 EISA Vortex", { 0x592010B7, 0xffffffff },
! 292: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 293: {"3c597 EISA Vortex", { 0x597010B7, 0xffffffff },
! 294: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 295: {"Vortex (unknown)", { 0x590010B7, 0xff00ffff },
! 296: PCI_IOTYPE, VORTEX_SIZE, IS_VORTEX, },
! 297: {"3c900 Boomerang 10baseT", { 0x900010B7, 0xffffffff },
! 298: PCI_IOTYPE, BOOMERANG_SIZE, IS_BOOMERANG, },
! 299: {"3c900 Boomerang 10Mbps Combo", { 0x900110B7, 0xffffffff },
! 300: PCI_IOTYPE,BOOMERANG_SIZE, IS_BOOMERANG, },
! 301: {"3c900 Cyclone 10Mbps TPO", { 0x900410B7, 0xffffffff },
! 302: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE, },
! 303: {"3c900 Cyclone 10Mbps Combo", { 0x900510B7, 0xffffffff },
! 304: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE, },
! 305: {"3c900 Cyclone 10Mbps TPC", { 0x900610B7, 0xffffffff },
! 306: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE, },
! 307: {"3c900B-FL Cyclone 10base-FL",{ 0x900A10B7, 0xffffffff },
! 308: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE, },
! 309: {"3c905 Boomerang 100baseTx",{ 0x905010B7, 0xffffffff },
! 310: PCI_IOTYPE,BOOMERANG_SIZE, IS_BOOMERANG|HAS_MII, },
! 311: {"3c905 Boomerang 100baseT4",{ 0x905110B7, 0xffffffff },
! 312: PCI_IOTYPE,BOOMERANG_SIZE, IS_BOOMERANG|HAS_MII, },
! 313: {"3c905B Cyclone 100baseTx",{ 0x905510B7, 0xffffffff },
! 314: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE|HAS_NWAY, },
! 315: {"3c905B Cyclone 10/100/BNC",{ 0x905810B7, 0xffffffff },
! 316: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE|HAS_NWAY, },
! 317: {"3c905B-FX Cyclone 100baseFx",{ 0x905A10B7, 0xffffffff },
! 318: PCI_IOTYPE, CYCLONE_SIZE, IS_CYCLONE, },
! 319: {"3c905C Tornado",{ 0x920010B7, 0xffffffff },
! 320: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO, },
! 321: {"3c920 Tornado",{ 0x920110B7, 0xffffffff },
! 322: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO, },
! 323: {"3c920 series Tornado",{ 0x920010B7, 0xfff0ffff },
! 324: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO, },
! 325: {"3c982 Server Tornado",{ 0x980510B7, 0xffffffff },
! 326: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO, },
! 327: {"3c980 Cyclone",{ 0x980010B7, 0xfff0ffff },
! 328: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_CYCLONE|HAS_NWAY, },
! 329: {"3cSOHO100-TX Hurricane", { 0x764610B7, 0xffffffff },
! 330: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_CYCLONE, },
! 331: {"3c555 Laptop Hurricane", { 0x505510B7, 0xffffffff },
! 332: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_CYCLONE, },
! 333: {"3c556 Laptop Tornado",{ 0x605510B7, 0xffffffff },
! 334: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO|EEPROM_8BIT, },
! 335: {"3c556 series Laptop Tornado",{ 0x605510B7, 0xf0ffffff },
! 336: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO|EEPROM_8BIT, },
! 337: {"3c1556B-5 mini-PCI",{ 0x605610B7, 0xffffffff, 0x655610b7, 0xffffffff, },
! 338: PCI_IOTYPE, CYCLONE_SIZE,
! 339: FEATURE_TORNADO|EEPROM_8BIT|INVERT_LED_PWR|WN0_XCVR_PWR, },
! 340: {"3c1556B mini-PCI",{ 0x605610B7, 0xffffffff },
! 341: PCI_IOTYPE, CYCLONE_SIZE,
! 342: FEATURE_TORNADO|EEPROM_8BIT|HAS_CB_FNS|INVERT_LED_PWR|MII_XCVR_PWR, },
! 343: {"3c1556B series mini-PCI",{ 0x605610B7, 0xf0ffffff },
! 344: PCI_IOTYPE, CYCLONE_SIZE,
! 345: FEATURE_TORNADO|EEPROM_8BIT|HAS_CB_FNS|INVERT_LED_PWR|MII_XCVR_PWR, },
! 346: {"3c575 Boomerang CardBus", { 0x505710B7, 0xffffffff },
! 347: PCI_IOTYPE,BOOMERANG_SIZE, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, },
! 348: {"3CCFE575BT Cyclone CardBus",{ 0x515710B7, 0xffffffff },
! 349: PCI_IOTYPE, CYCLONE_SIZE,
! 350: FEATURE_CYCLONE | HAS_CB_FNS | EEPROM_8BIT | INVERT_LED_PWR, },
! 351: {"3CCFE575CT Tornado CardBus",{ 0x525710B7, 0xffffffff },
! 352: PCI_IOTYPE, CYCLONE_SIZE,
! 353: FEATURE_TORNADO|HAS_CB_FNS|EEPROM_8BIT|MII_XCVR_PWR, },
! 354: {"3CCFE656 Cyclone CardBus",{ 0x656010B7, 0xffffffff },
! 355: PCI_IOTYPE, CYCLONE_SIZE,
! 356: IS_CYCLONE|HAS_NWAY|HAS_CB_FNS| INVERT_LED_PWR | MII_XCVR_PWR, },
! 357: {"3CCFE656B Cyclone+Winmodem CardBus",{ 0x656210B7, 0xffffffff },
! 358: PCI_IOTYPE, CYCLONE_SIZE,
! 359: FEATURE_CYCLONE/*|HAS_NWAY*/ |HAS_CB_FNS|EEPROM_8BIT|INVERT_LED_PWR|MII_XCVR_PWR, },
! 360: {"3CCFE656C Tornado+Winmodem CardBus",{ 0x656410B7, 0xffffffff },
! 361: PCI_IOTYPE, CYCLONE_SIZE,
! 362: (FEATURE_TORNADO & ~HAS_NWAY)|HAS_CB_FNS|EEPROM_8BIT | MII_XCVR_PWR, },
! 363: {"3c450 HomePNA Tornado",{ 0x450010B7, 0xffffffff },
! 364: PCI_IOTYPE, CYCLONE_SIZE, FEATURE_TORNADO, },
! 365: {"3c575 series CardBus (unknown version)", {0x505710B7, 0xf0ffffff },
! 366: PCI_IOTYPE, BOOMERANG_SIZE, IS_BOOMERANG|HAS_MII, },
! 367: {"3Com Boomerang (unknown version)",{ 0x900010B7, 0xff00ffff },
! 368: PCI_IOTYPE, BOOMERANG_SIZE, IS_BOOMERANG, },
1.1 root 369: {0,}, /* 0 terminated list. */
370: };
371:
1.1.1.3 ! root 372: struct drv_id_info vortex_drv_id = {
! 373: "vortex", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_tbl,
! 374: vortex_probe1, pwr_event };
! 375:
! 376: /* This driver was written to use I/O operations.
! 377: However there are performance benefits to using memory operations, so
! 378: that mode is now an options.
! 379: Compiling for memory ops turns off EISA support.
! 380: */
! 381: #ifdef USE_MEM_OPS
! 382: #undef inb
! 383: #undef inw
! 384: #undef inl
! 385: #undef outb
! 386: #undef outw
! 387: #undef outl
! 388: #define inb readb
! 389: #define inw readw
! 390: #define inl readl
! 391: #define outb writeb
! 392: #define outw writew
! 393: #define outl writel
! 394: #endif
! 395:
1.1 root 396: /* Operational definitions.
397: These are not used by other compilation units and thus are not
398: exported in a ".h" file.
399:
400: First the windows. There are eight register windows, with the command
401: and status registers available in each.
402: */
403: #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
404: #define EL3_CMD 0x0e
405: #define EL3_STATUS 0x0e
406:
407: /* The top five bits written to EL3_CMD are a command, the lower
408: 11 bits are the parameter, if applicable.
409: Note that 11 parameters bits was fine for ethernet, but the new chip
410: can handle FDDI length frames (~4500 octets) and now parameters count
411: 32-bit 'Dwords' rather than octets. */
412:
413: enum vortex_cmd {
414: TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
415: RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
416: UpStall = 6<<11, UpUnstall = (6<<11)+1,
417: DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
418: RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
419: FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
420: SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
421: SetTxThreshold = 18<<11, SetTxStart = 19<<11,
422: StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
423: StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
424:
425: /* The SetRxFilter command accepts the following classes: */
426: enum RxFilter {
1.1.1.3 ! root 427: RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8,
! 428: RxMulticastHash = 0x10,
! 429: };
1.1 root 430:
431: /* Bits in the general status register. */
432: enum vortex_status {
433: IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
434: TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
435: IntReq = 0x0040, StatsFull = 0x0080,
436: DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
437: DMAInProgress = 1<<11, /* DMA controller is still busy.*/
438: CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
439: };
440:
441: /* Register window 1 offsets, the window used in normal operation.
442: On the Vortex this window is always mapped at offsets 0x10-0x1f. */
443: enum Window1 {
444: TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
445: RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
446: TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
447: };
448: enum Window0 {
449: Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
450: Wn0EepromData = 12, /* Window 0: EEPROM results register. */
451: IntrStatus=0x0E, /* Valid in all windows. */
452: };
1.1.1.3 ! root 453:
1.1 root 454: /* EEPROM locations. */
455: enum eeprom_offset {
456: PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
457: EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
458: NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
459: DriverTune=13, Checksum=15};
460:
461: enum Window2 { /* Window 2. */
462: Wn2_ResetOptions=12,
463: };
464: enum Window3 { /* Window 3: MAC/config bits. */
1.1.1.3 ! root 465: Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
1.1 root 466: };
467:
468: enum Window4 { /* Window 4: Xcvr/media bits. */
469: Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
470: };
1.1.1.3 ! root 471: enum Window5 {
! 472: Wn5_TxThreshold = 0, Wn5_RxFilter = 8,
! 473: };
1.1 root 474: enum Win4_Media_bits {
475: Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
476: Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
477: Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
478: Media_LnkBeat = 0x0800,
479: };
1.1.1.3 ! root 480: enum Window7 {
! 481: /* Bus Master control on Vortex. */
1.1 root 482: Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
1.1.1.3 ! root 483: /* On Cyclone and later, VLAN and PowerMgt control. */
! 484: Wn7_VLAN_Mask = 0, Wn7_VLAN_EtherType = 4, Wn7_PwrMgmtEvent = 12,
1.1 root 485: };
1.1.1.3 ! root 486:
! 487: /* Boomerang and Cyclone bus master control registers. */
1.1 root 488: enum MasterCtrl {
489: PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
1.1.1.3 ! root 490: DownPollRate = 0x2d, TxFreeThreshold = 0x2f,
! 491: UpPktStatus = 0x30, UpListPtr = 0x38,
! 492: /* Cyclone+. */
! 493: TxPktID=0x18, RxPriorityThresh = 0x3c,
1.1 root 494: };
495:
496: /* The Rx and Tx descriptor lists.
497: Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
498: alignment contraint on tx_ring[] and rx_ring[]. */
499: #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
500: struct boom_rx_desc {
501: u32 next; /* Last entry points to 0. */
502: s32 status;
503: u32 addr; /* Up to 63 addr/len pairs possible. */
504: s32 length; /* Set LAST_FRAG to indicate last pair. */
505: };
506: /* Values for the Rx status entry. */
507: enum rx_desc_status {
508: RxDComplete=0x00008000, RxDError=0x4000,
509: /* See boomerang_rx() for actual error bits */
510: IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
511: IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
512: };
513:
514: struct boom_tx_desc {
515: u32 next; /* Last entry points to 0. */
516: s32 status; /* bits 0:12 length, others see below. */
517: u32 addr;
518: s32 length;
519: };
520:
521: /* Values for the Tx status entry. */
522: enum tx_desc_status {
1.1.1.3 ! root 523: CRCDisable=0x2000, TxIntrDnComplete=0x8000, TxDownComplete=0x10000,
1.1 root 524: AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
1.1.1.3 ! root 525: TxNoRoundup=0x10000000, /* HAS_V2_TX should not word-pad packet. */
1.1 root 526: TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
527: };
528:
529: /* Chip features we care about in vp->capabilities, read from the EEPROM. */
1.1.1.3 ! root 530: enum ChipCaps { CapBusMaster=0x20, CapNoTxLength=0x0200, CapPwrMgmt=0x2000 };
1.1 root 531:
1.1.1.3 ! root 532: #define PRIV_ALIGN 15 /* Required alignment mask */
1.1 root 533: struct vortex_private {
534: /* The Rx and Tx rings should be quad-word-aligned. */
535: struct boom_rx_desc rx_ring[RX_RING_SIZE];
536: struct boom_tx_desc tx_ring[TX_RING_SIZE];
537: /* The addresses of transmit- and receive-in-place skbuffs. */
538: struct sk_buff* rx_skbuff[RX_RING_SIZE];
539: struct sk_buff* tx_skbuff[TX_RING_SIZE];
1.1.1.3 ! root 540: struct net_device *next_module;
1.1 root 541: void *priv_addr;
1.1.1.3 ! root 542: /* Keep the Rx and Tx variables grouped on their own cache lines. */
! 543: struct boom_rx_desc *rx_head_desc;
! 544: unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
! 545: unsigned int rx_buf_sz; /* Based on MTU+slack. */
! 546: int rx_copybreak;
! 547:
! 548: struct boom_tx_desc *tx_desc_tail;
1.1 root 549: struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
1.1.1.3 ! root 550: unsigned int cur_tx, dirty_tx;
! 551: unsigned int tx_full:1, restart_tx:1;
1.1 root 552:
1.1.1.3 ! root 553: long last_reset;
! 554: spinlock_t window_lock;
! 555: struct net_device_stats stats;
1.1 root 556: char *cb_fn_base; /* CardBus function status addr space. */
1.1.1.3 ! root 557: int msg_level;
! 558: int chip_id, drv_flags;
! 559: struct pci_dev *pci_dev; /* PCI configuration space information. */
1.1 root 560:
561: /* The remainder are related to chip state, mostly media selection. */
1.1.1.3 ! root 562: int multicast_filter_limit;
! 563: u32 mc_filter[8];
! 564: int max_interrupt_work;
! 565: int rx_mode;
1.1 root 566: struct timer_list timer; /* Media selection timer. */
567: int options; /* User-settable misc. driver options. */
1.1.1.2 root 568: unsigned int media_override:4, /* Passed-in media type. */
1.1 root 569: default_media:4, /* Read from the EEPROM/Wn3_Config. */
1.1.1.3 ! root 570: full_duplex:1, medialock:1, autoselect:1,
1.1 root 571: bus_master:1, /* Vortex can only do a fragment bus-m. */
572: full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
573: hw_csums:1, /* Has hardware checksums. */
1.1.1.3 ! root 574: restore_intr_mask:1,
! 575: polling:1;
1.1 root 576: u16 status_enable;
577: u16 intr_enable;
578: u16 available_media; /* From Wn3_Options. */
1.1.1.3 ! root 579: u16 wn3_mac_ctrl; /* Current settings. */
1.1 root 580: u16 capabilities, info1, info2; /* Various, from EEPROM. */
581: u16 advertising; /* NWay media advertisement */
582: unsigned char phys[2]; /* MII device addresses. */
583: };
584:
585: /* The action to take with a media selection timer tick.
586: Note that we deviate from the 3Com order by checking 10base2 before AUI.
587: */
588: enum xcvr_types {
589: XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
590: XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
591: };
592:
593: static struct media_table {
594: char *name;
595: unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
596: mask:8, /* The transceiver-present bit in Wn3_Config.*/
597: next:8; /* The media type to try next. */
598: int wait; /* Time before we check media status. */
599: } media_tbl[] = {
600: { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
601: { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
602: { "undefined", 0, 0x80, XCVR_10baseT, 10000},
603: { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
604: { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
605: { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
606: { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
607: { "undefined", 0, 0x01, XCVR_10baseT, 10000},
608: { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
609: { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
610: { "Default", 0, 0xFF, XCVR_10baseT, 10000},
611: };
612:
1.1.1.3 ! root 613: #if ! defined(CARDBUS) && ! defined(USE_MEM_OPS)
! 614: static int eisa_scan(struct net_device *dev);
1.1 root 615: #endif
1.1.1.3 ! root 616: static int vortex_open(struct net_device *dev);
! 617: static void set_media_type(struct net_device *dev);
! 618: static void activate_xcvr(struct net_device *dev);
! 619: static void start_operation(struct net_device *dev);
! 620: static void start_operation1(struct net_device *dev);
1.1 root 621: static void mdio_sync(long ioaddr, int bits);
622: static int mdio_read(long ioaddr, int phy_id, int location);
623: static void mdio_write(long ioaddr, int phy_id, int location, int value);
624: static void vortex_timer(unsigned long arg);
1.1.1.3 ! root 625: static void vortex_tx_timeout(struct net_device *dev);
! 626: static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
! 627: static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
! 628: static int vortex_rx(struct net_device *dev);
! 629: static int boomerang_rx(struct net_device *dev);
1.1 root 630: static void vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1.1.1.3 ! root 631: static int vortex_close(struct net_device *dev);
! 632: static void update_stats(long ioaddr, struct net_device *dev);
! 633: static struct net_device_stats *vortex_get_stats(struct net_device *dev);
! 634: static void set_rx_mode(struct net_device *dev);
! 635: static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
! 636: #if defined(NO_PCI)
! 637: #define acpi_set_WOL(dev) do {} while(0);
! 638: #define acpi_wake(pci_dev) do {} while(0);
! 639: #define acpi_set_pwr_state(pci_dev, state) do {} while(0);
! 640: #else
! 641: static void acpi_set_WOL(struct net_device *dev);
! 642: #endif
1.1 root 643:
644:
645: /* A list of all installed Vortex devices, for removing the driver module. */
1.1.1.3 ! root 646: static struct net_device *root_vortex_dev = NULL;
1.1 root 647:
648:
1.1.1.3 ! root 649: #if defined(MODULE) && defined(CARDBUS)
1.1 root 650:
651: #include <pcmcia/driver_ops.h>
652:
653: static dev_node_t *vortex_attach(dev_locator_t *loc)
654: {
1.1.1.3 ! root 655: u32 io, pci_id;
1.1 root 656: u8 bus, devfn, irq;
1.1.1.3 ! root 657: struct net_device *dev;
1.1 root 658: int chip_idx;
659:
660: if (loc->bus != LOC_PCI) return NULL;
661: bus = loc->b.pci.bus; devfn = loc->b.pci.devfn;
662: pcibios_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_0, &io);
663: pcibios_read_config_byte(bus, devfn, PCI_INTERRUPT_LINE, &irq);
1.1.1.3 ! root 664: pcibios_read_config_dword(bus, devfn, PCI_VENDOR_ID, &pci_id);
! 665: printk(KERN_INFO "vortex_attach(bus %d, function %d, device %8.8x)\n",
! 666: bus, devfn, pci_id);
1.1 root 667: io &= ~3;
668: if (io == 0 || irq == 0) {
669: printk(KERN_ERR "The 3Com CardBus Ethernet interface was not "
670: "assigned an %s.\n" KERN_ERR " It will not be activated.\n",
671: io == 0 ? "I/O address" : "IRQ");
672: return NULL;
673: }
1.1.1.3 ! root 674: for (chip_idx = 0; pci_tbl[chip_idx].id.pci; chip_idx++)
! 675: if ((pci_id & pci_tbl[chip_idx].id.pci_mask) ==
! 676: pci_tbl[chip_idx].id.pci)
1.1 root 677: break;
1.1.1.3 ! root 678: if (pci_tbl[chip_idx].id.pci == 0) { /* Compiled out! */
! 679: printk(KERN_INFO "Unable to match chip type %8.8x in "
! 680: "vortex_attach().\n", pci_id);
1.1 root 681: return NULL;
682: }
1.1.1.3 ! root 683: dev = vortex_probe1(pci_find_slot(bus, devfn), NULL, io, irq, chip_idx, MAX_UNITS+1);
1.1 root 684: if (dev) {
685: dev_node_t *node = kmalloc(sizeof(dev_node_t), GFP_KERNEL);
686: strcpy(node->dev_name, dev->name);
687: node->major = node->minor = 0;
688: node->next = NULL;
689: MOD_INC_USE_COUNT;
690: return node;
691: }
692: return NULL;
693: }
694:
695: static void vortex_detach(dev_node_t *node)
696: {
1.1.1.3 ! root 697: struct net_device **devp, **next;
! 698: printk(KERN_DEBUG "vortex_detach(%s)\n", node->dev_name);
1.1 root 699: for (devp = &root_vortex_dev; *devp; devp = next) {
700: next = &((struct vortex_private *)(*devp)->priv)->next_module;
701: if (strcmp((*devp)->name, node->dev_name) == 0) break;
702: }
703: if (*devp) {
1.1.1.3 ! root 704: struct net_device *dev = *devp;
1.1 root 705: struct vortex_private *vp = dev->priv;
706: if (dev->flags & IFF_UP)
1.1.1.3 ! root 707: dev_close(dev);
1.1 root 708: dev->flags &= ~(IFF_UP|IFF_RUNNING);
709: unregister_netdev(dev);
710: if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
711: kfree(dev);
712: *devp = *next;
1.1.1.2 root 713: kfree(vp->priv_addr);
1.1 root 714: kfree(node);
715: MOD_DEC_USE_COUNT;
716: }
717: }
718:
719: struct driver_operations vortex_ops = {
720: "3c575_cb", vortex_attach, NULL, NULL, vortex_detach
721: };
722:
1.1.1.3 ! root 723: #endif /* Old-style Cardbus module support */
! 724:
! 725: #if defined(MODULE) || (LINUX_VERSION_CODE >= 0x020400)
1.1 root 726:
1.1.1.3 ! root 727: #if ! defined(MODULE) /* Must be a 2.4 kernel */
! 728: module_init(init_module);
! 729: module_exit(cleanup_module);
! 730: #endif
1.1 root 731:
732: int init_module(void)
733: {
1.1.1.3 ! root 734: printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
1.1 root 735: #ifdef CARDBUS
736: register_driver(&vortex_ops);
737: return 0;
738: #else
1.1.1.3 ! root 739: #ifndef USE_MEM_OPS
! 740: /* This is not quite correct, but both EISA and PCI cards is unlikely. */
! 741: if (eisa_scan(0) >= 0)
! 742: return 0;
! 743: #if defined(NO_PCI)
! 744: return 0;
! 745: #endif
! 746: #endif
! 747:
! 748: return pci_drv_register(&vortex_drv_id, NULL);
1.1 root 749: #endif
750: }
751:
752: #else
1.1.1.3 ! root 753: int tc59x_probe(struct net_device *dev)
1.1 root 754: {
1.1.1.3 ! root 755: int retval = -ENODEV;
! 756:
! 757: /* Allow an EISA-only driver. */
! 758: #if ! defined(NO_PCI)
! 759: if (pci_drv_register(&vortex_drv_id, dev) >= 0) {
! 760: retval = 0;
! 761: dev = 0;
! 762: }
! 763: #endif
! 764: #ifndef USE_MEM_OPS
! 765: if (eisa_scan(dev) >= 0)
! 766: retval = 0;
! 767: #endif
! 768: if (retval >= 0)
! 769: printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
! 770: return retval;
1.1 root 771: }
772: #endif /* not MODULE */
773:
1.1.1.3 ! root 774: #if ! defined(CARDBUS) && ! defined(USE_MEM_OPS)
! 775: static int eisa_scan(struct net_device *dev)
1.1 root 776: {
777: int cards_found = 0;
778:
1.1.1.3 ! root 779: /* Check the slots of the EISA bus. */
1.1 root 780: if (EISA_bus) {
781: static long ioaddr = 0x1000;
782: for ( ; ioaddr < 0x9000; ioaddr += 0x1000) {
783: int device_id;
1.1.1.3 ! root 784: if (check_region(ioaddr, VORTEX_SIZE))
1.1 root 785: continue;
786: /* Check the standard EISA ID register for an encoded '3Com'. */
787: if (inw(ioaddr + 0xC80) != 0x6d50)
788: continue;
789: /* Check for a product that we support, 3c59{2,7} any rev. */
790: device_id = (inb(ioaddr + 0xC82)<<8) + inb(ioaddr + 0xC83);
791: if ((device_id & 0xFF00) != 0x5900)
792: continue;
1.1.1.3 ! root 793: vortex_probe1(0, dev, ioaddr, inw(ioaddr + 0xC88) >> 12,
! 794: (device_id & 0xfff0) == 0x5970 ? 5 : 4, cards_found);
1.1 root 795: dev = 0;
796: cards_found++;
797: }
798: }
799:
800: return cards_found ? 0 : -ENODEV;
801: }
802: #endif /* ! Cardbus */
803:
1.1.1.3 ! root 804: static int do_eeprom_op(long ioaddr, int ee_cmd)
1.1 root 805: {
1.1.1.3 ! root 806: int timer;
! 807:
! 808: outw(ee_cmd, ioaddr + Wn0EepromCmd);
! 809: /* Wait for the read to take place, worst-case 162 us. */
! 810: for (timer = 1620; timer >= 0; timer--) {
! 811: if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
! 812: break;
! 813: }
! 814: return inw(ioaddr + Wn0EepromData);
! 815: }
! 816:
! 817: static void *vortex_probe1(struct pci_dev *pdev, void *init_dev,
! 818: long ioaddr, int irq, int chip_idx, int find_cnt)
! 819: {
! 820: struct net_device *dev;
1.1 root 821: struct vortex_private *vp;
1.1.1.3 ! root 822: void *priv_mem;
1.1 root 823: int option;
824: unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1.1.1.3 ! root 825: int ee_read_cmd;
! 826: int drv_flags = pci_tbl[chip_idx].drv_flags;
1.1 root 827: int i;
828:
1.1.1.3 ! root 829: dev = init_etherdev(init_dev, 0);
! 830: if (!dev)
! 831: return NULL;
! 832:
! 833: #if ! defined(NO_PCI)
! 834: /* Check the PCI latency value. On the 3c590 series the latency timer
! 835: must be set to the maximum value to avoid data corruption that occurs
! 836: when the timer expires during a transfer. This bug exists the Vortex
! 837: chip only. */
! 838: if (pdev) {
! 839: u8 pci_latency;
! 840: u8 new_latency = (drv_flags & IS_VORTEX) ? 248 : 32;
! 841:
! 842: pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
! 843: if (pci_latency < new_latency) {
! 844: printk(KERN_INFO "%s: Overriding PCI latency"
! 845: " timer (CFLT) setting of %d, new value is %d.\n",
! 846: dev->name, pci_latency, new_latency);
! 847: pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
! 848: }
! 849: }
! 850: #endif
1.1 root 851:
852: printk(KERN_INFO "%s: 3Com %s at 0x%lx, ",
853: dev->name, pci_tbl[chip_idx].name, ioaddr);
854:
1.1.1.3 ! root 855: /* Make certain elements e.g. descriptor lists are aligned. */
! 856: priv_mem = kmalloc(sizeof(*vp) + PRIV_ALIGN, GFP_KERNEL);
! 857: /* Check for the very unlikely case of no memory. */
! 858: if (priv_mem == NULL) {
! 859: printk(" INTERFACE MEMORY ALLOCATION FAILURE.\n");
! 860: return NULL;
! 861: }
! 862:
1.1 root 863: dev->base_addr = ioaddr;
864: dev->irq = irq;
865: dev->mtu = mtu;
866:
1.1.1.3 ! root 867: dev->priv = vp = (void *)(((long)priv_mem + PRIV_ALIGN) & ~PRIV_ALIGN);
1.1 root 868: memset(vp, 0, sizeof(*vp));
1.1.1.3 ! root 869: vp->priv_addr = priv_mem;
1.1 root 870:
871: vp->next_module = root_vortex_dev;
872: root_vortex_dev = dev;
873:
874: vp->chip_id = chip_idx;
1.1.1.3 ! root 875: vp->pci_dev = pdev;
! 876: vp->drv_flags = drv_flags;
! 877: vp->msg_level = (1 << debug) - 1;
! 878: vp->rx_copybreak = rx_copybreak;
! 879: vp->max_interrupt_work = max_interrupt_work;
! 880: vp->multicast_filter_limit = multicast_filter_limit;
1.1 root 881:
882: /* The lower four bits are the media type. */
883: if (dev->mem_start)
884: option = dev->mem_start;
1.1.1.3 ! root 885: else if (find_cnt < MAX_UNITS)
! 886: option = options[find_cnt];
1.1 root 887: else
888: option = -1;
889:
890: if (option >= 0) {
1.1.1.2 root 891: vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
892: vp->full_duplex = (option & 0x200) ? 1 : 0;
1.1 root 893: vp->bus_master = (option & 16) ? 1 : 0;
894: } else {
895: vp->media_override = 7;
896: vp->full_duplex = 0;
897: vp->bus_master = 0;
898: }
1.1.1.3 ! root 899: if (find_cnt < MAX_UNITS && full_duplex[find_cnt] > 0)
1.1 root 900: vp->full_duplex = 1;
901:
902: vp->options = option;
903:
904: /* Read the station address from the EEPROM. */
905: EL3WINDOW(0);
1.1.1.3 ! root 906: /* Figure out the size and offset of the EEPROM table.
! 907: This is complicated by potential discontiguous address bits. */
! 908:
! 909: /* Locate the opcode bits, 0xC0 or 0x300. */
! 910: outw(0x5555, ioaddr + Wn0EepromData);
! 911: ee_read_cmd = do_eeprom_op(ioaddr, 0x80) == 0x5555 ? 0x200 : 0x80;
! 912: /* Locate the table base for CardBus cards. */
! 913: if (do_eeprom_op(ioaddr, ee_read_cmd + 0x37) == 0x6d50)
! 914: ee_read_cmd += 0x30;
! 915:
1.1 root 916: for (i = 0; i < 0x40; i++) {
1.1.1.3 ! root 917: int cmd_and_addr = ee_read_cmd + i;
! 918: if (ee_read_cmd == 0xB0) { /* Correct for discontinuity. */
! 919: int offset = 0x30 + i;
! 920: cmd_and_addr = 0x80 + (offset & 0x3f) + ((offset<<2) & 0x0f00);
1.1 root 921: }
1.1.1.3 ! root 922: eeprom[i] = do_eeprom_op(ioaddr, cmd_and_addr);
1.1 root 923: }
924: for (i = 0; i < 0x18; i++)
925: checksum ^= eeprom[i];
926: checksum = (checksum ^ (checksum >> 8)) & 0xff;
927: if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
928: while (i < 0x21)
929: checksum ^= eeprom[i++];
930: checksum = (checksum ^ (checksum >> 8)) & 0xff;
931: }
1.1.1.3 ! root 932: if (checksum != 0x00 && !(drv_flags & IS_TORNADO))
1.1 root 933: printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
934:
935: for (i = 0; i < 3; i++)
936: ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
937: for (i = 0; i < 6; i++)
938: printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1.1.1.2 root 939: EL3WINDOW(2);
940: for (i = 0; i < 6; i++)
941: outb(dev->dev_addr[i], ioaddr + i);
942:
1.1 root 943: printk(", IRQ %d\n", dev->irq);
944: /* Tell them about an invalid IRQ. */
1.1.1.3 ! root 945: if (dev->irq <= 0)
1.1 root 946: printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
947: dev->irq);
948:
1.1.1.3 ! root 949: #if ! defined(NO_PCI)
! 950: if (drv_flags & HAS_CB_FNS) {
1.1 root 951: u32 fn_st_addr; /* Cardbus function status space */
1.1.1.3 ! root 952: pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2, &fn_st_addr);
1.1 root 953: if (fn_st_addr)
954: vp->cb_fn_base = ioremap(fn_st_addr & ~3, 128);
1.1.1.3 ! root 955: printk(KERN_INFO "%s: CardBus functions mapped %8.8x->%p.\n",
! 956: dev->name, fn_st_addr, vp->cb_fn_base);
1.1 root 957: }
1.1.1.3 ! root 958: #endif
1.1 root 959:
960: /* Extract our information from the EEPROM data. */
961: vp->info1 = eeprom[13];
962: vp->info2 = eeprom[15];
963: vp->capabilities = eeprom[16];
964:
965: if (vp->info1 & 0x8000)
966: vp->full_duplex = 1;
1.1.1.3 ! root 967: if (vp->full_duplex)
! 968: vp->medialock = 1;
! 969:
! 970: /* Turn on the transceiver. */
! 971: activate_xcvr(dev);
1.1 root 972:
973: {
974: char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1.1.1.3 ! root 975: int i_cfg;
1.1 root 976: EL3WINDOW(3);
977: vp->available_media = inw(ioaddr + Wn3_Options);
978: if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
979: vp->available_media = 0x40;
1.1.1.3 ! root 980: i_cfg = inl(ioaddr + Wn3_Config); /* Internal Configuration */
! 981: vp->default_media = (i_cfg >> 20) & 15;
! 982: if (vp->msg_level & NETIF_MSG_LINK)
! 983: printk(KERN_DEBUG " Internal config register is %8.8x, "
! 984: "transceivers %#x.\n", i_cfg, inw(ioaddr + Wn3_Options));
! 985: printk(KERN_INFO " %dK buffer %s Rx:Tx split, %s%s interface.\n",
! 986: 8 << (i_cfg & 7),
! 987: ram_split[(i_cfg >> 16) & 3],
! 988: i_cfg & 0x01000000 ? "autoselect/" : "",
! 989: vp->default_media > XCVR_ExtMII ? "<invalid transceiver>" :
! 990: media_tbl[vp->default_media].name);
! 991: vp->autoselect = i_cfg & 0x01000000 ? 1 : 0;
1.1 root 992: }
993:
994: if (vp->media_override != 7) {
995: printk(KERN_INFO " Media override to transceiver type %d (%s).\n",
996: vp->media_override, media_tbl[vp->media_override].name);
997: dev->if_port = vp->media_override;
998: } else
999: dev->if_port = vp->default_media;
1000:
1.1.1.3 ! root 1001: if ((vp->available_media & 0x41) || (drv_flags & HAS_NWAY) ||
! 1002: dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1.1 root 1003: int phy, phy_idx = 0;
1004: EL3WINDOW(4);
1005: mii_preamble_required++;
1.1.1.3 ! root 1006: mdio_sync(ioaddr, 32);
1.1 root 1007: mdio_read(ioaddr, 24, 1);
1008: for (phy = 1; phy <= 32 && phy_idx < sizeof(vp->phys); phy++) {
1009: int mii_status, phyx = phy & 0x1f;
1010: mii_status = mdio_read(ioaddr, phyx, 1);
1.1.1.3 ! root 1011: if ((mii_status & 0xf800) && mii_status != 0xffff) {
1.1 root 1012: vp->phys[phy_idx++] = phyx;
1013: printk(KERN_INFO " MII transceiver found at address %d,"
1014: " status %4x.\n", phyx, mii_status);
1015: if ((mii_status & 0x0040) == 0)
1016: mii_preamble_required++;
1017: }
1018: }
1019: mii_preamble_required--;
1020: if (phy_idx == 0) {
1021: printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1022: vp->phys[0] = 24;
1023: } else {
1.1.1.3 ! root 1024: if (mii_preamble_required == 0 &&
! 1025: mdio_read(ioaddr, vp->phys[0], 1) == 0) {
! 1026: printk(KERN_INFO "%s: MII transceiver has preamble bug.\n",
! 1027: dev->name);
! 1028: mii_preamble_required = 1;
! 1029: }
1.1 root 1030: vp->advertising = mdio_read(ioaddr, vp->phys[0], 4);
1031: if (vp->full_duplex) {
1032: /* Only advertise the FD media types. */
1033: vp->advertising &= ~0x02A0;
1034: mdio_write(ioaddr, vp->phys[0], 4, vp->advertising);
1035: }
1036: }
1.1.1.3 ! root 1037: } else {
! 1038: /* We will emulate MII management. */
! 1039: vp->phys[0] = 32;
1.1 root 1040: }
1041:
1042: if (vp->capabilities & CapBusMaster) {
1043: vp->full_bus_master_tx = 1;
1.1.1.3 ! root 1044: printk(KERN_INFO" Using bus-master transmits and %s receives.\n",
1.1 root 1045: (vp->info2 & 1) ? "early" : "whole-frame" );
1046: vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1047: }
1048:
1049: /* We do a request_region() to register /proc/ioports info. */
1050: request_region(ioaddr, pci_tbl[chip_idx].io_size, dev->name);
1051:
1052: /* The 3c59x-specific entries in the device structure. */
1053: dev->open = &vortex_open;
1054: dev->hard_start_xmit = &vortex_start_xmit;
1055: dev->stop = &vortex_close;
1056: dev->get_stats = &vortex_get_stats;
1057: dev->do_ioctl = &vortex_ioctl;
1058: dev->set_multicast_list = &set_rx_mode;
1059:
1060: return dev;
1061: }
1062:
1063:
1.1.1.3 ! root 1064: static int vortex_open(struct net_device *dev)
1.1 root 1065: {
1066: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1.1.1.3 ! root 1067: long ioaddr = dev->base_addr;
1.1 root 1068: int i;
1069:
1.1.1.3 ! root 1070: MOD_INC_USE_COUNT;
1.1.1.2 root 1071:
1.1.1.3 ! root 1072: acpi_wake(vp->pci_dev);
! 1073: vp->window_lock = SPIN_LOCK_UNLOCKED;
! 1074: activate_xcvr(dev);
1.1 root 1075:
1.1.1.3 ! root 1076: /* Before initializing select the active media port. */
1.1 root 1077: if (vp->media_override != 7) {
1.1.1.3 ! root 1078: if (vp->msg_level & NETIF_MSG_LINK)
1.1 root 1079: printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1080: dev->name, vp->media_override,
1081: media_tbl[vp->media_override].name);
1082: dev->if_port = vp->media_override;
1083: } else if (vp->autoselect) {
1.1.1.3 ! root 1084: if (vp->drv_flags & HAS_NWAY)
1.1.1.2 root 1085: dev->if_port = XCVR_NWAY;
1086: else {
1087: /* Find first available media type, starting with 100baseTx. */
1088: dev->if_port = XCVR_100baseTx;
1089: while (! (vp->available_media & media_tbl[dev->if_port].mask))
1090: dev->if_port = media_tbl[dev->if_port].next;
1091: }
1.1 root 1092: } else
1093: dev->if_port = vp->default_media;
1094:
1.1.1.3 ! root 1095: if (! vp->medialock)
! 1096: vp->full_duplex = 0;
1.1 root 1097:
1.1.1.3 ! root 1098: vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
! 1099: (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
! 1100: (vp->full_bus_master_rx ? UpComplete : RxComplete) |
! 1101: (vp->bus_master ? DMADone : 0);
! 1102: vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable | RxComplete |
! 1103: StatsFull | HostError | TxComplete | IntReq
! 1104: | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1.1 root 1105:
1.1.1.3 ! root 1106: if (vp->msg_level & NETIF_MSG_LINK)
! 1107: printk(KERN_DEBUG "%s: Initial media type %s %s-duplex.\n",
! 1108: dev->name, media_tbl[dev->if_port].name,
! 1109: vp->full_duplex ? "full":"half");
1.1 root 1110:
1.1.1.3 ! root 1111: set_media_type(dev);
! 1112: start_operation(dev);
1.1 root 1113:
1114: /* Use the now-standard shared IRQ implementation. */
1115: if (request_irq(dev->irq, &vortex_interrupt, SA_SHIRQ, dev->name, dev)) {
1.1.1.3 ! root 1116: MOD_DEC_USE_COUNT;
1.1 root 1117: return -EAGAIN;
1118: }
1119:
1.1.1.3 ! root 1120: spin_lock(&vp->window_lock);
! 1121:
! 1122: if (vp->msg_level & NETIF_MSG_IFUP) {
1.1 root 1123: EL3WINDOW(4);
1124: printk(KERN_DEBUG "%s: vortex_open() irq %d media status %4.4x.\n",
1125: dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1126: }
1127:
1128: /* Switch to the stats window, and clear all stats by reading. */
1129: outw(StatsDisable, ioaddr + EL3_CMD);
1130: EL3WINDOW(6);
1131: for (i = 0; i < 10; i++)
1132: inb(ioaddr + i);
1133: inw(ioaddr + 10);
1134: inw(ioaddr + 12);
1135: /* New: On the Vortex we must also clear the BadSSD counter. */
1136: EL3WINDOW(4);
1137: inb(ioaddr + 12);
1138: /* ..and on the Boomerang we enable the extra statistics bits. */
1139: outw(0x0040, ioaddr + Wn4_NetDiag);
1140:
1141: /* Switch to register set 7 for normal use. */
1142: EL3WINDOW(7);
1.1.1.3 ! root 1143: #if defined(CONFIG_VLAN)
! 1144: /* If this value is set no MTU adjustment is needed for 802.1Q. */
! 1145: outw(0x8100, ioaddr + Wn7_VLAN_EtherType);
! 1146: #endif
! 1147: spin_unlock(&vp->window_lock);
1.1 root 1148:
1149: if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1150: vp->cur_rx = vp->dirty_rx = 0;
1.1.1.3 ! root 1151: /* Use 1518/+18 if the CRC is transferred. */
! 1152: vp->rx_buf_sz = dev->mtu + 14;
! 1153: if (vp->rx_buf_sz < PKT_BUF_SZ)
! 1154: vp->rx_buf_sz = PKT_BUF_SZ;
! 1155:
1.1 root 1156: /* Initialize the RxEarly register as recommended. */
1157: outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1158: outl(0x0020, ioaddr + PktStatus);
1159: for (i = 0; i < RX_RING_SIZE; i++) {
1.1.1.3 ! root 1160: vp->rx_ring[i].length = cpu_to_le32(vp->rx_buf_sz | LAST_FRAG);
! 1161: vp->rx_ring[i].status = 0;
! 1162: vp->rx_ring[i].next = virt_to_le32desc(&vp->rx_ring[i+1]);
! 1163: vp->rx_skbuff[i] = 0;
! 1164: }
! 1165: /* Wrap the ring. */
! 1166: vp->rx_head_desc = &vp->rx_ring[0];
! 1167: vp->rx_ring[i-1].next = virt_to_le32desc(&vp->rx_ring[0]);
! 1168:
! 1169: for (i = 0; i < RX_RING_SIZE; i++) {
! 1170: struct sk_buff *skb = dev_alloc_skb(vp->rx_buf_sz);
1.1 root 1171: vp->rx_skbuff[i] = skb;
1172: if (skb == NULL)
1173: break; /* Bad news! */
1174: skb->dev = dev; /* Mark as being used by this device. */
1175: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1.1.1.3 ! root 1176: vp->rx_ring[i].addr = virt_to_le32desc(skb->tail);
1.1 root 1177: }
1.1.1.3 ! root 1178: outl(virt_to_bus(vp->rx_head_desc), ioaddr + UpListPtr);
1.1 root 1179: }
1180: if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1181: dev->hard_start_xmit = &boomerang_start_xmit;
1182: vp->cur_tx = vp->dirty_tx = 0;
1.1.1.3 ! root 1183: vp->tx_desc_tail = &vp->tx_ring[TX_RING_SIZE - 1];
! 1184: if (vp->drv_flags & IS_BOOMERANG) {
! 1185: /* Room for a packet, to avoid long DownStall delays. */
! 1186: outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
! 1187: } else if (vp->drv_flags & HAS_V2_TX)
! 1188: outb(20, ioaddr + DownPollRate);
! 1189:
1.1 root 1190: /* Clear the Tx ring. */
1191: for (i = 0; i < TX_RING_SIZE; i++)
1192: vp->tx_skbuff[i] = 0;
1193: outl(0, ioaddr + DownListPtr);
1.1.1.3 ! root 1194: vp->tx_full = 0;
! 1195: vp->restart_tx = 1;
1.1 root 1196: }
1.1.1.3 ! root 1197: /* The multicast filter is an ill-considered, write-only design.
! 1198: The semantics are not documented, so we assume but do not rely
! 1199: on the table being cleared with an RxReset.
! 1200: Here we do an explicit clear of the largest known table.
! 1201: */
! 1202: if (vp->drv_flags & HAS_V2_TX)
! 1203: for (i = 0; i < 0x100; i++)
! 1204: outw(SetFilterBit | i, ioaddr + EL3_CMD);
! 1205: memset(vp->mc_filter, 0, sizeof vp->mc_filter);
! 1206:
! 1207: /* Set receiver mode: presumably accept b-case and phys addr only. */
! 1208: vp->rx_mode = 0;
1.1 root 1209: set_rx_mode(dev);
1210:
1.1.1.3 ! root 1211: start_operation1(dev);
! 1212:
! 1213: init_timer(&vp->timer);
! 1214: vp->timer.expires = jiffies + media_tbl[dev->if_port].wait;
! 1215: vp->timer.data = (unsigned long)dev;
! 1216: vp->timer.function = &vortex_timer; /* timer handler */
! 1217: add_timer(&vp->timer);
! 1218:
! 1219: return 0;
! 1220: }
! 1221:
! 1222: static void set_media_type(struct net_device *dev)
! 1223: {
! 1224: struct vortex_private *vp = (struct vortex_private *)dev->priv;
! 1225: long ioaddr = dev->base_addr;
! 1226: int i_cfg;
! 1227:
! 1228: EL3WINDOW(3);
! 1229: i_cfg = inl(ioaddr + Wn3_Config);
! 1230: i_cfg &= ~0x00f00000;
! 1231: if (vp->drv_flags & HAS_NWAY)
! 1232: outl(i_cfg | 0x00800000, ioaddr + Wn3_Config);
! 1233: else
! 1234: outl(i_cfg | (dev->if_port << 20), ioaddr + Wn3_Config);
! 1235:
! 1236: if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
! 1237: int mii_reg1, mii_reg5;
! 1238: EL3WINDOW(4);
! 1239: /* Read BMSR (reg1) only to clear old status. */
! 1240: mii_reg1 = mdio_read(ioaddr, vp->phys[0], 1);
! 1241: mii_reg5 = mdio_read(ioaddr, vp->phys[0], 5);
! 1242: if (mii_reg5 == 0xffff || mii_reg5 == 0x0000)
! 1243: ; /* No MII device or no link partner report */
! 1244: else if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
! 1245: || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
! 1246: vp->full_duplex = 1;
! 1247: if (vp->msg_level & NETIF_MSG_LINK)
! 1248: printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
! 1249: " setting %s-duplex.\n", dev->name, vp->phys[0],
! 1250: mii_reg1, mii_reg5, vp->full_duplex ? "full" : "half");
! 1251: EL3WINDOW(3);
! 1252: }
! 1253: if (dev->if_port == XCVR_10base2)
! 1254: /* Start the thinnet transceiver. We should really wait 50ms...*/
! 1255: outw(StartCoax, ioaddr + EL3_CMD);
! 1256: EL3WINDOW(4);
! 1257: if (dev->if_port != XCVR_NWAY) {
! 1258: outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
! 1259: media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
! 1260: }
! 1261: /* Do we require link beat to transmit? */
! 1262: if (vp->info1 & 0x4000)
! 1263: outw(inw(ioaddr + Wn4_Media) & ~Media_Lnk, ioaddr + Wn4_Media);
! 1264:
! 1265: /* Set the full-duplex and oversized frame bits. */
! 1266: EL3WINDOW(3);
! 1267:
! 1268: vp->wn3_mac_ctrl = vp->full_duplex ? 0x0120 : 0;
! 1269: if (dev->mtu > 1500)
! 1270: vp->wn3_mac_ctrl |= (dev->mtu == 1504 ? 0x0400 : 0x0040);
! 1271: outb(vp->wn3_mac_ctrl, ioaddr + Wn3_MAC_Ctrl);
! 1272:
! 1273: if (vp->drv_flags & HAS_V2_TX)
! 1274: outw(dev->mtu + 14, ioaddr + Wn3_MaxPktSize);
! 1275: }
! 1276:
! 1277: static void activate_xcvr(struct net_device *dev)
! 1278: {
! 1279: struct vortex_private *vp = (struct vortex_private *)dev->priv;
! 1280: long ioaddr = dev->base_addr;
! 1281: int reset_opts;
! 1282:
! 1283: /* Correct some magic bits. */
! 1284: EL3WINDOW(2);
! 1285: reset_opts = inw(ioaddr + Wn2_ResetOptions);
! 1286: if (vp->drv_flags & INVERT_LED_PWR)
! 1287: reset_opts |= 0x0010;
! 1288: if (vp->drv_flags & MII_XCVR_PWR)
! 1289: reset_opts |= 0x4000;
! 1290: outw(reset_opts, ioaddr + Wn2_ResetOptions);
! 1291: if (vp->drv_flags & WN0_XCVR_PWR) {
! 1292: EL3WINDOW(0);
! 1293: outw(0x0900, ioaddr);
! 1294: }
! 1295: }
1.1 root 1296:
1.1.1.3 ! root 1297: static void start_operation(struct net_device *dev)
! 1298: {
! 1299: struct vortex_private *vp = (struct vortex_private *)dev->priv;
! 1300: long ioaddr = dev->base_addr;
! 1301: int i;
! 1302:
! 1303: outw(TxReset, ioaddr + EL3_CMD);
! 1304: for (i = 2000; i >= 0 ; i--)
! 1305: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
! 1306: break;
! 1307:
! 1308: outw(RxReset | 0x04, ioaddr + EL3_CMD);
! 1309: /* Assume this cleared the filter. */
! 1310: memset(vp->mc_filter, 0, sizeof vp->mc_filter);
! 1311:
! 1312: /* Wait a few ticks for the RxReset command to complete. */
! 1313: for (i = 0; i < 200000; i++)
! 1314: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
! 1315: break;
! 1316: if (i >= 200 && (vp->msg_level & NETIF_MSG_DRV))
! 1317: printk(KERN_DEBUG "%s: Rx Reset took an unexpectedly long time"
! 1318: " to finish, %d ticks.\n",
! 1319: dev->name, i);
! 1320:
! 1321: outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
! 1322: /* Handle VLANs and jumbo frames. */
! 1323: if ((vp->drv_flags & HAS_V2_TX) && dev->mtu > 1500) {
! 1324: EL3WINDOW(3);
! 1325: outw(dev->mtu + 14, ioaddr + Wn3_MaxPktSize);
! 1326: if (dev->mtu > 2033) {
! 1327: outl(inl(ioaddr + Wn3_Config) | 0x0000C000, ioaddr + Wn3_Config);
! 1328: outw(SetTxStart + (2000>>2), ioaddr + EL3_CMD);
! 1329: }
! 1330: }
! 1331: /* Reset the station address and mask. */
! 1332: EL3WINDOW(2);
! 1333: for (i = 0; i < 6; i++)
! 1334: outb(dev->dev_addr[i], ioaddr + i);
! 1335: for (; i < 12; i+=2)
! 1336: outw(0, ioaddr + i);
! 1337: if (vp->drv_flags & IS_BOOMERANG) {
! 1338: /* Room for a packet, to avoid long DownStall delays. */
! 1339: outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
! 1340: } else if (vp->drv_flags & HAS_V2_TX) {
! 1341: outb(20, ioaddr + DownPollRate);
! 1342: vp->restart_tx = 1;
! 1343: }
! 1344: }
! 1345:
! 1346: static void start_operation1(struct net_device *dev)
! 1347: {
! 1348: struct vortex_private *vp = (struct vortex_private *)dev->priv;
! 1349: long ioaddr = dev->base_addr;
! 1350:
! 1351: if (vp->full_bus_master_rx) { /* post-Vortex bus master. */
! 1352: /* Initialize the RxEarly register as recommended. */
! 1353: outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
! 1354: outl(0x0020, ioaddr + PktStatus);
! 1355: outl(virt_to_bus(&vp->rx_ring[vp->cur_rx % RX_RING_SIZE]),
! 1356: ioaddr + UpListPtr);
! 1357: }
! 1358:
! 1359: outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1.1 root 1360: outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1361: outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1362: /* Allow status bits to be seen. */
1363: outw(vp->status_enable, ioaddr + EL3_CMD);
1364: /* Ack all pending events, and set active indicator mask. */
1365: outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1366: ioaddr + EL3_CMD);
1367: outw(vp->intr_enable, ioaddr + EL3_CMD);
1368: if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1369: writel(0x8000, vp->cb_fn_base + 4);
1.1.1.3 ! root 1370: netif_start_tx_queue(dev);
1.1 root 1371: }
1372:
1373: static void vortex_timer(unsigned long data)
1374: {
1.1.1.3 ! root 1375: struct net_device *dev = (struct net_device *)data;
1.1 root 1376: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1377: long ioaddr = dev->base_addr;
1.1.1.2 root 1378: int next_tick = 60*HZ;
1.1 root 1379: int ok = 0;
1.1.1.3 ! root 1380: int media_status, old_window;
1.1 root 1381:
1.1.1.3 ! root 1382: if (vp->msg_level & NETIF_MSG_TIMER)
! 1383: printk(KERN_DEBUG "%s: Media selection timer tick happened, "
! 1384: "%s %s duplex.\n",
! 1385: dev->name, media_tbl[dev->if_port].name,
! 1386: vp->full_duplex ? "full" : "half");
! 1387:
! 1388: /* This only works with bus-master (non-3c590) chips. */
! 1389: if (vp->cur_tx - vp->dirty_tx > 1 &&
! 1390: (jiffies - dev->trans_start) > TX_TIMEOUT) {
! 1391: /* Check for blocked interrupts. */
! 1392: if (inw(ioaddr + EL3_STATUS) & IntLatch) {
! 1393: /* We have a blocked IRQ line. This should never happen, but
! 1394: we recover as best we can.*/
! 1395: if ( ! vp->polling) {
! 1396: if (jiffies - vp->last_reset > 10*HZ) {
! 1397: printk(KERN_ERR "%s: IRQ %d is physically blocked! "
! 1398: "Failing back to low-rate polling.\n",
! 1399: dev->name, dev->irq);
! 1400: vp->last_reset = jiffies;
! 1401: }
! 1402: vp->polling = 1;
! 1403: }
! 1404: vortex_interrupt(dev->irq, dev, 0);
! 1405: next_tick = jiffies + 2;
! 1406: } else {
! 1407: vortex_tx_timeout(dev);
! 1408: vp->last_reset = jiffies;
! 1409: }
! 1410: }
1.1 root 1411:
1412: disable_irq(dev->irq);
1413: old_window = inw(ioaddr + EL3_CMD) >> 13;
1414: EL3WINDOW(4);
1415: media_status = inw(ioaddr + Wn4_Media);
1416: switch (dev->if_port) {
1417: case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1418: if (media_status & Media_LnkBeat) {
1.1.1.2 root 1419: ok = 1;
1.1.1.3 ! root 1420: if (vp->msg_level & NETIF_MSG_LINK)
1.1.1.2 root 1421: printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1422: dev->name, media_tbl[dev->if_port].name, media_status);
1.1.1.3 ! root 1423: } else if (vp->msg_level & NETIF_MSG_LINK)
1.1.1.2 root 1424: printk(KERN_DEBUG "%s: Media %s is has no link beat, %x.\n",
1.1 root 1425: dev->name, media_tbl[dev->if_port].name, media_status);
1426: break;
1.1.1.3 ! root 1427: case XCVR_MII: case XCVR_NWAY: {
! 1428: int mii_status = mdio_read(ioaddr, vp->phys[0], 1);
! 1429: int mii_reg5, negotiated, duplex;
! 1430: ok = 1;
! 1431: if (vp->msg_level & NETIF_MSG_LINK)
! 1432: printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
! 1433: dev->name, mii_status);
! 1434: if (vp->medialock)
! 1435: break;
! 1436: if ((mii_status & 0x0004) == 0) {
! 1437: next_tick = 5*HZ;
! 1438: break;
! 1439: }
! 1440: mii_reg5 = mdio_read(ioaddr, vp->phys[0], 5);
! 1441: negotiated = mii_reg5 & vp->advertising;
! 1442: duplex = (negotiated & 0x0100) || (negotiated & 0x03C0) == 0x0040;
! 1443: if (mii_reg5 == 0xffff || vp->full_duplex == duplex)
! 1444: break;
! 1445: if (vp->msg_level & NETIF_MSG_LINK)
! 1446: printk(KERN_INFO "%s: Setting %s-duplex based on "
! 1447: "MII #%d link partner capability of %4.4x.\n",
! 1448: dev->name, vp->full_duplex ? "full" : "half",
! 1449: vp->phys[0], mii_reg5);
! 1450: vp->full_duplex = duplex;
! 1451: /* Set the full-duplex bit. */
! 1452: EL3WINDOW(3);
! 1453: if (duplex)
! 1454: vp->wn3_mac_ctrl |= 0x120;
! 1455: else
! 1456: vp->wn3_mac_ctrl &= ~0x120;
! 1457: outb(vp->wn3_mac_ctrl, ioaddr + Wn3_MAC_Ctrl);
! 1458: break;
! 1459: }
! 1460: default: /* Other media types handled by Tx timeouts. */
! 1461: if (vp->msg_level & NETIF_MSG_LINK)
! 1462: printk(KERN_DEBUG "%s: Media %s is has no indication, %x.\n",
! 1463: dev->name, media_tbl[dev->if_port].name, media_status);
1.1 root 1464: ok = 1;
1465: }
1466: if ( ! ok) {
1.1.1.3 ! root 1467: int i_cfg;
1.1 root 1468:
1469: do {
1470: dev->if_port = media_tbl[dev->if_port].next;
1471: } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1472: if (dev->if_port == XCVR_Default) { /* Go back to default. */
1473: dev->if_port = vp->default_media;
1.1.1.3 ! root 1474: if (vp->msg_level & NETIF_MSG_LINK)
1.1 root 1475: printk(KERN_DEBUG "%s: Media selection failing, using default "
1476: "%s port.\n",
1477: dev->name, media_tbl[dev->if_port].name);
1478: } else {
1.1.1.3 ! root 1479: if (vp->msg_level & NETIF_MSG_LINK)
1.1.1.2 root 1480: printk(KERN_DEBUG "%s: Media selection failed, now trying "
1481: "%s port.\n",
1482: dev->name, media_tbl[dev->if_port].name);
1483: next_tick = media_tbl[dev->if_port].wait;
1.1 root 1484: }
1485: outw((media_status & ~(Media_10TP|Media_SQE)) |
1486: media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1487:
1488: EL3WINDOW(3);
1.1.1.3 ! root 1489: i_cfg = inl(ioaddr + Wn3_Config);
! 1490: i_cfg &= ~0x00f00000;
! 1491: i_cfg |= (dev->if_port << 20);
! 1492: outl(i_cfg, ioaddr + Wn3_Config);
1.1 root 1493:
1494: outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1495: ioaddr + EL3_CMD);
1496: }
1497: EL3WINDOW(old_window);
1498: enable_irq(dev->irq);
1.1.1.3 ! root 1499: if (vp->restore_intr_mask)
! 1500: outw(FakeIntr, ioaddr + EL3_CMD);
1.1 root 1501:
1.1.1.3 ! root 1502: if (vp->msg_level & NETIF_MSG_TIMER)
1.1 root 1503: printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1504: dev->name, media_tbl[dev->if_port].name);
1505:
1.1.1.3 ! root 1506: vp->timer.expires = jiffies + next_tick;
1.1.1.2 root 1507: add_timer(&vp->timer);
1.1 root 1508: return;
1509: }
1510:
1.1.1.3 ! root 1511: static void vortex_tx_timeout(struct net_device *dev)
1.1 root 1512: {
1513: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1514: long ioaddr = dev->base_addr;
1.1.1.3 ! root 1515: int tx_status = inb(ioaddr + TxStatus);
! 1516: int intr_status = inw(ioaddr + EL3_STATUS);
1.1 root 1517: int j;
1518:
1519: printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1.1.1.3 ! root 1520: dev->name, tx_status, intr_status);
1.1 root 1521: /* Slight code bloat to be user friendly. */
1.1.1.3 ! root 1522: if ((tx_status & 0x88) == 0x88)
1.1 root 1523: printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1524: " network cable problem?\n", dev->name);
1.1.1.3 ! root 1525: if (intr_status & IntLatch) {
1.1 root 1526: printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1527: " IRQ blocked by another device?\n", dev->name);
1.1.1.3 ! root 1528: /* Race condition possible, but we handle a few events. */
1.1 root 1529: vortex_interrupt(dev->irq, dev, 0);
1530: }
1531:
1532: #if ! defined(final_version) && LINUX_VERSION_CODE >= 0x10300
1533: if (vp->full_bus_master_tx) {
1534: int i;
1.1.1.3 ! root 1535: printk(KERN_DEBUG " Flags: bus-master %d full %d dirty %d "
! 1536: "current %d restart_tx %d.\n",
! 1537: vp->full_bus_master_tx, vp->tx_full, vp->dirty_tx, vp->cur_tx,
! 1538: vp->restart_tx);
! 1539: printk(KERN_DEBUG " Transmit list %8.8x vs. %p, packet ID %2.2x.\n",
! 1540: (int)inl(ioaddr + DownListPtr),
! 1541: &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE],
! 1542: inb(ioaddr + TxPktID));
1.1 root 1543: for (i = 0; i < TX_RING_SIZE; i++) {
1544: printk(KERN_DEBUG " %d: @%p length %8.8x status %8.8x\n", i,
1545: &vp->tx_ring[i],
1546: le32_to_cpu(vp->tx_ring[i].length),
1547: le32_to_cpu(vp->tx_ring[i].status));
1548: }
1549: }
1550: #endif
1.1.1.2 root 1551: outw(TxReset, ioaddr + EL3_CMD);
1552: for (j = 200; j >= 0 ; j--)
1553: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1554: break;
1555:
1.1 root 1556: vp->stats.tx_errors++;
1.1.1.3 ! root 1557:
1.1 root 1558: if (vp->full_bus_master_tx) {
1.1.1.3 ! root 1559: if (vp->drv_flags & HAS_V2_TX)
! 1560: outb(20, ioaddr + DownPollRate);
! 1561: if (vp->msg_level & NETIF_MSG_TX_ERR)
1.1 root 1562: printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n",
1563: dev->name);
1564: if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1565: outl(virt_to_bus(&vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]),
1566: ioaddr + DownListPtr);
1.1.1.3 ! root 1567: else
! 1568: vp->restart_tx = 1;
! 1569: if (vp->drv_flags & IS_BOOMERANG) {
! 1570: /* Room for a packet, to avoid long DownStall delays. */
! 1571: outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
! 1572: outw(DownUnstall, ioaddr + EL3_CMD);
! 1573: } else {
! 1574: if (dev->mtu > 2033)
! 1575: outw(SetTxStart + (2000>>2), ioaddr + EL3_CMD);
! 1576: }
! 1577:
! 1578: if (vp->tx_full && (vp->cur_tx - vp->dirty_tx <= TX_QUEUE_LEN - 1)) {
1.1 root 1579: vp->tx_full = 0;
1.1.1.3 ! root 1580: netif_unpause_tx_queue(dev);
1.1 root 1581: }
1.1.1.3 ! root 1582: } else {
! 1583: netif_unpause_tx_queue(dev);
1.1 root 1584: vp->stats.tx_dropped++;
1.1.1.3 ! root 1585: }
! 1586:
1.1 root 1587: /* Issue Tx Enable */
1588: outw(TxEnable, ioaddr + EL3_CMD);
1589: dev->trans_start = jiffies;
1.1.1.3 ! root 1590:
1.1 root 1591: /* Switch to register set 7 for normal use. */
1592: EL3WINDOW(7);
1593: }
1594:
1595: /*
1596: * Handle uncommon interrupt sources. This is a separate routine to minimize
1597: * the cache impact.
1598: */
1599: static void
1.1.1.3 ! root 1600: vortex_error(struct net_device *dev, int status)
1.1 root 1601: {
1602: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1603: long ioaddr = dev->base_addr;
1604: int do_tx_reset = 0;
1605: int i;
1606:
1607: if (status & TxComplete) { /* Really "TxError" for us. */
1608: unsigned char tx_status = inb(ioaddr + TxStatus);
1609: /* Presumably a tx-timeout. We must merely re-enable. */
1.1.1.3 ! root 1610: if (vp->msg_level & NETIF_MSG_TX_ERR)
1.1 root 1611: printk(KERN_DEBUG"%s: Transmit error, Tx status register %2.2x.\n",
1612: dev->name, tx_status);
1613: if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
1614: if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
1615: outb(0, ioaddr + TxStatus);
1616: if (tx_status & 0x30)
1617: do_tx_reset = 1;
1.1.1.3 ! root 1618: else { /* Merely re-enable the transmitter. */
1.1 root 1619: outw(TxEnable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1620: vp->restart_tx = 1;
! 1621: }
1.1 root 1622: }
1623: if (status & RxEarly) { /* Rx early is unused. */
1624: vortex_rx(dev);
1625: outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
1626: }
1627: if (status & StatsFull) { /* Empty statistics. */
1628: static int DoneDidThat = 0;
1.1.1.3 ! root 1629: if (vp->msg_level & NETIF_MSG_MISC)
1.1 root 1630: printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
1631: update_stats(ioaddr, dev);
1632: /* HACK: Disable statistics as an interrupt source. */
1633: /* This occurs when we have the wrong media type! */
1634: if (DoneDidThat == 0 &&
1635: inw(ioaddr + EL3_STATUS) & StatsFull) {
1636: printk(KERN_WARNING "%s: Updating statistics failed, disabling "
1637: "stats as an interrupt source.\n", dev->name);
1638: EL3WINDOW(5);
1639: outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
1640: EL3WINDOW(7);
1641: DoneDidThat++;
1642: }
1643: }
1644: if (status & IntReq) { /* Restore all interrupt sources. */
1645: outw(vp->status_enable, ioaddr + EL3_CMD);
1646: outw(vp->intr_enable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1647: vp->restore_intr_mask = 0;
1.1 root 1648: }
1649: if (status & HostError) {
1650: u16 fifo_diag;
1651: EL3WINDOW(4);
1652: fifo_diag = inw(ioaddr + Wn4_FIFODiag);
1.1.1.3 ! root 1653: if (vp->msg_level & NETIF_MSG_DRV)
! 1654: printk(KERN_ERR "%s: Host error, status %x, FIFO diagnostic "
! 1655: "register %4.4x.\n",
! 1656: dev->name, status, fifo_diag);
1.1 root 1657: /* Adapter failure requires Tx/Rx reset and reinit. */
1658: if (vp->full_bus_master_tx) {
1.1.1.3 ! root 1659: int bus_status = inl(ioaddr + PktStatus);
! 1660: /* 0x80000000 PCI master abort. */
! 1661: /* 0x40000000 PCI target abort. */
1.1 root 1662: outw(TotalReset | 0xff, ioaddr + EL3_CMD);
1663: for (i = 2000; i >= 0 ; i--)
1664: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1665: break;
1.1.1.3 ! root 1666: if (vp->msg_level & NETIF_MSG_DRV)
! 1667: printk(KERN_ERR "%s: PCI bus error, bus status %8.8x, reset "
! 1668: "had %d tick left.\n",
! 1669: dev->name, bus_status, i);
1.1 root 1670: /* Re-enable the receiver. */
1671: outw(RxEnable, ioaddr + EL3_CMD);
1672: outw(TxEnable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1673: vp->restart_tx = 1;
1.1 root 1674: } else if (fifo_diag & 0x0400)
1675: do_tx_reset = 1;
1676: if (fifo_diag & 0x3000) {
1.1.1.3 ! root 1677: outw(RxReset | 7, ioaddr + EL3_CMD);
! 1678: for (i = 200000; i >= 0 ; i--)
1.1 root 1679: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1680: break;
1.1.1.3 ! root 1681: if ((vp->drv_flags & HAS_V2_TX) && dev->mtu > 1500) {
! 1682: EL3WINDOW(3);
! 1683: outw(dev->mtu + 14, ioaddr + Wn3_MaxPktSize);
! 1684: }
1.1 root 1685: /* Set the Rx filter to the current state. */
1.1.1.3 ! root 1686: memset(vp->mc_filter, 0, sizeof vp->mc_filter);
! 1687: vp->rx_mode = 0;
1.1 root 1688: set_rx_mode(dev);
1689: outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
1690: outw(AckIntr | HostError, ioaddr + EL3_CMD);
1691: }
1692: }
1693: if (do_tx_reset) {
1694: int j;
1695: outw(TxReset, ioaddr + EL3_CMD);
1696: for (j = 200; j >= 0 ; j--)
1697: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1698: break;
1699: outw(TxEnable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1700: vp->restart_tx = 1;
1.1 root 1701: }
1702:
1703: }
1704:
1705:
1706: static int
1.1.1.3 ! root 1707: vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
1.1 root 1708: {
1709: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1710: long ioaddr = dev->base_addr;
1711:
1.1.1.3 ! root 1712: /* Block a timer-based transmit from overlapping. This happens when
! 1713: packets are presumed lost, and we use this check the Tx status. */
! 1714: if (netif_pause_tx_queue(dev) != 0) {
! 1715: /* This watchdog code is redundant with the media monitor timer. */
! 1716: if (jiffies - dev->trans_start > TX_TIMEOUT)
1.1 root 1717: vortex_tx_timeout(dev);
1718: return 1;
1719: }
1720:
1721: /* Put out the doubleword header... */
1722: outl(skb->len, ioaddr + TX_FIFO);
1723: if (vp->bus_master) {
1724: /* Set the bus-master controller to transfer the packet. */
1725: outl(virt_to_bus(skb->data), ioaddr + Wn7_MasterAddr);
1726: outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
1727: vp->tx_skb = skb;
1728: outw(StartDMADown, ioaddr + EL3_CMD);
1.1.1.3 ! root 1729: netif_stop_tx_queue(dev);
! 1730: /* Tx busy will be cleared at the DMADone interrupt. */
1.1 root 1731: } else {
1732: /* ... and the packet rounded to a doubleword. */
1733: outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
1.1.1.3 ! root 1734: dev_free_skb(skb);
! 1735: if (inw(ioaddr + TxFree) <= 1536) {
1.1 root 1736: /* Interrupt us when the FIFO has room for max-sized packet. */
1737: outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
1.1.1.3 ! root 1738: netif_stop_tx_queue(dev);
! 1739: } else
! 1740: netif_unpause_tx_queue(dev); /* Typical path */
1.1 root 1741: }
1742:
1743: dev->trans_start = jiffies;
1744:
1745: /* Clear the Tx status stack. */
1746: {
1747: int tx_status;
1748: int i = 32;
1749:
1750: while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
1751: if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
1.1.1.3 ! root 1752: if (vp->msg_level & NETIF_MSG_TX_ERR)
1.1 root 1753: printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
1754: dev->name, tx_status);
1755: if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
1756: if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
1757: if (tx_status & 0x30) {
1758: int j;
1759: outw(TxReset, ioaddr + EL3_CMD);
1760: for (j = 200; j >= 0 ; j--)
1761: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1762: break;
1763: }
1764: outw(TxEnable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1765: vp->restart_tx = 1;
1.1 root 1766: }
1767: outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
1768: }
1769: }
1770: return 0;
1771: }
1772:
1773: static int
1.1.1.3 ! root 1774: boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
1.1 root 1775: {
1776: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1777: long ioaddr = dev->base_addr;
1.1.1.3 ! root 1778: int entry;
! 1779: struct boom_tx_desc *prev_entry;
! 1780: unsigned long flags;
! 1781: int i;
1.1 root 1782:
1.1.1.3 ! root 1783: if (netif_pause_tx_queue(dev) != 0) {
! 1784: /* This watchdog code is redundant with the media monitor timer. */
! 1785: if (jiffies - dev->trans_start > TX_TIMEOUT)
1.1 root 1786: vortex_tx_timeout(dev);
1787: return 1;
1.1.1.3 ! root 1788: }
1.1 root 1789:
1.1.1.3 ! root 1790: /* Calculate the next Tx descriptor entry. */
! 1791: entry = vp->cur_tx % TX_RING_SIZE;
! 1792: prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
! 1793:
! 1794: if (vp->msg_level & NETIF_MSG_TX_QUEUED)
! 1795: printk(KERN_DEBUG "%s: Queuing Tx packet, index %d.\n",
! 1796: dev->name, vp->cur_tx);
! 1797: /* Impossible error. */
! 1798: if (vp->tx_full) {
! 1799: printk(KERN_WARNING "%s: Tx Ring full, refusing to send buffer.\n",
! 1800: dev->name);
! 1801: return 1;
! 1802: }
! 1803: vp->tx_skbuff[entry] = skb;
! 1804: vp->tx_ring[entry].next = 0;
! 1805: vp->tx_ring[entry].addr = virt_to_le32desc(skb->data);
! 1806: vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
! 1807: if (vp->capabilities & CapNoTxLength)
! 1808: vp->tx_ring[entry].status =
! 1809: cpu_to_le32(TxNoRoundup | TxIntrUploaded | (entry << 2));
! 1810: else
1.1 root 1811: vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
1812:
1.1.1.3 ! root 1813: if (vp->drv_flags & IS_BOOMERANG) {
1.1 root 1814: save_flags(flags);
1815: cli();
1816: outw(DownStall, ioaddr + EL3_CMD);
1817: /* Wait for the stall to complete. */
1818: for (i = 600; i >= 0 ; i--)
1819: if ( (inw(ioaddr + EL3_STATUS) & CmdInProgress) == 0)
1820: break;
1.1.1.3 ! root 1821: vp->tx_desc_tail->next = virt_to_le32desc(&vp->tx_ring[entry]);
! 1822: vp->tx_desc_tail = &vp->tx_ring[entry];
1.1 root 1823: if (inl(ioaddr + DownListPtr) == 0) {
1824: outl(virt_to_bus(&vp->tx_ring[entry]), ioaddr + DownListPtr);
1825: queued_packet++;
1826: }
1827: outw(DownUnstall, ioaddr + EL3_CMD);
1828: restore_flags(flags);
1.1.1.3 ! root 1829: } else {
! 1830: vp->tx_desc_tail->next = virt_to_le32desc(&vp->tx_ring[entry]);
! 1831: vp->tx_desc_tail = &vp->tx_ring[entry];
! 1832: if (vp->restart_tx) {
! 1833: outl(virt_to_bus(vp->tx_desc_tail), ioaddr + DownListPtr);
! 1834: vp->restart_tx = 0;
! 1835: queued_packet++;
! 1836: }
! 1837: }
! 1838: vp->cur_tx++;
! 1839: if (vp->cur_tx - vp->dirty_tx >= TX_QUEUE_LEN) {
! 1840: vp->tx_full = 1;
! 1841: /* Check for a just-cleared queue. */
! 1842: if (vp->cur_tx - (volatile unsigned int)vp->dirty_tx
! 1843: < TX_QUEUE_LEN - 2) {
! 1844: vp->tx_full = 0;
! 1845: netif_unpause_tx_queue(dev);
! 1846: } else
! 1847: netif_stop_tx_queue(dev);
! 1848: } else { /* Clear previous interrupt enable. */
1.1.1.2 root 1849: #if defined(tx_interrupt_mitigation)
1.1.1.3 ! root 1850: prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
1.1.1.2 root 1851: #endif
1.1.1.3 ! root 1852: netif_unpause_tx_queue(dev); /* Typical path */
1.1 root 1853: }
1.1.1.3 ! root 1854: dev->trans_start = jiffies;
! 1855: return 0;
1.1 root 1856: }
1857:
1858: /* The interrupt handler does all of the Rx thread work and cleans up
1859: after the Tx thread. */
1860: static void vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1861: {
1.1.1.3 ! root 1862: struct net_device *dev = dev_id;
1.1 root 1863: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1864: long ioaddr;
1865: int latency, status;
1.1.1.3 ! root 1866: int work_done = vp->max_interrupt_work;
1.1 root 1867:
1868: ioaddr = dev->base_addr;
1869: latency = inb(ioaddr + Timer);
1870: status = inw(ioaddr + EL3_STATUS);
1871:
1.1.1.2 root 1872: if (status == 0xffff)
1873: goto handler_exit;
1.1.1.3 ! root 1874: if (vp->msg_level & NETIF_MSG_INTR)
1.1 root 1875: printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
1876: dev->name, status, latency);
1877: do {
1.1.1.3 ! root 1878: if (vp->msg_level & NETIF_MSG_INTR)
1.1 root 1879: printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
1880: dev->name, status);
1881: if (status & RxComplete)
1882: vortex_rx(dev);
1883: if (status & UpComplete) {
1884: outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
1885: boomerang_rx(dev);
1886: }
1887:
1888: if (status & TxAvailable) {
1.1.1.3 ! root 1889: if (vp->msg_level & NETIF_MSG_TX_DONE)
1.1 root 1890: printk(KERN_DEBUG " TX room bit was handled.\n");
1891: /* There's room in the FIFO for a full-sized packet. */
1892: outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
1.1.1.3 ! root 1893: netif_resume_tx_queue(dev);
1.1 root 1894: }
1895:
1896: if (status & DownComplete) {
1897: unsigned int dirty_tx = vp->dirty_tx;
1898:
1.1.1.2 root 1899: outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
1.1 root 1900: while (vp->cur_tx - dirty_tx > 0) {
1901: int entry = dirty_tx % TX_RING_SIZE;
1.1.1.3 ! root 1902: int tx_status = le32_to_cpu(vp->tx_ring[entry].status);
! 1903: if (vp->capabilities & CapNoTxLength) {
! 1904: if ( ! (tx_status & TxDownComplete))
! 1905: break;
! 1906: } else if (inl(ioaddr + DownListPtr) ==
! 1907: virt_to_bus(&vp->tx_ring[entry]))
1.1 root 1908: break; /* It still hasn't been processed. */
1.1.1.3 ! root 1909: if (vp->msg_level & NETIF_MSG_TX_DONE)
! 1910: printk(KERN_DEBUG "%s: Transmit done, Tx status %8.8x.\n",
! 1911: dev->name, tx_status);
1.1 root 1912: if (vp->tx_skbuff[entry]) {
1.1.1.3 ! root 1913: dev_free_skb_irq(vp->tx_skbuff[entry]);
1.1 root 1914: vp->tx_skbuff[entry] = 0;
1915: }
1916: /* vp->stats.tx_packets++; Counted below. */
1917: dirty_tx++;
1918: }
1919: vp->dirty_tx = dirty_tx;
1.1.1.3 ! root 1920: /* 4 entry hysteresis before marking the queue non-full. */
! 1921: if (vp->tx_full && (vp->cur_tx - dirty_tx < TX_QUEUE_LEN - 4)) {
1.1.1.2 root 1922: vp->tx_full = 0;
1.1.1.3 ! root 1923: netif_resume_tx_queue(dev);
1.1 root 1924: }
1925: }
1926: if (status & DMADone) {
1927: if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
1928: outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
1.1.1.3 ! root 1929: /* Release the transfered buffer */
! 1930: dev_free_skb_irq(vp->tx_skb);
1.1 root 1931: if (inw(ioaddr + TxFree) > 1536) {
1.1.1.3 ! root 1932: netif_resume_tx_queue(dev);
1.1 root 1933: } else /* Interrupt when FIFO has room for max-sized packet. */
1934: outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
1935: }
1936: }
1937: /* Check for all uncommon interrupts at once. */
1938: if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
1939: if (status == 0xffff)
1940: break;
1941: vortex_error(dev, status);
1942: }
1943:
1944: if (--work_done < 0) {
1945: if ((status & (0x7fe - (UpComplete | DownComplete))) == 0) {
1946: /* Just ack these and return. */
1947: outw(AckIntr | UpComplete | DownComplete, ioaddr + EL3_CMD);
1948: } else {
1949: printk(KERN_WARNING "%s: Too much work in interrupt, status "
1950: "%4.4x. Temporarily disabling functions (%4.4x).\n",
1951: dev->name, status, SetStatusEnb | ((~status) & 0x7FE));
1952: /* Disable all pending interrupts. */
1953: outw(SetStatusEnb | ((~status) & 0x7FE), ioaddr + EL3_CMD);
1954: outw(AckIntr | 0x7FF, ioaddr + EL3_CMD);
1955: /* The timer will reenable interrupts. */
1.1.1.3 ! root 1956: vp->restore_intr_mask = 1;
1.1 root 1957: break;
1958: }
1959: }
1960: /* Acknowledge the IRQ. */
1961: outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
1962: if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1963: writel(0x8000, vp->cb_fn_base + 4);
1964:
1965: } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
1966:
1.1.1.3 ! root 1967: if (vp->msg_level & NETIF_MSG_INTR)
1.1 root 1968: printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
1969: dev->name, status);
1.1.1.2 root 1970: handler_exit:
1.1 root 1971: return;
1972: }
1973:
1.1.1.3 ! root 1974: static int vortex_rx(struct net_device *dev)
1.1 root 1975: {
1976: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1977: long ioaddr = dev->base_addr;
1978: int i;
1979: short rx_status;
1980:
1.1.1.3 ! root 1981: if (vp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 1982: printk(KERN_DEBUG" In rx_packet(), status %4.4x, rx_status %4.4x.\n",
1983: inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
1984: while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
1985: if (rx_status & 0x4000) { /* Error, update stats. */
1986: unsigned char rx_error = inb(ioaddr + RxErrors);
1.1.1.3 ! root 1987: if (vp->msg_level & NETIF_MSG_RX_ERR)
1.1 root 1988: printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
1989: vp->stats.rx_errors++;
1990: if (rx_error & 0x01) vp->stats.rx_over_errors++;
1991: if (rx_error & 0x02) vp->stats.rx_length_errors++;
1992: if (rx_error & 0x04) vp->stats.rx_frame_errors++;
1993: if (rx_error & 0x08) vp->stats.rx_crc_errors++;
1994: if (rx_error & 0x10) vp->stats.rx_length_errors++;
1995: } else {
1996: /* The packet length: up to 4.5K!. */
1997: int pkt_len = rx_status & 0x1fff;
1998: struct sk_buff *skb;
1999:
2000: skb = dev_alloc_skb(pkt_len + 5);
1.1.1.3 ! root 2001: if (vp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 2002: printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2003: pkt_len, rx_status);
2004: if (skb != NULL) {
2005: skb->dev = dev;
2006: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2007: /* 'skb_put()' points to the start of sk_buff data area. */
2008: if (vp->bus_master &&
2009: ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2010: outl(virt_to_bus(skb_put(skb, pkt_len)),
2011: ioaddr + Wn7_MasterAddr);
2012: outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2013: outw(StartDMAUp, ioaddr + EL3_CMD);
2014: while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2015: ;
2016: } else {
2017: insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2018: (pkt_len + 3) >> 2);
2019: }
2020: outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2021: skb->protocol = eth_type_trans(skb, dev);
2022: netif_rx(skb);
2023: dev->last_rx = jiffies;
2024: vp->stats.rx_packets++;
1.1.1.3 ! root 2025: #if LINUX_VERSION_CODE > 0x20127
! 2026: vp->stats.rx_bytes += pkt_len;
! 2027: #endif
1.1 root 2028: /* Wait a limited time to go to next packet. */
2029: for (i = 200; i >= 0; i--)
2030: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2031: break;
2032: continue;
1.1.1.3 ! root 2033: } else if (vp->msg_level & NETIF_MSG_RX_ERR)
1.1 root 2034: printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2035: "size %d.\n", dev->name, pkt_len);
2036: }
2037: outw(RxDiscard, ioaddr + EL3_CMD);
2038: vp->stats.rx_dropped++;
2039: /* Wait a limited time to skip this packet. */
2040: for (i = 200; i >= 0; i--)
2041: if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2042: break;
2043: }
2044:
2045: return 0;
2046: }
2047:
2048: static int
1.1.1.3 ! root 2049: boomerang_rx(struct net_device *dev)
1.1 root 2050: {
2051: struct vortex_private *vp = (struct vortex_private *)dev->priv;
2052: int entry = vp->cur_rx % RX_RING_SIZE;
2053: long ioaddr = dev->base_addr;
2054: int rx_status;
2055: int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2056:
1.1.1.3 ! root 2057: if (vp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 2058: printk(KERN_DEBUG " In boomerang_rx(), status %4.4x, rx_status "
1.1.1.3 ! root 2059: "%8.8x.\n",
! 2060: inw(ioaddr+EL3_STATUS), (int)inl(ioaddr+UpPktStatus));
1.1 root 2061: while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2062: if (--rx_work_limit < 0)
2063: break;
2064: if (rx_status & RxDError) { /* Error, update stats. */
2065: unsigned char rx_error = rx_status >> 16;
1.1.1.3 ! root 2066: if (vp->msg_level & NETIF_MSG_RX_ERR)
1.1 root 2067: printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2068: vp->stats.rx_errors++;
2069: if (rx_error & 0x02) vp->stats.rx_length_errors++;
1.1.1.3 ! root 2070: if (rx_error & 0x10) vp->stats.rx_length_errors++;
1.1 root 2071: if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2072: if (rx_error & 0x08) vp->stats.rx_crc_errors++;
1.1.1.3 ! root 2073: if (rx_error & 0x01) {
! 2074: vp->stats.rx_over_errors++;
! 2075: if (vp->drv_flags & HAS_V2_TX) {
! 2076: int cur_rx_thresh = inb(ioaddr + RxPriorityThresh);
! 2077: if (cur_rx_thresh < 0x20)
! 2078: outb(cur_rx_thresh + 1, ioaddr + RxPriorityThresh);
! 2079: else
! 2080: printk(KERN_WARNING "%s: Excessive PCI latency causing"
! 2081: " packet corruption.\n", dev->name);
! 2082: }
! 2083: }
1.1 root 2084: } else {
2085: /* The packet length: up to 4.5K!. */
2086: int pkt_len = rx_status & 0x1fff;
2087: struct sk_buff *skb;
2088:
1.1.1.3 ! root 2089: if (vp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 2090: printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2091: pkt_len, rx_status);
2092:
2093: /* Check if the packet is long enough to just accept without
2094: copying to a properly sized skbuff. */
1.1.1.3 ! root 2095: if (pkt_len < vp->rx_copybreak
1.1 root 2096: && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2097: skb->dev = dev;
2098: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2099: /* 'skb_put()' points to the start of sk_buff data area. */
2100: memcpy(skb_put(skb, pkt_len),
1.1.1.3 ! root 2101: le32desc_to_virt(vp->rx_ring[entry].addr), pkt_len);
1.1 root 2102: rx_copy++;
2103: } else {
2104: void *temp;
2105: /* Pass up the skbuff already on the Rx ring. */
2106: skb = vp->rx_skbuff[entry];
2107: vp->rx_skbuff[entry] = NULL;
2108: temp = skb_put(skb, pkt_len);
2109: /* Remove this checking code for final release. */
1.1.1.3 ! root 2110: if (le32desc_to_virt(vp->rx_ring[entry].addr) != temp)
1.1 root 2111: printk(KERN_ERR "%s: Warning -- the skbuff addresses do not match"
2112: " in boomerang_rx: %p vs. %p.\n", dev->name,
2113: bus_to_virt(le32_to_cpu(vp->rx_ring[entry].addr)),
2114: temp);
2115: rx_nocopy++;
2116: }
2117: skb->protocol = eth_type_trans(skb, dev);
2118: { /* Use hardware checksum info. */
2119: int csum_bits = rx_status & 0xee000000;
2120: if (csum_bits &&
2121: (csum_bits == (IPChksumValid | TCPChksumValid) ||
2122: csum_bits == (IPChksumValid | UDPChksumValid))) {
2123: skb->ip_summed = CHECKSUM_UNNECESSARY;
2124: rx_csumhits++;
2125: }
2126: }
2127: netif_rx(skb);
2128: dev->last_rx = jiffies;
2129: vp->stats.rx_packets++;
1.1.1.3 ! root 2130: #if LINUX_VERSION_CODE > 0x20127
! 2131: vp->stats.rx_bytes += pkt_len;
! 2132: #endif
1.1 root 2133: }
2134: entry = (++vp->cur_rx) % RX_RING_SIZE;
2135: }
2136: /* Refill the Rx ring buffers. */
1.1.1.3 ! root 2137: for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
1.1 root 2138: struct sk_buff *skb;
2139: entry = vp->dirty_rx % RX_RING_SIZE;
2140: if (vp->rx_skbuff[entry] == NULL) {
1.1.1.3 ! root 2141: skb = dev_alloc_skb(vp->rx_buf_sz);
1.1 root 2142: if (skb == NULL)
2143: break; /* Bad news! */
2144: skb->dev = dev; /* Mark as being used by this device. */
2145: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1.1.1.3 ! root 2146: vp->rx_ring[entry].addr = virt_to_le32desc(skb->tail);
1.1 root 2147: vp->rx_skbuff[entry] = skb;
2148: }
2149: vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2150: outw(UpUnstall, ioaddr + EL3_CMD);
2151: }
2152: return 0;
2153: }
2154:
1.1.1.3 ! root 2155: static void
! 2156: vortex_down(struct net_device *dev)
1.1 root 2157: {
2158: struct vortex_private *vp = (struct vortex_private *)dev->priv;
2159: long ioaddr = dev->base_addr;
2160:
2161: /* Turn off statistics ASAP. We update vp->stats below. */
2162: outw(StatsDisable, ioaddr + EL3_CMD);
2163:
2164: /* Disable the receiver and transmitter. */
2165: outw(RxDisable, ioaddr + EL3_CMD);
2166: outw(TxDisable, ioaddr + EL3_CMD);
2167:
2168: if (dev->if_port == XCVR_10base2)
2169: /* Turn off thinnet power. Green! */
2170: outw(StopCoax, ioaddr + EL3_CMD);
2171:
2172: outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2173:
2174: update_stats(ioaddr, dev);
1.1.1.3 ! root 2175: if (vp->full_bus_master_rx)
1.1 root 2176: outl(0, ioaddr + UpListPtr);
1.1.1.3 ! root 2177: if (vp->full_bus_master_tx)
! 2178: outl(0, ioaddr + DownListPtr);
! 2179: }
! 2180:
! 2181: static int
! 2182: vortex_close(struct net_device *dev)
! 2183: {
! 2184: struct vortex_private *vp = (struct vortex_private *)dev->priv;
! 2185: long ioaddr = dev->base_addr;
! 2186: int i;
! 2187:
! 2188: netif_stop_tx_queue(dev);
! 2189:
! 2190: if (vp->msg_level & NETIF_MSG_IFDOWN) {
! 2191: printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
! 2192: dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
! 2193: printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
! 2194: " tx_queued %d Rx pre-checksummed %d.\n",
! 2195: dev->name, rx_nocopy, rx_copy, queued_packet, rx_csumhits);
! 2196: }
! 2197:
! 2198: del_timer(&vp->timer);
! 2199: vortex_down(dev);
! 2200: free_irq(dev->irq, dev);
! 2201: outw(TotalReset | 0x34, ioaddr + EL3_CMD);
! 2202:
! 2203: if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
1.1 root 2204: for (i = 0; i < RX_RING_SIZE; i++)
2205: if (vp->rx_skbuff[i]) {
2206: #if LINUX_VERSION_CODE < 0x20100
2207: vp->rx_skbuff[i]->free = 1;
2208: #endif
1.1.1.3 ! root 2209: dev_free_skb(vp->rx_skbuff[i]);
1.1 root 2210: vp->rx_skbuff[i] = 0;
2211: }
2212: }
2213: if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2214: for (i = 0; i < TX_RING_SIZE; i++)
2215: if (vp->tx_skbuff[i]) {
1.1.1.3 ! root 2216: dev_free_skb(vp->tx_skbuff[i]);
1.1 root 2217: vp->tx_skbuff[i] = 0;
2218: }
2219: }
2220:
2221: MOD_DEC_USE_COUNT;
2222:
2223: return 0;
2224: }
2225:
1.1.1.3 ! root 2226: static struct net_device_stats *vortex_get_stats(struct net_device *dev)
1.1 root 2227: {
2228: struct vortex_private *vp = (struct vortex_private *)dev->priv;
2229: unsigned long flags;
2230:
1.1.1.3 ! root 2231: if (netif_running(dev)) {
1.1 root 2232: save_flags(flags);
2233: cli();
2234: update_stats(dev->base_addr, dev);
2235: restore_flags(flags);
2236: }
2237: return &vp->stats;
2238: }
2239:
2240: /* Update statistics.
2241: Unlike with the EL3 we need not worry about interrupts changing
2242: the window setting from underneath us, but we must still guard
2243: against a race condition with a StatsUpdate interrupt updating the
2244: table. This is done by checking that the ASM (!) code generated uses
2245: atomic updates with '+='.
2246: */
1.1.1.3 ! root 2247: static void update_stats(long ioaddr, struct net_device *dev)
1.1 root 2248: {
2249: struct vortex_private *vp = (struct vortex_private *)dev->priv;
1.1.1.2 root 2250: int old_window = inw(ioaddr + EL3_CMD);
1.1 root 2251:
1.1.1.2 root 2252: if (old_window == 0xffff) /* Chip suspended or ejected. */
2253: return;
1.1 root 2254: /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2255: /* Switch to the stats window, and read everything. */
2256: EL3WINDOW(6);
2257: vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2258: vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2259: /* Multiple collisions. */ inb(ioaddr + 2);
2260: vp->stats.collisions += inb(ioaddr + 3);
2261: vp->stats.tx_window_errors += inb(ioaddr + 4);
2262: vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2263: vp->stats.tx_packets += inb(ioaddr + 6);
2264: vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2265: /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2266: /* Tx deferrals */ inb(ioaddr + 8);
2267: /* Don't bother with register 9, an extension of registers 6&7.
2268: If we do use the 6&7 values the atomic update assumption above
2269: is invalid. */
1.1.1.3 ! root 2270: /* Rx Bytes is unreliable */ inw(ioaddr + 10);
1.1.1.2 root 2271: #if LINUX_VERSION_CODE > 0x020119
2272: vp->stats.tx_bytes += inw(ioaddr + 12);
2273: #else
2274: inw(ioaddr + 10);
1.1 root 2275: inw(ioaddr + 12);
1.1.1.2 root 2276: #endif
1.1 root 2277: /* New: On the Vortex we must also clear the BadSSD counter. */
2278: EL3WINDOW(4);
2279: inb(ioaddr + 12);
2280:
2281: /* We change back to window 7 (not 1) with the Vortex. */
1.1.1.2 root 2282: EL3WINDOW(old_window >> 13);
1.1 root 2283: return;
2284: }
2285:
1.1.1.3 ! root 2286: static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1.1 root 2287: {
2288: struct vortex_private *vp = (struct vortex_private *)dev->priv;
2289: long ioaddr = dev->base_addr;
2290: u16 *data = (u16 *)&rq->ifr_data;
1.1.1.3 ! root 2291: u32 *data32 = (void *)&rq->ifr_data;
! 2292: int phy = vp->phys[0];
1.1 root 2293:
2294: switch(cmd) {
1.1.1.3 ! root 2295: case 0x8947: case 0x89F0:
! 2296: /* SIOCGMIIPHY: Get the address of the PHY in use. */
1.1 root 2297: data[0] = phy;
1.1.1.3 ! root 2298: /* Fall Through */
! 2299: case 0x8948: case 0x89F1:
! 2300: /* SIOCGMIIREG: Read the specified MII register. */
! 2301: if (data[0] == 32) { /* Emulate MII for 3c59*, 3c900. */
! 2302: data[3] = 0;
! 2303: switch (data[1]) {
! 2304: case 0:
! 2305: if (dev->if_port == XCVR_100baseTx) data[3] |= 0x2000;
! 2306: if (vp->full_duplex) data[3] |= 0x0100;
! 2307: break;
! 2308: case 1:
! 2309: if (vp->available_media & 0x02) data[3] |= 0x6000;
! 2310: if (vp->available_media & 0x08) data[3] |= 0x1800;
! 2311: spin_lock(&vp->window_lock);
! 2312: EL3WINDOW(4);
! 2313: if (inw(ioaddr + Wn4_Media) & Media_LnkBeat) data[3] |= 0x0004;
! 2314: spin_unlock(&vp->window_lock);
! 2315: break;
! 2316: case 2: data[3] = 0x0280; break; /* OUI 00:a0:24 */
! 2317: case 3: data[3] = 0x9000; break;
! 2318: default: break;
! 2319: }
! 2320: return 0;
! 2321: }
! 2322: spin_lock(&vp->window_lock);
1.1 root 2323: EL3WINDOW(4);
2324: data[3] = mdio_read(ioaddr, data[0] & 0x1f, data[1] & 0x1f);
1.1.1.3 ! root 2325: spin_unlock(&vp->window_lock);
1.1 root 2326: return 0;
1.1.1.3 ! root 2327: case 0x8949: case 0x89F2:
! 2328: /* SIOCSMIIREG: Write the specified MII register */
1.1.1.2 root 2329: if (!capable(CAP_NET_ADMIN))
1.1 root 2330: return -EPERM;
1.1.1.3 ! root 2331: if (data[0] == vp->phys[0]) {
! 2332: u16 value = data[2];
! 2333: if (vp->phys[0] == 32) {
! 2334: if (data[1] == 0) {
! 2335: vp->media_override = (value & 0x2000) ?
! 2336: XCVR_100baseTx : XCVR_10baseT;
! 2337: vp->full_duplex = (value & 0x0100) ? 1 : 0;
! 2338: vp->medialock = 1;
! 2339: }
! 2340: return 0;
! 2341: }
! 2342: switch (data[1]) {
! 2343: case 0:
! 2344: /* Check for autonegotiation on or reset. */
! 2345: vp->medialock = (value & 0x9000) ? 0 : 1;
! 2346: if (vp->medialock)
! 2347: vp->full_duplex = (value & 0x0100) ? 1 : 0;
! 2348: break;
! 2349: case 4: vp->advertising = value; break;
! 2350: }
! 2351: /* Perhaps check_duplex(dev), depending on chip semantics. */
! 2352: }
! 2353: spin_lock(&vp->window_lock);
1.1 root 2354: EL3WINDOW(4);
2355: mdio_write(ioaddr, data[0] & 0x1f, data[1] & 0x1f, data[2]);
1.1.1.3 ! root 2356: spin_unlock(&vp->window_lock);
! 2357: return 0;
! 2358: case SIOCGPARAMS:
! 2359: data32[0] = vp->msg_level;
! 2360: data32[1] = vp->multicast_filter_limit;
! 2361: data32[2] = vp->max_interrupt_work;
! 2362: data32[3] = vp->rx_copybreak;
! 2363: return 0;
! 2364: case SIOCSPARAMS:
! 2365: if (!capable(CAP_NET_ADMIN))
! 2366: return -EPERM;
! 2367: vp->msg_level = data32[0];
! 2368: vp->multicast_filter_limit = data32[1];
! 2369: vp->max_interrupt_work = data32[2];
! 2370: vp->rx_copybreak = data32[3];
1.1 root 2371: return 0;
2372: default:
2373: return -EOPNOTSUPP;
2374: }
2375: }
2376:
1.1.1.3 ! root 2377: static unsigned const ethernet_polynomial = 0x04c11db7U;
! 2378: static inline u32 ether_crc(int length, unsigned char *data)
! 2379: {
! 2380: int crc = -1;
! 2381:
! 2382: while(--length >= 0) {
! 2383: unsigned char current_octet = *data++;
! 2384: int bit;
! 2385: for (bit = 0; bit < 8; bit++, current_octet >>= 1)
! 2386: crc = (crc << 1) ^
! 2387: ((crc < 0) ^ (current_octet & 1) ? ethernet_polynomial : 0);
! 2388: }
! 2389: return crc;
! 2390: }
! 2391:
1.1 root 2392: /* Pre-Cyclone chips have no documented multicast filter, so the only
1.1.1.3 ! root 2393: multicast setting is to receive all multicast frames. Cyclone and later
! 2394: chips have a write-only table of unknown size.
! 2395: At least the chip has a very clean way to set the other filter modes. */
! 2396: static void set_rx_mode(struct net_device *dev)
1.1 root 2397: {
1.1.1.3 ! root 2398: struct vortex_private *vp = (void *)dev->priv;
1.1 root 2399: long ioaddr = dev->base_addr;
2400: int new_mode;
2401:
2402: if (dev->flags & IFF_PROMISC) {
1.1.1.3 ! root 2403: /* Unconditionally log a net tap. */
! 2404: printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
1.1 root 2405: new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
1.1.1.3 ! root 2406: } else if (dev->flags & IFF_ALLMULTI) {
! 2407: new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
! 2408: } else if ((vp->drv_flags & HAS_V2_TX) &&
! 2409: dev->mc_count < vp->multicast_filter_limit) {
! 2410: struct dev_mc_list *mclist;
! 2411: int i;
! 2412: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
! 2413: i++, mclist = mclist->next) {
! 2414: int filter_bit = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0xff;
! 2415: if (test_bit(filter_bit, vp->mc_filter))
! 2416: continue;
! 2417: outw(SetFilterBit | 0x0400 | filter_bit, ioaddr + EL3_CMD);
! 2418: set_bit(filter_bit, vp->mc_filter);
! 2419: }
! 2420:
! 2421: new_mode = SetRxFilter|RxStation|RxMulticastHash|RxBroadcast;
! 2422: } else if (dev->mc_count) {
1.1 root 2423: new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2424: } else
2425: new_mode = SetRxFilter | RxStation | RxBroadcast;
2426:
1.1.1.3 ! root 2427: if (vp->rx_mode != new_mode) {
! 2428: vp->rx_mode = new_mode;
! 2429: outw(new_mode, ioaddr + EL3_CMD);
! 2430: }
1.1 root 2431: }
2432:
2433:
2434: /* MII transceiver control section.
2435: Read and write the MII registers using software-generated serial
2436: MDIO protocol. See the MII specifications or DP83840A data sheet
2437: for details. */
2438:
2439: /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
2440: met by back-to-back PCI I/O cycles, but we insert a delay to avoid
2441: "overclocking" issues. */
2442: #define mdio_delay() inl(mdio_addr)
2443:
2444: #define MDIO_SHIFT_CLK 0x01
2445: #define MDIO_DIR_WRITE 0x04
2446: #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
2447: #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
2448: #define MDIO_DATA_READ 0x02
2449: #define MDIO_ENB_IN 0x00
2450:
2451: /* Generate the preamble required for initial synchronization and
2452: a few older transceivers. */
2453: static void mdio_sync(long ioaddr, int bits)
2454: {
2455: long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2456:
2457: /* Establish sync by sending at least 32 logic ones. */
2458: while (-- bits >= 0) {
2459: outw(MDIO_DATA_WRITE1, mdio_addr);
2460: mdio_delay();
2461: outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
2462: mdio_delay();
2463: }
2464: }
2465:
2466: static int mdio_read(long ioaddr, int phy_id, int location)
2467: {
2468: int i;
2469: int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
2470: unsigned int retval = 0;
2471: long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2472:
2473: if (mii_preamble_required)
2474: mdio_sync(ioaddr, 32);
2475:
2476: /* Shift the read command bits out. */
2477: for (i = 14; i >= 0; i--) {
2478: int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2479: outw(dataval, mdio_addr);
2480: mdio_delay();
2481: outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2482: mdio_delay();
2483: }
1.1.1.3 ! root 2484: /* Read the two transition and 16 data bits. */
! 2485: for (i = 18; i > 0; i--) {
1.1 root 2486: outw(MDIO_ENB_IN, mdio_addr);
2487: mdio_delay();
2488: retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
2489: outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
2490: mdio_delay();
2491: }
1.1.1.3 ! root 2492: return retval & 0x10000 ? 0xffff : retval & 0xffff;
1.1 root 2493: }
2494:
2495: static void mdio_write(long ioaddr, int phy_id, int location, int value)
2496: {
2497: int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
2498: long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2499: int i;
2500:
2501: if (mii_preamble_required)
2502: mdio_sync(ioaddr, 32);
2503:
2504: /* Shift the command bits out. */
2505: for (i = 31; i >= 0; i--) {
2506: int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2507: outw(dataval, mdio_addr);
2508: mdio_delay();
2509: outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2510: mdio_delay();
2511: }
2512: /* Leave the interface idle. */
1.1.1.3 ! root 2513: mdio_sync(ioaddr, 32);
1.1 root 2514:
2515: return;
2516: }
1.1.1.2 root 2517:
1.1.1.3 ! root 2518: #if ! defined(NO_PCI)
1.1.1.2 root 2519: /* ACPI: Advanced Configuration and Power Interface. */
2520: /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
1.1.1.3 ! root 2521: static void acpi_set_WOL(struct net_device *dev)
1.1.1.2 root 2522: {
2523: struct vortex_private *vp = (struct vortex_private *)dev->priv;
2524: long ioaddr = dev->base_addr;
2525:
2526: /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
2527: EL3WINDOW(7);
2528: outw(2, ioaddr + 0x0c);
2529: /* The RxFilter must accept the WOL frames. */
2530: outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
2531: outw(RxEnable, ioaddr + EL3_CMD);
2532: /* Change the power state to D3; RxEnable doesn't take effect. */
1.1.1.3 ! root 2533: pci_write_config_word(vp->pci_dev, 0xe0, 0x8103);
1.1.1.2 root 2534: }
1.1.1.3 ! root 2535: #endif
1.1.1.2 root 2536:
1.1.1.3 ! root 2537: static int pwr_event(void *dev_instance, int event)
! 2538: {
! 2539: struct net_device *dev = dev_instance;
! 2540: struct vortex_private *np = (struct vortex_private *)dev->priv;
! 2541: long ioaddr = dev->base_addr;
! 2542:
! 2543: if (np->msg_level & NETIF_MSG_LINK)
! 2544: printk(KERN_DEBUG "%s: Handling power event %d.\n", dev->name, event);
! 2545: switch(event) {
! 2546: case DRV_ATTACH:
! 2547: MOD_INC_USE_COUNT;
! 2548: break;
! 2549: case DRV_SUSPEND:
! 2550: vortex_down(dev);
! 2551: netif_stop_tx_queue(dev);
! 2552: if (np->capabilities & CapPwrMgmt)
! 2553: acpi_set_WOL(dev);
! 2554: break;
! 2555: case DRV_RESUME:
! 2556: /* This is incomplete: the actions are very chip specific. */
! 2557: activate_xcvr(dev);
! 2558: set_media_type(dev);
! 2559: start_operation(dev);
! 2560: np->rx_mode = 0;
! 2561: set_rx_mode(dev);
! 2562: start_operation1(dev);
! 2563: break;
! 2564: case DRV_DETACH: {
! 2565: struct net_device **devp, **next;
! 2566: if (dev->flags & IFF_UP) {
! 2567: dev_close(dev);
! 2568: dev->flags &= ~(IFF_UP|IFF_RUNNING);
! 2569: }
! 2570: unregister_netdev(dev);
! 2571: release_region(dev->base_addr, pci_tbl[np->chip_id].io_size);
! 2572: #ifndef USE_IO_OPS
! 2573: iounmap((char *)dev->base_addr);
! 2574: #endif
! 2575: for (devp = &root_vortex_dev; *devp; devp = next) {
! 2576: next = &((struct vortex_private *)(*devp)->priv)->next_module;
! 2577: if (*devp == dev) {
! 2578: *devp = *next;
! 2579: break;
! 2580: }
! 2581: }
! 2582: if (np->priv_addr)
! 2583: kfree(np->priv_addr);
! 2584: kfree(dev);
! 2585: MOD_DEC_USE_COUNT;
! 2586: break;
! 2587: }
! 2588: case DRV_PWR_WakeOn:
! 2589: if ( ! (np->capabilities & CapPwrMgmt))
! 2590: return -1;
! 2591: EL3WINDOW(7);
! 2592: /* Power up on: 1=Downloaded Filter, 2=Magic Packets, 4=Link Status.*/
! 2593: outw(2, ioaddr + 12);
! 2594: /* This RxEnable doesn't take effect if we immediately change to D3. */
! 2595: outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
! 2596: outw(RxEnable, ioaddr + EL3_CMD);
! 2597: acpi_set_pwr_state(np->pci_dev, ACPI_D3);
! 2598: break;
! 2599: }
! 2600: return 0;
1.1.1.2 root 2601: }
1.1 root 2602:
2603:
2604: #ifdef MODULE
2605: void cleanup_module(void)
2606: {
1.1.1.3 ! root 2607: struct net_device *next_dev;
1.1 root 2608:
2609: #ifdef CARDBUS
2610: unregister_driver(&vortex_ops);
1.1.1.3 ! root 2611: #elif ! defined(NO_PCI)
! 2612: pci_drv_unregister(&vortex_drv_id);
1.1 root 2613: #endif
2614:
2615: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
2616: while (root_vortex_dev) {
2617: struct vortex_private *vp=(void *)(root_vortex_dev->priv);
2618: unregister_netdev(root_vortex_dev);
1.1.1.3 ! root 2619: outw(TotalReset | 0x14, root_vortex_dev->base_addr + EL3_CMD);
! 2620: if (vp->capabilities & CapPwrMgmt)
! 2621: acpi_set_WOL(root_vortex_dev);
! 2622: #ifdef USE_MEM_OPS
! 2623: iounmap((char *)root_vortex_dev->base_addr);
! 2624: #else
1.1 root 2625: release_region(root_vortex_dev->base_addr,
2626: pci_tbl[vp->chip_id].io_size);
1.1.1.3 ! root 2627: #endif
! 2628: next_dev = vp->next_module;
! 2629: if (vp->priv_addr)
! 2630: kfree(vp->priv_addr);
1.1 root 2631: kfree(root_vortex_dev);
2632: root_vortex_dev = next_dev;
2633: }
2634: }
2635:
2636: #endif /* MODULE */
2637:
2638: /*
2639: * Local variables:
1.1.1.3 ! root 2640: * compile-command: "make KERNVER=`uname -r` 3c59x.o"
! 2641: * compile-cmd: "gcc -DMODULE -Wall -Wstrict-prototypes -O6 -c 3c59x.c"
! 2642: * cardbus-compile-command: "gcc -DCARDBUS -DMODULE -Wall -Wstrict-prototypes -O6 -c 3c59x.c -o 3c575_cb.o -I/usr/src/pcmcia/include/"
! 2643: * eisa-only-compile: "gcc -DNO_PCI -DMODULE -O6 -c 3c59x.c -o 3c597.o"
1.1 root 2644: * c-indent-level: 4
2645: * c-basic-offset: 4
2646: * tab-width: 4
2647: * End:
2648: */
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