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1.1 root 1: /* drivers/net/eepro100.c: An Intel i82557 Ethernet driver for Linux. */
2: /*
3: NOTICE: this version tested with kernels 1.3.72 and later only!
4: Written 1996-1998 by Donald Becker.
5:
6: This software may be used and distributed according to the terms
7: of the GNU Public License, incorporated herein by reference.
8:
9: This driver is for the Intel EtherExpress Pro 100B boards.
10: It should work with other i82557 boards (if any others exist).
11: To use a built-in driver, install as drivers/net/eepro100.c.
12: To use as a module, use the compile-command at the end of the file.
13:
14: The author may be reached as [email protected], or C/O
15: Center of Excellence in Space Data and Information Sciences
16: Code 930.5, NASA Goddard Space Flight Center, Greenbelt MD 20771
17: For updates see
18: <base href="http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html">
19: */
20:
21: static const char *version =
22: "eepro100.c:v0.99B 4/7/98 Donald Becker [email protected]\n";
23:
24: /* A few user-configurable values that apply to all boards.
25: First set are undocumented and spelled per Intel recommendations. */
26:
27: static int congenb = 0; /* Enable congestion control in the DP83840. */
28: static int txfifo = 8; /* Tx FIFO threshold in 4 byte units, 0-15 */
29: static int rxfifo = 8; /* Rx FIFO threshold, default 32 bytes. */
30: /* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */
31: static int txdmacount = 128;
32: static int rxdmacount = 0;
33:
34: /* Set the copy breakpoint for the copy-only-tiny-buffer Rx method.
35: Lower values use more memory, but are faster. */
36: static int rx_copybreak = 200;
37:
38: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
39: static int max_interrupt_work = 20;
40:
41: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */
42: static int multicast_filter_limit = 64;
43:
44: #ifdef MODULE
45: #ifdef MODVERSIONS
46: #include <linux/modversions.h>
47: #endif
48: #include <linux/module.h>
49: #else
50: #define MOD_INC_USE_COUNT
51: #define MOD_DEC_USE_COUNT
52: #endif
53:
54: #include <linux/version.h>
55: #include <linux/kernel.h>
56: #include <linux/sched.h>
57: #include <linux/string.h>
58: #include <linux/timer.h>
59: #include <linux/ptrace.h>
60: #include <linux/errno.h>
61: #include <linux/ioport.h>
62: #include <linux/malloc.h>
63: #include <linux/interrupt.h>
64: #include <linux/pci.h>
65: #include <linux/bios32.h>
66: #include <asm/processor.h> /* Processor type for cache alignment. */
67: #include <asm/bitops.h>
68: #include <asm/io.h>
69: #include <asm/dma.h>
70:
71: #include <linux/netdevice.h>
72: #include <linux/etherdevice.h>
73: #include <linux/skbuff.h>
74: #include <linux/delay.h>
75:
76: /* Unused in the 2.0.* version, but retained for documentation. */
77: #if LINUX_VERSION_CODE > 0x20118
78: MODULE_AUTHOR("Donald Becker <[email protected]>");
79: MODULE_DESCRIPTION("Intel i82557/i82558 EtherExpressPro driver");
80: MODULE_PARM(debug, "i");
81: MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
82: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
83: MODULE_PARM(congenb, "i");
84: MODULE_PARM(txfifo, "i");
85: MODULE_PARM(rxfifo, "i");
86: MODULE_PARM(txdmacount, "i");
87: MODULE_PARM(rxdmacount, "i");
88: MODULE_PARM(rx_copybreak, "i");
89: MODULE_PARM(max_interrupt_work, "i");
90: MODULE_PARM(multicast_filter_limit, "i");
91: #endif
92:
93: #define RUN_AT(x) (jiffies + (x))
94:
95: #if (LINUX_VERSION_CODE < 0x20123)
96: #define test_and_set_bit(val, addr) set_bit(val, addr)
97: #endif
98:
99: /* The total I/O port extent of the board.
100: The registers beyond 0x18 only exist on the i82558. */
101: #define SPEEDO3_TOTAL_SIZE 0x20
102:
103: int speedo_debug = 1;
104:
105: /*
106: Theory of Operation
107:
108: I. Board Compatibility
109:
110: This device driver is designed for the Intel i82557 "Speedo3" chip, Intel's
111: single-chip fast Ethernet controller for PCI, as used on the Intel
112: EtherExpress Pro 100 adapter.
113:
114: II. Board-specific settings
115:
116: PCI bus devices are configured by the system at boot time, so no jumpers
117: need to be set on the board. The system BIOS should be set to assign the
118: PCI INTA signal to an otherwise unused system IRQ line. While it's
119: possible to share PCI interrupt lines, it negatively impacts performance and
120: only recent kernels support it.
121:
122: III. Driver operation
123:
124: IIIA. General
125: The Speedo3 is very similar to other Intel network chips, that is to say
126: "apparently designed on a different planet". This chips retains the complex
127: Rx and Tx descriptors and multiple buffers pointers as previous chips, but
128: also has simplified Tx and Rx buffer modes. This driver uses the "flexible"
129: Tx mode, but in a simplified lower-overhead manner: it associates only a
130: single buffer descriptor with each frame descriptor.
131:
132: Despite the extra space overhead in each receive skbuff, the driver must use
133: the simplified Rx buffer mode to assure that only a single data buffer is
134: associated with each RxFD. The driver implements this by reserving space
135: for the Rx descriptor at the head of each Rx skbuff
136:
137: The Speedo-3 has receive and command unit base addresses that are added to
138: almost all descriptor pointers. The driver sets these to zero, so that all
139: pointer fields are absolute addresses.
140:
141: The System Control Block (SCB) of some previous Intel chips exists on the
142: chip in both PCI I/O and memory space. This driver uses the I/O space
143: registers, but might switch to memory mapped mode to better support non-x86
144: processors.
145:
146: IIIB. Transmit structure
147:
148: The driver must use the complex Tx command+descriptor mode in order to
149: have a indirect pointer to the skbuff data section. Each Tx command block
150: (TxCB) is associated with a single, immediately appended Tx buffer descriptor
151: (TxBD). A fixed ring of these TxCB+TxBD pairs are kept as part of the
152: speedo_private data structure for each adapter instance.
153:
154: This ring structure is used for all normal transmit packets, but the
155: transmit packet descriptors aren't long enough for most non-Tx commands such
156: as CmdConfigure. This is complicated by the possibility that the chip has
157: already loaded the link address in the previous descriptor. So for these
158: commands we convert the next free descriptor on the ring to a NoOp, and point
159: that descriptor's link to the complex command.
160:
161: An additional complexity of these non-transmit commands are that they may be
162: added asynchronous to the normal transmit queue, so we disable interrupts
163: whenever the Tx descriptor ring is manipulated.
164:
165: A notable aspect of these special configure commands is that they do
166: work with the normal Tx ring entry scavenge method. The Tx ring scavenge
167: is done at interrupt time using the 'dirty_tx' index, and checking for the
168: command-complete bit. While the setup frames may have the NoOp command on the
169: Tx ring marked as complete, but not have completed the setup command, this
170: is not a problem. The tx_ring entry can be still safely reused, as the
171: tx_skbuff[] entry is always empty for config_cmd and mc_setup frames.
172:
173: Commands may have bits set e.g. CmdSuspend in the command word to either
174: suspend or stop the transmit/command unit. This driver always flags the last
175: command with CmdSuspend, erases the CmdSuspend in the previous command, and
176: then issues a CU_RESUME.
177: Note: Watch out for the potential race condition here: imagine
178: erasing the previous suspend
179: the chip processes the previous command
180: the chip processes the final command, and suspends
181: doing the CU_RESUME
182: the chip processes the next-yet-valid post-final-command.
183: So blindly sending a CU_RESUME is only safe if we do it immediately after
184: erasing the previous CmdSuspend, without the possibility of an intervening
185: delay. Thus the resume command is always within the interrupts-disabled
186: region. This is a timing dependence, but handling this condition in a
187: timing-independent way would considerably complicate the code.
188:
189: Note: In previous generation Intel chips, restarting the command unit was a
190: notoriously slow process. This is presumably no longer true.
191:
192: IIIC. Receive structure
193:
194: Because of the bus-master support on the Speedo3 this driver uses the new
195: SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer.
196: This scheme allocates full-sized skbuffs as receive buffers. The value
197: SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to
198: trade-off the memory wasted by passing the full-sized skbuff to the queue
199: layer for all frames vs. the copying cost of copying a frame to a
200: correctly-sized skbuff.
201:
202: For small frames the copying cost is negligible (esp. considering that we
203: are pre-loading the cache with immediately useful header information), so we
204: allocate a new, minimally-sized skbuff. For large frames the copying cost
205: is non-trivial, and the larger copy might flush the cache of useful data, so
206: we pass up the skbuff the packet was received into.
207:
208: IIID. Synchronization
209: The driver runs as two independent, single-threaded flows of control. One
210: is the send-packet routine, which enforces single-threaded use by the
211: dev->tbusy flag. The other thread is the interrupt handler, which is single
212: threaded by the hardware and other software.
213:
214: The send packet thread has partial control over the Tx ring and 'dev->tbusy'
215: flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
216: queue slot is empty, it clears the tbusy flag when finished otherwise it sets
217: the 'sp->tx_full' flag.
218:
219: The interrupt handler has exclusive control over the Rx ring and records stats
220: from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
221: we can't avoid the interrupt overhead by having the Tx routine reap the Tx
222: stats.) After reaping the stats, it marks the queue entry as empty by setting
223: the 'base' to zero. Iff the 'sp->tx_full' flag is set, it clears both the
224: tx_full and tbusy flags.
225:
226: IV. Notes
227:
228: Thanks to Steve Williams of Intel for arranging the non-disclosure agreement
229: that stated that I could disclose the information. But I still resent
230: having to sign an Intel NDA when I'm helping Intel sell their own product!
231:
232: */
233:
234: /* A few values that may be tweaked. */
235: /* The ring sizes should be a power of two for efficiency. */
236: #define TX_RING_SIZE 16 /* Effectively 2 entries fewer. */
237: #define RX_RING_SIZE 16
238: /* Size of an pre-allocated Rx buffer: <Ethernet MTU> + slack.*/
239: #define PKT_BUF_SZ 1536
240:
241: /* Time in jiffies before concluding the transmitter is hung. */
242: #define TX_TIMEOUT ((800*HZ)/1000)
243:
244: /* How to wait for the command unit to accept a command.
245: Typically this takes 0 ticks. */
246: static inline void wait_for_cmd_done(int cmd_ioaddr)
247: {
248: short wait = 100;
249: do ;
250: while(inb(cmd_ioaddr) && --wait >= 0);
251: }
252:
253: /* Operational parameter that usually are not changed. */
254:
255: /* The rest of these values should never change. */
256:
257: /* Offsets to the various registers.
258: All accesses need not be longword aligned. */
259: enum speedo_offsets {
260: SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
261: SCBPointer = 4, /* General purpose pointer. */
262: SCBPort = 8, /* Misc. commands and operands. */
263: SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
264: SCBCtrlMDI = 16, /* MDI interface control. */
265: SCBEarlyRx = 20, /* Early receive byte count. */
266: };
267: /* Commands that can be put in a command list entry. */
268: enum commands {
269: CmdNOp = 0, CmdIASetup = 1, CmdConfigure = 2, CmdMulticastList = 3,
270: CmdTx = 4, CmdTDR = 5, CmdDump = 6, CmdDiagnose = 7,
271: CmdSuspend = 0x4000, /* Suspend after completion. */
272: CmdIntr = 0x2000, /* Interrupt after completion. */
273: CmdTxFlex = 0x0008, /* Use "Flexible mode" for CmdTx command. */
274: };
275:
276: /* The SCB accepts the following controls for the Tx and Rx units: */
277: #define CU_START 0x0010
278: #define CU_RESUME 0x0020
279: #define CU_STATSADDR 0x0040
280: #define CU_SHOWSTATS 0x0050 /* Dump statistics counters. */
281: #define CU_CMD_BASE 0x0060 /* Base address to add to add CU commands. */
282: #define CU_DUMPSTATS 0x0070 /* Dump then reset stats counters. */
283:
284: #define RX_START 0x0001
285: #define RX_RESUME 0x0002
286: #define RX_ABORT 0x0004
287: #define RX_ADDR_LOAD 0x0006
288: #define RX_RESUMENR 0x0007
289: #define INT_MASK 0x0100
290: #define DRVR_INT 0x0200 /* Driver generated interrupt. */
291:
292: /* The Speedo3 Rx and Tx frame/buffer descriptors. */
293: struct descriptor { /* A generic descriptor. */
294: s16 status; /* Offset 0. */
295: s16 command; /* Offset 2. */
296: u32 link; /* struct descriptor * */
297: unsigned char params[0];
298: };
299:
300: /* The Speedo3 Rx and Tx buffer descriptors. */
301: struct RxFD { /* Receive frame descriptor. */
302: s32 status;
303: u32 link; /* struct RxFD * */
304: u32 rx_buf_addr; /* void * */
305: u16 count;
306: u16 size;
307: };
308:
309: /* Elements of the RxFD.status word. */
310: #define RX_COMPLETE 0x8000
311:
312: struct TxFD { /* Transmit frame descriptor set. */
313: s32 status;
314: u32 link; /* void * */
315: u32 tx_desc_addr; /* Always points to the tx_buf_addr element. */
316: s32 count; /* # of TBD (=1), Tx start thresh., etc. */
317: /* This constitutes a single "TBD" entry -- we only use one. */
318: u32 tx_buf_addr; /* void *, frame to be transmitted. */
319: s32 tx_buf_size; /* Length of Tx frame. */
320: };
321:
322: /* Elements of the dump_statistics block. This block must be lword aligned. */
323: struct speedo_stats {
324: u32 tx_good_frames;
325: u32 tx_coll16_errs;
326: u32 tx_late_colls;
327: u32 tx_underruns;
328: u32 tx_lost_carrier;
329: u32 tx_deferred;
330: u32 tx_one_colls;
331: u32 tx_multi_colls;
332: u32 tx_total_colls;
333: u32 rx_good_frames;
334: u32 rx_crc_errs;
335: u32 rx_align_errs;
336: u32 rx_resource_errs;
337: u32 rx_overrun_errs;
338: u32 rx_colls_errs;
339: u32 rx_runt_errs;
340: u32 done_marker;
341: };
342:
343: struct speedo_private {
344: char devname[8]; /* Used only for kernel debugging. */
345: const char *product_name;
346: struct device *next_module;
347: struct TxFD tx_ring[TX_RING_SIZE]; /* Commands (usually CmdTxPacket). */
348: /* The saved address of a sent-in-place packet/buffer, for skfree(). */
349: struct sk_buff* tx_skbuff[TX_RING_SIZE];
350: struct descriptor *last_cmd; /* Last command sent. */
351: /* Rx descriptor ring & addresses of receive-in-place skbuffs. */
352: struct RxFD *rx_ringp[RX_RING_SIZE];
353: struct sk_buff* rx_skbuff[RX_RING_SIZE];
354: struct RxFD *last_rxf; /* Last command sent. */
355: struct enet_statistics stats;
356: struct speedo_stats lstats;
357: struct timer_list timer; /* Media selection timer. */
358: long last_rx_time; /* Last Rx, in jiffies, to handle Rx hang. */
359: unsigned int cur_rx, cur_tx; /* The next free ring entry */
360: unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
361: struct descriptor config_cmd; /* A configure command, with header... */
362: u8 config_cmd_data[22]; /* .. and setup parameters. */
363: int mc_setup_frm_len; /* The length of an allocated.. */
364: struct descriptor *mc_setup_frm; /* ..multicast setup frame. */
365: int in_interrupt; /* Word-aligned dev->interrupt */
366: char rx_mode; /* Current PROMISC/ALLMULTI setting. */
367: unsigned int tx_full:1; /* The Tx queue is full. */
368: unsigned int full_duplex:1; /* Full-duplex operation requested. */
369: unsigned int default_port:1; /* Last dev->if_port value. */
370: unsigned int rx_bug:1; /* Work around receiver hang errata. */
371: unsigned int rx_bug10:1; /* Receiver might hang at 10mbps. */
372: unsigned int rx_bug100:1; /* Receiver might hang at 100mbps. */
373: unsigned short phy[2]; /* PHY media interfaces available. */
374: };
375:
376: /* The parameters for a CmdConfigure operation.
377: There are so many options that it would be difficult to document each bit.
378: We mostly use the default or recommended settings. */
379: const char basic_config_cmd[22] = {
380: 22, 0x08, 0, 0, 0, 0x80, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */
381: 0, 0x2E, 0, 0x60, 0,
382: 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */
383: 0x3f, 0x05, };
384:
385: /* PHY media interface chips. */
386: static const char *phys[] = {
387: "None", "i82553-A/B", "i82553-C", "i82503",
388: "DP83840", "80c240", "80c24", "i82555",
389: "unknown-8", "unknown-9", "DP83840A", "unknown-11",
390: "unknown-12", "unknown-13", "unknown-14", "unknown-15", };
391: enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,
392: S80C24, I82555, DP83840A=10, };
393: static const char is_mii[] = { 0, 1, 1, 0, 1, 1, 0, 1 };
394:
395: static void speedo_found1(struct device *dev, int ioaddr, int irq,
396: int card_idx);
397:
398: static int read_eeprom(int ioaddr, int location);
399: static int mdio_read(int ioaddr, int phy_id, int location);
400: static int mdio_write(int ioaddr, int phy_id, int location, int value);
401: static int speedo_open(struct device *dev);
402: static void speedo_timer(unsigned long data);
403: static void speedo_init_rx_ring(struct device *dev);
404: static int speedo_start_xmit(struct sk_buff *skb, struct device *dev);
405: static int speedo_rx(struct device *dev);
406: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
407: static int speedo_close(struct device *dev);
408: static struct enet_statistics *speedo_get_stats(struct device *dev);
409: static int speedo_ioctl(struct device *dev, struct ifreq *rq, int cmd);
410: static void set_rx_mode(struct device *dev);
411:
412:
413:
414: /* The parameters that may be passed in... */
415: /* 'options' is used to pass a transceiver override or full-duplex flag
416: e.g. "options=16" for FD, "options=32" for 100mbps-only. */
417: static int full_duplex[] = {-1, -1, -1, -1, -1, -1, -1, -1};
418: static int options[] = {-1, -1, -1, -1, -1, -1, -1, -1};
419: #ifdef MODULE
420: static int debug = -1; /* The debug level */
421: #endif
422:
423: /* A list of all installed Speedo devices, for removing the driver module. */
424: static struct device *root_speedo_dev = NULL;
425:
426: int eepro100_init(struct device *dev)
427: {
428: int cards_found = 0;
429:
430: if (pcibios_present()) {
431: static int pci_index = 0;
432: for (; pci_index < 8; pci_index++) {
433: unsigned char pci_bus, pci_device_fn, pci_irq_line, pci_latency;
434: int pci_ioaddr;
435:
436: unsigned short pci_command, new_command;
437:
438: if (pcibios_find_device(PCI_VENDOR_ID_INTEL,
439: PCI_DEVICE_ID_INTEL_82557,
440: pci_index, &pci_bus,
441: &pci_device_fn))
442: break;
443: pcibios_read_config_byte(pci_bus, pci_device_fn,
444: PCI_INTERRUPT_LINE, &pci_irq_line);
445: /* Note: BASE_ADDRESS_0 is for memory-mapping the registers. */
446: pcibios_read_config_dword(pci_bus, pci_device_fn,
447: PCI_BASE_ADDRESS_1, &pci_ioaddr);
448: /* Remove I/O space marker in bit 0. */
449: pci_ioaddr &= ~3;
450: if (speedo_debug > 2)
451: printk("Found Intel i82557 PCI Speedo at I/O %#x, IRQ %d.\n",
452: (int)pci_ioaddr, pci_irq_line);
453:
454: /* Get and check the bus-master and latency values. */
455: pcibios_read_config_word(pci_bus, pci_device_fn,
456: PCI_COMMAND, &pci_command);
457: new_command = pci_command | PCI_COMMAND_MASTER|PCI_COMMAND_IO;
458: if (pci_command != new_command) {
459: printk(KERN_INFO " The PCI BIOS has not enabled this"
460: " device! Updating PCI command %4.4x->%4.4x.\n",
461: pci_command, new_command);
462: pcibios_write_config_word(pci_bus, pci_device_fn,
463: PCI_COMMAND, new_command);
464: }
465: pcibios_read_config_byte(pci_bus, pci_device_fn,
466: PCI_LATENCY_TIMER, &pci_latency);
467: if (pci_latency < 32) {
468: printk(" PCI latency timer (CFLT) is unreasonably low at %d."
469: " Setting to 32 clocks.\n", pci_latency);
470: pcibios_write_config_byte(pci_bus, pci_device_fn,
471: PCI_LATENCY_TIMER, 32);
472: } else if (speedo_debug > 1)
473: printk(" PCI latency timer (CFLT) is %#x.\n", pci_latency);
474:
475: speedo_found1(dev, pci_ioaddr, pci_irq_line, cards_found);
476: dev = NULL;
477: cards_found++;
478: }
479: }
480:
481: return cards_found;
482: }
483:
484: static void speedo_found1(struct device *dev, int ioaddr, int irq,
485: int card_idx)
486: {
487: static int did_version = 0; /* Already printed version info. */
488: struct speedo_private *sp;
489: char *product;
490: int i, option;
491: u16 eeprom[0x40];
492:
493: if (speedo_debug > 0 && did_version++ == 0)
494: printk(version);
495:
496: dev = init_etherdev(dev, sizeof(struct speedo_private));
497:
498: if (dev->mem_start > 0)
499: option = dev->mem_start;
500: else if (card_idx >= 0 && options[card_idx] >= 0)
501: option = options[card_idx];
502: else
503: option = 0;
504:
505: /* Read the station address EEPROM before doing the reset.
506: Perhaps this should even be done before accepting the device,
507: then we wouldn't have a device name with which to report the error. */
508: {
509: u16 sum = 0;
510: int j;
511: for (j = 0, i = 0; i < 0x40; i++) {
512: u16 value = read_eeprom(ioaddr, i);
513: eeprom[i] = value;
514: sum += value;
515: if (i < 3) {
516: dev->dev_addr[j++] = value;
517: dev->dev_addr[j++] = value >> 8;
518: }
519: }
520: if (sum != 0xBABA)
521: printk(KERN_WARNING "%s: Invalid EEPROM checksum %#4.4x, "
522: "check settings before activating this device!\n",
523: dev->name, sum);
524: /* Don't unregister_netdev(dev); as the EEPro may actually be
525: usable, especially if the MAC address is set later. */
526: }
527:
528: /* Reset the chip: stop Tx and Rx processes and clear counters.
529: This takes less than 10usec and will easily finish before the next
530: action. */
531: outl(0, ioaddr + SCBPort);
532:
533: if (eeprom[3] & 0x0100)
534: product = "OEM i82557/i82558 10/100 Ethernet";
535: else
536: product = "Intel EtherExpress Pro 10/100";
537:
538: printk(KERN_INFO "%s: %s at %#3x, ", dev->name, product, ioaddr);
539:
540: for (i = 0; i < 5; i++)
541: printk("%2.2X:", dev->dev_addr[i]);
542: printk("%2.2X, IRQ %d.\n", dev->dev_addr[i], irq);
543:
544: #ifndef kernel_bloat
545: /* OK, this is pure kernel bloat. I don't like it when other drivers
546: waste non-pageable kernel space to emit similar messages, but I need
547: them for bug reports. */
548: {
549: const char *connectors[] = {" RJ45", " BNC", " AUI", " MII"};
550: /* The self-test results must be paragraph aligned. */
551: s32 str[6], *volatile self_test_results;
552: int boguscnt = 16000; /* Timeout for set-test. */
553: if (eeprom[3] & 0x03)
554: printk(KERN_INFO " Receiver lock-up bug exists -- enabling"
555: " work-around.\n");
556: printk(KERN_INFO " Board assembly %4.4x%2.2x-%3.3d, Physical"
557: " connectors present:",
558: eeprom[8], eeprom[9]>>8, eeprom[9] & 0xff);
559: for (i = 0; i < 4; i++)
560: if (eeprom[5] & (1<<i))
561: printk(connectors[i]);
562: printk("\n"KERN_INFO" Primary interface chip %s PHY #%d.\n",
563: phys[(eeprom[6]>>8)&15], eeprom[6] & 0x1f);
564: if (eeprom[7] & 0x0700)
565: printk(KERN_INFO " Secondary interface chip %s.\n",
566: phys[(eeprom[7]>>8)&7]);
567: if (((eeprom[6]>>8) & 0x3f) == DP83840
568: || ((eeprom[6]>>8) & 0x3f) == DP83840A) {
569: int mdi_reg23 = mdio_read(ioaddr, eeprom[6] & 0x1f, 23) | 0x0422;
570: if (congenb)
571: mdi_reg23 |= 0x0100;
572: printk(KERN_INFO" DP83840 specific setup, setting register 23 to %4.4x.\n",
573: mdi_reg23);
574: mdio_write(ioaddr, eeprom[6] & 0x1f, 23, mdi_reg23);
575: }
576: if ((option >= 0) && (option & 0x70)) {
577: printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n",
578: (option & 0x20 ? 100 : 10),
579: (option & 0x10 ? "full" : "half"));
580: mdio_write(ioaddr, eeprom[6] & 0x1f, 0,
581: ((option & 0x20) ? 0x2000 : 0) | /* 100mbps? */
582: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
583: }
584:
585: /* Perform a system self-test. */
586: self_test_results = (s32*) ((((long) str) + 15) & ~0xf);
587: self_test_results[0] = 0;
588: self_test_results[1] = -1;
589: outl(virt_to_bus(self_test_results) | 1, ioaddr + SCBPort);
590: do {
591: udelay(10);
592: } while (self_test_results[1] == -1 && --boguscnt >= 0);
593:
594: if (boguscnt < 0) { /* Test optimized out. */
595: printk(KERN_ERR "Self test failed, status %8.8x:\n"
596: KERN_ERR " Failure to initialize the i82557.\n"
597: KERN_ERR " Verify that the card is a bus-master"
598: " capable slot.\n",
599: self_test_results[1]);
600: } else
601: printk(KERN_INFO " General self-test: %s.\n"
602: KERN_INFO " Serial sub-system self-test: %s.\n"
603: KERN_INFO " Internal registers self-test: %s.\n"
604: KERN_INFO " ROM checksum self-test: %s (%#8.8x).\n",
605: self_test_results[1] & 0x1000 ? "failed" : "passed",
606: self_test_results[1] & 0x0020 ? "failed" : "passed",
607: self_test_results[1] & 0x0008 ? "failed" : "passed",
608: self_test_results[1] & 0x0004 ? "failed" : "passed",
609: self_test_results[0]);
610: }
611: #endif /* kernel_bloat */
612:
613: outl(0, ioaddr + SCBPort);
614:
615: /* We do a request_region() only to register /proc/ioports info. */
616: request_region(ioaddr, SPEEDO3_TOTAL_SIZE, "Intel Speedo3 Ethernet");
617:
618: dev->base_addr = ioaddr;
619: dev->irq = irq;
620:
621: if (dev->priv == NULL)
622: dev->priv = kmalloc(sizeof(*sp), GFP_KERNEL);
623: sp = dev->priv;
624: memset(sp, 0, sizeof(*sp));
625: sp->next_module = root_speedo_dev;
626: root_speedo_dev = dev;
627:
628: sp->full_duplex = option >= 0 && (option & 0x10) ? 1 : 0;
629: if (card_idx >= 0) {
630: if (full_duplex[card_idx] >= 0)
631: sp->full_duplex = full_duplex[card_idx];
632: }
633: sp->default_port = option >= 0 ? (option & 0x0f) : 0;
634:
635: sp->phy[0] = eeprom[6];
636: sp->phy[1] = eeprom[7];
637: sp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1;
638:
639: if (sp->rx_bug)
640: printk(KERN_INFO " Receiver lock-up workaround activated.\n");
641:
642: /* The Speedo-specific entries in the device structure. */
643: dev->open = &speedo_open;
644: dev->hard_start_xmit = &speedo_start_xmit;
645: dev->stop = &speedo_close;
646: dev->get_stats = &speedo_get_stats;
647: dev->set_multicast_list = &set_rx_mode;
648: dev->do_ioctl = &speedo_ioctl;
649:
650: return;
651: }
652:
653: /* Serial EEPROM section.
654: A "bit" grungy, but we work our way through bit-by-bit :->. */
655: /* EEPROM_Ctrl bits. */
656: #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
657: #define EE_CS 0x02 /* EEPROM chip select. */
658: #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
659: #define EE_WRITE_0 0x01
660: #define EE_WRITE_1 0x05
661: #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
662: #define EE_ENB (0x4800 | EE_CS)
663:
664: /* Delay between EEPROM clock transitions.
665: This will actually work with no delay on 33Mhz PCI. */
666: #define eeprom_delay(nanosec) udelay(1);
667:
668: /* The EEPROM commands include the alway-set leading bit. */
669: #define EE_WRITE_CMD (5 << 6)
670: #define EE_READ_CMD (6 << 6)
671: #define EE_ERASE_CMD (7 << 6)
672:
673: static int read_eeprom(int ioaddr, int location)
674: {
675: int i;
676: unsigned short retval = 0;
677: int ee_addr = ioaddr + SCBeeprom;
678: int read_cmd = location | EE_READ_CMD;
679:
680: outw(EE_ENB & ~EE_CS, ee_addr);
681: outw(EE_ENB, ee_addr);
682:
683: /* Shift the read command bits out. */
684: for (i = 10; i >= 0; i--) {
685: short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
686: outw(EE_ENB | dataval, ee_addr);
687: eeprom_delay(100);
688: outw(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
689: eeprom_delay(150);
690: }
691: outw(EE_ENB, ee_addr);
692:
693: for (i = 15; i >= 0; i--) {
694: outw(EE_ENB | EE_SHIFT_CLK, ee_addr);
695: eeprom_delay(100);
696: retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
697: outw(EE_ENB, ee_addr);
698: eeprom_delay(100);
699: }
700:
701: /* Terminate the EEPROM access. */
702: outw(EE_ENB & ~EE_CS, ee_addr);
703: return retval;
704: }
705:
706: static int mdio_read(int ioaddr, int phy_id, int location)
707: {
708: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
709: outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);
710: do {
711: val = inl(ioaddr + SCBCtrlMDI);
712: if (--boguscnt < 0) {
713: printk(KERN_ERR " mdio_read() timed out with val = %8.8x.\n", val);
714: }
715: } while (! (val & 0x10000000));
716: return val & 0xffff;
717: }
718:
719: static int mdio_write(int ioaddr, int phy_id, int location, int value)
720: {
721: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
722: outl(0x04000000 | (location<<16) | (phy_id<<21) | value,
723: ioaddr + SCBCtrlMDI);
724: do {
725: val = inl(ioaddr + SCBCtrlMDI);
726: if (--boguscnt < 0) {
727: printk(KERN_ERR" mdio_write() timed out with val = %8.8x.\n", val);
728: }
729: } while (! (val & 0x10000000));
730: return val & 0xffff;
731: }
732:
733:
734: static int
735: speedo_open(struct device *dev)
736: {
737: struct speedo_private *sp = (struct speedo_private *)dev->priv;
738: int ioaddr = dev->base_addr;
739:
740: #ifdef notdef
741: /* We could reset the chip, but should not need to. */
742: outl(0, ioaddr + SCBPort);
743: udelay(10);
744: #endif
745:
746: if (request_irq(dev->irq, &speedo_interrupt, SA_SHIRQ,
747: "Intel EtherExpress Pro 10/100 Ethernet", dev)) {
748: return -EAGAIN;
749: }
750: if (speedo_debug > 1)
751: printk(KERN_DEBUG "%s: speedo_open() irq %d.\n", dev->name, dev->irq);
752:
753: MOD_INC_USE_COUNT;
754:
755: /* Load the statistics block address. */
756: wait_for_cmd_done(ioaddr + SCBCmd);
757: outl(virt_to_bus(&sp->lstats), ioaddr + SCBPointer);
758: outw(INT_MASK | CU_STATSADDR, ioaddr + SCBCmd);
759: sp->lstats.done_marker = 0;
760:
761: speedo_init_rx_ring(dev);
762: wait_for_cmd_done(ioaddr + SCBCmd);
763: outl(0, ioaddr + SCBPointer);
764: outw(INT_MASK | RX_ADDR_LOAD, ioaddr + SCBCmd);
765:
766: /* Todo: verify that we must wait for previous command completion. */
767: wait_for_cmd_done(ioaddr + SCBCmd);
768: outl(virt_to_bus(sp->rx_ringp[0]), ioaddr + SCBPointer);
769: outw(INT_MASK | RX_START, ioaddr + SCBCmd);
770:
771: /* Fill the first command with our physical address. */
772: {
773: u16 *eaddrs = (u16 *)dev->dev_addr;
774: u16 *setup_frm = (u16 *)&(sp->tx_ring[0].tx_desc_addr);
775:
776: /* Avoid a bug(?!) here by marking the command already completed. */
777: sp->tx_ring[0].status = ((CmdSuspend | CmdIASetup) << 16) | 0xa000;
778: sp->tx_ring[0].link = virt_to_bus(&(sp->tx_ring[1]));
779: *setup_frm++ = eaddrs[0];
780: *setup_frm++ = eaddrs[1];
781: *setup_frm++ = eaddrs[2];
782: }
783: sp->last_cmd = (struct descriptor *)&sp->tx_ring[0];
784: sp->cur_tx = 1;
785: sp->dirty_tx = 0;
786: sp->tx_full = 0;
787:
788: wait_for_cmd_done(ioaddr + SCBCmd);
789: outl(0, ioaddr + SCBPointer);
790: outw(INT_MASK | CU_CMD_BASE, ioaddr + SCBCmd);
791:
792: dev->if_port = sp->default_port;
793:
794: sp->in_interrupt = 0;
795: dev->tbusy = 0;
796: dev->interrupt = 0;
797: dev->start = 1;
798:
799: /* Start the chip's Tx process and unmask interrupts. */
800: /* Todo: verify that we must wait for previous command completion. */
801: wait_for_cmd_done(ioaddr + SCBCmd);
802: outl(virt_to_bus(&sp->tx_ring[0]), ioaddr + SCBPointer);
803: outw(CU_START, ioaddr + SCBCmd);
804:
805: /* Setup the chip and configure the multicast list. */
806: sp->mc_setup_frm = NULL;
807: sp->mc_setup_frm_len = 0;
808: sp->rx_mode = -1; /* Invalid -> always reset the mode. */
809: set_rx_mode(dev);
810:
811: if (speedo_debug > 2) {
812: printk(KERN_DEBUG "%s: Done speedo_open(), status %8.8x.\n",
813: dev->name, inw(ioaddr + SCBStatus));
814: }
815: /* Set the timer. The timer serves a dual purpose:
816: 1) to monitor the media interface (e.g. link beat) and perhaps switch
817: to an alternate media type
818: 2) to monitor Rx activity, and restart the Rx process if the receiver
819: hangs. */
820: init_timer(&sp->timer);
821: sp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
822: sp->timer.data = (unsigned long)dev;
823: sp->timer.function = &speedo_timer; /* timer handler */
824: add_timer(&sp->timer);
825:
826: wait_for_cmd_done(ioaddr + SCBCmd);
827: outw(CU_DUMPSTATS, ioaddr + SCBCmd);
828: return 0;
829: }
830:
831: /* Media monitoring and control. */
832: static void speedo_timer(unsigned long data)
833: {
834: struct device *dev = (struct device *)data;
835: struct speedo_private *sp = (struct speedo_private *)dev->priv;
836: int tickssofar = jiffies - sp->last_rx_time;
837:
838: if (speedo_debug > 3) {
839: int ioaddr = dev->base_addr;
840: printk(KERN_DEBUG "%s: Media selection tick, status %4.4x.\n",
841: dev->name, inw(ioaddr + SCBStatus));
842: }
843: if (sp->rx_bug) {
844: if (tickssofar > 2*HZ || sp->rx_mode < 0) {
845: /* We haven't received a packet in a Long Time. We might have been
846: bitten by the receiver hang bug. This can be cleared by sending
847: a set multicast list command. */
848: set_rx_mode(dev);
849: }
850: /* We must continue to monitor the media. */
851: sp->timer.expires = RUN_AT(2*HZ); /* 2.0 sec. */
852: add_timer(&sp->timer);
853: }
854: }
855:
856: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
857: static void
858: speedo_init_rx_ring(struct device *dev)
859: {
860: struct speedo_private *sp = (struct speedo_private *)dev->priv;
861: struct RxFD *rxf, *last_rxf = NULL;
862: int i;
863:
864: sp->cur_rx = 0;
865: sp->dirty_rx = RX_RING_SIZE - 1;
866:
867: for (i = 0; i < RX_RING_SIZE; i++) {
868: struct sk_buff *skb;
869: skb = alloc_skb(PKT_BUF_SZ, GFP_ATOMIC);
870: sp->rx_skbuff[i] = skb;
871: if (skb == NULL)
872: break; /* Bad news! */
873: skb->dev = dev; /* Mark as being used by this device. */
874:
875: rxf = (struct RxFD *)skb->tail;
876: skb_reserve(skb, sizeof(struct RxFD));
877: sp->rx_ringp[i] = rxf;
878: if (last_rxf)
879: last_rxf->link = virt_to_bus(rxf);
880: last_rxf = rxf;
881: rxf->status = 0x00000001; /* '1' is flag value only. */
882: rxf->link = 0; /* None yet. */
883: /* This field unused by i82557, we use it as a consistency check. */
884: rxf->rx_buf_addr = virt_to_bus(skb->tail);
885:
886: rxf->count = 0;
887: rxf->size = PKT_BUF_SZ;
888: }
889: /* Mark the last entry as end-of-list. */
890: last_rxf->status = 0xC0000002; /* '2' is flag value only. */
891: sp->last_rxf = last_rxf;
892: }
893:
894: static void speedo_tx_timeout(struct device *dev)
895: {
896: struct speedo_private *sp = (struct speedo_private *)dev->priv;
897: int ioaddr = dev->base_addr;
898:
899: printk(KERN_WARNING "%s: Transmit timed out: status %4.4x "
900: "command %4.4x.\n",
901: dev->name, inw(ioaddr + SCBStatus), inw(ioaddr + SCBCmd));
902:
903: if ((inw(ioaddr + SCBStatus) & 0x00C0) != 0x0080) {
904: printk(KERN_WARNING "%s: Trying to restart the transmitter...\n",
905: dev->name);
906: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]),
907: ioaddr + SCBPointer);
908: outw(CU_START, ioaddr + SCBCmd);
909: } else {
910: outw(DRVR_INT, ioaddr + SCBCmd);
911: }
912: /* Reset the MII transceiver, suggested by Fred Young @ scalable.com. */
913: if ((sp->phy[0] & 0x8000) == 0) {
914: int phy_addr = sp->phy[0] & 0x1f;
915: mdio_write(ioaddr, phy_addr, 0, 0x0400);
916: mdio_write(ioaddr, phy_addr, 1, 0x0000);
917: mdio_write(ioaddr, phy_addr, 4, 0x0000);
918: mdio_write(ioaddr, phy_addr, 0, 0x8000);
919: }
920: sp->stats.tx_errors++;
921: dev->trans_start = jiffies;
922: return;
923: }
924:
925: static int
926: speedo_start_xmit(struct sk_buff *skb, struct device *dev)
927: {
928: struct speedo_private *sp = (struct speedo_private *)dev->priv;
929: int ioaddr = dev->base_addr;
930: int entry;
931:
932: /* Block a timer-based transmit from overlapping. This could better be
933: done with atomic_swap(1, dev->tbusy), but set_bit() works as well.
934: If this ever occurs the queue layer is doing something evil! */
935: if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
936: int tickssofar = jiffies - dev->trans_start;
937: if (tickssofar < TX_TIMEOUT - 2)
938: return 1;
939: if (tickssofar < TX_TIMEOUT) {
940: /* Reap sent packets from the full Tx queue. */
941: outw(DRVR_INT, ioaddr + SCBCmd);
942: return 1;
943: }
944: speedo_tx_timeout(dev);
945: return 1;
946: }
947:
948: /* Caution: the write order is important here, set the base address
949: with the "ownership" bits last. */
950:
951: { /* Prevent interrupts from changing the Tx ring from underneath us. */
952: unsigned long flags;
953:
954: save_flags(flags);
955: cli();
956: /* Calculate the Tx descriptor entry. */
957: entry = sp->cur_tx++ % TX_RING_SIZE;
958:
959: sp->tx_skbuff[entry] = skb;
960: /* Todo: be a little more clever about setting the interrupt bit. */
961: sp->tx_ring[entry].status =
962: (CmdSuspend | CmdTx | CmdTxFlex) << 16;
963: sp->tx_ring[entry].link =
964: virt_to_bus(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
965: sp->tx_ring[entry].tx_desc_addr =
966: virt_to_bus(&sp->tx_ring[entry].tx_buf_addr);
967: /* The data region is always in one buffer descriptor, Tx FIFO
968: threshold of 256. */
969: sp->tx_ring[entry].count = 0x01208000;
970: sp->tx_ring[entry].tx_buf_addr = virt_to_bus(skb->data);
971: sp->tx_ring[entry].tx_buf_size = skb->len;
972: /* Todo: perhaps leave the interrupt bit set if the Tx queue is more
973: than half full. Argument against: we should be receiving packets
974: and scavenging the queue. Argument for: if so, it shouldn't
975: matter. */
976: sp->last_cmd->command &= ~(CmdSuspend | CmdIntr);
977: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
978: /* Trigger the command unit resume. */
979: wait_for_cmd_done(ioaddr + SCBCmd);
980: outw(CU_RESUME, ioaddr + SCBCmd);
981: restore_flags(flags);
982: }
983:
984: /* Leave room for set_rx_mode() to fill two entries. */
985: if (sp->cur_tx - sp->dirty_tx > TX_RING_SIZE - 3)
986: sp->tx_full = 1;
987: else
988: clear_bit(0, (void*)&dev->tbusy);
989:
990: dev->trans_start = jiffies;
991:
992: return 0;
993: }
994:
995: /* The interrupt handler does all of the Rx thread work and cleans up
996: after the Tx thread. */
997: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
998: {
999: struct device *dev = (struct device *)dev_instance;
1000: struct speedo_private *sp;
1001: int ioaddr, boguscnt = max_interrupt_work;
1002: unsigned short status;
1003:
1004: #ifndef final_version
1005: if (dev == NULL) {
1006: printk(KERN_ERR "speedo_interrupt(): irq %d for unknown device.\n", irq);
1007: return;
1008: }
1009: #endif
1010:
1011: ioaddr = dev->base_addr;
1012: sp = (struct speedo_private *)dev->priv;
1013: #ifndef final_version
1014: /* A lock to prevent simultaneous entry on SMP machines. */
1015: if (test_and_set_bit(0, (void*)&sp->in_interrupt)) {
1016: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
1017: dev->name);
1018: return;
1019: }
1020: dev->interrupt = 1;
1021: #endif
1022:
1023: do {
1024: status = inw(ioaddr + SCBStatus);
1025: /* Acknowledge all of the current interrupt sources ASAP. */
1026: outw(status & 0xfc00, ioaddr + SCBStatus);
1027:
1028: if (speedo_debug > 4)
1029: printk(KERN_DEBUG "%s: interrupt status=%#4.4x.\n",
1030: dev->name, status);
1031:
1032: if ((status & 0xfc00) == 0)
1033: break;
1034:
1035: if (status & 0x4000) /* Packet received. */
1036: speedo_rx(dev);
1037:
1038: if (status & 0x1000) {
1039: if ((status & 0x003c) == 0x0028) /* No more Rx buffers. */
1040: outw(RX_RESUMENR, ioaddr + SCBCmd);
1041: else if ((status & 0x003c) == 0x0008) { /* No resources (why?!) */
1042: /* No idea of what went wrong. Restart the receiver. */
1043: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1044: ioaddr + SCBPointer);
1045: outw(RX_START, ioaddr + SCBCmd);
1046: }
1047: sp->stats.rx_errors++;
1048: }
1049:
1050: /* User interrupt, Command/Tx unit interrupt or CU not active. */
1051: if (status & 0xA400) {
1052: unsigned int dirty_tx = sp->dirty_tx;
1053:
1054: while (sp->cur_tx - dirty_tx > 0) {
1055: int entry = dirty_tx % TX_RING_SIZE;
1056: int status = sp->tx_ring[entry].status;
1057:
1058: if (speedo_debug > 5)
1059: printk(KERN_DEBUG " scavenge candidate %d status %4.4x.\n",
1060: entry, status);
1061: if ((status & 0x8000) == 0)
1062: break; /* It still hasn't been processed. */
1063: /* Free the original skb. */
1064: if (sp->tx_skbuff[entry]) {
1065: sp->stats.tx_packets++; /* Count only user packets. */
1066: dev_kfree_skb(sp->tx_skbuff[entry], FREE_WRITE);
1067: sp->tx_skbuff[entry] = 0;
1068: }
1069: dirty_tx++;
1070: }
1071:
1072: #ifndef final_version
1073: if (sp->cur_tx - dirty_tx > TX_RING_SIZE) {
1074: printk(KERN_ERR "out-of-sync dirty pointer, %d vs. %d,"
1075: " full=%d.\n",
1076: dirty_tx, sp->cur_tx, sp->tx_full);
1077: dirty_tx += TX_RING_SIZE;
1078: }
1079: #endif
1080:
1081: if (sp->tx_full && dev->tbusy
1082: && dirty_tx > sp->cur_tx - TX_RING_SIZE + 2) {
1083: /* The ring is no longer full, clear tbusy. */
1084: sp->tx_full = 0;
1085: clear_bit(0, (void*)&dev->tbusy);
1086: mark_bh(NET_BH);
1087: }
1088:
1089: sp->dirty_tx = dirty_tx;
1090: }
1091:
1092: if (--boguscnt < 0) {
1093: printk(KERN_ERR "%s: Too much work at interrupt, status=0x%4.4x.\n",
1094: dev->name, status);
1095: /* Clear all interrupt sources. */
1096: outl(0xfc00, ioaddr + SCBStatus);
1097: break;
1098: }
1099: } while (1);
1100:
1101: if (speedo_debug > 3)
1102: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1103: dev->name, inw(ioaddr + SCBStatus));
1104:
1105: dev->interrupt = 0;
1106: clear_bit(0, (void*)&sp->in_interrupt);
1107: return;
1108: }
1109:
1110: static int
1111: speedo_rx(struct device *dev)
1112: {
1113: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1114: int entry = sp->cur_rx % RX_RING_SIZE;
1115: int status;
1116:
1117: if (speedo_debug > 4)
1118: printk(KERN_DEBUG " In speedo_rx().\n");
1119: /* If we own the next entry, it's a new packet. Send it up. */
1120: while ((status = sp->rx_ringp[entry]->status) & RX_COMPLETE) {
1121:
1122: if (speedo_debug > 4)
1123: printk(KERN_DEBUG " speedo_rx() status %8.8x len %d.\n", status,
1124: sp->rx_ringp[entry]->count & 0x3fff);
1125: if (status & 0x0200) {
1126: printk(KERN_ERR "%s: Ethernet frame overran the Rx buffer, "
1127: "status %8.8x!\n", dev->name, status);
1128: } else if ( ! (status & 0x2000)) {
1129: /* There was a fatal error. This *should* be impossible. */
1130: sp->stats.rx_errors++;
1131: printk(KERN_ERR "%s: Anomalous event in speedo_rx(), status %8.8x.\n",
1132: dev->name, status);
1133: } else {
1134: /* Malloc up new buffer, compatible with net-2e. */
1135: int pkt_len = sp->rx_ringp[entry]->count & 0x3fff;
1136: struct sk_buff *skb;
1137: int rx_in_place = 0;
1138:
1139: /* Check if the packet is long enough to just accept without
1140: copying to a properly sized skbuff. */
1141: if (pkt_len > rx_copybreak) {
1142: struct sk_buff *newskb;
1143: char *temp;
1144:
1145: /* Pass up the skb already on the Rx ring. */
1146: skb = sp->rx_skbuff[entry];
1147: temp = skb_put(skb, pkt_len);
1148: if (bus_to_virt(sp->rx_ringp[entry]->rx_buf_addr) != temp)
1149: printk(KERN_ERR "%s: Warning -- the skbuff addresses do not match"
1150: " in speedo_rx: %8.8x vs. %p / %p.\n", dev->name,
1151: sp->rx_ringp[entry]->rx_buf_addr, skb->head, temp);
1152: /* Get a fresh skbuff to replace the filled one. */
1153: newskb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD));
1154:
1155: if (newskb) {
1156: struct RxFD *rxf;
1157: rx_in_place = 1;
1158: sp->rx_skbuff[entry] = newskb;
1159: newskb->dev = dev;
1160: rxf = sp->rx_ringp[entry] = (struct RxFD *)newskb->tail;
1161: skb_reserve(newskb, sizeof(struct RxFD));
1162: /* Unused by i82557, consistency check only. */
1163: rxf->rx_buf_addr = virt_to_bus(newskb->tail);
1164: rxf->status = 0x00000001;
1165: } else /* No memory, drop the packet. */
1166: skb = 0;
1167: } else
1168: skb = dev_alloc_skb(pkt_len + 2);
1169: if (skb == NULL) {
1170: int i;
1171: printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n", dev->name);
1172: /* Check that at least two ring entries are free.
1173: If not, free one and mark stats->rx_dropped++. */
1174: /* ToDo: This is not correct!!!! We should count the number
1175: of linked-in Rx buffer to very that we have at least two
1176: remaining. */
1177: for (i = 0; i < RX_RING_SIZE; i++)
1178: if (! ((sp->rx_ringp[(entry+i) % RX_RING_SIZE]->status)
1179: & RX_COMPLETE))
1180: break;
1181:
1182: if (i > RX_RING_SIZE -2) {
1183: sp->stats.rx_dropped++;
1184: sp->rx_ringp[entry]->status = 0;
1185: sp->cur_rx++;
1186: }
1187: break;
1188: }
1189: skb->dev = dev;
1190: if (! rx_in_place) {
1191: skb_reserve(skb, 2); /* 16 byte align the data fields */
1192: #if defined(__i386) && notyet
1193: /* Packet is in one chunk -- we can copy + cksum. */
1194: eth_io_copy_and_sum(skb, bus_to_virt(sp->rx_ringp[entry]->rx_buf_addr),
1195: pkt_len, 0);
1196: #else
1197: memcpy(skb_put(skb, pkt_len),
1198: bus_to_virt(sp->rx_ringp[entry]->rx_buf_addr), pkt_len);
1199: #endif
1200: }
1201: skb->protocol = eth_type_trans(skb, dev);
1202: netif_rx(skb);
1203: sp->stats.rx_packets++;
1204: }
1205:
1206: /* ToDo: This is better than before, but should be checked. */
1207: {
1208: struct RxFD *rxf = sp->rx_ringp[entry];
1209: rxf->status = 0xC0000003; /* '3' for verification only */
1210: rxf->link = 0; /* None yet. */
1211: rxf->count = 0;
1212: rxf->size = PKT_BUF_SZ;
1213: sp->last_rxf->link = virt_to_bus(rxf);
1214: sp->last_rxf->status &= ~0xC0000000;
1215: sp->last_rxf = rxf;
1216: entry = (++sp->cur_rx) % RX_RING_SIZE;
1217: }
1218: }
1219:
1220: sp->last_rx_time = jiffies;
1221: return 0;
1222: }
1223:
1224: static int
1225: speedo_close(struct device *dev)
1226: {
1227: int ioaddr = dev->base_addr;
1228: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1229: int i;
1230:
1231: dev->start = 0;
1232: dev->tbusy = 1;
1233:
1234: if (speedo_debug > 1)
1235: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n",
1236: dev->name, inw(ioaddr + SCBStatus));
1237:
1238: /* Shut off the media monitoring timer. */
1239: del_timer(&sp->timer);
1240:
1241: /* Disable interrupts, and stop the chip's Rx process. */
1242: outw(INT_MASK, ioaddr + SCBCmd);
1243: outw(INT_MASK | RX_ABORT, ioaddr + SCBCmd);
1244:
1245: free_irq(dev->irq, dev);
1246:
1247: /* Free all the skbuffs in the Rx and Tx queues. */
1248: for (i = 0; i < RX_RING_SIZE; i++) {
1249: struct sk_buff *skb = sp->rx_skbuff[i];
1250: sp->rx_skbuff[i] = 0;
1251: /* Clear the Rx descriptors. */
1252: if (skb)
1253: dev_kfree_skb(skb, FREE_WRITE);
1254: }
1255:
1256: for (i = 0; i < TX_RING_SIZE; i++) {
1257: struct sk_buff *skb = sp->tx_skbuff[i];
1258: sp->tx_skbuff[i] = 0;
1259: /* Clear the Tx descriptors. */
1260: if (skb)
1261: dev_kfree_skb(skb, FREE_WRITE);
1262: }
1263: if (sp->mc_setup_frm) {
1264: kfree(sp->mc_setup_frm);
1265: sp->mc_setup_frm_len = 0;
1266: }
1267:
1268: /* Print a few items for debugging. */
1269: if (speedo_debug > 3) {
1270: int phy_num = sp->phy[0] & 0x1f;
1271: printk(KERN_DEBUG "%s:Printing Rx ring (next to receive into %d).\n",
1272: dev->name, sp->cur_rx);
1273:
1274: for (i = 0; i < RX_RING_SIZE; i++)
1275: printk(KERN_DEBUG " Rx ring entry %d %8.8x.\n",
1276: i, (int)sp->rx_ringp[i]->status);
1277:
1278: for (i = 0; i < 5; i++)
1279: printk(KERN_DEBUG " PHY index %d register %d is %4.4x.\n",
1280: phy_num, i, mdio_read(ioaddr, phy_num, i));
1281: for (i = 21; i < 26; i++)
1282: printk(KERN_DEBUG " PHY index %d register %d is %4.4x.\n",
1283: phy_num, i, mdio_read(ioaddr, phy_num, i));
1284: }
1285: MOD_DEC_USE_COUNT;
1286:
1287: return 0;
1288: }
1289:
1290: /* The Speedo-3 has an especially awkward and unusable method of getting
1291: statistics out of the chip. It takes an unpredictable length of time
1292: for the dump-stats command to complete. To avoid a busy-wait loop we
1293: update the stats with the previous dump results, and then trigger a
1294: new dump.
1295:
1296: These problems are mitigated by the current /proc implementation, which
1297: calls this routine first to judge the output length, and then to emit the
1298: output.
1299:
1300: Oh, and incoming frames are dropped while executing dump-stats!
1301: */
1302: static struct enet_statistics *
1303: speedo_get_stats(struct device *dev)
1304: {
1305: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1306: int ioaddr = dev->base_addr;
1307:
1308: if (sp->lstats.done_marker == 0xA007) { /* Previous dump finished */
1309: sp->stats.tx_aborted_errors += sp->lstats.tx_coll16_errs;
1310: sp->stats.tx_window_errors += sp->lstats.tx_late_colls;
1311: sp->stats.tx_fifo_errors += sp->lstats.tx_underruns;
1312: sp->stats.tx_fifo_errors += sp->lstats.tx_lost_carrier;
1313: /*sp->stats.tx_deferred += sp->lstats.tx_deferred;*/
1314: sp->stats.collisions += sp->lstats.tx_total_colls;
1315: sp->stats.rx_crc_errors += sp->lstats.rx_crc_errs;
1316: sp->stats.rx_frame_errors += sp->lstats.rx_align_errs;
1317: sp->stats.rx_over_errors += sp->lstats.rx_resource_errs;
1318: sp->stats.rx_fifo_errors += sp->lstats.rx_overrun_errs;
1319: sp->stats.rx_length_errors += sp->lstats.rx_runt_errs;
1320: sp->lstats.done_marker = 0x0000;
1321: if (dev->start) {
1322: wait_for_cmd_done(ioaddr + SCBCmd);
1323: outw(CU_DUMPSTATS, ioaddr + SCBCmd);
1324: }
1325: }
1326: return &sp->stats;
1327: }
1328:
1329: static int speedo_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1330: {
1331: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1332: int ioaddr = dev->base_addr;
1333: u16 *data = (u16 *)&rq->ifr_data;
1334: int phy = sp->phy[0] & 0x1f;
1335:
1336: switch(cmd) {
1337: case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1338: data[0] = phy;
1339: case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1340: data[3] = mdio_read(ioaddr, data[0], data[1]);
1341: return 0;
1342: case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1343: if (!suser())
1344: return -EPERM;
1345: mdio_write(ioaddr, data[0], data[1], data[2]);
1346: return 0;
1347: default:
1348: return -EOPNOTSUPP;
1349: }
1350: }
1351:
1352: /* Set or clear the multicast filter for this adaptor.
1353: This is very ugly with Intel chips -- we usually have to execute an
1354: entire configuration command, plus process a multicast command.
1355: This is complicated. We must put a large configuration command and
1356: an arbitrarily-sized multicast command in the transmit list.
1357: To minimize the disruption -- the previous command might have already
1358: loaded the link -- we convert the current command block, normally a Tx
1359: command, into a no-op and link it to the new command.
1360: */
1361: static void
1362: set_rx_mode(struct device *dev)
1363: {
1364: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1365: int ioaddr = dev->base_addr;
1366: char new_rx_mode;
1367: unsigned long flags;
1368: int entry, i;
1369:
1370: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1371: new_rx_mode = 3;
1372: } else if ((dev->flags & IFF_ALLMULTI) ||
1373: dev->mc_count > multicast_filter_limit) {
1374: new_rx_mode = 1;
1375: } else
1376: new_rx_mode = 0;
1377:
1378: if (sp->cur_tx - sp->dirty_tx >= TX_RING_SIZE - 1) {
1379: /* The Tx ring is full -- don't add anything! Presumably the new mode
1380: is in config_cmd_data and will be added anyway. */
1381: sp->rx_mode = -1;
1382: return;
1383: }
1384:
1385: if (new_rx_mode != sp->rx_mode) {
1386: /* We must change the configuration. Construct a CmdConfig frame. */
1387: memcpy(sp->config_cmd_data, basic_config_cmd,sizeof(basic_config_cmd));
1388: sp->config_cmd_data[1] = (txfifo << 4) | rxfifo;
1389: sp->config_cmd_data[4] = rxdmacount;
1390: sp->config_cmd_data[5] = txdmacount + 0x80;
1391: sp->config_cmd_data[15] = (new_rx_mode & 2) ? 0x49 : 0x48;
1392: sp->config_cmd_data[19] = sp->full_duplex ? 0xC0 : 0x80;
1393: sp->config_cmd_data[21] = (new_rx_mode & 1) ? 0x0D : 0x05;
1394: if (sp->phy[0] & 0x8000) { /* Use the AUI port instead. */
1395: sp->config_cmd_data[15] |= 0x80;
1396: sp->config_cmd_data[8] = 0;
1397: }
1398: save_flags(flags);
1399: cli();
1400: /* Fill the "real" tx_ring frame with a no-op and point it to us. */
1401: entry = sp->cur_tx++ % TX_RING_SIZE;
1402: sp->tx_skbuff[entry] = 0; /* Nothing to free. */
1403: sp->tx_ring[entry].status = CmdNOp << 16;
1404: sp->tx_ring[entry].link = virt_to_bus(&sp->config_cmd);
1405: sp->config_cmd.status = 0;
1406: sp->config_cmd.command = CmdSuspend | CmdConfigure;
1407: sp->config_cmd.link =
1408: virt_to_bus(&(sp->tx_ring[sp->cur_tx % TX_RING_SIZE]));
1409: sp->last_cmd->command &= ~CmdSuspend;
1410: /* Immediately trigger the command unit resume. */
1411: wait_for_cmd_done(ioaddr + SCBCmd);
1412: outw(CU_RESUME, ioaddr + SCBCmd);
1413: sp->last_cmd = &sp->config_cmd;
1414: restore_flags(flags);
1415: if (speedo_debug > 5) {
1416: int i;
1417: printk(KERN_DEBUG " CmdConfig frame in entry %d.\n", entry);
1418: for(i = 0; i < 32; i++)
1419: printk(" %2.2x", ((unsigned char *)&sp->config_cmd)[i]);
1420: printk(".\n");
1421: }
1422: }
1423:
1424: if (new_rx_mode == 0 && dev->mc_count < 3) {
1425: /* The simple case of 0-2 multicast list entries occurs often, and
1426: fits within one tx_ring[] entry. */
1427: u16 *setup_params, *eaddrs;
1428: struct dev_mc_list *mclist;
1429:
1430: save_flags(flags);
1431: cli();
1432: entry = sp->cur_tx++ % TX_RING_SIZE;
1433: sp->tx_skbuff[entry] = 0;
1434: sp->tx_ring[entry].status = (CmdSuspend | CmdMulticastList) << 16;
1435: sp->tx_ring[entry].link =
1436: virt_to_bus(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
1437: sp->tx_ring[entry].tx_desc_addr = 0; /* Really MC list count. */
1438: setup_params = (u16 *)&sp->tx_ring[entry].tx_desc_addr;
1439: *setup_params++ = dev->mc_count*6;
1440: /* Fill in the multicast addresses. */
1441: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1442: i++, mclist = mclist->next) {
1443: eaddrs = (u16 *)mclist->dmi_addr;
1444: *setup_params++ = *eaddrs++;
1445: *setup_params++ = *eaddrs++;
1446: *setup_params++ = *eaddrs++;
1447: }
1448:
1449: sp->last_cmd->command &= ~CmdSuspend;
1450: /* Immediately trigger the command unit resume. */
1451: wait_for_cmd_done(ioaddr + SCBCmd);
1452: outw(CU_RESUME, ioaddr + SCBCmd);
1453: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
1454: restore_flags(flags);
1455: } else if (new_rx_mode == 0) {
1456: /* This does not work correctly, but why not? */
1457: struct dev_mc_list *mclist;
1458: u16 *eaddrs;
1459: struct descriptor *mc_setup_frm = sp->mc_setup_frm;
1460: u16 *setup_params;
1461: int i;
1462:
1463: if (sp->mc_setup_frm_len < 10 + dev->mc_count*6
1464: || sp->mc_setup_frm == NULL) {
1465: /* Allocate a new frame, 10bytes + addrs, with a few
1466: extra entries for growth. */
1467: if (sp->mc_setup_frm)
1468: kfree(sp->mc_setup_frm);
1469: sp->mc_setup_frm_len = 10 + dev->mc_count*6 + 24;
1470: sp->mc_setup_frm = kmalloc(sp->mc_setup_frm_len, GFP_ATOMIC);
1471: if (sp->mc_setup_frm == NULL) {
1472: printk(KERN_ERR "%s: Failed to allocate a setup frame.\n", dev->name);
1473: sp->rx_mode = -1; /* We failed, try again. */
1474: return;
1475: }
1476: }
1477: mc_setup_frm = sp->mc_setup_frm;
1478: /* Construct the new setup frame. */
1479: if (speedo_debug > 1)
1480: printk(KERN_DEBUG "%s: Constructing a setup frame at %p, "
1481: "%d bytes.\n",
1482: dev->name, sp->mc_setup_frm, sp->mc_setup_frm_len);
1483: mc_setup_frm->status = 0;
1484: mc_setup_frm->command = CmdSuspend | CmdIntr | CmdMulticastList;
1485: /* Link set below. */
1486: setup_params = (u16 *)mc_setup_frm->params;
1487: *setup_params++ = dev->mc_count*6;
1488: /* Fill in the multicast addresses. */
1489: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1490: i++, mclist = mclist->next) {
1491: eaddrs = (u16 *)mclist->dmi_addr;
1492: *setup_params++ = *eaddrs++;
1493: *setup_params++ = *eaddrs++;
1494: *setup_params++ = *eaddrs++;
1495: }
1496:
1497: /* Disable interrupts while playing with the Tx Cmd list. */
1498: save_flags(flags);
1499: cli();
1500: entry = sp->cur_tx++ % TX_RING_SIZE;
1501:
1502: if (speedo_debug > 5)
1503: printk(" CmdMCSetup frame length %d in entry %d.\n",
1504: dev->mc_count, entry);
1505:
1506: /* Change the command to a NoOp, pointing to the CmdMulti command. */
1507: sp->tx_skbuff[entry] = 0;
1508: sp->tx_ring[entry].status = CmdNOp << 16;
1509: sp->tx_ring[entry].link = virt_to_bus(mc_setup_frm);
1510:
1511: /* Set the link in the setup frame. */
1512: mc_setup_frm->link =
1513: virt_to_bus(&(sp->tx_ring[sp->cur_tx % TX_RING_SIZE]));
1514:
1515: sp->last_cmd->command &= ~CmdSuspend;
1516: /* Immediately trigger the command unit resume. */
1517: wait_for_cmd_done(ioaddr + SCBCmd);
1518: outw(CU_RESUME, ioaddr + SCBCmd);
1519: sp->last_cmd = mc_setup_frm;
1520: restore_flags(flags);
1521: if (speedo_debug > 1)
1522: printk(KERN_DEBUG "%s: Last command at %p is %4.4x.\n",
1523: dev->name, sp->last_cmd, sp->last_cmd->command);
1524: }
1525:
1526: sp->rx_mode = new_rx_mode;
1527: }
1528:
1529: #ifdef MODULE
1530:
1531: int
1532: init_module(void)
1533: {
1534: int cards_found;
1535:
1536: if (debug >= 0)
1537: speedo_debug = debug;
1538: if (speedo_debug)
1539: printk(KERN_INFO "%s", version);
1540:
1541: root_speedo_dev = NULL;
1542: cards_found = eepro100_init(NULL);
1543: return cards_found ? 0 : -ENODEV;
1544: }
1545:
1546: void
1547: cleanup_module(void)
1548: {
1549: struct device *next_dev;
1550:
1551: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1552: while (root_speedo_dev) {
1553: next_dev = ((struct speedo_private *)root_speedo_dev->priv)->next_module;
1554: unregister_netdev(root_speedo_dev);
1555: release_region(root_speedo_dev->base_addr, SPEEDO3_TOTAL_SIZE);
1556: kfree(root_speedo_dev);
1557: root_speedo_dev = next_dev;
1558: }
1559: }
1560: #else /* not MODULE */
1561: int eepro100_probe(struct device *dev)
1562: {
1563: int cards_found = 0;
1564:
1565: cards_found = eepro100_init(dev);
1566:
1567: if (speedo_debug > 0 && cards_found)
1568: printk(version);
1569:
1570: return cards_found ? 0 : -ENODEV;
1571: }
1572: #endif /* MODULE */
1573:
1574: /*
1575: * Local variables:
1576: * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1577: * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1578: * c-indent-level: 4
1579: * c-basic-offset: 4
1580: * tab-width: 4
1581: * End:
1582: */
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