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1.1.1.2 ! root 1: /* drivers/net/eepro100.c: An Intel i82557-559 Ethernet driver for Linux. */ 1.1 root 2: /* 1.1.1.2 ! root 3: NOTICE: this version of the driver is supposed to work with 2.2 kernels. ! 4: Written 1996-1999 by Donald Becker. 1.1 root 5: 6: This software may be used and distributed according to the terms 7: of the GNU Public License, incorporated herein by reference. 8: 1.1.1.2 ! root 9: This driver is for the Intel EtherExpress Pro100 (Speedo3) design. ! 10: It should work with all i82557/558/559 boards. ! 11: 1.1 root 12: To use as a module, use the compile-command at the end of the file. 13: 14: The author may be reached as [email protected], or C/O 15: Center of Excellence in Space Data and Information Sciences 16: Code 930.5, NASA Goddard Space Flight Center, Greenbelt MD 20771 17: For updates see 1.1.1.2 ! root 18: http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html ! 19: For installation instructions ! 20: http://cesdis.gsfc.nasa.gov/linux/misc/modules.html ! 21: There is a Majordomo mailing list based at ! 22: [email protected] ! 23: ! 24: The driver also contains updates by different kernel developers. ! 25: This driver clone is maintained by Andrey V. Savochkin <[email protected]>. ! 26: Please use this email address and linux-kernel mailing list for bug reports. ! 27: ! 28: Modification history: ! 29: 2000 Mar 24 Dragan Stancevic <[email protected]> ! 30: Disabled FC and ER, to avoid lockups when when we get FCP interrupts. ! 31: 2000 May 27 Andrey Moruga <[email protected]> ! 32: Code duplication for 82559ER support was removed. ! 33: Accurate handling of all supported chips was implemented. ! 34: Some fixes in 2.3 clone of the driver were ported. ! 35: 2000 May 30 Dragan Stancevic <[email protected]> and ! 36: Andrey Moruga <[email protected]> ! 37: Honor PortReset timing specification. ! 38: 2000 Jul 25 Dragan Stancevic <[email protected]> ! 39: Changed to MMIO, resized FIFOs, resized rings, changed ISR timeout ! 40: Problem reported by: ! 41: Marc MERLIN <[email protected]> ! 42: 2000 Nov 15 Dragan Stancevic <[email protected]> ! 43: Changed command completion time and added debug info as to which ! 44: CMD timed out. Problem reported by: ! 45: "Ulrich Windl" <[email protected]> 1.1 root 46: */ 47: 1.1.1.2 ! root 48: /*#define USE_IO*/ 1.1 root 49: static const char *version = 1.1.1.2 ! root 50: "eepro100.c:v1.09j-t 9/29/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html\n" ! 51: "eepro100.c: $Revision: 1.2 $ 2000/05/31 Modified by Andrey V. Savochkin <[email protected]> and others\n" ! 52: "eepro100.c: VA Linux custom, Dragan Stancevic <[email protected]> 2000/11/15\n"; 1.1 root 53: 54: /* A few user-configurable values that apply to all boards. 1.1.1.2 ! root 55: First set is undocumented and spelled per Intel recommendations. */ 1.1 root 56: 57: static int congenb = 0; /* Enable congestion control in the DP83840. */ 1.1.1.2 ! root 58: static int txfifo = 0; /* Tx FIFO threshold in 4 byte units, 0-15 */ ! 59: static int rxfifo = 0xF; /* Rx FIFO threshold, default 32 bytes. */ 1.1 root 60: /* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */ 61: static int txdmacount = 128; 62: static int rxdmacount = 0; 63: 64: /* Set the copy breakpoint for the copy-only-tiny-buffer Rx method. 65: Lower values use more memory, but are faster. */ 1.1.1.2 ! root 66: #if defined(__alpha__) || defined(__sparc__) ! 67: /* force copying of all packets to avoid unaligned accesses on Alpha */ ! 68: static int rx_copybreak = 1518; ! 69: #else 1.1 root 70: static int rx_copybreak = 200; 1.1.1.2 ! root 71: #endif 1.1 root 72: 73: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ 1.1.1.2 ! root 74: static int max_interrupt_work = 200; 1.1 root 75: 76: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */ 77: static int multicast_filter_limit = 64; 78: 1.1.1.2 ! root 79: /* 'options' is used to pass a transceiver override or full-duplex flag ! 80: e.g. "options=16" for FD, "options=32" for 100mbps-only. */ ! 81: static int full_duplex[] = {-1, -1, -1, -1, -1, -1, -1, -1}; ! 82: static int options[] = {-1, -1, -1, -1, -1, -1, -1, -1}; 1.1 root 83: #ifdef MODULE 1.1.1.2 ! root 84: static int debug = -1; /* The debug level */ 1.1 root 85: #endif 1.1.1.2 ! root 86: ! 87: /* A few values that may be tweaked. */ ! 88: /* The ring sizes should be a power of two for efficiency. */ ! 89: #define TX_RING_SIZE 64 ! 90: #define RX_RING_SIZE 64 ! 91: /* How much slots multicast filter setup may take. ! 92: Do not descrease without changing set_rx_mode() implementaion. */ ! 93: #define TX_MULTICAST_SIZE 2 ! 94: #define TX_MULTICAST_RESERV (TX_MULTICAST_SIZE*2) ! 95: /* Actual number of TX packets queued, must be ! 96: <= TX_RING_SIZE-TX_MULTICAST_RESERV. */ ! 97: #define TX_QUEUE_LIMIT (TX_RING_SIZE-TX_MULTICAST_RESERV) ! 98: /* Hysteresis marking queue as no longer full. */ ! 99: #define TX_QUEUE_UNFULL (TX_QUEUE_LIMIT-4) ! 100: ! 101: /* Operational parameters that usually are not changed. */ ! 102: ! 103: /* Time in jiffies before concluding the transmitter is hung. */ ! 104: #define TX_TIMEOUT (2*HZ) ! 105: /* Size of an pre-allocated Rx buffer: <Ethernet MTU> + slack.*/ ! 106: #define PKT_BUF_SZ 1536 ! 107: ! 108: #if !defined(__OPTIMIZE__) || !defined(__KERNEL__) ! 109: #warning You must compile this file with the correct options! ! 110: #warning See the last lines of the source file. ! 111: #error You must compile this driver with "-O". 1.1 root 112: #endif 113: 114: #include <linux/version.h> 1.1.1.2 ! root 115: #include <linux/module.h> ! 116: #if defined(MODVERSIONS) ! 117: #include <linux/modversions.h> ! 118: #endif ! 119: 1.1 root 120: #include <linux/kernel.h> 121: #include <linux/string.h> 122: #include <linux/timer.h> 123: #include <linux/errno.h> 124: #include <linux/ioport.h> 125: #include <linux/malloc.h> 126: #include <linux/interrupt.h> 127: #include <linux/pci.h> 1.1.1.2 ! root 128: #include <asm/spinlock.h> ! 129: 1.1 root 130: #include <asm/bitops.h> 131: #include <asm/io.h> 132: 133: #include <linux/netdevice.h> 134: #include <linux/etherdevice.h> 135: #include <linux/skbuff.h> 136: #include <linux/delay.h> 137: 1.1.1.2 ! root 138: #if defined(MODULE) ! 139: MODULE_AUTHOR("Maintainer: Andrey V. Savochkin <[email protected]>"); ! 140: MODULE_DESCRIPTION("Intel i82557/i82558 PCI EtherExpressPro driver"); 1.1 root 141: MODULE_PARM(debug, "i"); 142: MODULE_PARM(options, "1-" __MODULE_STRING(8) "i"); 143: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i"); 144: MODULE_PARM(congenb, "i"); 145: MODULE_PARM(txfifo, "i"); 146: MODULE_PARM(rxfifo, "i"); 147: MODULE_PARM(txdmacount, "i"); 148: MODULE_PARM(rxdmacount, "i"); 149: MODULE_PARM(rx_copybreak, "i"); 150: MODULE_PARM(max_interrupt_work, "i"); 151: MODULE_PARM(multicast_filter_limit, "i"); 152: #endif 153: 154: #define RUN_AT(x) (jiffies + (x)) 1.1.1.2 ! root 155: /* Condensed bus+endian portability operations. */ ! 156: #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr)) ! 157: #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr)) ! 158: ! 159: #define net_device device ! 160: #define pci_base_address(p, n) (p)->base_address[n] ! 161: ! 162: #define dev_free_skb(skb) dev_kfree_skb(skb); ! 163: #define netif_wake_queue(dev) do { \ ! 164: clear_bit(0, (void*)&dev->tbusy); \ ! 165: mark_bh(NET_BH); \ ! 166: } while(0) ! 167: #define netif_start_queue(dev) clear_bit(0, (void*)&dev->tbusy) ! 168: #define netif_stop_queue(dev) set_bit(0, (void*)&dev->tbusy) ! 169: #ifndef PCI_DEVICE_ID_INTEL_82559ER ! 170: #define PCI_DEVICE_ID_INTEL_82559ER 0x1209 ! 171: #endif ! 172: #ifndef PCI_DEVICE_ID_INTEL_ID1029 ! 173: #define PCI_DEVICE_ID_INTEL_ID1029 0x1029 ! 174: #endif ! 175: #ifndef PCI_DEVICE_ID_INTEL_ID1030 ! 176: #define PCI_DEVICE_ID_INTEL_ID1030 0x1030 ! 177: #endif ! 178: #ifndef PCI_DEVICE_ID_INTEL_ID2449 ! 179: #define PCI_DEVICE_ID_INTEL_ID2449 0x2449 1.1 root 180: #endif 181: 182: /* The total I/O port extent of the board. 183: The registers beyond 0x18 only exist on the i82558. */ 184: #define SPEEDO3_TOTAL_SIZE 0x20 185: 186: int speedo_debug = 1; 187: 188: /* 189: Theory of Operation 190: 191: I. Board Compatibility 192: 193: This device driver is designed for the Intel i82557 "Speedo3" chip, Intel's 194: single-chip fast Ethernet controller for PCI, as used on the Intel 195: EtherExpress Pro 100 adapter. 196: 197: II. Board-specific settings 198: 199: PCI bus devices are configured by the system at boot time, so no jumpers 200: need to be set on the board. The system BIOS should be set to assign the 201: PCI INTA signal to an otherwise unused system IRQ line. While it's 202: possible to share PCI interrupt lines, it negatively impacts performance and 203: only recent kernels support it. 204: 205: III. Driver operation 206: 207: IIIA. General 208: The Speedo3 is very similar to other Intel network chips, that is to say 209: "apparently designed on a different planet". This chips retains the complex 210: Rx and Tx descriptors and multiple buffers pointers as previous chips, but 211: also has simplified Tx and Rx buffer modes. This driver uses the "flexible" 212: Tx mode, but in a simplified lower-overhead manner: it associates only a 213: single buffer descriptor with each frame descriptor. 214: 215: Despite the extra space overhead in each receive skbuff, the driver must use 216: the simplified Rx buffer mode to assure that only a single data buffer is 217: associated with each RxFD. The driver implements this by reserving space 1.1.1.2 ! root 218: for the Rx descriptor at the head of each Rx skbuff. 1.1 root 219: 220: The Speedo-3 has receive and command unit base addresses that are added to 221: almost all descriptor pointers. The driver sets these to zero, so that all 222: pointer fields are absolute addresses. 223: 224: The System Control Block (SCB) of some previous Intel chips exists on the 225: chip in both PCI I/O and memory space. This driver uses the I/O space 226: registers, but might switch to memory mapped mode to better support non-x86 227: processors. 228: 229: IIIB. Transmit structure 230: 231: The driver must use the complex Tx command+descriptor mode in order to 232: have a indirect pointer to the skbuff data section. Each Tx command block 1.1.1.2 ! root 233: (TxCB) is associated with two immediately appended Tx Buffer Descriptor 1.1 root 234: (TxBD). A fixed ring of these TxCB+TxBD pairs are kept as part of the 235: speedo_private data structure for each adapter instance. 236: 1.1.1.2 ! root 237: The newer i82558 explicitly supports this structure, and can read the two ! 238: TxBDs in the same PCI burst as the TxCB. ! 239: 1.1 root 240: This ring structure is used for all normal transmit packets, but the 241: transmit packet descriptors aren't long enough for most non-Tx commands such 242: as CmdConfigure. This is complicated by the possibility that the chip has 243: already loaded the link address in the previous descriptor. So for these 244: commands we convert the next free descriptor on the ring to a NoOp, and point 245: that descriptor's link to the complex command. 246: 247: An additional complexity of these non-transmit commands are that they may be 248: added asynchronous to the normal transmit queue, so we disable interrupts 249: whenever the Tx descriptor ring is manipulated. 250: 251: A notable aspect of these special configure commands is that they do 252: work with the normal Tx ring entry scavenge method. The Tx ring scavenge 253: is done at interrupt time using the 'dirty_tx' index, and checking for the 254: command-complete bit. While the setup frames may have the NoOp command on the 255: Tx ring marked as complete, but not have completed the setup command, this 256: is not a problem. The tx_ring entry can be still safely reused, as the 257: tx_skbuff[] entry is always empty for config_cmd and mc_setup frames. 258: 259: Commands may have bits set e.g. CmdSuspend in the command word to either 260: suspend or stop the transmit/command unit. This driver always flags the last 261: command with CmdSuspend, erases the CmdSuspend in the previous command, and 262: then issues a CU_RESUME. 263: Note: Watch out for the potential race condition here: imagine 264: erasing the previous suspend 265: the chip processes the previous command 266: the chip processes the final command, and suspends 267: doing the CU_RESUME 268: the chip processes the next-yet-valid post-final-command. 269: So blindly sending a CU_RESUME is only safe if we do it immediately after 1.1.1.2 ! root 270: after erasing the previous CmdSuspend, without the possibility of an ! 271: intervening delay. Thus the resume command is always within the ! 272: interrupts-disabled region. This is a timing dependence, but handling this ! 273: condition in a timing-independent way would considerably complicate the code. 1.1 root 274: 275: Note: In previous generation Intel chips, restarting the command unit was a 276: notoriously slow process. This is presumably no longer true. 277: 278: IIIC. Receive structure 279: 280: Because of the bus-master support on the Speedo3 this driver uses the new 281: SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer. 282: This scheme allocates full-sized skbuffs as receive buffers. The value 283: SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to 284: trade-off the memory wasted by passing the full-sized skbuff to the queue 285: layer for all frames vs. the copying cost of copying a frame to a 286: correctly-sized skbuff. 287: 288: For small frames the copying cost is negligible (esp. considering that we 289: are pre-loading the cache with immediately useful header information), so we 290: allocate a new, minimally-sized skbuff. For large frames the copying cost 291: is non-trivial, and the larger copy might flush the cache of useful data, so 292: we pass up the skbuff the packet was received into. 293: 294: IV. Notes 295: 296: Thanks to Steve Williams of Intel for arranging the non-disclosure agreement 297: that stated that I could disclose the information. But I still resent 298: having to sign an Intel NDA when I'm helping Intel sell their own product! 299: 300: */ 301: 1.1.1.2 ! root 302: /* This table drives the PCI probe routines. */ ! 303: static struct net_device *speedo_found1(struct pci_dev *pdev, int pci_bus, ! 304: int pci_devfn, long ioaddr, ! 305: int chip_idx, int card_idx); ! 306: ! 307: #ifdef USE_IO ! 308: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_IO|PCI_ADDR1 ! 309: #define SPEEDO_SIZE 32 ! 310: #else ! 311: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_MEM|PCI_ADDR0 ! 312: #define SPEEDO_SIZE 0x1000 ! 313: #endif 1.1 root 314: 1.1.1.2 ! root 315: enum pci_flags_bit { ! 316: PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4, ! 317: PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3, ! 318: }; ! 319: struct pci_id_info { ! 320: const char *name; ! 321: u16 vendor_id, device_id; ! 322: int pci_index; ! 323: } static pci_tbl[] = { ! 324: { "Intel PCI EtherExpress Pro100 82557", ! 325: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82557, ! 326: 0 ! 327: }, ! 328: { "Intel PCI EtherExpress Pro100 82559ER", ! 329: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82559ER, ! 330: 0 ! 331: }, ! 332: { "Intel PCI EtherExpress Pro100 ID1029", ! 333: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID1029, ! 334: 0 ! 335: }, ! 336: { "Intel Corporation 82559 InBusiness 10/100", ! 337: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID1030, ! 338: 0 ! 339: }, ! 340: { "Intel PCI EtherExpress Pro100 82562EM", ! 341: PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ID2449, ! 342: 0 ! 343: }, ! 344: {0,} /* 0 terminated list. */ ! 345: }; 1.1 root 346: 1.1.1.2 ! root 347: static inline unsigned int io_inw(unsigned long port) 1.1 root 348: { 1.1.1.2 ! root 349: return inw(port); ! 350: } ! 351: static inline void io_outw(unsigned int val, unsigned long port) ! 352: { ! 353: outw(val, port); 1.1 root 354: } 355: 1.1.1.2 ! root 356: #ifndef USE_IO ! 357: #undef inb ! 358: #undef inw ! 359: #undef inl ! 360: #undef outb ! 361: #undef outw ! 362: #undef outl ! 363: #define inb readb ! 364: #define inw readw ! 365: #define inl readl ! 366: #define outb writeb ! 367: #define outw writew ! 368: #define outl writel ! 369: #endif ! 370: ! 371: /* How to wait for the command unit to accept a command. ! 372: Typically this takes 0 ticks. */ ! 373: static inline void wait_for_cmd_done(long cmd_ioaddr) ! 374: { ! 375: int wait = 20000; ! 376: char cmd_reg1, cmd_reg2; ! 377: do ; ! 378: while((cmd_reg1 = inb(cmd_ioaddr)) && (--wait >= 0)); ! 379: ! 380: /* Last chance to change your mind --Dragan*/ ! 381: if (wait < 0){ ! 382: cmd_reg2 = inb(cmd_ioaddr); ! 383: if(cmd_reg2){ ! 384: printk(KERN_ALERT "eepro100: cmd_wait for(%#2.2x) timedout with(%#2.2x)!\n", ! 385: cmd_reg1, cmd_reg2); ! 386: ! 387: } ! 388: } 1.1 root 389: 1.1.1.2 ! root 390: } 1.1 root 391: 392: /* Offsets to the various registers. 393: All accesses need not be longword aligned. */ 394: enum speedo_offsets { 395: SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */ 396: SCBPointer = 4, /* General purpose pointer. */ 397: SCBPort = 8, /* Misc. commands and operands. */ 398: SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */ 399: SCBCtrlMDI = 16, /* MDI interface control. */ 400: SCBEarlyRx = 20, /* Early receive byte count. */ 401: }; 402: /* Commands that can be put in a command list entry. */ 403: enum commands { 1.1.1.2 ! root 404: CmdNOp = 0, CmdIASetup = 0x10000, CmdConfigure = 0x20000, ! 405: CmdMulticastList = 0x30000, CmdTx = 0x40000, CmdTDR = 0x50000, ! 406: CmdDump = 0x60000, CmdDiagnose = 0x70000, ! 407: CmdSuspend = 0x40000000, /* Suspend after completion. */ ! 408: CmdIntr = 0x20000000, /* Interrupt after completion. */ ! 409: CmdTxFlex = 0x00080000, /* Use "Flexible mode" for CmdTx command. */ ! 410: }; ! 411: /* Clear CmdSuspend (1<<30) avoiding interference with the card access to the ! 412: status bits. Previous driver versions used separate 16 bit fields for ! 413: commands and statuses. --SAW ! 414: */ ! 415: #if defined(__LITTLE_ENDIAN) ! 416: #define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x4000 ! 417: #elif defined(__BIG_ENDIAN) ! 418: #define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x0040 ! 419: #else ! 420: #error Unsupported byteorder ! 421: #endif ! 422: ! 423: enum SCBCmdBits { ! 424: SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000, ! 425: SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400, ! 426: SCBTriggerIntr=0x0200, SCBMaskAll=0x0100, ! 427: /* The rest are Rx and Tx commands. */ ! 428: CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, CUShowStats=0x0050, ! 429: CUCmdBase=0x0060, /* CU Base address (set to zero) . */ ! 430: CUDumpStats=0x0070, /* Dump then reset stats counters. */ ! 431: RxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006, ! 432: RxResumeNoResources=0x0007, 1.1 root 433: }; 434: 1.1.1.2 ! root 435: enum SCBPort_cmds { ! 436: PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3, ! 437: }; 1.1 root 438: 439: /* The Speedo3 Rx and Tx frame/buffer descriptors. */ 1.1.1.2 ! root 440: struct descriptor { /* A generic descriptor. */ ! 441: s32 cmd_status; /* All command and status fields. */ ! 442: u32 link; /* struct descriptor * */ 1.1 root 443: unsigned char params[0]; 444: }; 445: 446: /* The Speedo3 Rx and Tx buffer descriptors. */ 447: struct RxFD { /* Receive frame descriptor. */ 448: s32 status; 449: u32 link; /* struct RxFD * */ 450: u32 rx_buf_addr; /* void * */ 1.1.1.2 ! root 451: u32 count; 1.1 root 452: }; 453: 1.1.1.2 ! root 454: /* Selected elements of the Tx/RxFD.status word. */ ! 455: enum RxFD_bits { ! 456: RxComplete=0x8000, RxOK=0x2000, ! 457: RxErrCRC=0x0800, RxErrAlign=0x0400, RxErrTooBig=0x0200, RxErrSymbol=0x0010, ! 458: RxEth2Type=0x0020, RxNoMatch=0x0004, RxNoIAMatch=0x0002, ! 459: TxUnderrun=0x1000, StatusComplete=0x8000, ! 460: }; 1.1 root 461: 462: struct TxFD { /* Transmit frame descriptor set. */ 463: s32 status; 464: u32 link; /* void * */ 465: u32 tx_desc_addr; /* Always points to the tx_buf_addr element. */ 466: s32 count; /* # of TBD (=1), Tx start thresh., etc. */ 1.1.1.2 ! root 467: /* This constitutes two "TBD" entries -- we only use one. */ ! 468: u32 tx_buf_addr0; /* void *, frame to be transmitted. */ ! 469: s32 tx_buf_size0; /* Length of Tx frame. */ ! 470: u32 tx_buf_addr1; /* void *, frame to be transmitted. */ ! 471: s32 tx_buf_size1; /* Length of Tx frame. */ ! 472: }; ! 473: ! 474: /* Multicast filter setting block. --SAW */ ! 475: struct speedo_mc_block { ! 476: struct speedo_mc_block *next; ! 477: unsigned int tx; ! 478: struct descriptor frame __attribute__ ((__aligned__(16))); 1.1 root 479: }; 480: 481: /* Elements of the dump_statistics block. This block must be lword aligned. */ 482: struct speedo_stats { 483: u32 tx_good_frames; 484: u32 tx_coll16_errs; 485: u32 tx_late_colls; 486: u32 tx_underruns; 487: u32 tx_lost_carrier; 488: u32 tx_deferred; 489: u32 tx_one_colls; 490: u32 tx_multi_colls; 491: u32 tx_total_colls; 492: u32 rx_good_frames; 493: u32 rx_crc_errs; 494: u32 rx_align_errs; 495: u32 rx_resource_errs; 496: u32 rx_overrun_errs; 497: u32 rx_colls_errs; 498: u32 rx_runt_errs; 499: u32 done_marker; 500: }; 501: 1.1.1.2 ! root 502: enum Rx_ring_state_bits { ! 503: RrNoMem=1, RrPostponed=2, RrNoResources=4, RrOOMReported=8, ! 504: }; ! 505: ! 506: /* Do not change the position (alignment) of the first few elements! ! 507: The later elements are grouped for cache locality. */ 1.1 root 508: struct speedo_private { 509: struct TxFD tx_ring[TX_RING_SIZE]; /* Commands (usually CmdTxPacket). */ 1.1.1.2 ! root 510: struct RxFD *rx_ringp[RX_RING_SIZE]; /* Rx descriptor, used as ring. */ ! 511: /* The addresses of a Tx/Rx-in-place packets/buffers. */ 1.1 root 512: struct sk_buff* tx_skbuff[TX_RING_SIZE]; 513: struct sk_buff* rx_skbuff[RX_RING_SIZE]; 1.1.1.2 ! root 514: struct descriptor *last_cmd; /* Last command sent. */ ! 515: unsigned int cur_tx, dirty_tx; /* The ring entries to be free()ed. */ ! 516: spinlock_t lock; /* Group with Tx control cache line. */ ! 517: u32 tx_threshold; /* The value for txdesc.count. */ 1.1 root 518: struct RxFD *last_rxf; /* Last command sent. */ 1.1.1.2 ! root 519: unsigned int cur_rx, dirty_rx; /* The next free ring entry */ ! 520: long last_rx_time; /* Last Rx, in jiffies, to handle Rx hang. */ ! 521: const char *product_name; ! 522: struct net_device *next_module; ! 523: void *priv_addr; /* Unaligned address for kfree */ 1.1 root 524: struct enet_statistics stats; 525: struct speedo_stats lstats; 1.1.1.2 ! root 526: int chip_id; ! 527: unsigned char pci_bus, pci_devfn, acpi_pwr; 1.1 root 528: struct timer_list timer; /* Media selection timer. */ 1.1.1.2 ! root 529: struct speedo_mc_block *mc_setup_head;/* Multicast setup frame list head. */ ! 530: struct speedo_mc_block *mc_setup_tail;/* Multicast setup frame list tail. */ 1.1 root 531: int in_interrupt; /* Word-aligned dev->interrupt */ 532: char rx_mode; /* Current PROMISC/ALLMULTI setting. */ 533: unsigned int tx_full:1; /* The Tx queue is full. */ 534: unsigned int full_duplex:1; /* Full-duplex operation requested. */ 1.1.1.2 ! root 535: unsigned int flow_ctrl:1; /* Use 802.3x flow control. */ 1.1 root 536: unsigned int rx_bug:1; /* Work around receiver hang errata. */ 537: unsigned int rx_bug10:1; /* Receiver might hang at 10mbps. */ 538: unsigned int rx_bug100:1; /* Receiver might hang at 100mbps. */ 1.1.1.2 ! root 539: unsigned char default_port:8; /* Last dev->if_port value. */ ! 540: unsigned char rx_ring_state; /* RX ring status flags. */ 1.1 root 541: unsigned short phy[2]; /* PHY media interfaces available. */ 1.1.1.2 ! root 542: unsigned short advertising; /* Current PHY advertised caps. */ ! 543: unsigned short partner; /* Link partner caps. */ 1.1 root 544: }; 545: 546: /* The parameters for a CmdConfigure operation. 547: There are so many options that it would be difficult to document each bit. 548: We mostly use the default or recommended settings. */ 1.1.1.2 ! root 549: const char i82557_config_cmd[22] = { ! 550: 22, 0x08, 0, 0, 0, 0, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */ 1.1 root 551: 0, 0x2E, 0, 0x60, 0, 552: 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */ 553: 0x3f, 0x05, }; 1.1.1.2 ! root 554: const char i82558_config_cmd[22] = { ! 555: 22, 0x08, 0, 1, 0, 0, 0x22, 0x03, 1, /* 1=Use MII 0=Use AUI */ ! 556: 0, 0x2E, 0, 0x60, 0x08, 0x88, ! 557: 0x68, 0, 0x40, 0xf2, 0x84, /* Disable FC */ ! 558: 0x31, 0x05, }; 1.1 root 559: 560: /* PHY media interface chips. */ 561: static const char *phys[] = { 562: "None", "i82553-A/B", "i82553-C", "i82503", 563: "DP83840", "80c240", "80c24", "i82555", 564: "unknown-8", "unknown-9", "DP83840A", "unknown-11", 565: "unknown-12", "unknown-13", "unknown-14", "unknown-15", }; 566: enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240, 567: S80C24, I82555, DP83840A=10, }; 568: static const char is_mii[] = { 0, 1, 1, 0, 1, 1, 0, 1 }; 1.1.1.2 ! root 569: #define EE_READ_CMD (6) 1.1 root 570: 1.1.1.2 ! root 571: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len); ! 572: static int mdio_read(long ioaddr, int phy_id, int location); ! 573: static int mdio_write(long ioaddr, int phy_id, int location, int value); ! 574: static int speedo_open(struct net_device *dev); ! 575: static void speedo_resume(struct net_device *dev); 1.1 root 576: static void speedo_timer(unsigned long data); 1.1.1.2 ! root 577: static void speedo_init_rx_ring(struct net_device *dev); ! 578: static void speedo_tx_timeout(struct net_device *dev); ! 579: static int speedo_start_xmit(struct sk_buff *skb, struct net_device *dev); ! 580: static void speedo_refill_rx_buffers(struct net_device *dev, int force); ! 581: static int speedo_rx(struct net_device *dev); ! 582: static void speedo_tx_buffer_gc(struct net_device *dev); 1.1 root 583: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs); 1.1.1.2 ! root 584: static int speedo_close(struct net_device *dev); ! 585: static struct enet_statistics *speedo_get_stats(struct net_device *dev); ! 586: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); ! 587: static void set_rx_mode(struct net_device *dev); ! 588: static void speedo_show_state(struct net_device *dev); 1.1 root 589: 590: 591: 1.1.1.2 ! root 592: #ifdef honor_default_port ! 593: /* Optional driver feature to allow forcing the transceiver setting. ! 594: Not recommended. */ ! 595: static int mii_ctrl[8] = { 0x3300, 0x3100, 0x0000, 0x0100, ! 596: 0x2000, 0x2100, 0x0400, 0x3100}; 1.1 root 597: #endif 598: 599: /* A list of all installed Speedo devices, for removing the driver module. */ 1.1.1.2 ! root 600: static struct net_device *root_speedo_dev = NULL; 1.1 root 601: 1.1.1.2 ! root 602: int eepro100_init(void) 1.1 root 603: { 604: int cards_found = 0; 1.1.1.2 ! root 605: int chip_idx; ! 606: struct pci_dev *pdev; ! 607: ! 608: if (! pcibios_present()) ! 609: return cards_found; 1.1 root 610: 1.1.1.2 ! root 611: for (chip_idx = 0; pci_tbl[chip_idx].name; chip_idx++) { ! 612: for (; pci_tbl[chip_idx].pci_index < 8; pci_tbl[chip_idx].pci_index++) { ! 613: unsigned char pci_bus, pci_device_fn, pci_latency; ! 614: unsigned long pciaddr; ! 615: long ioaddr; ! 616: int irq; ! 617: ! 618: u16 pci_command, new_command; ! 619: ! 620: if (pcibios_find_device(pci_tbl[chip_idx].vendor_id, ! 621: pci_tbl[chip_idx].device_id, ! 622: pci_tbl[chip_idx].pci_index, &pci_bus, 1.1 root 623: &pci_device_fn)) 1.1.1.2 ! root 624: break; ! 625: { ! 626: pdev = pci_find_slot(pci_bus, pci_device_fn); ! 627: #ifdef USE_IO ! 628: pciaddr = pci_base_address(pdev, 1); /* Use [0] to mem-map */ ! 629: #else ! 630: pciaddr = pci_base_address(pdev, 0); ! 631: #endif ! 632: irq = pdev->irq; ! 633: } 1.1 root 634: /* Remove I/O space marker in bit 0. */ 1.1.1.2 ! root 635: if (pciaddr & 1) { ! 636: ioaddr = pciaddr & ~3UL; ! 637: if (check_region(ioaddr, 32)) ! 638: continue; ! 639: } else { ! 640: #ifdef __sparc__ ! 641: /* ioremap is hosed in 2.2.x on Sparc. */ ! 642: ioaddr = pciaddr & ~0xfUL; ! 643: #else ! 644: if ((ioaddr = (long)ioremap(pciaddr & ~0xfUL, 0x1000)) == 0) { ! 645: printk(KERN_INFO "Failed to map PCI address %#lx.\n", ! 646: pciaddr); ! 647: continue; ! 648: } ! 649: #endif ! 650: } 1.1 root 651: if (speedo_debug > 2) 1.1.1.2 ! root 652: printk("Found Intel i82557 PCI Speedo at I/O %#lx, IRQ %d.\n", ! 653: ioaddr, irq); 1.1 root 654: 655: /* Get and check the bus-master and latency values. */ 656: pcibios_read_config_word(pci_bus, pci_device_fn, 657: PCI_COMMAND, &pci_command); 658: new_command = pci_command | PCI_COMMAND_MASTER|PCI_COMMAND_IO; 659: if (pci_command != new_command) { 660: printk(KERN_INFO " The PCI BIOS has not enabled this" 661: " device! Updating PCI command %4.4x->%4.4x.\n", 662: pci_command, new_command); 663: pcibios_write_config_word(pci_bus, pci_device_fn, 664: PCI_COMMAND, new_command); 665: } 666: pcibios_read_config_byte(pci_bus, pci_device_fn, 1.1.1.2 ! root 667: PCI_LATENCY_TIMER, &pci_latency); 1.1 root 668: if (pci_latency < 32) { 669: printk(" PCI latency timer (CFLT) is unreasonably low at %d." 670: " Setting to 32 clocks.\n", pci_latency); 671: pcibios_write_config_byte(pci_bus, pci_device_fn, 672: PCI_LATENCY_TIMER, 32); 673: } else if (speedo_debug > 1) 674: printk(" PCI latency timer (CFLT) is %#x.\n", pci_latency); 675: 1.1.1.2 ! root 676: if (speedo_found1(pdev, pci_bus, pci_device_fn, ioaddr, chip_idx, cards_found)) ! 677: cards_found++; 1.1 root 678: } 679: } 680: 681: return cards_found; 682: } 683: 1.1.1.2 ! root 684: static struct net_device *speedo_found1(struct pci_dev *pdev, int pci_bus, ! 685: int pci_devfn, long ioaddr, ! 686: int chip_idx, int card_idx) 1.1 root 687: { 1.1.1.2 ! root 688: struct net_device *dev; 1.1 root 689: struct speedo_private *sp; 1.1.1.2 ! root 690: const char *product; 1.1 root 691: int i, option; 1.1.1.2 ! root 692: u16 eeprom[0x100]; ! 693: int acpi_idle_state = 0; ! 694: #ifndef MODULE ! 695: static int did_version = 0; /* Already printed version info. */ 1.1 root 696: if (speedo_debug > 0 && did_version++ == 0) 697: printk(version); 1.1.1.2 ! root 698: #endif 1.1 root 699: 1.1.1.2 ! root 700: dev = init_etherdev(NULL, sizeof(struct speedo_private)); 1.1 root 701: 1.1.1.2 ! root 702: if (dev->mem_start > 0) 1.1 root 703: option = dev->mem_start; 704: else if (card_idx >= 0 && options[card_idx] >= 0) 705: option = options[card_idx]; 706: else 707: option = 0; 708: 709: /* Read the station address EEPROM before doing the reset. 1.1.1.2 ! root 710: Nominally his should even be done before accepting the device, but ! 711: then we wouldn't have a device name with which to report the error. ! 712: The size test is for 6 bit vs. 8 bit address serial EEPROMs. ! 713: */ 1.1 root 714: { 1.1.1.2 ! root 715: unsigned long iobase; ! 716: int read_cmd, ee_size; ! 717: u16 sum; 1.1 root 718: int j; 1.1.1.2 ! root 719: ! 720: /* Use IO only to avoid postponed writes and satisfy EEPROM timing ! 721: requirements. */ ! 722: iobase = pci_base_address(pdev, 1) & ~3UL; ! 723: if ((do_eeprom_cmd(iobase, EE_READ_CMD << 24, 27) & 0xffe0000) ! 724: == 0xffe0000) { ! 725: ee_size = 0x100; ! 726: read_cmd = EE_READ_CMD << 24; ! 727: } else { ! 728: ee_size = 0x40; ! 729: read_cmd = EE_READ_CMD << 22; ! 730: } ! 731: ! 732: for (j = 0, i = 0, sum = 0; i < ee_size; i++) { ! 733: u16 value = do_eeprom_cmd(iobase, read_cmd | (i << 16), 27); 1.1 root 734: eeprom[i] = value; 735: sum += value; 736: if (i < 3) { 737: dev->dev_addr[j++] = value; 738: dev->dev_addr[j++] = value >> 8; 739: } 740: } 741: if (sum != 0xBABA) 742: printk(KERN_WARNING "%s: Invalid EEPROM checksum %#4.4x, " 743: "check settings before activating this device!\n", 744: dev->name, sum); 745: /* Don't unregister_netdev(dev); as the EEPro may actually be 1.1.1.2 ! root 746: usable, especially if the MAC address is set later. ! 747: On the other hand, it may be unusable if MDI data is corrupted. */ 1.1 root 748: } 749: 750: /* Reset the chip: stop Tx and Rx processes and clear counters. 751: This takes less than 10usec and will easily finish before the next 752: action. */ 1.1.1.2 ! root 753: outl(PortReset, ioaddr + SCBPort); ! 754: inl(ioaddr + SCBPort); ! 755: /* Honor PortReset timing. */ ! 756: udelay(10); 1.1 root 757: 758: if (eeprom[3] & 0x0100) 759: product = "OEM i82557/i82558 10/100 Ethernet"; 760: else 1.1.1.2 ! root 761: product = pci_tbl[chip_idx].name; 1.1 root 762: 1.1.1.2 ! root 763: printk(KERN_INFO "%s: %s, ", dev->name, product); 1.1 root 764: 765: for (i = 0; i < 5; i++) 766: printk("%2.2X:", dev->dev_addr[i]); 1.1.1.2 ! root 767: printk("%2.2X, ", dev->dev_addr[i]); ! 768: #ifdef USE_IO ! 769: printk("I/O at %#3lx, ", ioaddr); ! 770: #endif ! 771: printk("IRQ %d.\n", pdev->irq); 1.1 root 772: 1.1.1.2 ! root 773: #if 1 || defined(kernel_bloat) 1.1 root 774: /* OK, this is pure kernel bloat. I don't like it when other drivers 775: waste non-pageable kernel space to emit similar messages, but I need 776: them for bug reports. */ 777: { 778: const char *connectors[] = {" RJ45", " BNC", " AUI", " MII"}; 779: /* The self-test results must be paragraph aligned. */ 780: s32 str[6], *volatile self_test_results; 781: int boguscnt = 16000; /* Timeout for set-test. */ 1.1.1.2 ! root 782: if ((eeprom[3] & 0x03) != 0x03) 1.1 root 783: printk(KERN_INFO " Receiver lock-up bug exists -- enabling" 784: " work-around.\n"); 785: printk(KERN_INFO " Board assembly %4.4x%2.2x-%3.3d, Physical" 786: " connectors present:", 787: eeprom[8], eeprom[9]>>8, eeprom[9] & 0xff); 788: for (i = 0; i < 4; i++) 789: if (eeprom[5] & (1<<i)) 790: printk(connectors[i]); 791: printk("\n"KERN_INFO" Primary interface chip %s PHY #%d.\n", 792: phys[(eeprom[6]>>8)&15], eeprom[6] & 0x1f); 793: if (eeprom[7] & 0x0700) 794: printk(KERN_INFO " Secondary interface chip %s.\n", 795: phys[(eeprom[7]>>8)&7]); 796: if (((eeprom[6]>>8) & 0x3f) == DP83840 797: || ((eeprom[6]>>8) & 0x3f) == DP83840A) { 798: int mdi_reg23 = mdio_read(ioaddr, eeprom[6] & 0x1f, 23) | 0x0422; 799: if (congenb) 800: mdi_reg23 |= 0x0100; 801: printk(KERN_INFO" DP83840 specific setup, setting register 23 to %4.4x.\n", 802: mdi_reg23); 803: mdio_write(ioaddr, eeprom[6] & 0x1f, 23, mdi_reg23); 804: } 805: if ((option >= 0) && (option & 0x70)) { 806: printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n", 807: (option & 0x20 ? 100 : 10), 808: (option & 0x10 ? "full" : "half")); 809: mdio_write(ioaddr, eeprom[6] & 0x1f, 0, 810: ((option & 0x20) ? 0x2000 : 0) | /* 100mbps? */ 811: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ 812: } 813: 814: /* Perform a system self-test. */ 815: self_test_results = (s32*) ((((long) str) + 15) & ~0xf); 816: self_test_results[0] = 0; 817: self_test_results[1] = -1; 1.1.1.2 ! root 818: outl(virt_to_bus(self_test_results) | PortSelfTest, ioaddr + SCBPort); 1.1 root 819: do { 820: udelay(10); 821: } while (self_test_results[1] == -1 && --boguscnt >= 0); 822: 823: if (boguscnt < 0) { /* Test optimized out. */ 824: printk(KERN_ERR "Self test failed, status %8.8x:\n" 825: KERN_ERR " Failure to initialize the i82557.\n" 826: KERN_ERR " Verify that the card is a bus-master" 827: " capable slot.\n", 828: self_test_results[1]); 829: } else 830: printk(KERN_INFO " General self-test: %s.\n" 831: KERN_INFO " Serial sub-system self-test: %s.\n" 832: KERN_INFO " Internal registers self-test: %s.\n" 833: KERN_INFO " ROM checksum self-test: %s (%#8.8x).\n", 834: self_test_results[1] & 0x1000 ? "failed" : "passed", 835: self_test_results[1] & 0x0020 ? "failed" : "passed", 836: self_test_results[1] & 0x0008 ? "failed" : "passed", 837: self_test_results[1] & 0x0004 ? "failed" : "passed", 838: self_test_results[0]); 839: } 840: #endif /* kernel_bloat */ 841: 1.1.1.2 ! root 842: outl(PortReset, ioaddr + SCBPort); ! 843: inl(ioaddr + SCBPort); ! 844: /* Honor PortReset timing. */ ! 845: udelay(10); 1.1 root 846: 847: /* We do a request_region() only to register /proc/ioports info. */ 848: request_region(ioaddr, SPEEDO3_TOTAL_SIZE, "Intel Speedo3 Ethernet"); 849: 850: dev->base_addr = ioaddr; 1.1.1.2 ! root 851: dev->irq = pdev->irq; 1.1 root 852: 853: sp = dev->priv; 1.1.1.2 ! root 854: if (dev->priv == NULL) { ! 855: void *mem = kmalloc(sizeof(*sp), GFP_KERNEL); ! 856: dev->priv = sp = mem; /* Cache align here if kmalloc does not. */ ! 857: sp->priv_addr = mem; ! 858: } 1.1 root 859: memset(sp, 0, sizeof(*sp)); 860: sp->next_module = root_speedo_dev; 861: root_speedo_dev = dev; 862: 1.1.1.2 ! root 863: sp->pci_bus = pci_bus; ! 864: sp->pci_devfn = pci_devfn; ! 865: sp->chip_id = chip_idx; ! 866: sp->acpi_pwr = acpi_idle_state; ! 867: 1.1 root 868: sp->full_duplex = option >= 0 && (option & 0x10) ? 1 : 0; 869: if (card_idx >= 0) { 870: if (full_duplex[card_idx] >= 0) 871: sp->full_duplex = full_duplex[card_idx]; 872: } 873: sp->default_port = option >= 0 ? (option & 0x0f) : 0; 874: 875: sp->phy[0] = eeprom[6]; 876: sp->phy[1] = eeprom[7]; 877: sp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1; 878: 879: if (sp->rx_bug) 880: printk(KERN_INFO " Receiver lock-up workaround activated.\n"); 881: 882: /* The Speedo-specific entries in the device structure. */ 883: dev->open = &speedo_open; 884: dev->hard_start_xmit = &speedo_start_xmit; 1.1.1.2 ! root 885: #if defined(HAS_NETIF_QUEUE) ! 886: dev->tx_timeout = &speedo_tx_timeout; ! 887: dev->watchdog_timeo = TX_TIMEOUT; ! 888: #endif 1.1 root 889: dev->stop = &speedo_close; 890: dev->get_stats = &speedo_get_stats; 891: dev->set_multicast_list = &set_rx_mode; 892: dev->do_ioctl = &speedo_ioctl; 893: 1.1.1.2 ! root 894: return dev; 1.1 root 895: } 896: 897: /* Serial EEPROM section. 898: A "bit" grungy, but we work our way through bit-by-bit :->. */ 899: /* EEPROM_Ctrl bits. */ 900: #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ 901: #define EE_CS 0x02 /* EEPROM chip select. */ 902: #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ 903: #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ 904: #define EE_ENB (0x4800 | EE_CS) 1.1.1.2 ! root 905: #define EE_WRITE_0 0x4802 ! 906: #define EE_WRITE_1 0x4806 ! 907: #define EE_OFFSET SCBeeprom ! 908: ! 909: /* The fixes for the code were kindly provided by Dragan Stancevic ! 910: <[email protected]> to strictly follow Intel specifications of EEPROM ! 911: access timing. ! 912: The publicly available sheet 64486302 (sec. 3.1) specifies 1us access ! 913: interval for serial EEPROM. However, it looks like that there is an ! 914: additional requirement dictating larger udelay's in the code below. ! 915: 2000/05/24 SAW */ ! 916: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len) ! 917: { ! 918: unsigned retval = 0; ! 919: long ee_addr = ioaddr + SCBeeprom; 1.1 root 920: 1.1.1.2 ! root 921: io_outw(EE_ENB, ee_addr); udelay(2); ! 922: io_outw(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2); 1.1 root 923: 1.1.1.2 ! root 924: /* Shift the command bits out. */ ! 925: do { ! 926: short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; ! 927: io_outw(dataval, ee_addr); udelay(2); ! 928: io_outw(dataval | EE_SHIFT_CLK, ee_addr); udelay(2); ! 929: retval = (retval << 1) | ((io_inw(ee_addr) & EE_DATA_READ) ? 1 : 0); ! 930: } while (--cmd_len >= 0); ! 931: io_outw(EE_ENB, ee_addr); udelay(2); 1.1 root 932: 933: /* Terminate the EEPROM access. */ 1.1.1.2 ! root 934: io_outw(EE_ENB & ~EE_CS, ee_addr); 1.1 root 935: return retval; 936: } 937: 1.1.1.2 ! root 938: static int mdio_read(long ioaddr, int phy_id, int location) 1.1 root 939: { 940: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */ 941: outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI); 942: do { 943: val = inl(ioaddr + SCBCtrlMDI); 944: if (--boguscnt < 0) { 945: printk(KERN_ERR " mdio_read() timed out with val = %8.8x.\n", val); 1.1.1.2 ! root 946: break; 1.1 root 947: } 948: } while (! (val & 0x10000000)); 949: return val & 0xffff; 950: } 951: 1.1.1.2 ! root 952: static int mdio_write(long ioaddr, int phy_id, int location, int value) 1.1 root 953: { 954: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */ 955: outl(0x04000000 | (location<<16) | (phy_id<<21) | value, 956: ioaddr + SCBCtrlMDI); 957: do { 958: val = inl(ioaddr + SCBCtrlMDI); 959: if (--boguscnt < 0) { 960: printk(KERN_ERR" mdio_write() timed out with val = %8.8x.\n", val); 1.1.1.2 ! root 961: break; 1.1 root 962: } 963: } while (! (val & 0x10000000)); 964: return val & 0xffff; 965: } 966: 967: 968: static int 1.1.1.2 ! root 969: speedo_open(struct net_device *dev) 1.1 root 970: { 971: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 972: long ioaddr = dev->base_addr; 1.1 root 973: 974: if (speedo_debug > 1) 975: printk(KERN_DEBUG "%s: speedo_open() irq %d.\n", dev->name, dev->irq); 976: 977: MOD_INC_USE_COUNT; 978: 1.1.1.2 ! root 979: /* Set up the Tx queue early.. */ ! 980: sp->cur_tx = 0; ! 981: sp->dirty_tx = 0; ! 982: sp->last_cmd = 0; ! 983: sp->tx_full = 0; ! 984: sp->lock = (spinlock_t) SPIN_LOCK_UNLOCKED; ! 985: sp->in_interrupt = 0; 1.1 root 986: 1.1.1.2 ! root 987: /* .. we can safely take handler calls during init. */ ! 988: if (request_irq(dev->irq, &speedo_interrupt, SA_SHIRQ, dev->name, dev)) { ! 989: MOD_DEC_USE_COUNT; ! 990: return -EAGAIN; ! 991: } 1.1 root 992: 1.1.1.2 ! root 993: dev->if_port = sp->default_port; 1.1 root 994: 1.1.1.2 ! root 995: #ifdef oh_no_you_dont_unless_you_honour_the_options_passed_in_to_us ! 996: /* Retrigger negotiation to reset previous errors. */ ! 997: if ((sp->phy[0] & 0x8000) == 0) { ! 998: int phy_addr = sp->phy[0] & 0x1f ; ! 999: /* Use 0x3300 for restarting NWay, other values to force xcvr: ! 1000: 0x0000 10-HD ! 1001: 0x0100 10-FD ! 1002: 0x2000 100-HD ! 1003: 0x2100 100-FD ! 1004: */ ! 1005: #ifdef honor_default_port ! 1006: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]); ! 1007: #else ! 1008: mdio_write(ioaddr, phy_addr, 0, 0x3300); ! 1009: #endif 1.1 root 1010: } 1.1.1.2 ! root 1011: #endif 1.1 root 1012: 1.1.1.2 ! root 1013: speedo_init_rx_ring(dev); 1.1 root 1014: 1.1.1.2 ! root 1015: /* Fire up the hardware. */ ! 1016: outw(SCBMaskAll, ioaddr + SCBCmd); ! 1017: speedo_resume(dev); 1.1 root 1018: 1019: dev->interrupt = 0; 1020: dev->start = 1; 1.1.1.2 ! root 1021: netif_start_queue(dev); 1.1 root 1022: 1023: /* Setup the chip and configure the multicast list. */ 1.1.1.2 ! root 1024: sp->mc_setup_head = NULL; ! 1025: sp->mc_setup_tail = NULL; ! 1026: sp->flow_ctrl = sp->partner = 0; 1.1 root 1027: sp->rx_mode = -1; /* Invalid -> always reset the mode. */ 1028: set_rx_mode(dev); 1.1.1.2 ! root 1029: if ((sp->phy[0] & 0x8000) == 0) ! 1030: sp->advertising = mdio_read(ioaddr, sp->phy[0] & 0x1f, 4); 1.1 root 1031: 1032: if (speedo_debug > 2) { 1033: printk(KERN_DEBUG "%s: Done speedo_open(), status %8.8x.\n", 1034: dev->name, inw(ioaddr + SCBStatus)); 1035: } 1.1.1.2 ! root 1036: 1.1 root 1037: /* Set the timer. The timer serves a dual purpose: 1038: 1) to monitor the media interface (e.g. link beat) and perhaps switch 1039: to an alternate media type 1040: 2) to monitor Rx activity, and restart the Rx process if the receiver 1041: hangs. */ 1042: init_timer(&sp->timer); 1043: sp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */ 1044: sp->timer.data = (unsigned long)dev; 1045: sp->timer.function = &speedo_timer; /* timer handler */ 1046: add_timer(&sp->timer); 1047: 1.1.1.2 ! root 1048: /* No need to wait for the command unit to accept here. */ ! 1049: if ((sp->phy[0] & 0x8000) == 0) ! 1050: mdio_read(ioaddr, sp->phy[0] & 0x1f, 0); ! 1051: 1.1 root 1052: return 0; 1053: } 1054: 1.1.1.2 ! root 1055: /* Start the chip hardware after a full reset. */ ! 1056: static void speedo_resume(struct net_device *dev) ! 1057: { ! 1058: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1059: long ioaddr = dev->base_addr; ! 1060: ! 1061: /* Start with a Tx threshold of 256 (0x..20.... 8 byte units). */ ! 1062: sp->tx_threshold = 0x01208000; ! 1063: ! 1064: /* Set the segment registers to '0'. */ ! 1065: wait_for_cmd_done(ioaddr + SCBCmd); ! 1066: outl(0, ioaddr + SCBPointer); ! 1067: /* impose a delay to avoid a bug */ ! 1068: inl(ioaddr + SCBPointer); ! 1069: udelay(10); ! 1070: outb(RxAddrLoad, ioaddr + SCBCmd); ! 1071: wait_for_cmd_done(ioaddr + SCBCmd); ! 1072: outb(CUCmdBase, ioaddr + SCBCmd); ! 1073: wait_for_cmd_done(ioaddr + SCBCmd); ! 1074: ! 1075: /* Load the statistics block and rx ring addresses. */ ! 1076: outl(virt_to_bus(&sp->lstats), ioaddr + SCBPointer); ! 1077: outb(CUStatsAddr, ioaddr + SCBCmd); ! 1078: sp->lstats.done_marker = 0; ! 1079: wait_for_cmd_done(ioaddr + SCBCmd); ! 1080: ! 1081: if (sp->rx_ringp[sp->cur_rx % RX_RING_SIZE] == NULL) { ! 1082: if (speedo_debug > 2) ! 1083: printk(KERN_DEBUG "%s: NULL cur_rx in speedo_resume().\n", ! 1084: dev->name); ! 1085: } else { ! 1086: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]), ! 1087: ioaddr + SCBPointer); ! 1088: outb(RxStart, ioaddr + SCBCmd); ! 1089: wait_for_cmd_done(ioaddr + SCBCmd); ! 1090: } ! 1091: ! 1092: outb(CUDumpStats, ioaddr + SCBCmd); ! 1093: ! 1094: /* Fill the first command with our physical address. */ ! 1095: { ! 1096: struct descriptor *ias_cmd; ! 1097: ! 1098: ias_cmd = ! 1099: (struct descriptor *)&sp->tx_ring[sp->cur_tx++ % TX_RING_SIZE]; ! 1100: /* Avoid a bug(?!) here by marking the command already completed. */ ! 1101: ias_cmd->cmd_status = cpu_to_le32((CmdSuspend | CmdIASetup) | 0xa000); ! 1102: ias_cmd->link = ! 1103: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]); ! 1104: memcpy(ias_cmd->params, dev->dev_addr, 6); ! 1105: sp->last_cmd = ias_cmd; ! 1106: } ! 1107: ! 1108: /* Start the chip's Tx process and unmask interrupts. */ ! 1109: wait_for_cmd_done(ioaddr + SCBCmd); ! 1110: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]), ! 1111: ioaddr + SCBPointer); ! 1112: /* We are not ACK-ing FCP and ER in the interrupt handler yet so they should ! 1113: remain masked --Dragan */ ! 1114: outw(CUStart | SCBMaskEarlyRx | SCBMaskFlowCtl, ioaddr + SCBCmd); ! 1115: } ! 1116: 1.1 root 1117: /* Media monitoring and control. */ 1118: static void speedo_timer(unsigned long data) 1119: { 1.1.1.2 ! root 1120: struct net_device *dev = (struct net_device *)data; 1.1 root 1121: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1122: long ioaddr = dev->base_addr; ! 1123: int phy_num = sp->phy[0] & 0x1f; 1.1 root 1124: 1.1.1.2 ! root 1125: /* We have MII and lost link beat. */ ! 1126: if ((sp->phy[0] & 0x8000) == 0) { ! 1127: int partner = mdio_read(ioaddr, phy_num, 5); ! 1128: if (partner != sp->partner) { ! 1129: int flow_ctrl = sp->advertising & partner & 0x0400 ? 1 : 0; ! 1130: if (speedo_debug > 2) { ! 1131: printk(KERN_DEBUG "%s: Link status change.\n", dev->name); ! 1132: printk(KERN_DEBUG "%s: Old partner %x, new %x, adv %x.\n", ! 1133: dev->name, sp->partner, partner, sp->advertising); ! 1134: } ! 1135: sp->partner = partner; ! 1136: if (flow_ctrl != sp->flow_ctrl) { ! 1137: sp->flow_ctrl = flow_ctrl; ! 1138: sp->rx_mode = -1; /* Trigger a reload. */ ! 1139: } ! 1140: /* Clear sticky bit. */ ! 1141: mdio_read(ioaddr, phy_num, 1); ! 1142: /* If link beat has returned... */ ! 1143: if (mdio_read(ioaddr, phy_num, 1) & 0x0004) ! 1144: dev->flags |= IFF_RUNNING; ! 1145: else ! 1146: dev->flags &= ~IFF_RUNNING; ! 1147: } ! 1148: } 1.1 root 1149: if (speedo_debug > 3) { 1.1.1.2 ! root 1150: printk(KERN_DEBUG "%s: Media control tick, status %4.4x.\n", 1.1 root 1151: dev->name, inw(ioaddr + SCBStatus)); 1152: } 1.1.1.2 ! root 1153: if (sp->rx_mode < 0 || ! 1154: (sp->rx_bug && jiffies - sp->last_rx_time > 2*HZ)) { ! 1155: /* We haven't received a packet in a Long Time. We might have been ! 1156: bitten by the receiver hang bug. This can be cleared by sending ! 1157: a set multicast list command. */ ! 1158: if (speedo_debug > 2) ! 1159: printk(KERN_DEBUG "%s: Sending a multicast list set command" ! 1160: " from a timer routine.\n", dev->name); ! 1161: set_rx_mode(dev); 1.1 root 1162: } 1.1.1.2 ! root 1163: /* We must continue to monitor the media. */ ! 1164: sp->timer.expires = RUN_AT(2*HZ); /* 2.0 sec. */ ! 1165: add_timer(&sp->timer); ! 1166: } ! 1167: ! 1168: static void speedo_show_state(struct net_device *dev) ! 1169: { ! 1170: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1171: #if 0 ! 1172: long ioaddr = dev->base_addr; ! 1173: int phy_num = sp->phy[0] & 0x1f; ! 1174: #endif ! 1175: int i; ! 1176: ! 1177: /* Print a few items for debugging. */ ! 1178: if (speedo_debug > 0) { ! 1179: int i; ! 1180: printk(KERN_DEBUG "%s: Tx ring dump, Tx queue %u / %u:\n", dev->name, ! 1181: sp->cur_tx, sp->dirty_tx); ! 1182: for (i = 0; i < TX_RING_SIZE; i++) ! 1183: printk(KERN_DEBUG "%s: %c%c%2d %8.8x.\n", dev->name, ! 1184: i == sp->dirty_tx % TX_RING_SIZE ? '*' : ' ', ! 1185: i == sp->cur_tx % TX_RING_SIZE ? '=' : ' ', ! 1186: i, sp->tx_ring[i].status); ! 1187: } ! 1188: printk(KERN_DEBUG "%s: Printing Rx ring" ! 1189: " (next to receive into %u, dirty index %u).\n", ! 1190: dev->name, sp->cur_rx, sp->dirty_rx); ! 1191: ! 1192: for (i = 0; i < RX_RING_SIZE; i++) ! 1193: printk(KERN_DEBUG "%s: %c%c%c%2d %8.8x.\n", dev->name, ! 1194: sp->rx_ringp[i] == sp->last_rxf ? 'l' : ' ', ! 1195: i == sp->dirty_rx % RX_RING_SIZE ? '*' : ' ', ! 1196: i == sp->cur_rx % RX_RING_SIZE ? '=' : ' ', ! 1197: i, (sp->rx_ringp[i] != NULL) ? ! 1198: (unsigned)sp->rx_ringp[i]->status : 0); ! 1199: ! 1200: #if 0 ! 1201: for (i = 0; i < 16; i++) { ! 1202: /* FIXME: what does it mean? --SAW */ ! 1203: if (i == 6) i = 21; ! 1204: printk(KERN_DEBUG "%s: PHY index %d register %d is %4.4x.\n", ! 1205: dev->name, phy_num, i, mdio_read(ioaddr, phy_num, i)); ! 1206: } ! 1207: #endif ! 1208: 1.1 root 1209: } 1210: 1211: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ 1212: static void 1.1.1.2 ! root 1213: speedo_init_rx_ring(struct net_device *dev) 1.1 root 1214: { 1215: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1216: struct RxFD *rxf, *last_rxf = NULL; 1217: int i; 1218: 1219: sp->cur_rx = 0; 1220: 1221: for (i = 0; i < RX_RING_SIZE; i++) { 1222: struct sk_buff *skb; 1.1.1.2 ! root 1223: skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD)); 1.1 root 1224: sp->rx_skbuff[i] = skb; 1225: if (skb == NULL) 1.1.1.2 ! root 1226: break; /* OK. Just initially short of Rx bufs. */ 1.1 root 1227: skb->dev = dev; /* Mark as being used by this device. */ 1228: rxf = (struct RxFD *)skb->tail; 1229: sp->rx_ringp[i] = rxf; 1.1.1.2 ! root 1230: skb_reserve(skb, sizeof(struct RxFD)); 1.1 root 1231: if (last_rxf) 1.1.1.2 ! root 1232: last_rxf->link = virt_to_le32desc(rxf); 1.1 root 1233: last_rxf = rxf; 1.1.1.2 ! root 1234: rxf->status = cpu_to_le32(0x00000001); /* '1' is flag value only. */ 1.1 root 1235: rxf->link = 0; /* None yet. */ 1.1.1.2 ! root 1236: /* This field unused by i82557. */ ! 1237: rxf->rx_buf_addr = 0xffffffff; ! 1238: rxf->count = cpu_to_le32(PKT_BUF_SZ << 16); 1.1 root 1239: } 1.1.1.2 ! root 1240: sp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); 1.1 root 1241: /* Mark the last entry as end-of-list. */ 1.1.1.2 ! root 1242: last_rxf->status = cpu_to_le32(0xC0000002); /* '2' is flag value only. */ 1.1 root 1243: sp->last_rxf = last_rxf; 1244: } 1245: 1.1.1.2 ! root 1246: static void speedo_purge_tx(struct net_device *dev) 1.1 root 1247: { 1248: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1249: int entry; 1.1 root 1250: 1.1.1.2 ! root 1251: while ((int)(sp->cur_tx - sp->dirty_tx) > 0) { ! 1252: entry = sp->dirty_tx % TX_RING_SIZE; ! 1253: if (sp->tx_skbuff[entry]) { ! 1254: sp->stats.tx_errors++; ! 1255: dev_free_skb(sp->tx_skbuff[entry]); ! 1256: sp->tx_skbuff[entry] = 0; ! 1257: } ! 1258: sp->dirty_tx++; ! 1259: } ! 1260: while (sp->mc_setup_head != NULL) { ! 1261: struct speedo_mc_block *t; ! 1262: if (speedo_debug > 1) ! 1263: printk(KERN_DEBUG "%s: freeing mc frame.\n", dev->name); ! 1264: t = sp->mc_setup_head->next; ! 1265: kfree(sp->mc_setup_head); ! 1266: sp->mc_setup_head = t; 1.1 root 1267: } 1.1.1.2 ! root 1268: sp->mc_setup_tail = NULL; ! 1269: sp->tx_full = 0; ! 1270: netif_wake_queue(dev); ! 1271: } ! 1272: ! 1273: static void reset_mii(struct net_device *dev) ! 1274: { ! 1275: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1276: long ioaddr = dev->base_addr; 1.1 root 1277: /* Reset the MII transceiver, suggested by Fred Young @ scalable.com. */ 1278: if ((sp->phy[0] & 0x8000) == 0) { 1279: int phy_addr = sp->phy[0] & 0x1f; 1.1.1.2 ! root 1280: int advertising = mdio_read(ioaddr, phy_addr, 4); ! 1281: int mii_bmcr = mdio_read(ioaddr, phy_addr, 0); 1.1 root 1282: mdio_write(ioaddr, phy_addr, 0, 0x0400); 1283: mdio_write(ioaddr, phy_addr, 1, 0x0000); 1284: mdio_write(ioaddr, phy_addr, 4, 0x0000); 1285: mdio_write(ioaddr, phy_addr, 0, 0x8000); 1.1.1.2 ! root 1286: #ifdef honor_default_port ! 1287: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]); ! 1288: #else ! 1289: mdio_read(ioaddr, phy_addr, 0); ! 1290: mdio_write(ioaddr, phy_addr, 0, mii_bmcr); ! 1291: mdio_write(ioaddr, phy_addr, 4, advertising); ! 1292: #endif ! 1293: } ! 1294: } ! 1295: ! 1296: static void speedo_tx_timeout(struct net_device *dev) ! 1297: { ! 1298: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1299: long ioaddr = dev->base_addr; ! 1300: int status = inw(ioaddr + SCBStatus); ! 1301: unsigned long flags; ! 1302: ! 1303: printk(KERN_WARNING "%s: Transmit timed out: status %4.4x " ! 1304: " %4.4x at %d/%d command %8.8x.\n", ! 1305: dev->name, status, inw(ioaddr + SCBCmd), ! 1306: sp->dirty_tx, sp->cur_tx, ! 1307: sp->tx_ring[sp->dirty_tx % TX_RING_SIZE].status); ! 1308: ! 1309: /* Trigger a stats dump to give time before the reset. */ ! 1310: speedo_get_stats(dev); ! 1311: ! 1312: speedo_show_state(dev); ! 1313: #if 0 ! 1314: if ((status & 0x00C0) != 0x0080 ! 1315: && (status & 0x003C) == 0x0010) { ! 1316: /* Only the command unit has stopped. */ ! 1317: printk(KERN_WARNING "%s: Trying to restart the transmitter...\n", ! 1318: dev->name); ! 1319: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]), ! 1320: ioaddr + SCBPointer); ! 1321: outw(CUStart, ioaddr + SCBCmd); ! 1322: reset_mii(dev); ! 1323: } else { ! 1324: #else ! 1325: { ! 1326: #endif ! 1327: start_bh_atomic(); ! 1328: /* Ensure that timer routine doesn't run! */ ! 1329: del_timer(&sp->timer); ! 1330: end_bh_atomic(); ! 1331: /* Reset the Tx and Rx units. */ ! 1332: outl(PortReset, ioaddr + SCBPort); ! 1333: /* We may get spurious interrupts here. But I don't think that they ! 1334: may do much harm. 1999/12/09 SAW */ ! 1335: udelay(10); ! 1336: /* Disable interrupts. */ ! 1337: outw(SCBMaskAll, ioaddr + SCBCmd); ! 1338: synchronize_irq(); ! 1339: speedo_tx_buffer_gc(dev); ! 1340: /* Free as much as possible. ! 1341: It helps to recover from a hang because of out-of-memory. ! 1342: It also simplifies speedo_resume() in case TX ring is full or ! 1343: close-to-be full. */ ! 1344: speedo_purge_tx(dev); ! 1345: speedo_refill_rx_buffers(dev, 1); ! 1346: spin_lock_irqsave(&sp->lock, flags); ! 1347: speedo_resume(dev); ! 1348: sp->rx_mode = -1; ! 1349: dev->trans_start = jiffies; ! 1350: spin_unlock_irqrestore(&sp->lock, flags); ! 1351: set_rx_mode(dev); /* it takes the spinlock itself --SAW */ ! 1352: /* Reset MII transceiver. Do it before starting the timer to serialize ! 1353: mdio_xxx operations. Yes, it's a paranoya :-) 2000/05/09 SAW */ ! 1354: reset_mii(dev); ! 1355: sp->timer.expires = RUN_AT(2*HZ); ! 1356: add_timer(&sp->timer); 1.1 root 1357: } 1358: return; 1359: } 1360: 1361: static int 1.1.1.2 ! root 1362: speedo_start_xmit(struct sk_buff *skb, struct net_device *dev) 1.1 root 1363: { 1364: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1365: long ioaddr = dev->base_addr; 1.1 root 1366: int entry; 1367: 1.1.1.2 ! root 1368: #if ! defined(HAS_NETIF_QUEUE) ! 1369: if (test_bit(0, (void*)&dev->tbusy) != 0) { 1.1 root 1370: int tickssofar = jiffies - dev->trans_start; 1371: if (tickssofar < TX_TIMEOUT - 2) 1372: return 1; 1373: if (tickssofar < TX_TIMEOUT) { 1374: /* Reap sent packets from the full Tx queue. */ 1.1.1.2 ! root 1375: unsigned long flags; ! 1376: /* Take a spinlock to make wait_for_cmd_done and sending the ! 1377: command atomic. --SAW */ ! 1378: spin_lock_irqsave(&sp->lock, flags); ! 1379: wait_for_cmd_done(ioaddr + SCBCmd); ! 1380: outw(SCBTriggerIntr, ioaddr + SCBCmd); ! 1381: spin_unlock_irqrestore(&sp->lock, flags); 1.1 root 1382: return 1; 1383: } 1384: speedo_tx_timeout(dev); 1385: return 1; 1386: } 1.1.1.2 ! root 1387: #endif 1.1 root 1388: 1389: { /* Prevent interrupts from changing the Tx ring from underneath us. */ 1390: unsigned long flags; 1391: 1.1.1.2 ! root 1392: spin_lock_irqsave(&sp->lock, flags); ! 1393: ! 1394: /* Check if there are enough space. */ ! 1395: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) { ! 1396: printk(KERN_ERR "%s: incorrect tbusy state, fixed.\n", dev->name); ! 1397: netif_stop_queue(dev); ! 1398: sp->tx_full = 1; ! 1399: spin_unlock_irqrestore(&sp->lock, flags); ! 1400: return 1; ! 1401: } ! 1402: 1.1 root 1403: /* Calculate the Tx descriptor entry. */ 1404: entry = sp->cur_tx++ % TX_RING_SIZE; 1405: 1406: sp->tx_skbuff[entry] = skb; 1407: sp->tx_ring[entry].status = 1.1.1.2 ! root 1408: cpu_to_le32(CmdSuspend | CmdTx | CmdTxFlex); ! 1409: if (!(entry & ((TX_RING_SIZE>>2)-1))) ! 1410: sp->tx_ring[entry].status |= cpu_to_le32(CmdIntr); 1.1 root 1411: sp->tx_ring[entry].link = 1.1.1.2 ! root 1412: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]); 1.1 root 1413: sp->tx_ring[entry].tx_desc_addr = 1.1.1.2 ! root 1414: virt_to_le32desc(&sp->tx_ring[entry].tx_buf_addr0); ! 1415: /* The data region is always in one buffer descriptor. */ ! 1416: sp->tx_ring[entry].count = cpu_to_le32(sp->tx_threshold); ! 1417: sp->tx_ring[entry].tx_buf_addr0 = virt_to_le32desc(skb->data); ! 1418: sp->tx_ring[entry].tx_buf_size0 = cpu_to_le32(skb->len); 1.1 root 1419: /* Trigger the command unit resume. */ 1420: wait_for_cmd_done(ioaddr + SCBCmd); 1.1.1.2 ! root 1421: clear_suspend(sp->last_cmd); ! 1422: /* We want the time window between clearing suspend flag on the previous ! 1423: command and resuming CU to be as small as possible. ! 1424: Interrupts in between are very undesired. --SAW */ ! 1425: outb(CUResume, ioaddr + SCBCmd); ! 1426: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry]; 1.1 root 1427: 1.1.1.2 ! root 1428: /* Leave room for set_rx_mode(). If there is no more space than reserved ! 1429: for multicast filter mark the ring as full. */ ! 1430: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) { ! 1431: netif_stop_queue(dev); ! 1432: sp->tx_full = 1; ! 1433: } ! 1434: ! 1435: spin_unlock_irqrestore(&sp->lock, flags); ! 1436: } 1.1 root 1437: 1438: dev->trans_start = jiffies; 1439: 1440: return 0; 1441: } 1442: 1.1.1.2 ! root 1443: static void speedo_tx_buffer_gc(struct net_device *dev) ! 1444: { ! 1445: unsigned int dirty_tx; ! 1446: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1447: ! 1448: dirty_tx = sp->dirty_tx; ! 1449: while ((int)(sp->cur_tx - dirty_tx) > 0) { ! 1450: int entry = dirty_tx % TX_RING_SIZE; ! 1451: int status = le32_to_cpu(sp->tx_ring[entry].status); ! 1452: ! 1453: if (speedo_debug > 5) ! 1454: printk(KERN_DEBUG " scavenge candidate %d status %4.4x.\n", ! 1455: entry, status); ! 1456: if ((status & StatusComplete) == 0) ! 1457: break; /* It still hasn't been processed. */ ! 1458: if (status & TxUnderrun) ! 1459: if (sp->tx_threshold < 0x01e08000) { ! 1460: if (speedo_debug > 2) ! 1461: printk(KERN_DEBUG "%s: TX underrun, threshold adjusted.\n", ! 1462: dev->name); ! 1463: sp->tx_threshold += 0x00040000; ! 1464: } ! 1465: /* Free the original skb. */ ! 1466: if (sp->tx_skbuff[entry]) { ! 1467: sp->stats.tx_packets++; /* Count only user packets. */ ! 1468: sp->stats.tx_bytes += sp->tx_skbuff[entry]->len; ! 1469: dev_free_skb(sp->tx_skbuff[entry]); ! 1470: sp->tx_skbuff[entry] = 0; ! 1471: } ! 1472: dirty_tx++; ! 1473: } ! 1474: ! 1475: if (speedo_debug && (int)(sp->cur_tx - dirty_tx) > TX_RING_SIZE) { ! 1476: printk(KERN_ERR "out-of-sync dirty pointer, %d vs. %d," ! 1477: " full=%d.\n", ! 1478: dirty_tx, sp->cur_tx, sp->tx_full); ! 1479: dirty_tx += TX_RING_SIZE; ! 1480: } ! 1481: ! 1482: while (sp->mc_setup_head != NULL ! 1483: && (int)(dirty_tx - sp->mc_setup_head->tx - 1) > 0) { ! 1484: struct speedo_mc_block *t; ! 1485: if (speedo_debug > 1) ! 1486: printk(KERN_DEBUG "%s: freeing mc frame.\n", dev->name); ! 1487: t = sp->mc_setup_head->next; ! 1488: kfree(sp->mc_setup_head); ! 1489: sp->mc_setup_head = t; ! 1490: } ! 1491: if (sp->mc_setup_head == NULL) ! 1492: sp->mc_setup_tail = NULL; ! 1493: ! 1494: sp->dirty_tx = dirty_tx; ! 1495: } ! 1496: 1.1 root 1497: /* The interrupt handler does all of the Rx thread work and cleans up 1498: after the Tx thread. */ 1499: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs) 1500: { 1.1.1.2 ! root 1501: struct net_device *dev = (struct net_device *)dev_instance; 1.1 root 1502: struct speedo_private *sp; 1.1.1.2 ! root 1503: long ioaddr, boguscnt = max_interrupt_work; 1.1 root 1504: unsigned short status; 1505: 1506: #ifndef final_version 1507: if (dev == NULL) { 1508: printk(KERN_ERR "speedo_interrupt(): irq %d for unknown device.\n", irq); 1509: return; 1510: } 1511: #endif 1512: 1513: ioaddr = dev->base_addr; 1514: sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1515: 1.1 root 1516: #ifndef final_version 1517: /* A lock to prevent simultaneous entry on SMP machines. */ 1518: if (test_and_set_bit(0, (void*)&sp->in_interrupt)) { 1519: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n", 1520: dev->name); 1.1.1.2 ! root 1521: sp->in_interrupt = 0; /* Avoid halting machine. */ 1.1 root 1522: return; 1523: } 1524: dev->interrupt = 1; 1525: #endif 1526: 1527: do { 1528: status = inw(ioaddr + SCBStatus); 1529: /* Acknowledge all of the current interrupt sources ASAP. */ 1.1.1.2 ! root 1530: /* Will change from 0xfc00 to 0xff00 when we start handling ! 1531: FCP and ER interrupts --Dragan */ 1.1 root 1532: outw(status & 0xfc00, ioaddr + SCBStatus); 1533: 1.1.1.2 ! root 1534: if (speedo_debug > 3) 1.1 root 1535: printk(KERN_DEBUG "%s: interrupt status=%#4.4x.\n", 1536: dev->name, status); 1537: 1538: if ((status & 0xfc00) == 0) 1539: break; 1540: 1.1.1.2 ! root 1541: /* Always check if all rx buffers are allocated. --SAW */ ! 1542: speedo_refill_rx_buffers(dev, 0); ! 1543: ! 1544: if ((status & 0x5000) || /* Packet received, or Rx error. */ ! 1545: (sp->rx_ring_state&(RrNoMem|RrPostponed)) == RrPostponed) ! 1546: /* Need to gather the postponed packet. */ 1.1 root 1547: speedo_rx(dev); 1548: 1549: if (status & 0x1000) { 1.1.1.2 ! root 1550: spin_lock(&sp->lock); ! 1551: if ((status & 0x003c) == 0x0028) { /* No more Rx buffers. */ ! 1552: struct RxFD *rxf; ! 1553: printk(KERN_WARNING "%s: card reports no RX buffers.\n", ! 1554: dev->name); ! 1555: rxf = sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]; ! 1556: if (rxf == NULL) { ! 1557: if (speedo_debug > 2) ! 1558: printk(KERN_DEBUG ! 1559: "%s: NULL cur_rx in speedo_interrupt().\n", ! 1560: dev->name); ! 1561: sp->rx_ring_state |= RrNoMem|RrNoResources; ! 1562: } else if (rxf == sp->last_rxf) { ! 1563: if (speedo_debug > 2) ! 1564: printk(KERN_DEBUG ! 1565: "%s: cur_rx is last in speedo_interrupt().\n", ! 1566: dev->name); ! 1567: sp->rx_ring_state |= RrNoMem|RrNoResources; ! 1568: } else ! 1569: outb(RxResumeNoResources, ioaddr + SCBCmd); ! 1570: } else if ((status & 0x003c) == 0x0008) { /* No resources. */ ! 1571: struct RxFD *rxf; ! 1572: printk(KERN_WARNING "%s: card reports no resources.\n", ! 1573: dev->name); ! 1574: rxf = sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]; ! 1575: if (rxf == NULL) { ! 1576: if (speedo_debug > 2) ! 1577: printk(KERN_DEBUG ! 1578: "%s: NULL cur_rx in speedo_interrupt().\n", ! 1579: dev->name); ! 1580: sp->rx_ring_state |= RrNoMem|RrNoResources; ! 1581: } else if (rxf == sp->last_rxf) { ! 1582: if (speedo_debug > 2) ! 1583: printk(KERN_DEBUG ! 1584: "%s: cur_rx is last in speedo_interrupt().\n", ! 1585: dev->name); ! 1586: sp->rx_ring_state |= RrNoMem|RrNoResources; ! 1587: } else { ! 1588: /* Restart the receiver. */ ! 1589: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]), ! 1590: ioaddr + SCBPointer); ! 1591: outb(RxStart, ioaddr + SCBCmd); ! 1592: } ! 1593: } ! 1594: sp->stats.rx_errors++; ! 1595: spin_unlock(&sp->lock); ! 1596: } ! 1597: ! 1598: if ((sp->rx_ring_state&(RrNoMem|RrNoResources)) == RrNoResources) { ! 1599: printk(KERN_WARNING ! 1600: "%s: restart the receiver after a possible hang.\n", ! 1601: dev->name); ! 1602: spin_lock(&sp->lock); ! 1603: /* Restart the receiver. ! 1604: I'm not sure if it's always right to restart the receiver ! 1605: here but I don't know another way to prevent receiver hangs. ! 1606: 1999/12/25 SAW */ 1.1 root 1607: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]), 1.1.1.2 ! root 1608: ioaddr + SCBPointer); ! 1609: outb(RxStart, ioaddr + SCBCmd); ! 1610: sp->rx_ring_state &= ~RrNoResources; ! 1611: spin_unlock(&sp->lock); 1.1 root 1612: } 1613: 1614: /* User interrupt, Command/Tx unit interrupt or CU not active. */ 1615: if (status & 0xA400) { 1.1.1.2 ! root 1616: spin_lock(&sp->lock); ! 1617: speedo_tx_buffer_gc(dev); ! 1618: if (sp->tx_full ! 1619: && (int)(sp->cur_tx - sp->dirty_tx) < TX_QUEUE_UNFULL) { ! 1620: /* The ring is no longer full. */ 1.1 root 1621: sp->tx_full = 0; 1.1.1.2 ! root 1622: netif_wake_queue(dev); /* Attention: under a spinlock. --SAW */ 1.1 root 1623: } 1.1.1.2 ! root 1624: spin_unlock(&sp->lock); 1.1 root 1625: } 1626: 1627: if (--boguscnt < 0) { 1628: printk(KERN_ERR "%s: Too much work at interrupt, status=0x%4.4x.\n", 1629: dev->name, status); 1630: /* Clear all interrupt sources. */ 1.1.1.2 ! root 1631: /* Will change from 0xfc00 to 0xff00 when we start handling ! 1632: FCP and ER interrupts --Dragan */ 1.1 root 1633: outl(0xfc00, ioaddr + SCBStatus); 1634: break; 1635: } 1636: } while (1); 1637: 1638: if (speedo_debug > 3) 1639: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n", 1640: dev->name, inw(ioaddr + SCBStatus)); 1641: 1642: dev->interrupt = 0; 1643: clear_bit(0, (void*)&sp->in_interrupt); 1644: return; 1645: } 1646: 1.1.1.2 ! root 1647: static inline struct RxFD *speedo_rx_alloc(struct net_device *dev, int entry) ! 1648: { ! 1649: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1650: struct RxFD *rxf; ! 1651: struct sk_buff *skb; ! 1652: /* Get a fresh skbuff to replace the consumed one. */ ! 1653: skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD)); ! 1654: sp->rx_skbuff[entry] = skb; ! 1655: if (skb == NULL) { ! 1656: sp->rx_ringp[entry] = NULL; ! 1657: return NULL; ! 1658: } ! 1659: rxf = sp->rx_ringp[entry] = (struct RxFD *)skb->tail; ! 1660: skb->dev = dev; ! 1661: skb_reserve(skb, sizeof(struct RxFD)); ! 1662: rxf->rx_buf_addr = virt_to_bus(skb->tail); ! 1663: return rxf; ! 1664: } ! 1665: ! 1666: static inline void speedo_rx_link(struct net_device *dev, int entry, ! 1667: struct RxFD *rxf) ! 1668: { ! 1669: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1670: rxf->status = cpu_to_le32(0xC0000001); /* '1' for driver use only. */ ! 1671: rxf->link = 0; /* None yet. */ ! 1672: rxf->count = cpu_to_le32(PKT_BUF_SZ << 16); ! 1673: sp->last_rxf->link = virt_to_le32desc(rxf); ! 1674: sp->last_rxf->status &= cpu_to_le32(~0xC0000000); ! 1675: sp->last_rxf = rxf; ! 1676: } ! 1677: ! 1678: static int speedo_refill_rx_buf(struct net_device *dev, int force) ! 1679: { ! 1680: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1681: int entry; ! 1682: struct RxFD *rxf; ! 1683: ! 1684: entry = sp->dirty_rx % RX_RING_SIZE; ! 1685: if (sp->rx_skbuff[entry] == NULL) { ! 1686: rxf = speedo_rx_alloc(dev, entry); ! 1687: if (rxf == NULL) { ! 1688: unsigned int forw; ! 1689: int forw_entry; ! 1690: if (speedo_debug > 2 || !(sp->rx_ring_state & RrOOMReported)) { ! 1691: printk(KERN_WARNING "%s: can't fill rx buffer (force %d)!\n", ! 1692: dev->name, force); ! 1693: speedo_show_state(dev); ! 1694: sp->rx_ring_state |= RrOOMReported; ! 1695: } ! 1696: if (!force) ! 1697: return -1; /* Better luck next time! */ ! 1698: /* Borrow an skb from one of next entries. */ ! 1699: for (forw = sp->dirty_rx + 1; forw != sp->cur_rx; forw++) ! 1700: if (sp->rx_skbuff[forw % RX_RING_SIZE] != NULL) ! 1701: break; ! 1702: if (forw == sp->cur_rx) ! 1703: return -1; ! 1704: forw_entry = forw % RX_RING_SIZE; ! 1705: sp->rx_skbuff[entry] = sp->rx_skbuff[forw_entry]; ! 1706: sp->rx_skbuff[forw_entry] = NULL; ! 1707: rxf = sp->rx_ringp[forw_entry]; ! 1708: sp->rx_ringp[forw_entry] = NULL; ! 1709: sp->rx_ringp[entry] = rxf; ! 1710: } ! 1711: } else { ! 1712: rxf = sp->rx_ringp[entry]; ! 1713: } ! 1714: speedo_rx_link(dev, entry, rxf); ! 1715: sp->dirty_rx++; ! 1716: sp->rx_ring_state &= ~(RrNoMem|RrOOMReported); /* Mark the progress. */ ! 1717: return 0; ! 1718: } ! 1719: ! 1720: static void speedo_refill_rx_buffers(struct net_device *dev, int force) ! 1721: { ! 1722: struct speedo_private *sp = (struct speedo_private *)dev->priv; ! 1723: ! 1724: /* Refill the RX ring. */ ! 1725: while ((int)(sp->cur_rx - sp->dirty_rx) > 0 && ! 1726: speedo_refill_rx_buf(dev, force) != -1); ! 1727: } ! 1728: 1.1 root 1729: static int 1.1.1.2 ! root 1730: speedo_rx(struct net_device *dev) 1.1 root 1731: { 1732: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1733: int entry = sp->cur_rx % RX_RING_SIZE; 1734: int status; 1.1.1.2 ! root 1735: int rx_work_limit = sp->dirty_rx + RX_RING_SIZE - sp->cur_rx; ! 1736: int alloc_ok = 1; 1.1 root 1737: 1738: if (speedo_debug > 4) 1739: printk(KERN_DEBUG " In speedo_rx().\n"); 1740: /* If we own the next entry, it's a new packet. Send it up. */ 1.1.1.2 ! root 1741: while (sp->rx_ringp[entry] != NULL && ! 1742: (status = le32_to_cpu(sp->rx_ringp[entry]->status)) & RxComplete) { ! 1743: int pkt_len = le32_to_cpu(sp->rx_ringp[entry]->count) & 0x3fff; ! 1744: ! 1745: if (--rx_work_limit < 0) ! 1746: break; ! 1747: ! 1748: /* Check for a rare out-of-memory case: the current buffer is ! 1749: the last buffer allocated in the RX ring. --SAW */ ! 1750: if (sp->last_rxf == sp->rx_ringp[entry]) { ! 1751: /* Postpone the packet. It'll be reaped at an interrupt when this ! 1752: packet is no longer the last packet in the ring. */ ! 1753: if (speedo_debug > 2) ! 1754: printk(KERN_DEBUG "%s: RX packet postponed!\n", ! 1755: dev->name); ! 1756: sp->rx_ring_state |= RrPostponed; ! 1757: break; ! 1758: } 1.1 root 1759: 1760: if (speedo_debug > 4) 1761: printk(KERN_DEBUG " speedo_rx() status %8.8x len %d.\n", status, 1.1.1.2 ! root 1762: pkt_len); ! 1763: if ((status & (RxErrTooBig|RxOK|0x0f90)) != RxOK) { ! 1764: if (status & RxErrTooBig) ! 1765: printk(KERN_ERR "%s: Ethernet frame overran the Rx buffer, " ! 1766: "status %8.8x!\n", dev->name, status); ! 1767: else if (! (status & RxOK)) { ! 1768: /* There was a fatal error. This *should* be impossible. */ ! 1769: sp->stats.rx_errors++; ! 1770: printk(KERN_ERR "%s: Anomalous event in speedo_rx(), " ! 1771: "status %8.8x.\n", ! 1772: dev->name, status); ! 1773: } 1.1 root 1774: } else { 1775: struct sk_buff *skb; 1776: 1777: /* Check if the packet is long enough to just accept without 1778: copying to a properly sized skbuff. */ 1.1.1.2 ! root 1779: if (pkt_len < rx_copybreak ! 1780: && (skb = dev_alloc_skb(pkt_len + 2)) != 0) { ! 1781: skb->dev = dev; ! 1782: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ ! 1783: /* 'skb_put()' points to the start of sk_buff data area. */ ! 1784: #if !defined(__alpha__) 1.1 root 1785: /* Packet is in one chunk -- we can copy + cksum. */ 1.1.1.2 ! root 1786: eth_copy_and_sum(skb, sp->rx_skbuff[entry]->tail, pkt_len, 0); ! 1787: skb_put(skb, pkt_len); 1.1 root 1788: #else 1.1.1.2 ! root 1789: memcpy(skb_put(skb, pkt_len), sp->rx_skbuff[entry]->tail, ! 1790: pkt_len); 1.1 root 1791: #endif 1.1.1.2 ! root 1792: } else { ! 1793: /* Pass up the already-filled skbuff. */ ! 1794: skb = sp->rx_skbuff[entry]; ! 1795: if (skb == NULL) { ! 1796: printk(KERN_ERR "%s: Inconsistent Rx descriptor chain.\n", ! 1797: dev->name); ! 1798: break; ! 1799: } ! 1800: sp->rx_skbuff[entry] = NULL; ! 1801: skb_put(skb, pkt_len); ! 1802: sp->rx_ringp[entry] = NULL; 1.1 root 1803: } 1804: skb->protocol = eth_type_trans(skb, dev); 1805: netif_rx(skb); 1806: sp->stats.rx_packets++; 1.1.1.2 ! root 1807: sp->stats.rx_bytes += pkt_len; 1.1 root 1808: } 1.1.1.2 ! root 1809: entry = (++sp->cur_rx) % RX_RING_SIZE; ! 1810: sp->rx_ring_state &= ~RrPostponed; ! 1811: /* Refill the recently taken buffers. ! 1812: Do it one-by-one to handle traffic bursts better. */ ! 1813: if (alloc_ok && speedo_refill_rx_buf(dev, 0) == -1) ! 1814: alloc_ok = 0; 1.1 root 1815: } 1816: 1.1.1.2 ! root 1817: /* Try hard to refill the recently taken buffers. */ ! 1818: speedo_refill_rx_buffers(dev, 1); ! 1819: 1.1 root 1820: sp->last_rx_time = jiffies; 1.1.1.2 ! root 1821: 1.1 root 1822: return 0; 1823: } 1824: 1825: static int 1.1.1.2 ! root 1826: speedo_close(struct net_device *dev) 1.1 root 1827: { 1.1.1.2 ! root 1828: long ioaddr = dev->base_addr; 1.1 root 1829: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1830: int i; 1831: 1832: dev->start = 0; 1.1.1.2 ! root 1833: netif_stop_queue(dev); 1.1 root 1834: 1835: if (speedo_debug > 1) 1836: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n", 1837: dev->name, inw(ioaddr + SCBStatus)); 1838: 1839: /* Shut off the media monitoring timer. */ 1.1.1.2 ! root 1840: start_bh_atomic(); 1.1 root 1841: del_timer(&sp->timer); 1.1.1.2 ! root 1842: end_bh_atomic(); 1.1 root 1843: 1.1.1.2 ! root 1844: /* Shutting down the chip nicely fails to disable flow control. So.. */ ! 1845: outl(PortPartialReset, ioaddr + SCBPort); 1.1 root 1846: 1847: free_irq(dev->irq, dev); 1848: 1.1.1.2 ! root 1849: /* Print a few items for debugging. */ ! 1850: if (speedo_debug > 3) ! 1851: speedo_show_state(dev); ! 1852: ! 1853: /* Free all the skbuffs in the Rx and Tx queues. */ 1.1 root 1854: for (i = 0; i < RX_RING_SIZE; i++) { 1855: struct sk_buff *skb = sp->rx_skbuff[i]; 1856: sp->rx_skbuff[i] = 0; 1857: /* Clear the Rx descriptors. */ 1858: if (skb) 1.1.1.2 ! root 1859: dev_free_skb(skb); 1.1 root 1860: } 1861: 1862: for (i = 0; i < TX_RING_SIZE; i++) { 1863: struct sk_buff *skb = sp->tx_skbuff[i]; 1864: sp->tx_skbuff[i] = 0; 1865: /* Clear the Tx descriptors. */ 1866: if (skb) 1.1.1.2 ! root 1867: dev_free_skb(skb); 1.1 root 1868: } 1869: 1.1.1.2 ! root 1870: /* Free multicast setting blocks. */ ! 1871: for (i = 0; sp->mc_setup_head != NULL; i++) { ! 1872: struct speedo_mc_block *t; ! 1873: t = sp->mc_setup_head->next; ! 1874: kfree(sp->mc_setup_head); ! 1875: sp->mc_setup_head = t; ! 1876: } ! 1877: sp->mc_setup_tail = NULL; ! 1878: if (speedo_debug > 0) ! 1879: printk(KERN_DEBUG "%s: %d multicast blocks dropped.\n", dev->name, i); ! 1880: 1.1 root 1881: MOD_DEC_USE_COUNT; 1882: 1883: return 0; 1884: } 1885: 1886: /* The Speedo-3 has an especially awkward and unusable method of getting 1887: statistics out of the chip. It takes an unpredictable length of time 1888: for the dump-stats command to complete. To avoid a busy-wait loop we 1889: update the stats with the previous dump results, and then trigger a 1890: new dump. 1891: 1892: These problems are mitigated by the current /proc implementation, which 1893: calls this routine first to judge the output length, and then to emit the 1894: output. 1895: 1896: Oh, and incoming frames are dropped while executing dump-stats! 1897: */ 1898: static struct enet_statistics * 1.1.1.2 ! root 1899: speedo_get_stats(struct net_device *dev) 1.1 root 1900: { 1901: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1902: long ioaddr = dev->base_addr; 1.1 root 1903: 1.1.1.2 ! root 1904: /* Update only if the previous dump finished. */ ! 1905: if (sp->lstats.done_marker == le32_to_cpu(0xA007)) { ! 1906: sp->stats.tx_aborted_errors += le32_to_cpu(sp->lstats.tx_coll16_errs); ! 1907: sp->stats.tx_window_errors += le32_to_cpu(sp->lstats.tx_late_colls); ! 1908: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_underruns); ! 1909: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_lost_carrier); ! 1910: /*sp->stats.tx_deferred += le32_to_cpu(sp->lstats.tx_deferred);*/ ! 1911: sp->stats.collisions += le32_to_cpu(sp->lstats.tx_total_colls); ! 1912: sp->stats.rx_crc_errors += le32_to_cpu(sp->lstats.rx_crc_errs); ! 1913: sp->stats.rx_frame_errors += le32_to_cpu(sp->lstats.rx_align_errs); ! 1914: sp->stats.rx_over_errors += le32_to_cpu(sp->lstats.rx_resource_errs); ! 1915: sp->stats.rx_fifo_errors += le32_to_cpu(sp->lstats.rx_overrun_errs); ! 1916: sp->stats.rx_length_errors += le32_to_cpu(sp->lstats.rx_runt_errs); 1.1 root 1917: sp->lstats.done_marker = 0x0000; 1918: if (dev->start) { 1.1.1.2 ! root 1919: unsigned long flags; ! 1920: /* Take a spinlock to make wait_for_cmd_done and sending the ! 1921: command atomic. --SAW */ ! 1922: spin_lock_irqsave(&sp->lock, flags); 1.1 root 1923: wait_for_cmd_done(ioaddr + SCBCmd); 1.1.1.2 ! root 1924: outb(CUDumpStats, ioaddr + SCBCmd); ! 1925: spin_unlock_irqrestore(&sp->lock, flags); 1.1 root 1926: } 1927: } 1928: return &sp->stats; 1929: } 1930: 1.1.1.2 ! root 1931: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1.1 root 1932: { 1933: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1934: long ioaddr = dev->base_addr; 1.1 root 1935: u16 *data = (u16 *)&rq->ifr_data; 1936: int phy = sp->phy[0] & 0x1f; 1937: 1938: switch(cmd) { 1939: case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */ 1940: data[0] = phy; 1941: case SIOCDEVPRIVATE+1: /* Read the specified MII register. */ 1.1.1.2 ! root 1942: /* FIXME: these operations need to be serialized with MDIO ! 1943: access from the timeout handler. ! 1944: They are currently serialized only with MDIO access from the ! 1945: timer routine. 2000/05/09 SAW */ ! 1946: start_bh_atomic(); 1.1 root 1947: data[3] = mdio_read(ioaddr, data[0], data[1]); 1.1.1.2 ! root 1948: end_bh_atomic(); 1.1 root 1949: return 0; 1950: case SIOCDEVPRIVATE+2: /* Write the specified MII register */ 1.1.1.2 ! root 1951: if (!capable(CAP_NET_ADMIN)) 1.1 root 1952: return -EPERM; 1.1.1.2 ! root 1953: start_bh_atomic(); 1.1 root 1954: mdio_write(ioaddr, data[0], data[1], data[2]); 1.1.1.2 ! root 1955: end_bh_atomic(); 1.1 root 1956: return 0; 1957: default: 1958: return -EOPNOTSUPP; 1959: } 1960: } 1961: 1962: /* Set or clear the multicast filter for this adaptor. 1963: This is very ugly with Intel chips -- we usually have to execute an 1964: entire configuration command, plus process a multicast command. 1965: This is complicated. We must put a large configuration command and 1966: an arbitrarily-sized multicast command in the transmit list. 1967: To minimize the disruption -- the previous command might have already 1968: loaded the link -- we convert the current command block, normally a Tx 1969: command, into a no-op and link it to the new command. 1970: */ 1.1.1.2 ! root 1971: static void set_rx_mode(struct net_device *dev) 1.1 root 1972: { 1973: struct speedo_private *sp = (struct speedo_private *)dev->priv; 1.1.1.2 ! root 1974: long ioaddr = dev->base_addr; ! 1975: struct descriptor *last_cmd; 1.1 root 1976: char new_rx_mode; 1977: unsigned long flags; 1978: int entry, i; 1979: 1980: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 1981: new_rx_mode = 3; 1982: } else if ((dev->flags & IFF_ALLMULTI) || 1983: dev->mc_count > multicast_filter_limit) { 1984: new_rx_mode = 1; 1985: } else 1986: new_rx_mode = 0; 1987: 1.1.1.2 ! root 1988: if (speedo_debug > 3) ! 1989: printk(KERN_DEBUG "%s: set_rx_mode %d -> %d\n", dev->name, ! 1990: sp->rx_mode, new_rx_mode); ! 1991: ! 1992: if ((int)(sp->cur_tx - sp->dirty_tx) > TX_RING_SIZE - TX_MULTICAST_SIZE) { ! 1993: /* The Tx ring is full -- don't add anything! Hope the mode will be ! 1994: * set again later. */ 1.1 root 1995: sp->rx_mode = -1; 1996: return; 1997: } 1998: 1999: if (new_rx_mode != sp->rx_mode) { 1.1.1.2 ! root 2000: u8 *config_cmd_data; ! 2001: ! 2002: spin_lock_irqsave(&sp->lock, flags); ! 2003: entry = sp->cur_tx++ % TX_RING_SIZE; ! 2004: last_cmd = sp->last_cmd; ! 2005: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry]; ! 2006: ! 2007: sp->tx_skbuff[entry] = 0; /* Redundant. */ ! 2008: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdConfigure); ! 2009: sp->tx_ring[entry].link = ! 2010: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]); ! 2011: config_cmd_data = (void *)&sp->tx_ring[entry].tx_desc_addr; ! 2012: /* Construct a full CmdConfig frame. */ ! 2013: memcpy(config_cmd_data, i82558_config_cmd, sizeof(i82558_config_cmd)); ! 2014: config_cmd_data[1] = (txfifo << 4) | rxfifo; ! 2015: config_cmd_data[4] = rxdmacount; ! 2016: config_cmd_data[5] = txdmacount + 0x80; ! 2017: config_cmd_data[15] |= (new_rx_mode & 2) ? 1 : 0; ! 2018: /* 0x80 doesn't disable FC 0x84 does. ! 2019: Disable Flow control since we are not ACK-ing any FC interrupts ! 2020: for now. --Dragan */ ! 2021: config_cmd_data[19] = 0x84; ! 2022: config_cmd_data[19] |= sp->full_duplex ? 0x40 : 0; ! 2023: config_cmd_data[21] = (new_rx_mode & 1) ? 0x0D : 0x05; 1.1 root 2024: if (sp->phy[0] & 0x8000) { /* Use the AUI port instead. */ 1.1.1.2 ! root 2025: config_cmd_data[15] |= 0x80; ! 2026: config_cmd_data[8] = 0; 1.1 root 2027: } 1.1.1.2 ! root 2028: /* Trigger the command unit resume. */ 1.1 root 2029: wait_for_cmd_done(ioaddr + SCBCmd); 1.1.1.2 ! root 2030: clear_suspend(last_cmd); ! 2031: outb(CUResume, ioaddr + SCBCmd); ! 2032: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) { ! 2033: netif_stop_queue(dev); ! 2034: sp->tx_full = 1; 1.1 root 2035: } 1.1.1.2 ! root 2036: spin_unlock_irqrestore(&sp->lock, flags); 1.1 root 2037: } 2038: 1.1.1.2 ! root 2039: if (new_rx_mode == 0 && dev->mc_count < 4) { ! 2040: /* The simple case of 0-3 multicast list entries occurs often, and 1.1 root 2041: fits within one tx_ring[] entry. */ 2042: struct dev_mc_list *mclist; 1.1.1.2 ! root 2043: u16 *setup_params, *eaddrs; 1.1 root 2044: 1.1.1.2 ! root 2045: spin_lock_irqsave(&sp->lock, flags); 1.1 root 2046: entry = sp->cur_tx++ % TX_RING_SIZE; 1.1.1.2 ! root 2047: last_cmd = sp->last_cmd; ! 2048: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry]; ! 2049: 1.1 root 2050: sp->tx_skbuff[entry] = 0; 1.1.1.2 ! root 2051: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdMulticastList); 1.1 root 2052: sp->tx_ring[entry].link = 1.1.1.2 ! root 2053: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]); 1.1 root 2054: sp->tx_ring[entry].tx_desc_addr = 0; /* Really MC list count. */ 2055: setup_params = (u16 *)&sp->tx_ring[entry].tx_desc_addr; 1.1.1.2 ! root 2056: *setup_params++ = cpu_to_le16(dev->mc_count*6); 1.1 root 2057: /* Fill in the multicast addresses. */ 2058: for (i = 0, mclist = dev->mc_list; i < dev->mc_count; 2059: i++, mclist = mclist->next) { 2060: eaddrs = (u16 *)mclist->dmi_addr; 2061: *setup_params++ = *eaddrs++; 2062: *setup_params++ = *eaddrs++; 2063: *setup_params++ = *eaddrs++; 2064: } 2065: 2066: wait_for_cmd_done(ioaddr + SCBCmd); 1.1.1.2 ! root 2067: clear_suspend(last_cmd); ! 2068: /* Immediately trigger the command unit resume. */ ! 2069: outb(CUResume, ioaddr + SCBCmd); ! 2070: ! 2071: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) { ! 2072: netif_stop_queue(dev); ! 2073: sp->tx_full = 1; ! 2074: } ! 2075: spin_unlock_irqrestore(&sp->lock, flags); 1.1 root 2076: } else if (new_rx_mode == 0) { 2077: struct dev_mc_list *mclist; 1.1.1.2 ! root 2078: u16 *setup_params, *eaddrs; ! 2079: struct speedo_mc_block *mc_blk; ! 2080: struct descriptor *mc_setup_frm; 1.1 root 2081: int i; 2082: 1.1.1.2 ! root 2083: mc_blk = kmalloc(sizeof(*mc_blk) + 2 + multicast_filter_limit*6, ! 2084: GFP_ATOMIC); ! 2085: if (mc_blk == NULL) { ! 2086: printk(KERN_ERR "%s: Failed to allocate a setup frame.\n", ! 2087: dev->name); ! 2088: sp->rx_mode = -1; /* We failed, try again. */ ! 2089: return; 1.1 root 2090: } 1.1.1.2 ! root 2091: mc_blk->next = NULL; ! 2092: mc_setup_frm = &mc_blk->frame; ! 2093: ! 2094: /* Fill the setup frame. */ 1.1 root 2095: if (speedo_debug > 1) 1.1.1.2 ! root 2096: printk(KERN_DEBUG "%s: Constructing a setup frame at %p.\n", ! 2097: dev->name, mc_setup_frm); ! 2098: mc_setup_frm->cmd_status = ! 2099: cpu_to_le32(CmdSuspend | CmdIntr | CmdMulticastList); 1.1 root 2100: /* Link set below. */ 1.1.1.2 ! root 2101: setup_params = (u16 *)&mc_setup_frm->params; ! 2102: *setup_params++ = cpu_to_le16(dev->mc_count*6); 1.1 root 2103: /* Fill in the multicast addresses. */ 2104: for (i = 0, mclist = dev->mc_list; i < dev->mc_count; 2105: i++, mclist = mclist->next) { 2106: eaddrs = (u16 *)mclist->dmi_addr; 2107: *setup_params++ = *eaddrs++; 2108: *setup_params++ = *eaddrs++; 2109: *setup_params++ = *eaddrs++; 2110: } 2111: 2112: /* Disable interrupts while playing with the Tx Cmd list. */ 1.1.1.2 ! root 2113: spin_lock_irqsave(&sp->lock, flags); 1.1 root 2114: 1.1.1.2 ! root 2115: if (sp->mc_setup_tail) ! 2116: sp->mc_setup_tail->next = mc_blk; ! 2117: else ! 2118: sp->mc_setup_head = mc_blk; ! 2119: sp->mc_setup_tail = mc_blk; ! 2120: mc_blk->tx = sp->cur_tx; ! 2121: ! 2122: entry = sp->cur_tx++ % TX_RING_SIZE; ! 2123: last_cmd = sp->last_cmd; ! 2124: sp->last_cmd = mc_setup_frm; 1.1 root 2125: 2126: /* Change the command to a NoOp, pointing to the CmdMulti command. */ 2127: sp->tx_skbuff[entry] = 0; 1.1.1.2 ! root 2128: sp->tx_ring[entry].status = cpu_to_le32(CmdNOp); ! 2129: sp->tx_ring[entry].link = virt_to_le32desc(mc_setup_frm); 1.1 root 2130: 2131: /* Set the link in the setup frame. */ 2132: mc_setup_frm->link = 1.1.1.2 ! root 2133: virt_to_le32desc(&(sp->tx_ring[(entry+1) % TX_RING_SIZE])); 1.1 root 2134: 2135: wait_for_cmd_done(ioaddr + SCBCmd); 1.1.1.2 ! root 2136: clear_suspend(last_cmd); ! 2137: /* Immediately trigger the command unit resume. */ ! 2138: outb(CUResume, ioaddr + SCBCmd); ! 2139: ! 2140: if ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) { ! 2141: netif_stop_queue(dev); ! 2142: sp->tx_full = 1; ! 2143: } ! 2144: spin_unlock_irqrestore(&sp->lock, flags); ! 2145: ! 2146: if (speedo_debug > 5) ! 2147: printk(" CmdMCSetup frame length %d in entry %d.\n", ! 2148: dev->mc_count, entry); 1.1 root 2149: } 2150: 2151: sp->rx_mode = new_rx_mode; 2152: } 2153: 2154: #ifdef MODULE 2155: 1.1.1.2 ! root 2156: int init_module(void) 1.1 root 2157: { 2158: int cards_found; 2159: 1.1.1.2 ! root 2160: if (debug >= 0 && speedo_debug != debug) ! 2161: printk(KERN_INFO "eepro100.c: Debug level is %d.\n", debug); 1.1 root 2162: if (debug >= 0) 2163: speedo_debug = debug; 1.1.1.2 ! root 2164: /* Always emit the version message. */ 1.1 root 2165: if (speedo_debug) 2166: printk(KERN_INFO "%s", version); 2167: 1.1.1.2 ! root 2168: cards_found = eepro100_init(); ! 2169: if (cards_found <= 0) { ! 2170: printk(KERN_INFO "eepro100: No cards found, driver not installed.\n"); ! 2171: return -ENODEV; ! 2172: } ! 2173: return 0; 1.1 root 2174: } 2175: 2176: void 2177: cleanup_module(void) 2178: { 1.1.1.2 ! root 2179: struct net_device *next_dev; 1.1 root 2180: 2181: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */ 2182: while (root_speedo_dev) { 1.1.1.2 ! root 2183: struct speedo_private *sp = (void *)root_speedo_dev->priv; 1.1 root 2184: unregister_netdev(root_speedo_dev); 2185: release_region(root_speedo_dev->base_addr, SPEEDO3_TOTAL_SIZE); 1.1.1.2 ! root 2186: #ifndef USE_IO ! 2187: iounmap((char *)root_speedo_dev->base_addr); ! 2188: #endif ! 2189: next_dev = sp->next_module; ! 2190: if (sp->priv_addr) ! 2191: kfree(sp->priv_addr); 1.1 root 2192: kfree(root_speedo_dev); 2193: root_speedo_dev = next_dev; 2194: } 2195: } 1.1.1.2 ! root 2196: 1.1 root 2197: #else /* not MODULE */ 1.1.1.2 ! root 2198: ! 2199: int eepro100_probe(void) 1.1 root 2200: { 2201: int cards_found = 0; 2202: 1.1.1.2 ! root 2203: cards_found = eepro100_init(); 1.1 root 2204: 2205: if (speedo_debug > 0 && cards_found) 2206: printk(version); 2207: 2208: return cards_found ? 0 : -ENODEV; 2209: } 2210: #endif /* MODULE */ 2211: 2212: /* 2213: * Local variables: 2214: * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`" 2215: * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`" 2216: * c-indent-level: 4 2217: * c-basic-offset: 4 2218: * tab-width: 4 2219: * End: 2220: */
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