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1.1.1.2 root 1: /* drivers/net/eepro100.c: An Intel i82557-559 Ethernet driver for Linux. */
1.1 root 2: /*
1.1.1.3 root 3: Written 1998-2003 by Donald Becker.
1.1 root 4:
1.1.1.3 root 5: This software may be used and distributed according to the terms of
6: the GNU General Public License (GPL), incorporated herein by reference.
7: Drivers based on or derived from this code fall under the GPL and must
8: retain the authorship, copyright and license notice. This driver is not
9: a complete program and may only be used when the entire operating
10: system is licensed under the GPL.
1.1 root 11:
1.1.1.2 root 12: This driver is for the Intel EtherExpress Pro100 (Speedo3) design.
13: It should work with all i82557/558/559 boards.
14:
1.1 root 15: To use as a module, use the compile-command at the end of the file.
16:
1.1.1.3 root 17: The author may be reached as [email protected], or C/O
18: Scyld Computing Corporation
19: 914 Bay Ridge Road, Suite 220
20: Annapolis MD 21403
21:
1.1 root 22: For updates see
1.1.1.3 root 23: http://www.scyld.com/network/eepro100.html
1.1.1.2 root 24: For installation instructions
1.1.1.3 root 25: http://www.scyld.com/network/modules.html
26: The information and support mailing lists are based at
27: http://www.scyld.com/mailman/listinfo/
1.1 root 28: */
29:
1.1.1.3 root 30: /* These identify the driver base version and may not be removed. */
31: static const char version1[] =
32: "eepro100.c:v1.28 7/22/2003 Donald Becker <[email protected]>\n";
33: static const char version2[] =
34: " http://www.scyld.com/network/eepro100.html\n";
35:
36:
37: /* The user-configurable values.
38: These may be modified when a driver module is loaded.
39: The first five are undocumented and spelled per Intel recommendations.
40: */
1.1 root 41:
1.1.1.3 root 42: /* Message enable level: 0..31 = no..all messages. See NETIF_MSG docs. */
43: static int debug = 2;
1.1 root 44:
45: static int congenb = 0; /* Enable congestion control in the DP83840. */
1.1.1.3 root 46: static int txfifo = 8; /* Tx FIFO threshold in 4 byte units, 0-15 */
47: static int rxfifo = 8; /* Rx FIFO threshold, default 32 bytes. */
1.1 root 48: /* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */
49: static int txdmacount = 128;
50: static int rxdmacount = 0;
51:
1.1.1.3 root 52: /* Set the copy breakpoint for the copy-only-tiny-frame Rx method.
53: Lower values use more memory, but are faster.
54: Setting to > 1518 disables this feature. */
1.1 root 55: static int rx_copybreak = 200;
56:
57: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
1.1.1.3 root 58: static int max_interrupt_work = 20;
1.1 root 59:
60: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */
61: static int multicast_filter_limit = 64;
62:
1.1.1.3 root 63: /* Used to pass the media type, etc.
64: Both 'options[]' and 'full_duplex[]' should exist for driver
65: interoperability, however setting full_duplex[] is deprecated.
66: The media type is usually passed in 'options[]'.
67: Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps.
68: Use option values 0x10 and 0x100 for forcing half duplex fixed speed.
69: Use option values 0x20 and 0x200 for forcing full duplex operation.
70: */
71: #define MAX_UNITS 8 /* More are supported, limit only on options */
72: static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
73: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
74:
75: /* Operational parameters that are set at compile time. */
1.1.1.2 root 76:
77: /* The ring sizes should be a power of two for efficiency. */
1.1.1.3 root 78: #define TX_RING_SIZE 32 /* Effectively 2 entries fewer. */
79: #define RX_RING_SIZE 32
80: /* Actual number of TX packets queued, must be <= TX_RING_SIZE-2. */
81: #define TX_QUEUE_LIMIT 12
82: #define TX_QUEUE_UNFULL 8 /* Hysteresis marking queue as no longer full. */
1.1.1.2 root 83:
84: /* Operational parameters that usually are not changed. */
85:
86: /* Time in jiffies before concluding the transmitter is hung. */
1.1.1.3 root 87: #define TX_TIMEOUT (6*HZ)
88:
89: /* Allocation size of Rx buffers with normal sized Ethernet frames.
90: Do not change this value without good reason. This is not a limit,
91: but a way to keep a consistent allocation size among drivers.
92: */
1.1.1.2 root 93: #define PKT_BUF_SZ 1536
94:
1.1.1.3 root 95: #ifndef __KERNEL__
96: #define __KERNEL__
97: #endif
98: #if !defined(__OPTIMIZE__)
1.1.1.2 root 99: #warning You must compile this file with the correct options!
100: #warning See the last lines of the source file.
101: #error You must compile this driver with "-O".
1.1 root 102: #endif
103:
1.1.1.3 root 104: #include <linux/config.h>
105: #if defined(CONFIG_SMP) && ! defined(__SMP__)
106: #define __SMP__
107: #endif
108: #if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)
109: #define MODVERSIONS
110: #endif
111:
1.1 root 112: #include <linux/version.h>
1.1.1.2 root 113: #if defined(MODVERSIONS)
114: #include <linux/modversions.h>
115: #endif
1.1.1.3 root 116: #include <linux/module.h>
1.1.1.2 root 117:
1.1 root 118: #include <linux/kernel.h>
119: #include <linux/string.h>
120: #include <linux/timer.h>
121: #include <linux/errno.h>
122: #include <linux/ioport.h>
1.1.1.3 root 123: #if LINUX_VERSION_CODE >= 0x20400
124: #include <linux/slab.h>
125: #else
1.1 root 126: #include <linux/malloc.h>
1.1.1.3 root 127: #endif
1.1 root 128: #include <linux/interrupt.h>
129: #include <linux/pci.h>
130: #include <linux/netdevice.h>
131: #include <linux/etherdevice.h>
132: #include <linux/skbuff.h>
133: #include <linux/delay.h>
1.1.1.3 root 134: #include <asm/bitops.h>
135: #include <asm/io.h>
136:
137: #if LINUX_VERSION_CODE >= 0x20300
138: #include <linux/spinlock.h>
139: #elif LINUX_VERSION_CODE >= 0x20200
140: #include <asm/spinlock.h>
141: #endif
142:
143: #ifdef INLINE_PCISCAN
144: #include "k_compat.h"
145: #else
146: #include "pci-scan.h"
147: #include "kern_compat.h"
148: #endif
149:
150: /* Condensed bus+endian portability operations. */
151: #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
152: #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
153:
154: #if (LINUX_VERSION_CODE >= 0x20100) && defined(MODULE)
155: char kernel_version[] = UTS_RELEASE;
156: #endif
1.1 root 157:
1.1.1.3 root 158: MODULE_AUTHOR("Donald Becker <[email protected]>");
159: MODULE_DESCRIPTION("Intel PCI EtherExpressPro 100 driver");
160: MODULE_LICENSE("GPL");
1.1 root 161: MODULE_PARM(debug, "i");
1.1.1.3 root 162: MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
163: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
1.1 root 164: MODULE_PARM(congenb, "i");
165: MODULE_PARM(txfifo, "i");
166: MODULE_PARM(rxfifo, "i");
167: MODULE_PARM(txdmacount, "i");
168: MODULE_PARM(rxdmacount, "i");
169: MODULE_PARM(rx_copybreak, "i");
170: MODULE_PARM(max_interrupt_work, "i");
171: MODULE_PARM(multicast_filter_limit, "i");
1.1.1.3 root 172: #ifdef MODULE_PARM_DESC
173: MODULE_PARM_DESC(debug, "EEPro100 message level (0-31)");
174: MODULE_PARM_DESC(options,
175: "EEPro100: force fixed speed+duplex 0x10 0x20 0x100 0x200");
176: MODULE_PARM_DESC(max_interrupt_work,
177: "EEPro100 maximum events handled per interrupt");
178: MODULE_PARM_DESC(full_duplex, "EEPro100 set to forced full duplex when not 0"
179: " (deprecated)");
180: MODULE_PARM_DESC(rx_copybreak,
181: "EEPro100 copy breakpoint for copy-only-tiny-frames");
182: MODULE_PARM_DESC(multicast_filter_limit,
183: "EEPro100 breakpoint for switching to Rx-all-multicast");
184: /* Other settings are undocumented per Intel recommendation. */
1.1 root 185: #endif
186:
187: /*
188: Theory of Operation
189:
190: I. Board Compatibility
191:
192: This device driver is designed for the Intel i82557 "Speedo3" chip, Intel's
193: single-chip fast Ethernet controller for PCI, as used on the Intel
194: EtherExpress Pro 100 adapter.
195:
196: II. Board-specific settings
197:
198: PCI bus devices are configured by the system at boot time, so no jumpers
199: need to be set on the board. The system BIOS should be set to assign the
200: PCI INTA signal to an otherwise unused system IRQ line. While it's
201: possible to share PCI interrupt lines, it negatively impacts performance and
202: only recent kernels support it.
203:
204: III. Driver operation
205:
206: IIIA. General
207: The Speedo3 is very similar to other Intel network chips, that is to say
208: "apparently designed on a different planet". This chips retains the complex
209: Rx and Tx descriptors and multiple buffers pointers as previous chips, but
210: also has simplified Tx and Rx buffer modes. This driver uses the "flexible"
211: Tx mode, but in a simplified lower-overhead manner: it associates only a
212: single buffer descriptor with each frame descriptor.
213:
214: Despite the extra space overhead in each receive skbuff, the driver must use
215: the simplified Rx buffer mode to assure that only a single data buffer is
216: associated with each RxFD. The driver implements this by reserving space
1.1.1.2 root 217: for the Rx descriptor at the head of each Rx skbuff.
1.1 root 218:
219: The Speedo-3 has receive and command unit base addresses that are added to
220: almost all descriptor pointers. The driver sets these to zero, so that all
221: pointer fields are absolute addresses.
222:
223: The System Control Block (SCB) of some previous Intel chips exists on the
224: chip in both PCI I/O and memory space. This driver uses the I/O space
225: registers, but might switch to memory mapped mode to better support non-x86
226: processors.
227:
228: IIIB. Transmit structure
229:
230: The driver must use the complex Tx command+descriptor mode in order to
231: have a indirect pointer to the skbuff data section. Each Tx command block
1.1.1.2 root 232: (TxCB) is associated with two immediately appended Tx Buffer Descriptor
1.1 root 233: (TxBD). A fixed ring of these TxCB+TxBD pairs are kept as part of the
234: speedo_private data structure for each adapter instance.
235:
1.1.1.3 root 236: The i82558 and later explicitly supports this structure, and can read the two
1.1.1.2 root 237: TxBDs in the same PCI burst as the TxCB.
238:
1.1 root 239: This ring structure is used for all normal transmit packets, but the
240: transmit packet descriptors aren't long enough for most non-Tx commands such
241: as CmdConfigure. This is complicated by the possibility that the chip has
242: already loaded the link address in the previous descriptor. So for these
243: commands we convert the next free descriptor on the ring to a NoOp, and point
244: that descriptor's link to the complex command.
245:
246: An additional complexity of these non-transmit commands are that they may be
1.1.1.3 root 247: added asynchronous to the normal transmit queue, so we set a lock
1.1 root 248: whenever the Tx descriptor ring is manipulated.
249:
250: A notable aspect of these special configure commands is that they do
251: work with the normal Tx ring entry scavenge method. The Tx ring scavenge
252: is done at interrupt time using the 'dirty_tx' index, and checking for the
253: command-complete bit. While the setup frames may have the NoOp command on the
254: Tx ring marked as complete, but not have completed the setup command, this
255: is not a problem. The tx_ring entry can be still safely reused, as the
256: tx_skbuff[] entry is always empty for config_cmd and mc_setup frames.
257:
258: Commands may have bits set e.g. CmdSuspend in the command word to either
1.1.1.3 root 259: suspend or stop the transmit/command unit. This driver always initializes
260: the current command with CmdSuspend before erasing the CmdSuspend in the
261: previous command, and only then issues a CU_RESUME.
1.1 root 262:
263: Note: In previous generation Intel chips, restarting the command unit was a
264: notoriously slow process. This is presumably no longer true.
265:
266: IIIC. Receive structure
267:
1.1.1.3 root 268: Because of the bus-master support on the Speedo3 this driver uses the
1.1 root 269: SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer.
270: This scheme allocates full-sized skbuffs as receive buffers. The value
271: SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to
272: trade-off the memory wasted by passing the full-sized skbuff to the queue
273: layer for all frames vs. the copying cost of copying a frame to a
274: correctly-sized skbuff.
275:
276: For small frames the copying cost is negligible (esp. considering that we
277: are pre-loading the cache with immediately useful header information), so we
278: allocate a new, minimally-sized skbuff. For large frames the copying cost
279: is non-trivial, and the larger copy might flush the cache of useful data, so
280: we pass up the skbuff the packet was received into.
281:
1.1.1.3 root 282: IIID. Synchronization
283: The driver runs as two independent, single-threaded flows of control. One
284: is the send-packet routine, which enforces single-threaded use by the
285: dev->tbusy flag. The other thread is the interrupt handler, which is single
286: threaded by the hardware and other software.
287:
288: The send packet thread has partial control over the Tx ring and 'dev->tbusy'
289: flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
290: queue slot is empty, it clears the tbusy flag when finished otherwise it sets
291: the 'sp->tx_full' flag.
292:
293: The interrupt handler has exclusive control over the Rx ring and records stats
294: from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
295: we can't avoid the interrupt overhead by having the Tx routine reap the Tx
296: stats.) After reaping the stats, it marks the queue entry as empty by setting
297: the 'base' to zero. Iff the 'sp->tx_full' flag is set, it clears both the
298: tx_full and tbusy flags.
299:
1.1 root 300: IV. Notes
301:
302: Thanks to Steve Williams of Intel for arranging the non-disclosure agreement
303: that stated that I could disclose the information. But I still resent
304: having to sign an Intel NDA when I'm helping Intel sell their own product!
305:
306: */
307:
1.1.1.2 root 308: /* This table drives the PCI probe routines. */
1.1.1.3 root 309: static void *speedo_found1(struct pci_dev *pdev, void *init_dev,
310: long ioaddr, int irq, int chip_idx, int fnd_cnt);
311: static int speedo_pwr_event(void *dev_instance, int event);
312: enum chip_capability_flags { ResetMII=1, HasChksum=2};
1.1.1.2 root 313:
1.1.1.3 root 314: /* I/O registers beyond 0x18 do not exist on the i82557. */
315: #ifdef USE_IO_OPS
1.1.1.2 root 316: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_IO|PCI_ADDR1
317: #define SPEEDO_SIZE 32
318: #else
319: #define SPEEDO_IOTYPE PCI_USES_MASTER|PCI_USES_MEM|PCI_ADDR0
320: #define SPEEDO_SIZE 0x1000
321: #endif
1.1 root 322:
1.1.1.3 root 323: struct pci_id_info static pci_id_tbl[] = {
324: {"Intel PCI EtherExpress Pro100 82865", { 0x12278086, 0xffffffff,},
325: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
326: {"Intel PCI EtherExpress Pro100 Smart (i960RP/RD)",
327: { 0x12288086, 0xffffffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
328: {"Intel i82559 rev 8", { 0x12298086, ~0, 0,0, 8,0xff},
329: SPEEDO_IOTYPE, SPEEDO_SIZE, HasChksum, },
330: {"Intel PCI EtherExpress Pro100", { 0x12298086, 0xffffffff,},
331: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
332: {"Intel EtherExpress Pro/100+ i82559ER", { 0x12098086, 0xffffffff,},
333: SPEEDO_IOTYPE, SPEEDO_SIZE, ResetMII, },
334: {"Intel EtherExpress Pro/100 type 1029", { 0x10298086, 0xffffffff,},
335: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
336: {"Intel EtherExpress Pro/100 type 1030", { 0x10308086, 0xffffffff,},
337: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
338: {"Intel Pro/100 V Network", { 0x24498086, 0xffffffff,},
339: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
340: {"Intel PCI LAN0 Controller 82801E", { 0x24598086, 0xffffffff,},
341: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
342: {"Intel PCI LAN1 Controller 82801E", { 0x245D8086, 0xffffffff,},
343: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
344: {"Intel Pro/100 VE (type 1031)", { 0x10318086, 0xffffffff,},
345: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
346: {"Intel Pro/100 VE (type 1032)", { 0x10328086, 0xffffffff,},
347: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
348: {"Intel Pro/100 VE (type 1033)", { 0x10338086, 0xffffffff,},
349: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
350: {"Intel Pro/100 VE (type 1034)", { 0x10348086, 0xffffffff,},
351: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
352: {"Intel Pro/100 VE (type 1035)", { 0x10358086, 0xffffffff,},
353: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
354: {"Intel Pro/100 VM (type 1038)", { 0x10388086, 0xffffffff,},
355: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
356: {"Intel Pro/100 VM (type 1039)", { 0x10398086, 0xffffffff,},
357: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
358: {"Intel Pro/100 VM (type 103a)", { 0x103a8086, 0xffffffff,},
359: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
360: {"HP/Compaq D510 Intel Pro/100 VM",
361: { 0x103b8086, 0xffffffff, 0x00120e11, 0xffffffff,},
362: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
363: {"Intel Pro/100 VM (type 103b)", { 0x103b8086, 0xffffffff,},
364: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
365: {"Intel Pro/100 VE (type 103D)", { 0x103d8086, 0xffffffff,},
366: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
367: {"Intel Pro/100 VE (type 103E)", { 0x103e8086, 0xffffffff,},
368: SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
369: {"Intel EtherExpress Pro/100 865G Northbridge type 1051",
370: { 0x10518086, 0xffffffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
371: {"Intel PCI to PCI Bridge EtherExpress Pro100 Server Adapter",
372: { 0x52008086, 0xffffffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
373: {"Intel PCI EtherExpress Pro100 Server Adapter",
374: { 0x52018086, 0xffffffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
375: {"Intel Pro/100 VM (unknown type series 1030)",
376: { 0x10308086, 0xfff0ffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
377: {"Intel Pro/100 (unknown type series 1050)",
378: { 0x10508086, 0xfff0ffff,}, SPEEDO_IOTYPE, SPEEDO_SIZE, 0, },
379: {0,}, /* 0 terminated list. */
1.1.1.2 root 380: };
1.1 root 381:
1.1.1.3 root 382: struct drv_id_info eepro100_drv_id = {
383: "eepro100", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_id_tbl,
384: speedo_found1, speedo_pwr_event, };
1.1 root 385:
1.1.1.3 root 386: #ifndef USE_IO_OPS
1.1.1.2 root 387: #undef inb
388: #undef inw
389: #undef inl
390: #undef outb
391: #undef outw
392: #undef outl
393: #define inb readb
394: #define inw readw
395: #define inl readl
396: #define outb writeb
397: #define outw writew
398: #define outl writel
399: #endif
400:
1.1 root 401: /* Offsets to the various registers.
402: All accesses need not be longword aligned. */
403: enum speedo_offsets {
404: SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
405: SCBPointer = 4, /* General purpose pointer. */
406: SCBPort = 8, /* Misc. commands and operands. */
407: SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
408: SCBCtrlMDI = 16, /* MDI interface control. */
409: SCBEarlyRx = 20, /* Early receive byte count. */
410: };
411: /* Commands that can be put in a command list entry. */
412: enum commands {
1.1.1.2 root 413: CmdNOp = 0, CmdIASetup = 0x10000, CmdConfigure = 0x20000,
414: CmdMulticastList = 0x30000, CmdTx = 0x40000, CmdTDR = 0x50000,
415: CmdDump = 0x60000, CmdDiagnose = 0x70000,
416: CmdSuspend = 0x40000000, /* Suspend after completion. */
417: CmdIntr = 0x20000000, /* Interrupt after completion. */
418: CmdTxFlex = 0x00080000, /* Use "Flexible mode" for CmdTx command. */
419: };
1.1.1.3 root 420: /* Do atomically if possible. */
421: #if defined(__i386__)
422: #define clear_suspend(cmd) ((char *)(&(cmd)->cmd_status))[3] &= ~0x40
423: #elif defined(__alpha__) || defined(__x86_64) || defined(__ia64)
424: #define clear_suspend(cmd) clear_bit(30, &(cmd)->cmd_status)
425: #elif defined(__powerpc__) || defined(__sparc__) || (__BIG_ENDIAN)
426: #define clear_suspend(cmd) clear_bit(6, &(cmd)->cmd_status)
1.1.1.2 root 427: #else
1.1.1.3 root 428: #warning Undefined architecture.
429: #define clear_suspend(cmd) (cmd)->cmd_status &= cpu_to_le32(~CmdSuspend)
1.1.1.2 root 430: #endif
431:
432: enum SCBCmdBits {
1.1.1.3 root 433: SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000,
434: SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400,
435: SCBTriggerIntr=0x0200, SCBMaskAll=0x0100,
436: /* The rest are Rx and Tx commands. */
437: CUStart=0x0010, CUResume=0x0020, CUHiPriStart=0x0030, CUStatsAddr=0x0040,
438: CUShowStats=0x0050,
439: CUCmdBase=0x0060, /* CU Base address (set to zero) . */
440: CUDumpStats=0x0070, /* Dump then reset stats counters. */
441: CUHiPriResume=0x00b0, /* Resume for the high priority Tx queue. */
442: RxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006,
443: RxResumeNoResources=0x0007,
444: };
445:
446: enum intr_status_bits {
447: IntrCmdDone=0x8000, IntrRxDone=0x4000, IntrCmdIdle=0x2000,
448: IntrRxSuspend=0x1000, IntrMIIDone=0x0800, IntrDrvrIntr=0x0400,
449: IntrAllNormal=0xfc00,
1.1 root 450: };
451:
1.1.1.2 root 452: enum SCBPort_cmds {
453: PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3,
454: };
1.1 root 455:
456: /* The Speedo3 Rx and Tx frame/buffer descriptors. */
1.1.1.3 root 457: struct descriptor { /* A generic descriptor. */
458: s32 cmd_status; /* All command and status fields. */
459: u32 link; /* struct descriptor * */
1.1 root 460: unsigned char params[0];
461: };
462:
463: /* The Speedo3 Rx and Tx buffer descriptors. */
464: struct RxFD { /* Receive frame descriptor. */
465: s32 status;
466: u32 link; /* struct RxFD * */
467: u32 rx_buf_addr; /* void * */
1.1.1.2 root 468: u32 count;
1.1 root 469: };
470:
1.1.1.2 root 471: /* Selected elements of the Tx/RxFD.status word. */
472: enum RxFD_bits {
473: RxComplete=0x8000, RxOK=0x2000,
474: RxErrCRC=0x0800, RxErrAlign=0x0400, RxErrTooBig=0x0200, RxErrSymbol=0x0010,
475: RxEth2Type=0x0020, RxNoMatch=0x0004, RxNoIAMatch=0x0002,
476: TxUnderrun=0x1000, StatusComplete=0x8000,
477: };
1.1 root 478:
479: struct TxFD { /* Transmit frame descriptor set. */
480: s32 status;
481: u32 link; /* void * */
482: u32 tx_desc_addr; /* Always points to the tx_buf_addr element. */
483: s32 count; /* # of TBD (=1), Tx start thresh., etc. */
1.1.1.3 root 484: /* This constitutes two "TBD" entries. Non-zero-copy uses only one. */
1.1.1.2 root 485: u32 tx_buf_addr0; /* void *, frame to be transmitted. */
486: s32 tx_buf_size0; /* Length of Tx frame. */
1.1.1.3 root 487: u32 tx_buf_addr1; /* Used only for zero-copy data section. */
488: s32 tx_buf_size1; /* Length of second data buffer (0). */
1.1 root 489: };
490:
491: /* Elements of the dump_statistics block. This block must be lword aligned. */
492: struct speedo_stats {
493: u32 tx_good_frames;
494: u32 tx_coll16_errs;
495: u32 tx_late_colls;
496: u32 tx_underruns;
497: u32 tx_lost_carrier;
498: u32 tx_deferred;
499: u32 tx_one_colls;
500: u32 tx_multi_colls;
501: u32 tx_total_colls;
502: u32 rx_good_frames;
503: u32 rx_crc_errs;
504: u32 rx_align_errs;
505: u32 rx_resource_errs;
506: u32 rx_overrun_errs;
507: u32 rx_colls_errs;
508: u32 rx_runt_errs;
509: u32 done_marker;
510: };
511:
1.1.1.2 root 512: /* Do not change the position (alignment) of the first few elements!
513: The later elements are grouped for cache locality. */
1.1 root 514: struct speedo_private {
515: struct TxFD tx_ring[TX_RING_SIZE]; /* Commands (usually CmdTxPacket). */
1.1.1.2 root 516: struct RxFD *rx_ringp[RX_RING_SIZE]; /* Rx descriptor, used as ring. */
1.1.1.3 root 517: struct speedo_stats lstats; /* Statistics and self-test region */
518:
1.1.1.2 root 519: /* The addresses of a Tx/Rx-in-place packets/buffers. */
1.1 root 520: struct sk_buff* tx_skbuff[TX_RING_SIZE];
521: struct sk_buff* rx_skbuff[RX_RING_SIZE];
1.1.1.3 root 522:
523: /* Transmit and other commands control. */
1.1.1.2 root 524: struct descriptor *last_cmd; /* Last command sent. */
525: unsigned int cur_tx, dirty_tx; /* The ring entries to be free()ed. */
526: spinlock_t lock; /* Group with Tx control cache line. */
527: u32 tx_threshold; /* The value for txdesc.count. */
1.1.1.3 root 528: unsigned long last_cmd_time;
529:
530: /* Rx control, one cache line. */
531: struct RxFD *last_rxf; /* Most recent Rx frame. */
1.1.1.2 root 532: unsigned int cur_rx, dirty_rx; /* The next free ring entry */
1.1.1.3 root 533: unsigned int rx_buf_sz; /* Based on MTU+slack. */
1.1.1.2 root 534: long last_rx_time; /* Last Rx, in jiffies, to handle Rx hang. */
1.1.1.3 root 535: int rx_copybreak;
536:
537: int msg_level;
538: int max_interrupt_work;
1.1.1.2 root 539: struct net_device *next_module;
540: void *priv_addr; /* Unaligned address for kfree */
1.1.1.3 root 541: struct net_device_stats stats;
542: int alloc_failures;
543: int chip_id, drv_flags;
544: struct pci_dev *pci_dev;
545: unsigned char acpi_pwr;
1.1 root 546: struct timer_list timer; /* Media selection timer. */
1.1.1.3 root 547: /* Multicast filter command. */
548: int mc_setup_frm_len; /* The length of an allocated.. */
549: struct descriptor *mc_setup_frm; /* ..multicast setup frame. */
550: int mc_setup_busy; /* Avoid double-use of setup frame. */
551: int multicast_filter_limit;
552:
1.1 root 553: int in_interrupt; /* Word-aligned dev->interrupt */
1.1.1.3 root 554: int rx_mode; /* Current PROMISC/ALLMULTI setting. */
1.1 root 555: unsigned int tx_full:1; /* The Tx queue is full. */
556: unsigned int full_duplex:1; /* Full-duplex operation requested. */
1.1.1.2 root 557: unsigned int flow_ctrl:1; /* Use 802.3x flow control. */
1.1 root 558: unsigned int rx_bug:1; /* Work around receiver hang errata. */
559: unsigned int rx_bug10:1; /* Receiver might hang at 10mbps. */
560: unsigned int rx_bug100:1; /* Receiver might hang at 100mbps. */
1.1.1.3 root 561: unsigned int polling:1; /* Hardware blocked interrupt line. */
562: unsigned int medialock:1; /* The media speed/duplex is fixed. */
563: unsigned char default_port; /* Last dev->if_port value. */
1.1 root 564: unsigned short phy[2]; /* PHY media interfaces available. */
1.1.1.2 root 565: unsigned short advertising; /* Current PHY advertised caps. */
566: unsigned short partner; /* Link partner caps. */
1.1.1.3 root 567: long last_reset;
568: };
569:
570: /* Our internal RxMode state, not tied to the hardware bits. */
571: enum rx_mode_bits {
572: AcceptAllMulticast=0x01, AcceptAllPhys=0x02,
573: AcceptErr=0x80, AcceptRunt=0x10,
574: AcceptBroadcast=0x08, AcceptMulticast=0x04,
575: AcceptMyPhys=0x01, RxInvalidMode=0x7f
1.1 root 576: };
577:
578: /* The parameters for a CmdConfigure operation.
579: There are so many options that it would be difficult to document each bit.
580: We mostly use the default or recommended settings. */
1.1.1.2 root 581: const char i82557_config_cmd[22] = {
582: 22, 0x08, 0, 0, 0, 0, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */
1.1 root 583: 0, 0x2E, 0, 0x60, 0,
584: 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */
585: 0x3f, 0x05, };
1.1.1.2 root 586: const char i82558_config_cmd[22] = {
587: 22, 0x08, 0, 1, 0, 0, 0x22, 0x03, 1, /* 1=Use MII 0=Use AUI */
588: 0, 0x2E, 0, 0x60, 0x08, 0x88,
1.1.1.3 root 589: 0x68, 0, 0x40, 0xf2, 0xBD, /* 0xBD->0xFD=Force full-duplex */
1.1.1.2 root 590: 0x31, 0x05, };
1.1 root 591:
1.1.1.3 root 592: /* PHY media interface chips, defined by the databook. */
1.1 root 593: static const char *phys[] = {
594: "None", "i82553-A/B", "i82553-C", "i82503",
595: "DP83840", "80c240", "80c24", "i82555",
596: "unknown-8", "unknown-9", "DP83840A", "unknown-11",
597: "unknown-12", "unknown-13", "unknown-14", "unknown-15", };
598: enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,
599: S80C24, I82555, DP83840A=10, };
600: static const char is_mii[] = { 0, 1, 1, 0, 1, 1, 0, 1 };
1.1.1.3 root 601:
602: /* Standard serial configuration EEPROM commands. */
1.1.1.2 root 603: #define EE_READ_CMD (6)
1.1 root 604:
1.1.1.2 root 605: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len);
1.1.1.3 root 606: static int mdio_read(struct net_device *dev, int phy_id, int location);
1.1.1.2 root 607: static int mdio_write(long ioaddr, int phy_id, int location, int value);
608: static int speedo_open(struct net_device *dev);
609: static void speedo_resume(struct net_device *dev);
1.1 root 610: static void speedo_timer(unsigned long data);
1.1.1.2 root 611: static void speedo_init_rx_ring(struct net_device *dev);
612: static void speedo_tx_timeout(struct net_device *dev);
613: static int speedo_start_xmit(struct sk_buff *skb, struct net_device *dev);
614: static int speedo_rx(struct net_device *dev);
1.1 root 615: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
1.1.1.2 root 616: static int speedo_close(struct net_device *dev);
1.1.1.3 root 617: static struct net_device_stats *speedo_get_stats(struct net_device *dev);
1.1.1.2 root 618: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
619: static void set_rx_mode(struct net_device *dev);
1.1 root 620:
621:
622:
1.1.1.2 root 623: #ifdef honor_default_port
624: /* Optional driver feature to allow forcing the transceiver setting.
625: Not recommended. */
626: static int mii_ctrl[8] = { 0x3300, 0x3100, 0x0000, 0x0100,
627: 0x2000, 0x2100, 0x0400, 0x3100};
1.1 root 628: #endif
629:
630: /* A list of all installed Speedo devices, for removing the driver module. */
1.1.1.2 root 631: static struct net_device *root_speedo_dev = NULL;
1.1 root 632:
1.1.1.3 root 633: static void *speedo_found1(struct pci_dev *pdev, void *init_dev,
634: long ioaddr, int irq, int chip_idx, int card_idx)
1.1 root 635: {
1.1.1.2 root 636: struct net_device *dev;
1.1 root 637: struct speedo_private *sp;
1.1.1.3 root 638: void *priv_mem;
1.1 root 639: int i, option;
1.1.1.2 root 640: u16 eeprom[0x100];
641: int acpi_idle_state = 0;
1.1 root 642:
1.1.1.3 root 643: dev = init_etherdev(init_dev, 0);
644: if (!dev)
645: return NULL;
1.1 root 646:
1.1.1.2 root 647: if (dev->mem_start > 0)
1.1 root 648: option = dev->mem_start;
649: else if (card_idx >= 0 && options[card_idx] >= 0)
650: option = options[card_idx];
651: else
1.1.1.3 root 652: option = -1;
653:
654: acpi_idle_state = acpi_set_pwr_state(pdev, ACPI_D0);
1.1 root 655:
656: /* Read the station address EEPROM before doing the reset.
1.1.1.2 root 657: Nominally his should even be done before accepting the device, but
658: then we wouldn't have a device name with which to report the error.
659: The size test is for 6 bit vs. 8 bit address serial EEPROMs.
660: */
1.1 root 661: {
1.1.1.3 root 662: u16 sum = 0;
1.1 root 663: int j;
1.1.1.3 root 664: int read_cmd, ee_size;
1.1.1.2 root 665:
1.1.1.3 root 666: if ((do_eeprom_cmd(ioaddr, EE_READ_CMD << 24, 27) & 0xffe0000)
1.1.1.2 root 667: == 0xffe0000) {
668: ee_size = 0x100;
669: read_cmd = EE_READ_CMD << 24;
670: } else {
671: ee_size = 0x40;
672: read_cmd = EE_READ_CMD << 22;
673: }
674:
1.1.1.3 root 675: for (j = 0, i = 0; i < ee_size; i++) {
676: u16 value = do_eeprom_cmd(ioaddr, read_cmd | (i << 16), 27);
1.1 root 677: eeprom[i] = value;
678: sum += value;
679: if (i < 3) {
680: dev->dev_addr[j++] = value;
681: dev->dev_addr[j++] = value >> 8;
682: }
683: }
684: if (sum != 0xBABA)
685: printk(KERN_WARNING "%s: Invalid EEPROM checksum %#4.4x, "
686: "check settings before activating this device!\n",
687: dev->name, sum);
688: /* Don't unregister_netdev(dev); as the EEPro may actually be
1.1.1.3 root 689: usable, especially if the MAC address is set later. */
1.1 root 690: }
691:
692: /* Reset the chip: stop Tx and Rx processes and clear counters.
693: This takes less than 10usec and will easily finish before the next
694: action. */
1.1.1.2 root 695: outl(PortReset, ioaddr + SCBPort);
1.1 root 696:
1.1.1.3 root 697: printk(KERN_INFO "%s: %s%s at %#3lx, ", dev->name,
698: eeprom[3] & 0x0100 ? "OEM " : "", pci_id_tbl[chip_idx].name,
699: ioaddr);
1.1 root 700:
701: for (i = 0; i < 5; i++)
702: printk("%2.2X:", dev->dev_addr[i]);
1.1.1.3 root 703: printk("%2.2X, IRQ %d.\n", dev->dev_addr[i], irq);
1.1 root 704:
1.1.1.3 root 705: /* We have decided to accept this device. */
706: /* Allocate cached private storage.
707: The PCI coherent descriptor rings are allocated at each open. */
708: sp = priv_mem = kmalloc(sizeof(*sp), GFP_KERNEL);
709: /* Check for the very unlikely case of no memory. */
710: if (priv_mem == NULL)
711: return NULL;
712: dev->base_addr = ioaddr;
713: dev->irq = irq;
714:
715: #ifndef kernel_bloat
1.1 root 716: /* OK, this is pure kernel bloat. I don't like it when other drivers
717: waste non-pageable kernel space to emit similar messages, but I need
718: them for bug reports. */
719: {
720: const char *connectors[] = {" RJ45", " BNC", " AUI", " MII"};
721: /* The self-test results must be paragraph aligned. */
1.1.1.3 root 722: s32 *volatile self_test_results;
1.1 root 723: int boguscnt = 16000; /* Timeout for set-test. */
724: printk(KERN_INFO " Board assembly %4.4x%2.2x-%3.3d, Physical"
725: " connectors present:",
726: eeprom[8], eeprom[9]>>8, eeprom[9] & 0xff);
727: for (i = 0; i < 4; i++)
728: if (eeprom[5] & (1<<i))
1.1.1.4 ! root 729: printk("%s", connectors[i]);
1.1 root 730: printk("\n"KERN_INFO" Primary interface chip %s PHY #%d.\n",
731: phys[(eeprom[6]>>8)&15], eeprom[6] & 0x1f);
732: if (eeprom[7] & 0x0700)
733: printk(KERN_INFO " Secondary interface chip %s.\n",
734: phys[(eeprom[7]>>8)&7]);
735: if (((eeprom[6]>>8) & 0x3f) == DP83840
736: || ((eeprom[6]>>8) & 0x3f) == DP83840A) {
1.1.1.3 root 737: int mdi_reg23 = mdio_read(dev, eeprom[6] & 0x1f, 23) | 0x0422;
1.1 root 738: if (congenb)
739: mdi_reg23 |= 0x0100;
740: printk(KERN_INFO" DP83840 specific setup, setting register 23 to %4.4x.\n",
741: mdi_reg23);
742: mdio_write(ioaddr, eeprom[6] & 0x1f, 23, mdi_reg23);
743: }
1.1.1.3 root 744: if ((option >= 0) && (option & 0x330)) {
1.1 root 745: printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n",
1.1.1.3 root 746: (option & 0x300 ? 100 : 10),
747: (option & 0x220 ? "full" : "half"));
1.1 root 748: mdio_write(ioaddr, eeprom[6] & 0x1f, 0,
1.1.1.3 root 749: ((option & 0x300) ? 0x2000 : 0) | /* 100mbps? */
750: ((option & 0x220) ? 0x0100 : 0)); /* Full duplex? */
751: } else {
752: int mii_bmcrctrl = mdio_read(dev, eeprom[6] & 0x1f, 0);
753: /* Reset out of a transceiver left in 10baseT-fixed mode. */
754: if ((mii_bmcrctrl & 0x3100) == 0)
755: mdio_write(ioaddr, eeprom[6] & 0x1f, 0, 0x8000);
756: }
757: if (eeprom[10] & 0x0002)
758: printk(KERN_INFO "\n" KERN_INFO " ** The configuration "
759: "EEPROM enables Sleep Mode.\n" KERN_INFO "\n"
760: " ** This will cause PCI bus errors!\n"
761: KERN_INFO " ** Update the configuration EEPROM "
762: "with the eepro100-diag program.\n" );
763: if (eeprom[6] == 0)
764: printk(KERN_INFO " ** The configuration EEPROM does not have a "
765: "transceiver type set.\n" KERN_INFO "\n"
766: " ** This will cause configuration problems and prevent "
767: "monitoring the link!\n"
768: KERN_INFO " ** Update the configuration EEPROM "
769: "with the eepro100-diag program.\n" );
1.1 root 770:
771: /* Perform a system self-test. */
1.1.1.3 root 772: self_test_results = (s32*)(&sp->lstats);
1.1 root 773: self_test_results[0] = 0;
774: self_test_results[1] = -1;
1.1.1.2 root 775: outl(virt_to_bus(self_test_results) | PortSelfTest, ioaddr + SCBPort);
1.1 root 776: do {
777: udelay(10);
778: } while (self_test_results[1] == -1 && --boguscnt >= 0);
779:
780: if (boguscnt < 0) { /* Test optimized out. */
781: printk(KERN_ERR "Self test failed, status %8.8x:\n"
782: KERN_ERR " Failure to initialize the i82557.\n"
783: KERN_ERR " Verify that the card is a bus-master"
784: " capable slot.\n",
785: self_test_results[1]);
786: } else
787: printk(KERN_INFO " General self-test: %s.\n"
788: KERN_INFO " Serial sub-system self-test: %s.\n"
789: KERN_INFO " Internal registers self-test: %s.\n"
790: KERN_INFO " ROM checksum self-test: %s (%#8.8x).\n",
791: self_test_results[1] & 0x1000 ? "failed" : "passed",
792: self_test_results[1] & 0x0020 ? "failed" : "passed",
793: self_test_results[1] & 0x0008 ? "failed" : "passed",
794: self_test_results[1] & 0x0004 ? "failed" : "passed",
795: self_test_results[0]);
796: }
797: #endif /* kernel_bloat */
798:
1.1.1.2 root 799: outl(PortReset, ioaddr + SCBPort);
1.1 root 800:
1.1.1.3 root 801: /* Return the chip to its original power state. */
802: acpi_set_pwr_state(pdev, acpi_idle_state);
1.1 root 803:
1.1.1.3 root 804: /* We do a request_region() only to register /proc/ioports info. */
805: request_region(ioaddr, pci_id_tbl[chip_idx].io_size, dev->name);
1.1 root 806:
1.1.1.3 root 807: dev->priv = sp; /* Allocated above. */
1.1 root 808: memset(sp, 0, sizeof(*sp));
809: sp->next_module = root_speedo_dev;
810: root_speedo_dev = dev;
811:
1.1.1.3 root 812: sp->priv_addr = priv_mem;
813: sp->pci_dev = pdev;
1.1.1.2 root 814: sp->chip_id = chip_idx;
1.1.1.3 root 815: sp->drv_flags = pci_id_tbl[chip_idx].drv_flags;
1.1.1.2 root 816: sp->acpi_pwr = acpi_idle_state;
1.1.1.3 root 817: sp->msg_level = (1 << debug) - 1;
818: sp->rx_copybreak = rx_copybreak;
819: sp->max_interrupt_work = max_interrupt_work;
820: sp->multicast_filter_limit = multicast_filter_limit;
1.1.1.2 root 821:
1.1.1.3 root 822: sp->full_duplex = option >= 0 && (option & 0x220) ? 1 : 0;
1.1 root 823: if (card_idx >= 0) {
824: if (full_duplex[card_idx] >= 0)
825: sp->full_duplex = full_duplex[card_idx];
826: }
827: sp->default_port = option >= 0 ? (option & 0x0f) : 0;
1.1.1.3 root 828: if (sp->full_duplex)
829: sp->medialock = 1;
1.1 root 830:
831: sp->phy[0] = eeprom[6];
832: sp->phy[1] = eeprom[7];
833: sp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1;
834:
835: if (sp->rx_bug)
836: printk(KERN_INFO " Receiver lock-up workaround activated.\n");
837:
838: /* The Speedo-specific entries in the device structure. */
839: dev->open = &speedo_open;
840: dev->hard_start_xmit = &speedo_start_xmit;
841: dev->stop = &speedo_close;
842: dev->get_stats = &speedo_get_stats;
843: dev->set_multicast_list = &set_rx_mode;
844: dev->do_ioctl = &speedo_ioctl;
845:
1.1.1.2 root 846: return dev;
1.1 root 847: }
1.1.1.3 root 848:
849: /* How to wait for the command unit to accept a command.
850: Typically this takes 0 ticks. */
851:
852: static inline void wait_for_cmd_done(struct net_device *dev)
853: {
854: long cmd_ioaddr = dev->base_addr + SCBCmd;
855: int wait = 0;
856: int delayed_cmd;
857: do
858: if (inb(cmd_ioaddr) == 0) return;
859: while(++wait <= 100);
860: delayed_cmd = inb(cmd_ioaddr);
861: do
862: if (inb(cmd_ioaddr) == 0) break;
863: while(++wait <= 10000);
864: printk(KERN_ERR "%s: Command %2.2x was not immediately accepted, "
865: "%d ticks!\n",
866: dev->name, delayed_cmd, wait);
867: }
868:
869: /* Perform a SCB command known to be slow.
870: This function checks the status both before and after command execution. */
871: static void do_slow_command(struct net_device *dev, int cmd)
872: {
873: long cmd_ioaddr = dev->base_addr + SCBCmd;
874: int wait = 0;
875: do
876: if (inb(cmd_ioaddr) == 0) break;
877: while(++wait <= 200);
878: if (wait > 100)
879: printk(KERN_ERR "%s: Command %4.4x was never accepted (%d polls)!\n",
880: dev->name, inb(cmd_ioaddr), wait);
881: outb(cmd, cmd_ioaddr);
882: for (wait = 0; wait <= 100; wait++)
883: if (inb(cmd_ioaddr) == 0) return;
884: for (; wait <= 20000; wait++)
885: if (inb(cmd_ioaddr) == 0) return;
886: else udelay(1);
887: printk(KERN_ERR "%s: Command %4.4x was not accepted after %d polls!"
888: " Current status %8.8x.\n",
889: dev->name, cmd, wait, (int)inl(dev->base_addr + SCBStatus));
890: }
891:
1.1 root 892:
893: /* Serial EEPROM section.
894: A "bit" grungy, but we work our way through bit-by-bit :->. */
895: /* EEPROM_Ctrl bits. */
896: #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
897: #define EE_CS 0x02 /* EEPROM chip select. */
898: #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
899: #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
900: #define EE_ENB (0x4800 | EE_CS)
1.1.1.2 root 901: #define EE_WRITE_0 0x4802
902: #define EE_WRITE_1 0x4806
903: #define EE_OFFSET SCBeeprom
904:
1.1.1.3 root 905: /* Delay between EEPROM clock transitions.
906: The code works with no delay on 33Mhz PCI. */
907: #ifndef USE_IO_OPS
908: #define eeprom_delay(ee_addr) writew(readw(ee_addr), ee_addr)
909: #else
910: #define eeprom_delay(ee_addr) inw(ee_addr)
911: #endif
912:
1.1.1.2 root 913: static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
914: {
915: unsigned retval = 0;
916: long ee_addr = ioaddr + SCBeeprom;
1.1 root 917:
1.1.1.3 root 918: outw(EE_ENB | EE_SHIFT_CLK, ee_addr);
1.1 root 919:
1.1.1.2 root 920: /* Shift the command bits out. */
921: do {
922: short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
1.1.1.3 root 923: outw(dataval, ee_addr);
924: eeprom_delay(ee_addr);
925: outw(dataval | EE_SHIFT_CLK, ee_addr);
926: eeprom_delay(ee_addr);
927: retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
1.1.1.2 root 928: } while (--cmd_len >= 0);
1.1.1.3 root 929: outw(EE_ENB, ee_addr);
1.1 root 930:
931: /* Terminate the EEPROM access. */
1.1.1.3 root 932: outw(EE_ENB & ~EE_CS, ee_addr);
1.1 root 933: return retval;
934: }
935:
1.1.1.3 root 936: static int mdio_read(struct net_device *dev, int phy_id, int location)
1.1 root 937: {
1.1.1.3 root 938: long ioaddr = dev->base_addr;
1.1 root 939: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
1.1.1.3 root 940:
1.1 root 941: outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);
942: do {
943: val = inl(ioaddr + SCBCtrlMDI);
944: if (--boguscnt < 0) {
1.1.1.3 root 945: printk(KERN_ERR "%s: mdio_read() timed out with val = %8.8x.\n",
946: dev->name, val);
1.1.1.2 root 947: break;
1.1 root 948: }
949: } while (! (val & 0x10000000));
950: return val & 0xffff;
951: }
952:
1.1.1.2 root 953: static int mdio_write(long ioaddr, int phy_id, int location, int value)
1.1 root 954: {
955: int val, boguscnt = 64*10; /* <64 usec. to complete, typ 27 ticks */
956: outl(0x04000000 | (location<<16) | (phy_id<<21) | value,
957: ioaddr + SCBCtrlMDI);
958: do {
959: val = inl(ioaddr + SCBCtrlMDI);
960: if (--boguscnt < 0) {
961: printk(KERN_ERR" mdio_write() timed out with val = %8.8x.\n", val);
1.1.1.2 root 962: break;
1.1 root 963: }
964: } while (! (val & 0x10000000));
965: return val & 0xffff;
966: }
967:
968:
969: static int
1.1.1.2 root 970: speedo_open(struct net_device *dev)
1.1 root 971: {
972: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 973: long ioaddr = dev->base_addr;
1.1 root 974:
975: MOD_INC_USE_COUNT;
1.1.1.3 root 976: acpi_set_pwr_state(sp->pci_dev, ACPI_D0);
977:
978: if (sp->msg_level & NETIF_MSG_IFUP)
979: printk(KERN_DEBUG "%s: speedo_open() irq %d.\n", dev->name, dev->irq);
1.1 root 980:
1.1.1.2 root 981: /* Set up the Tx queue early.. */
982: sp->cur_tx = 0;
983: sp->dirty_tx = 0;
984: sp->last_cmd = 0;
985: sp->tx_full = 0;
986: sp->lock = (spinlock_t) SPIN_LOCK_UNLOCKED;
1.1.1.3 root 987: sp->polling = sp->in_interrupt = 0;
1.1 root 988:
1.1.1.2 root 989: dev->if_port = sp->default_port;
1.1 root 990:
1.1.1.3 root 991: if ((sp->phy[0] & 0x8000) == 0)
992: sp->advertising = mdio_read(dev, sp->phy[0] & 0x1f, 4);
993: /* With some transceivers we must retrigger negotiation to reset
994: power-up errors. */
995: if ((sp->drv_flags & ResetMII) &&
996: (sp->phy[0] & 0x8000) == 0) {
1.1.1.2 root 997: int phy_addr = sp->phy[0] & 0x1f ;
998: /* Use 0x3300 for restarting NWay, other values to force xcvr:
999: 0x0000 10-HD
1000: 0x0100 10-FD
1001: 0x2000 100-HD
1002: 0x2100 100-FD
1003: */
1004: #ifdef honor_default_port
1005: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]);
1006: #else
1007: mdio_write(ioaddr, phy_addr, 0, 0x3300);
1008: #endif
1.1 root 1009: }
1.1.1.3 root 1010:
1011: /* We can safely take handler calls during init.
1012: Doing this after speedo_init_rx_ring() results in a memory leak. */
1013: if (request_irq(dev->irq, &speedo_interrupt, SA_SHIRQ, dev->name, dev)) {
1014: MOD_DEC_USE_COUNT;
1015: return -EAGAIN;
1016: }
1.1 root 1017:
1.1.1.2 root 1018: speedo_init_rx_ring(dev);
1.1 root 1019:
1.1.1.2 root 1020: /* Fire up the hardware. */
1021: speedo_resume(dev);
1.1.1.3 root 1022: netif_start_tx_queue(dev);
1.1 root 1023:
1024: /* Setup the chip and configure the multicast list. */
1.1.1.3 root 1025: sp->mc_setup_frm = NULL;
1026: sp->mc_setup_frm_len = 0;
1027: sp->mc_setup_busy = 0;
1028: sp->rx_mode = RxInvalidMode; /* Invalid -> always reset the mode. */
1.1.1.2 root 1029: sp->flow_ctrl = sp->partner = 0;
1.1 root 1030: set_rx_mode(dev);
1031:
1.1.1.3 root 1032: if (sp->msg_level & NETIF_MSG_IFUP)
1.1 root 1033: printk(KERN_DEBUG "%s: Done speedo_open(), status %8.8x.\n",
1.1.1.3 root 1034: dev->name, (int)inw(ioaddr + SCBStatus));
1.1.1.2 root 1035:
1.1 root 1036: /* Set the timer. The timer serves a dual purpose:
1037: 1) to monitor the media interface (e.g. link beat) and perhaps switch
1038: to an alternate media type
1039: 2) to monitor Rx activity, and restart the Rx process if the receiver
1040: hangs. */
1041: init_timer(&sp->timer);
1.1.1.3 root 1042: sp->timer.expires = jiffies + 3*HZ;
1.1 root 1043: sp->timer.data = (unsigned long)dev;
1044: sp->timer.function = &speedo_timer; /* timer handler */
1045: add_timer(&sp->timer);
1046:
1.1.1.2 root 1047: /* No need to wait for the command unit to accept here. */
1048: if ((sp->phy[0] & 0x8000) == 0)
1.1.1.3 root 1049: mdio_read(dev, sp->phy[0] & 0x1f, 0);
1.1 root 1050: return 0;
1051: }
1052:
1.1.1.2 root 1053: /* Start the chip hardware after a full reset. */
1054: static void speedo_resume(struct net_device *dev)
1055: {
1056: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1057: long ioaddr = dev->base_addr;
1058:
1.1.1.3 root 1059: outw(SCBMaskAll, ioaddr + SCBCmd);
1060:
1.1.1.2 root 1061: /* Start with a Tx threshold of 256 (0x..20.... 8 byte units). */
1062: sp->tx_threshold = 0x01208000;
1063:
1064: /* Set the segment registers to '0'. */
1.1.1.3 root 1065: wait_for_cmd_done(dev);
1066: if (inb(ioaddr + SCBCmd)) {
1067: outl(PortPartialReset, ioaddr + SCBPort);
1068: udelay(10);
1069: }
1.1.1.2 root 1070: outl(0, ioaddr + SCBPointer);
1.1.1.3 root 1071: inl(ioaddr + SCBPointer); /* Flush to PCI. */
1072: udelay(10); /* Bogus, but it avoids the bug. */
1073: /* Note: these next two operations can take a while. */
1074: do_slow_command(dev, RxAddrLoad);
1075: do_slow_command(dev, CUCmdBase);
1.1.1.2 root 1076:
1077: /* Load the statistics block and rx ring addresses. */
1078: outl(virt_to_bus(&sp->lstats), ioaddr + SCBPointer);
1.1.1.3 root 1079: inl(ioaddr + SCBPointer); /* Flush to PCI. */
1.1.1.2 root 1080: outb(CUStatsAddr, ioaddr + SCBCmd);
1081: sp->lstats.done_marker = 0;
1.1.1.3 root 1082: wait_for_cmd_done(dev);
1.1.1.2 root 1083:
1.1.1.3 root 1084: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1085: ioaddr + SCBPointer);
1086: inl(ioaddr + SCBPointer); /* Flush to PCI. */
1087: /* Note: RxStart should complete instantly. */
1088: do_slow_command(dev, RxStart);
1089: do_slow_command(dev, CUDumpStats);
1.1.1.2 root 1090:
1091: /* Fill the first command with our physical address. */
1092: {
1.1.1.3 root 1093: int entry = sp->cur_tx++ % TX_RING_SIZE;
1094: struct descriptor *cur_cmd = (struct descriptor *)&sp->tx_ring[entry];
1.1.1.2 root 1095:
1096: /* Avoid a bug(?!) here by marking the command already completed. */
1.1.1.3 root 1097: cur_cmd->cmd_status = cpu_to_le32((CmdSuspend | CmdIASetup) | 0xa000);
1098: cur_cmd->link =
1.1.1.2 root 1099: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
1.1.1.3 root 1100: memcpy(cur_cmd->params, dev->dev_addr, 6);
1101: if (sp->last_cmd)
1102: clear_suspend(sp->last_cmd);
1103: sp->last_cmd = cur_cmd;
1.1.1.2 root 1104: }
1105:
1106: /* Start the chip's Tx process and unmask interrupts. */
1107: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]),
1108: ioaddr + SCBPointer);
1.1.1.3 root 1109: outw(CUStart, ioaddr + SCBCmd);
1.1.1.2 root 1110: }
1111:
1.1 root 1112: /* Media monitoring and control. */
1113: static void speedo_timer(unsigned long data)
1114: {
1.1.1.2 root 1115: struct net_device *dev = (struct net_device *)data;
1.1 root 1116: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 1117: long ioaddr = dev->base_addr;
1118: int phy_num = sp->phy[0] & 0x1f;
1.1.1.3 root 1119: int status = inw(ioaddr + SCBStatus);
1.1 root 1120:
1.1.1.3 root 1121: if (sp->msg_level & NETIF_MSG_TIMER)
1122: printk(KERN_DEBUG "%s: Interface monitor tick, chip status %4.4x.\n",
1123: dev->name, status);
1124:
1125: /* Normally we check every two seconds. */
1126: sp->timer.expires = jiffies + 2*HZ;
1127:
1128: if (sp->polling) {
1129: /* Continue to be annoying. */
1130: if (status & 0xfc00) {
1131: speedo_interrupt(dev->irq, dev, 0);
1132: if (jiffies - sp->last_reset > 10*HZ) {
1133: printk(KERN_ERR "%s: IRQ %d is still blocked!\n",
1134: dev->name, dev->irq);
1135: sp->last_reset = jiffies;
1136: }
1137: } else if (jiffies - sp->last_reset > 10*HZ)
1138: sp->polling = 0;
1139: sp->timer.expires = jiffies + 2;
1140: }
1.1.1.2 root 1141: /* We have MII and lost link beat. */
1142: if ((sp->phy[0] & 0x8000) == 0) {
1.1.1.3 root 1143: int partner = mdio_read(dev, phy_num, 5);
1.1.1.2 root 1144: if (partner != sp->partner) {
1145: int flow_ctrl = sp->advertising & partner & 0x0400 ? 1 : 0;
1146: sp->partner = partner;
1147: if (flow_ctrl != sp->flow_ctrl) {
1148: sp->flow_ctrl = flow_ctrl;
1.1.1.3 root 1149: sp->rx_mode = RxInvalidMode; /* Trigger a reload. */
1.1.1.2 root 1150: }
1151: /* Clear sticky bit. */
1.1.1.3 root 1152: mdio_read(dev, phy_num, 1);
1.1.1.2 root 1153: /* If link beat has returned... */
1.1.1.3 root 1154: if (mdio_read(dev, phy_num, 1) & 0x0004)
1155: netif_link_up(dev);
1.1.1.2 root 1156: else
1.1.1.3 root 1157: netif_link_down(dev);
1.1.1.2 root 1158: }
1159: }
1.1.1.3 root 1160:
1161: /* This no longer has a false-trigger window. */
1162: if (sp->cur_tx - sp->dirty_tx > 1 &&
1163: (jiffies - dev->trans_start) > TX_TIMEOUT &&
1164: (jiffies - sp->last_cmd_time) > TX_TIMEOUT) {
1165: if (status == 0xffff) {
1166: if (jiffies - sp->last_reset > 10*HZ) {
1167: sp->last_reset = jiffies;
1168: printk(KERN_ERR "%s: The EEPro100 chip is missing!\n",
1169: dev->name);
1170: }
1171: } else if (status & 0xfc00) {
1172: /* We have a blocked IRQ line. This should never happen, but
1173: we recover as best we can.*/
1174: if ( ! sp->polling) {
1175: if (jiffies - sp->last_reset > 10*HZ) {
1176: printk(KERN_ERR "%s: IRQ %d is physically blocked! (%4.4x)"
1177: "Failing back to low-rate polling.\n",
1178: dev->name, dev->irq, status);
1179: sp->last_reset = jiffies;
1180: }
1181: sp->polling = 1;
1182: }
1183: speedo_interrupt(dev->irq, dev, 0);
1184: sp->timer.expires = jiffies + 2; /* Avoid */
1185: } else {
1186: speedo_tx_timeout(dev);
1187: sp->last_reset = jiffies;
1188: }
1.1 root 1189: }
1.1.1.3 root 1190: if (sp->rx_mode == RxInvalidMode ||
1.1.1.2 root 1191: (sp->rx_bug && jiffies - sp->last_rx_time > 2*HZ)) {
1192: /* We haven't received a packet in a Long Time. We might have been
1193: bitten by the receiver hang bug. This can be cleared by sending
1194: a set multicast list command. */
1195: set_rx_mode(dev);
1.1 root 1196: }
1.1.1.2 root 1197: add_timer(&sp->timer);
1198: }
1199:
1200: static void speedo_show_state(struct net_device *dev)
1201: {
1202: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1203: int phy_num = sp->phy[0] & 0x1f;
1204: int i;
1205:
1206: /* Print a few items for debugging. */
1.1.1.3 root 1207: if (sp->msg_level & NETIF_MSG_DRV) {
1.1.1.2 root 1208: int i;
1.1.1.3 root 1209: printk(KERN_DEBUG "%s: Tx ring dump, Tx queue %d / %d:\n", dev->name,
1.1.1.2 root 1210: sp->cur_tx, sp->dirty_tx);
1211: for (i = 0; i < TX_RING_SIZE; i++)
1.1.1.3 root 1212: printk(KERN_DEBUG "%s: %c%c%d %8.8x.\n", dev->name,
1.1.1.2 root 1213: i == sp->dirty_tx % TX_RING_SIZE ? '*' : ' ',
1214: i == sp->cur_tx % TX_RING_SIZE ? '=' : ' ',
1215: i, sp->tx_ring[i].status);
1216: }
1.1.1.3 root 1217: printk(KERN_DEBUG "%s:Printing Rx ring (next to receive into %d).\n",
1218: dev->name, sp->cur_rx);
1.1.1.2 root 1219:
1220: for (i = 0; i < RX_RING_SIZE; i++)
1.1.1.3 root 1221: printk(KERN_DEBUG " Rx ring entry %d %8.8x.\n",
1222: i, sp->rx_ringp[i] ? (int)sp->rx_ringp[i]->status : 0);
1.1.1.2 root 1223:
1224: for (i = 0; i < 16; i++) {
1225: if (i == 6) i = 21;
1.1.1.3 root 1226: printk(KERN_DEBUG " PHY index %d register %d is %4.4x.\n",
1227: phy_num, i, mdio_read(dev, phy_num, i));
1.1.1.2 root 1228: }
1229:
1.1 root 1230: }
1231:
1232: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1233: static void
1.1.1.2 root 1234: speedo_init_rx_ring(struct net_device *dev)
1.1 root 1235: {
1236: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1237: struct RxFD *rxf, *last_rxf = NULL;
1238: int i;
1239:
1240: sp->cur_rx = 0;
1.1.1.3 root 1241: #if defined(CONFIG_VLAN)
1242: /* Note that buffer sizing is not a run-time check! */
1243: sp->rx_buf_sz = dev->mtu + 14 + sizeof(struct RxFD) + 4;
1244: #else
1245: sp->rx_buf_sz = dev->mtu + 14 + sizeof(struct RxFD);
1246: #endif
1247: if (sp->rx_buf_sz < PKT_BUF_SZ)
1248: sp->rx_buf_sz = PKT_BUF_SZ;
1.1 root 1249:
1250: for (i = 0; i < RX_RING_SIZE; i++) {
1251: struct sk_buff *skb;
1.1.1.3 root 1252: skb = dev_alloc_skb(sp->rx_buf_sz);
1.1 root 1253: sp->rx_skbuff[i] = skb;
1254: if (skb == NULL)
1.1.1.2 root 1255: break; /* OK. Just initially short of Rx bufs. */
1.1 root 1256: skb->dev = dev; /* Mark as being used by this device. */
1257: rxf = (struct RxFD *)skb->tail;
1258: sp->rx_ringp[i] = rxf;
1.1.1.2 root 1259: skb_reserve(skb, sizeof(struct RxFD));
1.1 root 1260: if (last_rxf)
1.1.1.2 root 1261: last_rxf->link = virt_to_le32desc(rxf);
1.1 root 1262: last_rxf = rxf;
1.1.1.2 root 1263: rxf->status = cpu_to_le32(0x00000001); /* '1' is flag value only. */
1.1 root 1264: rxf->link = 0; /* None yet. */
1.1.1.3 root 1265: /* This field unused by i82557, we use it as a consistency check. */
1266: #ifdef final_version
1.1.1.2 root 1267: rxf->rx_buf_addr = 0xffffffff;
1.1.1.3 root 1268: #else
1269: rxf->rx_buf_addr = virt_to_bus(skb->tail);
1270: #endif
1271: rxf->count = cpu_to_le32((sp->rx_buf_sz - sizeof(struct RxFD)) << 16);
1.1 root 1272: }
1.1.1.2 root 1273: sp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1.1 root 1274: /* Mark the last entry as end-of-list. */
1.1.1.2 root 1275: last_rxf->status = cpu_to_le32(0xC0000002); /* '2' is flag value only. */
1.1 root 1276: sp->last_rxf = last_rxf;
1277: }
1278:
1.1.1.2 root 1279: static void speedo_tx_timeout(struct net_device *dev)
1280: {
1281: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1282: long ioaddr = dev->base_addr;
1283: int status = inw(ioaddr + SCBStatus);
1284:
1285: printk(KERN_WARNING "%s: Transmit timed out: status %4.4x "
1.1.1.3 root 1286: " %4.4x at %d/%d commands %8.8x %8.8x %8.8x.\n",
1287: dev->name, status, (int)inw(ioaddr + SCBCmd),
1.1.1.2 root 1288: sp->dirty_tx, sp->cur_tx,
1.1.1.3 root 1289: sp->tx_ring[(sp->dirty_tx+0) % TX_RING_SIZE].status,
1290: sp->tx_ring[(sp->dirty_tx+1) % TX_RING_SIZE].status,
1291: sp->tx_ring[(sp->dirty_tx+2) % TX_RING_SIZE].status);
1.1.1.2 root 1292:
1293: /* Trigger a stats dump to give time before the reset. */
1294: speedo_get_stats(dev);
1295:
1296: speedo_show_state(dev);
1297: if ((status & 0x00C0) != 0x0080
1.1.1.3 root 1298: && (status & 0x003C) == 0x0010 && 0) {
1.1.1.2 root 1299: /* Only the command unit has stopped. */
1300: printk(KERN_WARNING "%s: Trying to restart the transmitter...\n",
1301: dev->name);
1302: outl(virt_to_bus(&sp->tx_ring[sp->dirty_tx % TX_RING_SIZE]),
1303: ioaddr + SCBPointer);
1304: outw(CUStart, ioaddr + SCBCmd);
1305: } else {
1.1.1.3 root 1306: printk(KERN_WARNING "%s: Restarting the chip...\n",
1307: dev->name);
1.1.1.2 root 1308: /* Reset the Tx and Rx units. */
1309: outl(PortReset, ioaddr + SCBPort);
1.1.1.3 root 1310: if (sp->msg_level & NETIF_MSG_TX_ERR)
1311: speedo_show_state(dev);
1.1.1.2 root 1312: udelay(10);
1313: speedo_resume(dev);
1.1 root 1314: }
1.1.1.3 root 1315: /* Reset the MII transceiver, suggested by Fred Young @ scalable.com. */
1316: if ((sp->phy[0] & 0x8000) == 0) {
1317: int phy_addr = sp->phy[0] & 0x1f;
1318: int advertising = mdio_read(dev, phy_addr, 4);
1319: int mii_bmcr = mdio_read(dev, phy_addr, 0);
1320: mdio_write(ioaddr, phy_addr, 0, 0x0400);
1321: mdio_write(ioaddr, phy_addr, 1, 0x0000);
1322: mdio_write(ioaddr, phy_addr, 4, 0x0000);
1323: mdio_write(ioaddr, phy_addr, 0, 0x8000);
1324: #ifdef honor_default_port
1325: mdio_write(ioaddr, phy_addr, 0, mii_ctrl[dev->default_port & 7]);
1326: #else
1327: mdio_read(dev, phy_addr, 0);
1328: mdio_write(ioaddr, phy_addr, 0, mii_bmcr);
1329: mdio_write(ioaddr, phy_addr, 4, advertising);
1330: #endif
1331: }
1332: sp->stats.tx_errors++;
1333: dev->trans_start = jiffies;
1.1 root 1334: return;
1335: }
1336:
1.1.1.3 root 1337: /* Handle the interrupt cases when something unexpected happens. */
1338: static void speedo_intr_error(struct net_device *dev, int intr_status)
1339: {
1340: long ioaddr = dev->base_addr;
1341: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1342:
1343: if (intr_status & IntrRxSuspend) {
1344: if ((intr_status & 0x003c) == 0x0028) /* No more Rx buffers. */
1345: outb(RxResumeNoResources, ioaddr + SCBCmd);
1346: else if ((intr_status & 0x003c) == 0x0008) { /* No resources (why?!) */
1347: printk(KERN_DEBUG "%s: Unknown receiver error, status=%#4.4x.\n",
1348: dev->name, intr_status);
1349: /* No idea of what went wrong. Restart the receiver. */
1350: outl(virt_to_bus(sp->rx_ringp[sp->cur_rx % RX_RING_SIZE]),
1351: ioaddr + SCBPointer);
1352: outb(RxStart, ioaddr + SCBCmd);
1353: }
1354: sp->stats.rx_errors++;
1355: }
1356: }
1357:
1358:
1.1 root 1359: static int
1.1.1.2 root 1360: speedo_start_xmit(struct sk_buff *skb, struct net_device *dev)
1.1 root 1361: {
1362: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 1363: long ioaddr = dev->base_addr;
1.1 root 1364: int entry;
1365:
1.1.1.3 root 1366: /* Block a timer-based transmit from overlapping. This could better be
1367: done with atomic_swap(1, dev->tbusy), but set_bit() works as well.
1368: If this ever occurs the queue layer is doing something evil! */
1369: if (netif_pause_tx_queue(dev) != 0) {
1.1 root 1370: int tickssofar = jiffies - dev->trans_start;
1371: if (tickssofar < TX_TIMEOUT - 2)
1372: return 1;
1373: if (tickssofar < TX_TIMEOUT) {
1374: /* Reap sent packets from the full Tx queue. */
1.1.1.2 root 1375: outw(SCBTriggerIntr, ioaddr + SCBCmd);
1.1 root 1376: return 1;
1377: }
1378: speedo_tx_timeout(dev);
1379: return 1;
1380: }
1.1.1.3 root 1381:
1382: /* Caution: the write order is important here, set the base address
1383: with the "ownership" bits last. */
1.1 root 1384:
1385: { /* Prevent interrupts from changing the Tx ring from underneath us. */
1386: unsigned long flags;
1387:
1.1.1.2 root 1388: spin_lock_irqsave(&sp->lock, flags);
1.1 root 1389: /* Calculate the Tx descriptor entry. */
1.1.1.3 root 1390: entry = sp->cur_tx % TX_RING_SIZE;
1.1 root 1391:
1392: sp->tx_skbuff[entry] = skb;
1.1.1.3 root 1393: /* Todo: be a little more clever about setting the interrupt bit. */
1.1 root 1394: sp->tx_ring[entry].status =
1.1.1.2 root 1395: cpu_to_le32(CmdSuspend | CmdTx | CmdTxFlex);
1.1.1.3 root 1396: sp->cur_tx++;
1.1 root 1397: sp->tx_ring[entry].link =
1.1.1.2 root 1398: virt_to_le32desc(&sp->tx_ring[sp->cur_tx % TX_RING_SIZE]);
1.1.1.3 root 1399: /* We may nominally release the lock here. */
1.1 root 1400: sp->tx_ring[entry].tx_desc_addr =
1.1.1.2 root 1401: virt_to_le32desc(&sp->tx_ring[entry].tx_buf_addr0);
1402: /* The data region is always in one buffer descriptor. */
1403: sp->tx_ring[entry].count = cpu_to_le32(sp->tx_threshold);
1404: sp->tx_ring[entry].tx_buf_addr0 = virt_to_le32desc(skb->data);
1405: sp->tx_ring[entry].tx_buf_size0 = cpu_to_le32(skb->len);
1.1.1.3 root 1406: /* Todo: perhaps leave the interrupt bit set if the Tx queue is more
1407: than half full. Argument against: we should be receiving packets
1408: and scavenging the queue. Argument for: if so, it shouldn't
1409: matter. */
1410: {
1411: struct descriptor *last_cmd = sp->last_cmd;
1412: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
1413: clear_suspend(last_cmd);
1.1.1.2 root 1414: }
1.1.1.3 root 1415: if (sp->cur_tx - sp->dirty_tx >= TX_QUEUE_LIMIT) {
1416: sp->tx_full = 1;
1417: netif_stop_tx_queue(dev);
1418: } else
1419: netif_unpause_tx_queue(dev);
1.1.1.2 root 1420: spin_unlock_irqrestore(&sp->lock, flags);
1421: }
1.1.1.3 root 1422: wait_for_cmd_done(dev);
1423: outb(CUResume, ioaddr + SCBCmd);
1.1 root 1424: dev->trans_start = jiffies;
1425:
1426: return 0;
1427: }
1428:
1429: /* The interrupt handler does all of the Rx thread work and cleans up
1430: after the Tx thread. */
1431: static void speedo_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1432: {
1.1.1.2 root 1433: struct net_device *dev = (struct net_device *)dev_instance;
1.1 root 1434: struct speedo_private *sp;
1.1.1.3 root 1435: long ioaddr;
1436: int work_limit;
1437: u16 status;
1.1 root 1438:
1439: ioaddr = dev->base_addr;
1440: sp = (struct speedo_private *)dev->priv;
1.1.1.3 root 1441: work_limit = sp->max_interrupt_work;
1.1 root 1442: #ifndef final_version
1443: /* A lock to prevent simultaneous entry on SMP machines. */
1444: if (test_and_set_bit(0, (void*)&sp->in_interrupt)) {
1445: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
1446: dev->name);
1.1.1.2 root 1447: sp->in_interrupt = 0; /* Avoid halting machine. */
1.1 root 1448: return;
1449: }
1450: #endif
1451:
1452: do {
1453: status = inw(ioaddr + SCBStatus);
1.1.1.3 root 1454:
1455: if ((status & IntrAllNormal) == 0 || status == 0xffff)
1456: break;
1.1 root 1457: /* Acknowledge all of the current interrupt sources ASAP. */
1.1.1.3 root 1458: outw(status & IntrAllNormal, ioaddr + SCBStatus);
1.1 root 1459:
1.1.1.3 root 1460: if (sp->msg_level & NETIF_MSG_INTR)
1.1 root 1461: printk(KERN_DEBUG "%s: interrupt status=%#4.4x.\n",
1462: dev->name, status);
1463:
1.1.1.3 root 1464: if (status & (IntrRxDone|IntrRxSuspend))
1.1 root 1465: speedo_rx(dev);
1466:
1.1.1.3 root 1467: /* The command unit did something, scavenge finished Tx entries. */
1468: if (status & (IntrCmdDone | IntrCmdIdle | IntrDrvrIntr)) {
1469: unsigned int dirty_tx;
1470: /* We should nominally not need this lock. */
1.1.1.2 root 1471: spin_lock(&sp->lock);
1.1.1.3 root 1472:
1473: dirty_tx = sp->dirty_tx;
1474: while (sp->cur_tx - dirty_tx > 0) {
1475: int entry = dirty_tx % TX_RING_SIZE;
1476: int status = le32_to_cpu(sp->tx_ring[entry].status);
1477:
1478: if (sp->msg_level & NETIF_MSG_INTR)
1479: printk(KERN_DEBUG " scavenge candidate %d status %4.4x.\n",
1480: entry, status);
1481: if ((status & StatusComplete) == 0) {
1482: /* Special case error check: look for descriptor that the
1483: chip skipped(?). */
1484: if (sp->cur_tx - dirty_tx > 2 &&
1485: (sp->tx_ring[(dirty_tx+1) % TX_RING_SIZE].status
1486: & cpu_to_le32(StatusComplete))) {
1487: printk(KERN_ERR "%s: Command unit failed to mark "
1488: "command %8.8x as complete at %d.\n",
1489: dev->name, status, dirty_tx);
1490: } else
1491: break; /* It still hasn't been processed. */
1.1.1.2 root 1492: }
1.1.1.3 root 1493: if ((status & TxUnderrun) &&
1494: (sp->tx_threshold < 0x01e08000)) {
1495: sp->tx_threshold += 0x00040000;
1496: if (sp->msg_level & NETIF_MSG_TX_ERR)
1497: printk(KERN_DEBUG "%s: Tx threshold increased, "
1498: "%#8.8x.\n", dev->name, sp->tx_threshold);
1499: }
1500: /* Free the original skb. */
1501: if (sp->tx_skbuff[entry]) {
1502: sp->stats.tx_packets++; /* Count only user packets. */
1503: #if LINUX_VERSION_CODE > 0x20127
1504: sp->stats.tx_bytes += sp->tx_skbuff[entry]->len;
1505: #endif
1506: dev_free_skb_irq(sp->tx_skbuff[entry]);
1507: sp->tx_skbuff[entry] = 0;
1508: } else if ((status & 0x70000) == CmdNOp)
1509: sp->mc_setup_busy = 0;
1510: dirty_tx++;
1.1.1.2 root 1511: }
1512:
1.1.1.3 root 1513: #ifndef final_version
1514: if (sp->cur_tx - dirty_tx > TX_RING_SIZE) {
1515: printk(KERN_ERR "out-of-sync dirty pointer, %d vs. %d,"
1516: " full=%d.\n",
1517: dirty_tx, sp->cur_tx, sp->tx_full);
1518: dirty_tx += TX_RING_SIZE;
1519: }
1520: #endif
1.1 root 1521:
1.1.1.3 root 1522: sp->dirty_tx = dirty_tx;
1.1.1.2 root 1523: if (sp->tx_full
1.1.1.3 root 1524: && sp->cur_tx - dirty_tx < TX_QUEUE_UNFULL) {
1525: /* The ring is no longer full, clear tbusy. */
1.1 root 1526: sp->tx_full = 0;
1.1.1.3 root 1527: netif_resume_tx_queue(dev);
1.1 root 1528: }
1.1.1.2 root 1529: spin_unlock(&sp->lock);
1.1 root 1530: }
1531:
1.1.1.3 root 1532: if (status & IntrRxSuspend)
1533: speedo_intr_error(dev, status);
1534:
1535: if (--work_limit < 0) {
1.1 root 1536: printk(KERN_ERR "%s: Too much work at interrupt, status=0x%4.4x.\n",
1537: dev->name, status);
1538: /* Clear all interrupt sources. */
1539: outl(0xfc00, ioaddr + SCBStatus);
1540: break;
1541: }
1542: } while (1);
1543:
1.1.1.3 root 1544: if (sp->msg_level & NETIF_MSG_INTR)
1.1 root 1545: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1.1.1.3 root 1546: dev->name, (int)inw(ioaddr + SCBStatus));
1.1 root 1547:
1548: clear_bit(0, (void*)&sp->in_interrupt);
1549: return;
1550: }
1551:
1552: static int
1.1.1.2 root 1553: speedo_rx(struct net_device *dev)
1.1 root 1554: {
1555: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1556: int entry = sp->cur_rx % RX_RING_SIZE;
1557: int status;
1.1.1.2 root 1558: int rx_work_limit = sp->dirty_rx + RX_RING_SIZE - sp->cur_rx;
1.1 root 1559:
1.1.1.3 root 1560: if (sp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 1561: printk(KERN_DEBUG " In speedo_rx().\n");
1562: /* If we own the next entry, it's a new packet. Send it up. */
1.1.1.2 root 1563: while (sp->rx_ringp[entry] != NULL &&
1564: (status = le32_to_cpu(sp->rx_ringp[entry]->status)) & RxComplete) {
1.1.1.3 root 1565: int desc_count = le32_to_cpu(sp->rx_ringp[entry]->count);
1566: int pkt_len = desc_count & 0x07ff;
1.1.1.2 root 1567:
1568: if (--rx_work_limit < 0)
1569: break;
1.1.1.3 root 1570: if (sp->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 1571: printk(KERN_DEBUG " speedo_rx() status %8.8x len %d.\n", status,
1.1.1.2 root 1572: pkt_len);
1573: if ((status & (RxErrTooBig|RxOK|0x0f90)) != RxOK) {
1574: if (status & RxErrTooBig)
1575: printk(KERN_ERR "%s: Ethernet frame overran the Rx buffer, "
1576: "status %8.8x!\n", dev->name, status);
1.1.1.3 root 1577: else if ( ! (status & RxOK)) {
1.1.1.2 root 1578: /* There was a fatal error. This *should* be impossible. */
1579: sp->stats.rx_errors++;
1580: printk(KERN_ERR "%s: Anomalous event in speedo_rx(), "
1.1.1.3 root 1581: "status %8.8x.\n", dev->name, status);
1.1.1.2 root 1582: }
1.1 root 1583: } else {
1584: struct sk_buff *skb;
1585:
1.1.1.3 root 1586: if (sp->drv_flags & HasChksum)
1587: pkt_len -= 2;
1588:
1.1 root 1589: /* Check if the packet is long enough to just accept without
1590: copying to a properly sized skbuff. */
1.1.1.3 root 1591: if (pkt_len < sp->rx_copybreak
1.1.1.2 root 1592: && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
1593: skb->dev = dev;
1594: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1595: /* 'skb_put()' points to the start of sk_buff data area. */
1.1 root 1596: /* Packet is in one chunk -- we can copy + cksum. */
1.1.1.2 root 1597: eth_copy_and_sum(skb, sp->rx_skbuff[entry]->tail, pkt_len, 0);
1598: skb_put(skb, pkt_len);
1599: } else {
1.1.1.3 root 1600: void *temp;
1.1.1.2 root 1601: /* Pass up the already-filled skbuff. */
1602: skb = sp->rx_skbuff[entry];
1603: if (skb == NULL) {
1604: printk(KERN_ERR "%s: Inconsistent Rx descriptor chain.\n",
1605: dev->name);
1606: break;
1607: }
1608: sp->rx_skbuff[entry] = NULL;
1.1.1.3 root 1609: temp = skb_put(skb, pkt_len);
1610: #if !defined(final_version) && !defined(__powerpc__)
1611: if (bus_to_virt(sp->rx_ringp[entry]->rx_buf_addr) != temp)
1612: printk(KERN_ERR "%s: Rx consistency error -- the skbuff "
1613: "addresses do not match in speedo_rx: %p vs. %p "
1614: "/ %p.\n", dev->name,
1615: bus_to_virt(sp->rx_ringp[entry]->rx_buf_addr),
1616: skb->head, temp);
1617: #endif
1.1.1.2 root 1618: sp->rx_ringp[entry] = NULL;
1.1 root 1619: }
1620: skb->protocol = eth_type_trans(skb, dev);
1.1.1.3 root 1621: if (sp->drv_flags & HasChksum) {
1622: #if 0
1623: u16 csum = get_unaligned((u16*)(skb->head + pkt_len))
1624: if (desc_count & 0x8000)
1625: skb->ip_summed = CHECKSUM_UNNECESSARY;
1626: #endif
1627: }
1.1 root 1628: netif_rx(skb);
1629: sp->stats.rx_packets++;
1.1.1.3 root 1630: #if LINUX_VERSION_CODE > 0x20127
1.1.1.2 root 1631: sp->stats.rx_bytes += pkt_len;
1.1.1.3 root 1632: #endif
1.1 root 1633: }
1.1.1.2 root 1634: entry = (++sp->cur_rx) % RX_RING_SIZE;
1.1 root 1635: }
1636:
1.1.1.3 root 1637: /* Refill the Rx ring buffers. */
1638: for (; sp->cur_rx - sp->dirty_rx > 0; sp->dirty_rx++) {
1639: struct RxFD *rxf;
1640: entry = sp->dirty_rx % RX_RING_SIZE;
1641: if (sp->rx_skbuff[entry] == NULL) {
1642: struct sk_buff *skb;
1643: /* Get a fresh skbuff to replace the consumed one. */
1644: skb = dev_alloc_skb(sp->rx_buf_sz);
1645: sp->rx_skbuff[entry] = skb;
1646: if (skb == NULL) {
1647: sp->rx_ringp[entry] = NULL;
1648: sp->alloc_failures++;
1649: break; /* Better luck next time! */
1650: }
1651: rxf = sp->rx_ringp[entry] = (struct RxFD *)skb->tail;
1652: skb->dev = dev;
1653: skb_reserve(skb, sizeof(struct RxFD));
1654: rxf->rx_buf_addr = virt_to_le32desc(skb->tail);
1655: } else {
1656: rxf = sp->rx_ringp[entry];
1657: }
1658: rxf->status = cpu_to_le32(0xC0000001); /* '1' for driver use only. */
1659: rxf->link = 0; /* None yet. */
1660: rxf->count = cpu_to_le32((sp->rx_buf_sz - sizeof(struct RxFD)) << 16);
1661: sp->last_rxf->link = virt_to_le32desc(rxf);
1662: sp->last_rxf->status &= cpu_to_le32(~0xC0000000);
1663: sp->last_rxf = rxf;
1664: }
1.1.1.2 root 1665:
1.1 root 1666: sp->last_rx_time = jiffies;
1667: return 0;
1668: }
1669:
1670: static int
1.1.1.2 root 1671: speedo_close(struct net_device *dev)
1.1 root 1672: {
1.1.1.2 root 1673: long ioaddr = dev->base_addr;
1.1 root 1674: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1675: int i;
1676:
1.1.1.3 root 1677: netif_stop_tx_queue(dev);
1.1 root 1678:
1.1.1.3 root 1679: if (sp->msg_level & NETIF_MSG_IFDOWN)
1680: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n"
1681: KERN_DEBUG "%s: Cumlative allocation failures: %d.\n",
1682: dev->name, (int)inw(ioaddr + SCBStatus),
1683: dev->name, sp->alloc_failures);
1.1 root 1684:
1685: /* Shut off the media monitoring timer. */
1686: del_timer(&sp->timer);
1687:
1.1.1.2 root 1688: /* Shutting down the chip nicely fails to disable flow control. So.. */
1689: outl(PortPartialReset, ioaddr + SCBPort);
1.1 root 1690:
1691: free_irq(dev->irq, dev);
1692:
1.1.1.3 root 1693: /* Free all the skbuffs in the Rx and Tx queues. */
1.1 root 1694: for (i = 0; i < RX_RING_SIZE; i++) {
1695: struct sk_buff *skb = sp->rx_skbuff[i];
1696: sp->rx_skbuff[i] = 0;
1697: /* Clear the Rx descriptors. */
1.1.1.3 root 1698: if (skb) {
1699: #if LINUX_VERSION_CODE < 0x20100
1700: skb->free = 1;
1701: #endif
1.1.1.2 root 1702: dev_free_skb(skb);
1.1.1.3 root 1703: }
1.1 root 1704: }
1705:
1706: for (i = 0; i < TX_RING_SIZE; i++) {
1707: struct sk_buff *skb = sp->tx_skbuff[i];
1708: sp->tx_skbuff[i] = 0;
1709: /* Clear the Tx descriptors. */
1710: if (skb)
1.1.1.2 root 1711: dev_free_skb(skb);
1.1 root 1712: }
1.1.1.3 root 1713: if (sp->mc_setup_frm) {
1714: kfree(sp->mc_setup_frm);
1715: sp->mc_setup_frm_len = 0;
1716: }
1.1 root 1717:
1.1.1.3 root 1718: /* Print a few items for debugging. */
1719: if (sp->msg_level & NETIF_MSG_IFDOWN)
1720: speedo_show_state(dev);
1.1.1.2 root 1721:
1.1.1.3 root 1722: /* Alt: acpi_set_pwr_state(pdev, sp->acpi_pwr); */
1723: acpi_set_pwr_state(sp->pci_dev, ACPI_D2);
1.1 root 1724: MOD_DEC_USE_COUNT;
1725:
1726: return 0;
1727: }
1728:
1729: /* The Speedo-3 has an especially awkward and unusable method of getting
1730: statistics out of the chip. It takes an unpredictable length of time
1731: for the dump-stats command to complete. To avoid a busy-wait loop we
1732: update the stats with the previous dump results, and then trigger a
1733: new dump.
1734:
1735: These problems are mitigated by the current /proc implementation, which
1736: calls this routine first to judge the output length, and then to emit the
1737: output.
1738:
1739: Oh, and incoming frames are dropped while executing dump-stats!
1740: */
1.1.1.3 root 1741: static struct net_device_stats *speedo_get_stats(struct net_device *dev)
1.1 root 1742: {
1743: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 1744: long ioaddr = dev->base_addr;
1.1 root 1745:
1.1.1.2 root 1746: /* Update only if the previous dump finished. */
1747: if (sp->lstats.done_marker == le32_to_cpu(0xA007)) {
1748: sp->stats.tx_aborted_errors += le32_to_cpu(sp->lstats.tx_coll16_errs);
1749: sp->stats.tx_window_errors += le32_to_cpu(sp->lstats.tx_late_colls);
1750: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_underruns);
1751: sp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats.tx_lost_carrier);
1752: /*sp->stats.tx_deferred += le32_to_cpu(sp->lstats.tx_deferred);*/
1753: sp->stats.collisions += le32_to_cpu(sp->lstats.tx_total_colls);
1754: sp->stats.rx_crc_errors += le32_to_cpu(sp->lstats.rx_crc_errs);
1755: sp->stats.rx_frame_errors += le32_to_cpu(sp->lstats.rx_align_errs);
1756: sp->stats.rx_over_errors += le32_to_cpu(sp->lstats.rx_resource_errs);
1757: sp->stats.rx_fifo_errors += le32_to_cpu(sp->lstats.rx_overrun_errs);
1758: sp->stats.rx_length_errors += le32_to_cpu(sp->lstats.rx_runt_errs);
1.1 root 1759: sp->lstats.done_marker = 0x0000;
1.1.1.3 root 1760: if (netif_running(dev)) {
1761: wait_for_cmd_done(dev);
1.1.1.2 root 1762: outb(CUDumpStats, ioaddr + SCBCmd);
1.1 root 1763: }
1764: }
1765: return &sp->stats;
1766: }
1767:
1.1.1.2 root 1768: static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1.1 root 1769: {
1770: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 1771: long ioaddr = dev->base_addr;
1.1 root 1772: u16 *data = (u16 *)&rq->ifr_data;
1.1.1.3 root 1773: u32 *data32 = (void *)&rq->ifr_data;
1.1 root 1774: int phy = sp->phy[0] & 0x1f;
1.1.1.3 root 1775: int saved_acpi;
1.1 root 1776:
1.1.1.3 root 1777: switch(cmd) {
1778: case 0x8947: case 0x89F0:
1779: /* SIOCGMIIPHY: Get the address of the PHY in use. */
1.1 root 1780: data[0] = phy;
1.1.1.3 root 1781: /* Fall Through */
1782: case 0x8948: case 0x89F1:
1783: /* SIOCGMIIREG: Read the specified MII register. */
1784: saved_acpi = acpi_set_pwr_state(sp->pci_dev, ACPI_D0);
1785: data[3] = mdio_read(dev, data[0], data[1]);
1786: acpi_set_pwr_state(sp->pci_dev, saved_acpi);
1.1 root 1787: return 0;
1.1.1.3 root 1788: case 0x8949: case 0x89F2:
1789: /* SIOCSMIIREG: Write the specified MII register */
1.1.1.2 root 1790: if (!capable(CAP_NET_ADMIN))
1.1 root 1791: return -EPERM;
1.1.1.3 root 1792: if (data[0] == sp->phy[0]) {
1793: u16 value = data[2];
1794: switch (data[1]) {
1795: case 0:
1796: /* Check for autonegotiation on or reset. */
1797: sp->medialock = (value & 0x9000) ? 0 : 1;
1798: if (sp->medialock) {
1799: sp->full_duplex = (value & 0x0100) ? 1 : 0;
1800: sp->rx_mode = RxInvalidMode;
1801: }
1802: break;
1803: case 4: sp->advertising = value; break;
1804: }
1805: }
1806: saved_acpi = acpi_set_pwr_state(sp->pci_dev, ACPI_D0);
1.1 root 1807: mdio_write(ioaddr, data[0], data[1], data[2]);
1.1.1.3 root 1808: acpi_set_pwr_state(sp->pci_dev, saved_acpi);
1809: return 0;
1810: case SIOCGPARAMS:
1811: data32[0] = sp->msg_level;
1812: data32[1] = sp->multicast_filter_limit;
1813: data32[2] = sp->max_interrupt_work;
1814: data32[3] = sp->rx_copybreak;
1815: #if 0
1816: /* No room in the ioctl() to set these. */
1817: data32[4] = txfifo;
1818: data32[5] = rxfifo;
1819: #endif
1820: return 0;
1821: case SIOCSPARAMS:
1822: if (!capable(CAP_NET_ADMIN))
1823: return -EPERM;
1824: sp->msg_level = data32[0];
1825: sp->multicast_filter_limit = data32[1];
1826: sp->max_interrupt_work = data32[2];
1827: sp->rx_copybreak = data32[3];
1828: #if 0
1829: /* No room in the ioctl() to set these. */
1830: if (data32[4] < 16)
1831: txfifo = data32[4];
1832: if (data32[5] < 16)
1833: rxfifo = data32[5];
1834: #endif
1.1 root 1835: return 0;
1836: default:
1837: return -EOPNOTSUPP;
1838: }
1839: }
1840:
1841: /* Set or clear the multicast filter for this adaptor.
1842: This is very ugly with Intel chips -- we usually have to execute an
1843: entire configuration command, plus process a multicast command.
1844: This is complicated. We must put a large configuration command and
1845: an arbitrarily-sized multicast command in the transmit list.
1846: To minimize the disruption -- the previous command might have already
1847: loaded the link -- we convert the current command block, normally a Tx
1848: command, into a no-op and link it to the new command.
1849: */
1.1.1.2 root 1850: static void set_rx_mode(struct net_device *dev)
1.1 root 1851: {
1852: struct speedo_private *sp = (struct speedo_private *)dev->priv;
1.1.1.2 root 1853: long ioaddr = dev->base_addr;
1854: struct descriptor *last_cmd;
1.1 root 1855: char new_rx_mode;
1856: unsigned long flags;
1857: int entry, i;
1858:
1859: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1.1.1.3 root 1860: new_rx_mode = AcceptAllMulticast | AcceptAllPhys;
1.1 root 1861: } else if ((dev->flags & IFF_ALLMULTI) ||
1.1.1.3 root 1862: dev->mc_count > sp->multicast_filter_limit) {
1863: new_rx_mode = AcceptAllMulticast;
1.1 root 1864: } else
1865: new_rx_mode = 0;
1866:
1.1.1.3 root 1867: if (sp->cur_tx - sp->dirty_tx >= TX_RING_SIZE - 1) {
1868: /* The Tx ring is full -- don't add anything! Presumably the new mode
1869: is in config_cmd_data and will be added anyway, otherwise we wait
1870: for a timer tick or the mode to change again. */
1871: sp->rx_mode = RxInvalidMode;
1.1 root 1872: return;
1873: }
1874:
1875: if (new_rx_mode != sp->rx_mode) {
1.1.1.2 root 1876: u8 *config_cmd_data;
1877:
1878: spin_lock_irqsave(&sp->lock, flags);
1.1.1.3 root 1879: entry = sp->cur_tx % TX_RING_SIZE;
1.1.1.2 root 1880: last_cmd = sp->last_cmd;
1881: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
1882:
1883: sp->tx_skbuff[entry] = 0; /* Redundant. */
1884: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdConfigure);
1.1.1.3 root 1885: sp->cur_tx++;
1.1.1.2 root 1886: sp->tx_ring[entry].link =
1887: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]);
1.1.1.3 root 1888: /* We may nominally release the lock here. */
1889:
1.1.1.2 root 1890: config_cmd_data = (void *)&sp->tx_ring[entry].tx_desc_addr;
1891: /* Construct a full CmdConfig frame. */
1892: memcpy(config_cmd_data, i82558_config_cmd, sizeof(i82558_config_cmd));
1893: config_cmd_data[1] = (txfifo << 4) | rxfifo;
1894: config_cmd_data[4] = rxdmacount;
1895: config_cmd_data[5] = txdmacount + 0x80;
1.1.1.3 root 1896: config_cmd_data[6] |= (new_rx_mode & AcceptErr) ? 0x80 : 0;
1897: config_cmd_data[7] &= (new_rx_mode & AcceptRunt) ? ~0x01 : ~0;
1898: if (sp->drv_flags & HasChksum)
1899: config_cmd_data[9] |= 1;
1900: config_cmd_data[15] |= (new_rx_mode & AcceptAllPhys) ? 1 : 0;
1901: config_cmd_data[19] = sp->flow_ctrl ? 0xBD : 0x80;
1.1.1.2 root 1902: config_cmd_data[19] |= sp->full_duplex ? 0x40 : 0;
1.1.1.3 root 1903: config_cmd_data[21] = (new_rx_mode & AcceptAllMulticast) ? 0x0D : 0x05;
1.1 root 1904: if (sp->phy[0] & 0x8000) { /* Use the AUI port instead. */
1.1.1.2 root 1905: config_cmd_data[15] |= 0x80;
1906: config_cmd_data[8] = 0;
1.1 root 1907: }
1.1.1.2 root 1908: /* Trigger the command unit resume. */
1.1.1.3 root 1909: wait_for_cmd_done(dev);
1.1.1.2 root 1910: clear_suspend(last_cmd);
1911: outb(CUResume, ioaddr + SCBCmd);
1912: spin_unlock_irqrestore(&sp->lock, flags);
1.1.1.3 root 1913: sp->last_cmd_time = jiffies;
1.1 root 1914: }
1915:
1.1.1.2 root 1916: if (new_rx_mode == 0 && dev->mc_count < 4) {
1917: /* The simple case of 0-3 multicast list entries occurs often, and
1.1 root 1918: fits within one tx_ring[] entry. */
1919: struct dev_mc_list *mclist;
1.1.1.2 root 1920: u16 *setup_params, *eaddrs;
1.1 root 1921:
1.1.1.2 root 1922: spin_lock_irqsave(&sp->lock, flags);
1.1.1.3 root 1923: entry = sp->cur_tx % TX_RING_SIZE;
1.1.1.2 root 1924: last_cmd = sp->last_cmd;
1925: sp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];
1926:
1.1 root 1927: sp->tx_skbuff[entry] = 0;
1.1.1.2 root 1928: sp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdMulticastList);
1.1.1.3 root 1929: sp->cur_tx++;
1.1 root 1930: sp->tx_ring[entry].link =
1.1.1.2 root 1931: virt_to_le32desc(&sp->tx_ring[(entry + 1) % TX_RING_SIZE]);
1.1.1.3 root 1932: /* We may nominally release the lock here. */
1.1 root 1933: sp->tx_ring[entry].tx_desc_addr = 0; /* Really MC list count. */
1934: setup_params = (u16 *)&sp->tx_ring[entry].tx_desc_addr;
1.1.1.2 root 1935: *setup_params++ = cpu_to_le16(dev->mc_count*6);
1.1 root 1936: /* Fill in the multicast addresses. */
1937: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1938: i++, mclist = mclist->next) {
1939: eaddrs = (u16 *)mclist->dmi_addr;
1940: *setup_params++ = *eaddrs++;
1941: *setup_params++ = *eaddrs++;
1942: *setup_params++ = *eaddrs++;
1943: }
1944:
1.1.1.3 root 1945: wait_for_cmd_done(dev);
1.1.1.2 root 1946: clear_suspend(last_cmd);
1947: /* Immediately trigger the command unit resume. */
1948: outb(CUResume, ioaddr + SCBCmd);
1949: spin_unlock_irqrestore(&sp->lock, flags);
1.1.1.3 root 1950: sp->last_cmd_time = jiffies;
1.1 root 1951: } else if (new_rx_mode == 0) {
1952: struct dev_mc_list *mclist;
1.1.1.2 root 1953: u16 *setup_params, *eaddrs;
1.1.1.3 root 1954: struct descriptor *mc_setup_frm = sp->mc_setup_frm;
1.1 root 1955: int i;
1956:
1.1.1.3 root 1957: if (sp->mc_setup_frm_len < 10 + dev->mc_count*6
1958: || sp->mc_setup_frm == NULL) {
1959: /* Allocate a full setup frame, 10bytes + <max addrs>. */
1960: if (sp->mc_setup_frm)
1961: kfree(sp->mc_setup_frm);
1962: sp->mc_setup_busy = 0;
1963: sp->mc_setup_frm_len = 10 + sp->multicast_filter_limit*6;
1964: sp->mc_setup_frm = kmalloc(sp->mc_setup_frm_len, GFP_ATOMIC);
1965: if (sp->mc_setup_frm == NULL) {
1966: printk(KERN_ERR "%s: Failed to allocate a setup frame.\n",
1967: dev->name);
1968: sp->rx_mode = RxInvalidMode; /* We failed, try again. */
1969: return;
1970: }
1971: }
1972: /* If we are busy, someone might be quickly adding to the MC list.
1973: Try again later when the list updates stop. */
1974: if (sp->mc_setup_busy) {
1975: sp->rx_mode = RxInvalidMode;
1.1.1.2 root 1976: return;
1.1 root 1977: }
1.1.1.3 root 1978: mc_setup_frm = sp->mc_setup_frm;
1.1.1.2 root 1979: /* Fill the setup frame. */
1.1.1.3 root 1980: if (sp->msg_level & NETIF_MSG_RXFILTER)
1981: printk(KERN_DEBUG "%s: Constructing a setup frame at %p, "
1982: "%d bytes.\n",
1983: dev->name, sp->mc_setup_frm, sp->mc_setup_frm_len);
1.1.1.2 root 1984: mc_setup_frm->cmd_status =
1985: cpu_to_le32(CmdSuspend | CmdIntr | CmdMulticastList);
1.1 root 1986: /* Link set below. */
1.1.1.2 root 1987: setup_params = (u16 *)&mc_setup_frm->params;
1988: *setup_params++ = cpu_to_le16(dev->mc_count*6);
1.1 root 1989: /* Fill in the multicast addresses. */
1990: for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1991: i++, mclist = mclist->next) {
1992: eaddrs = (u16 *)mclist->dmi_addr;
1993: *setup_params++ = *eaddrs++;
1994: *setup_params++ = *eaddrs++;
1995: *setup_params++ = *eaddrs++;
1996: }
1997:
1998: /* Disable interrupts while playing with the Tx Cmd list. */
1.1.1.2 root 1999: spin_lock_irqsave(&sp->lock, flags);
1.1.1.3 root 2000: entry = sp->cur_tx % TX_RING_SIZE;
1.1.1.2 root 2001: last_cmd = sp->last_cmd;
2002: sp->last_cmd = mc_setup_frm;
1.1.1.3 root 2003: sp->mc_setup_busy++;
1.1 root 2004:
2005: /* Change the command to a NoOp, pointing to the CmdMulti command. */
2006: sp->tx_skbuff[entry] = 0;
1.1.1.2 root 2007: sp->tx_ring[entry].status = cpu_to_le32(CmdNOp);
1.1.1.3 root 2008: sp->cur_tx++;
1.1.1.2 root 2009: sp->tx_ring[entry].link = virt_to_le32desc(mc_setup_frm);
1.1.1.3 root 2010: /* We may nominally release the lock here. */
1.1 root 2011:
2012: /* Set the link in the setup frame. */
2013: mc_setup_frm->link =
1.1.1.2 root 2014: virt_to_le32desc(&(sp->tx_ring[(entry+1) % TX_RING_SIZE]));
1.1 root 2015:
1.1.1.3 root 2016: wait_for_cmd_done(dev);
1.1.1.2 root 2017: clear_suspend(last_cmd);
2018: /* Immediately trigger the command unit resume. */
2019: outb(CUResume, ioaddr + SCBCmd);
2020: spin_unlock_irqrestore(&sp->lock, flags);
1.1.1.3 root 2021: sp->last_cmd_time = jiffies;
2022: if (sp->msg_level & NETIF_MSG_RXFILTER)
2023: printk(KERN_DEBUG " CmdMCSetup frame length %d in entry %d.\n",
1.1.1.2 root 2024: dev->mc_count, entry);
1.1 root 2025: }
2026:
2027: sp->rx_mode = new_rx_mode;
2028: }
1.1.1.3 root 2029:
2030: static int speedo_pwr_event(void *dev_instance, int event)
2031: {
2032: struct net_device *dev = dev_instance;
2033: struct speedo_private *np = (struct speedo_private *)dev->priv;
2034: long ioaddr = dev->base_addr;
2035:
2036: if (np->msg_level & NETIF_MSG_LINK)
2037: printk(KERN_DEBUG "%s: Handling power event %d.\n", dev->name, event);
2038: switch(event) {
2039: case DRV_ATTACH:
2040: MOD_INC_USE_COUNT;
2041: break;
2042: case DRV_SUSPEND:
2043: outl(PortPartialReset, ioaddr + SCBPort);
2044: break;
2045: case DRV_RESUME:
2046: speedo_resume(dev);
2047: np->rx_mode = RxInvalidMode;
2048: np->flow_ctrl = np->partner = 0;
2049: set_rx_mode(dev);
2050: break;
2051: case DRV_DETACH: {
2052: struct net_device **devp, **next;
2053: if (dev->flags & IFF_UP) {
2054: dev_close(dev);
2055: dev->flags &= ~(IFF_UP|IFF_RUNNING);
2056: }
2057: unregister_netdev(dev);
2058: release_region(dev->base_addr, pci_id_tbl[np->chip_id].io_size);
2059: #ifndef USE_IO_OPS
2060: iounmap((char *)dev->base_addr);
2061: #endif
2062: for (devp = &root_speedo_dev; *devp; devp = next) {
2063: next = &((struct speedo_private *)(*devp)->priv)->next_module;
2064: if (*devp == dev) {
2065: *devp = *next;
2066: break;
2067: }
2068: }
2069: if (np->priv_addr)
2070: kfree(np->priv_addr);
2071: kfree(dev);
2072: MOD_DEC_USE_COUNT;
2073: break;
2074: }
2075: case DRV_PWR_DOWN:
2076: case DRV_PWR_UP:
2077: acpi_set_pwr_state(np->pci_dev, event==DRV_PWR_DOWN ? ACPI_D3:ACPI_D0);
2078: break;
2079: case DRV_PWR_WakeOn:
2080: default:
2081: return -1;
2082: }
2083:
2084: return 0;
2085: }
1.1 root 2086:
1.1.1.3 root 2087:
2088: #if defined(MODULE) || (LINUX_VERSION_CODE >= 0x020400)
1.1 root 2089:
1.1.1.2 root 2090: int init_module(void)
1.1 root 2091: {
2092: int cards_found;
2093:
1.1.1.3 root 2094: /* Emit version even if no cards detected. */
2095: printk(KERN_INFO "%s" KERN_INFO "%s", version1, version2);
2096: cards_found = pci_drv_register(&eepro100_drv_id, NULL);
2097: if (cards_found < 0)
1.1.1.2 root 2098: printk(KERN_INFO "eepro100: No cards found, driver not installed.\n");
1.1.1.3 root 2099: return cards_found;
1.1 root 2100: }
2101:
1.1.1.3 root 2102: void cleanup_module(void)
1.1 root 2103: {
1.1.1.2 root 2104: struct net_device *next_dev;
1.1 root 2105:
1.1.1.3 root 2106: pci_drv_unregister(&eepro100_drv_id);
2107:
1.1 root 2108: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
2109: while (root_speedo_dev) {
1.1.1.2 root 2110: struct speedo_private *sp = (void *)root_speedo_dev->priv;
1.1 root 2111: unregister_netdev(root_speedo_dev);
1.1.1.3 root 2112: #ifdef USE_IO_OPS
2113: release_region(root_speedo_dev->base_addr,
2114: pci_id_tbl[sp->chip_id].io_size);
2115: #else
1.1.1.2 root 2116: iounmap((char *)root_speedo_dev->base_addr);
2117: #endif
1.1.1.3 root 2118: acpi_set_pwr_state(sp->pci_dev, sp->acpi_pwr);
1.1.1.2 root 2119: next_dev = sp->next_module;
2120: if (sp->priv_addr)
2121: kfree(sp->priv_addr);
1.1 root 2122: kfree(root_speedo_dev);
2123: root_speedo_dev = next_dev;
2124: }
2125: }
1.1.1.2 root 2126:
1.1.1.3 root 2127: #if (LINUX_VERSION_CODE >= 0x020400) && 0
2128: module_init(init_module);
2129: module_exit(cleanup_module);
2130: #endif
2131:
1.1 root 2132: #else /* not MODULE */
1.1.1.2 root 2133:
1.1.1.3 root 2134: int eepro100_probe(struct net_device *dev)
1.1 root 2135: {
1.1.1.3 root 2136: int cards_found = pci_drv_register(&eepro100_drv_id, dev);
1.1 root 2137:
1.1.1.3 root 2138: /* Only emit the version if the driver is being used. */
2139: if (cards_found >= 0)
2140: printk(KERN_INFO "%s" KERN_INFO "%s", version1, version2);
1.1 root 2141:
1.1.1.3 root 2142: return cards_found;
1.1 root 2143: }
2144: #endif /* MODULE */
2145:
2146: /*
2147: * Local variables:
1.1.1.3 root 2148: * compile-command: "make KERNVER=`uname -r` eepro100.o"
2149: * compile-cmd: "gcc -DMODULE -Wall -Wstrict-prototypes -O6 -c eepro100.c"
2150: * simple-compile-command: "gcc -DMODULE -O6 -c eepro100.c"
1.1 root 2151: * c-indent-level: 4
2152: * c-basic-offset: 4
2153: * tab-width: 4
2154: * End:
2155: */
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