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1.1 root 1: /* epic100.c: A SMC 83c170 EPIC/100 Fast Ethernet driver for Linux. */
2: /*
1.1.1.2 ! root 3: Written/copyright 1997-2002 by Donald Becker.
1.1 root 4:
1.1.1.2 ! root 5: This software may be used and distributed according to the terms of
! 6: the GNU General Public License (GPL), incorporated herein by reference.
! 7: Drivers based on or derived from this code fall under the GPL and must
! 8: retain the authorship, copyright and license notice. This file is not
! 9: a complete program and may only be used when the entire operating
! 10: system is licensed under the GPL.
1.1 root 11:
12: This driver is for the SMC83c170/175 "EPIC" series, as used on the
13: SMC EtherPower II 9432 PCI adapter, and several CardBus cards.
14:
1.1.1.2 ! root 15: The author may be reached as [email protected], or C/O
! 16: Scyld Computing Corporation
! 17: 914 Bay Ridge Road, Suite 220
! 18: Annapolis MD 21403
1.1 root 19:
1.1.1.2 ! root 20: Information and updates available at
! 21: http://www.scyld.com/network/epic100.html
1.1 root 22: */
23:
1.1.1.2 ! root 24: /* These identify the driver base version and may not be removed. */
! 25: static const char version[] =
! 26: "epic100.c:v1.18 7/22/2003 Written by Donald Becker <[email protected]>\n";
! 27: static const char version2[] =
! 28: " http://www.scyld.com/network/epic100.html\n";
1.1 root 29:
1.1.1.2 ! root 30: /* The user-configurable values.
! 31: These may be modified when a driver module is loaded.*/
1.1 root 32:
1.1.1.2 ! root 33: /* Message enable level: 0..31 = no..all messages. See NETIF_MSG docs. */
! 34: static int debug = 2;
! 35:
! 36: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
! 37: static int max_interrupt_work = 32;
! 38:
! 39: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
! 40: This chip uses a 64 element hash table based on the Ethernet CRC. */
! 41: static int multicast_filter_limit = 32;
! 42:
! 43: /* Used to set a special media speed or duplex.
! 44: Both 'options[]' and 'full_duplex[]' should exist for driver
! 45: interoperability.
! 46: The media type is usually passed in 'options[]'.
! 47: The default is autonegotation for speed and duplex.
! 48: This should rarely be overridden.
! 49: Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps.
! 50: Use option values 0x10 and 0x100 for forcing half duplex fixed speed.
! 51: Use option values 0x20 and 0x200 for forcing full duplex operation.
! 52: */
! 53: #define MAX_UNITS 8 /* More are supported, limit only on options */
! 54: static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
! 55: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
1.1 root 56:
57: /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
58: Setting to > 1518 effectively disables this feature. */
1.1.1.2 ! root 59: static int rx_copybreak = 0;
1.1 root 60:
1.1.1.2 ! root 61: /* Operational parameters that are set at compile time. */
! 62:
! 63: /* Keep the ring sizes a power of two for operational efficiency.
! 64: The compiler will convert <unsigned>'%'<2^N> into a bit mask.
! 65: Making the Tx ring too large decreases the effectiveness of channel
! 66: bonding and packet priority.
! 67: Too-large receive rings only waste memory. */
! 68: #define TX_RING_SIZE 16
! 69: #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
! 70: #define RX_RING_SIZE 32
1.1 root 71:
72: /* Operational parameters that usually are not changed. */
73: /* Time in jiffies before concluding the transmitter is hung. */
1.1.1.2 ! root 74: #define TX_TIMEOUT (6*HZ)
1.1 root 75:
1.1.1.2 ! root 76: /* Allocation size of Rx buffers with normal sized Ethernet frames.
! 77: Do not change this value without good reason. This is not a limit,
! 78: but a way to keep a consistent allocation size among drivers.
! 79: */
! 80: #define PKT_BUF_SZ 1536
1.1 root 81:
82: /* Bytes transferred to chip before transmission starts. */
1.1.1.2 ! root 83: /* Initial threshold, increased on underflow, rounded down to 4 byte units. */
! 84: #define TX_FIFO_THRESH 256
1.1 root 85: #define RX_FIFO_THRESH 1 /* 0-3, 0==32, 64,96, or 3==128 bytes */
86:
1.1.1.2 ! root 87: #ifndef __KERNEL__
! 88: #define __KERNEL__
! 89: #endif
! 90: #if !defined(__OPTIMIZE__)
! 91: #warning You must compile this file with the correct options!
! 92: #warning See the last lines of the source file.
! 93: #error You must compile this driver with "-O".
! 94: #endif
! 95:
1.1 root 96: #include <linux/config.h>
1.1.1.2 ! root 97: #if defined(CONFIG_SMP) && ! defined(__SMP__)
! 98: #define __SMP__
! 99: #endif
! 100: #if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)
! 101: #define MODVERSIONS
! 102: #endif
! 103:
! 104: #include <linux/version.h>
! 105: #if defined(MODVERSIONS)
1.1 root 106: #include <linux/modversions.h>
107: #endif
108: #include <linux/module.h>
109:
110: #include <linux/kernel.h>
111: #include <linux/string.h>
112: #include <linux/timer.h>
113: #include <linux/errno.h>
114: #include <linux/ioport.h>
1.1.1.2 ! root 115: #if LINUX_VERSION_CODE >= 0x20400
! 116: #include <linux/slab.h>
! 117: #else
1.1 root 118: #include <linux/malloc.h>
1.1.1.2 ! root 119: #endif
1.1 root 120: #include <linux/interrupt.h>
121: #include <linux/pci.h>
122: #include <linux/delay.h>
123: #include <linux/netdevice.h>
124: #include <linux/etherdevice.h>
125: #include <linux/skbuff.h>
1.1.1.2 ! root 126: #include <asm/bitops.h>
! 127: #include <asm/io.h>
1.1 root 128:
1.1.1.2 ! root 129: #if LINUX_VERSION_CODE >= 0x20300
! 130: #include <linux/spinlock.h>
! 131: #elif LINUX_VERSION_CODE >= 0x20200
! 132: #include <asm/spinlock.h>
! 133: #endif
1.1 root 134:
1.1.1.2 ! root 135: #ifdef INLINE_PCISCAN
! 136: #include "k_compat.h"
! 137: #else
! 138: #include "pci-scan.h"
! 139: #include "kern_compat.h"
1.1 root 140: #endif
141:
1.1.1.2 ! root 142: #if (LINUX_VERSION_CODE >= 0x20100) && defined(MODULE)
! 143: char kernel_version[] = UTS_RELEASE;
! 144: #endif
1.1 root 145:
1.1.1.2 ! root 146: MODULE_AUTHOR("Donald Becker <[email protected]>");
1.1 root 147: MODULE_DESCRIPTION("SMC 83c170 EPIC series Ethernet driver");
1.1.1.2 ! root 148: MODULE_LICENSE("GPL");
1.1 root 149: MODULE_PARM(debug, "i");
150: MODULE_PARM(max_interrupt_work, "i");
1.1.1.2 ! root 151: MODULE_PARM(rx_copybreak, "i");
! 152: MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
! 153: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
! 154: MODULE_PARM(multicast_filter_limit, "i");
! 155: MODULE_PARM_DESC(debug, "Driver message level (0-31)");
! 156: MODULE_PARM_DESC(options, "Force transceiver type or fixed speed+duplex.\n"
! 157: "Values are 0x10/0x20/0x100/0x200.");
! 158: MODULE_PARM_DESC(max_interrupt_work,
! 159: "Driver maximum events handled per interrupt");
! 160: MODULE_PARM_DESC(full_duplex, "Non-zero to set forced full duplex.");
! 161: MODULE_PARM_DESC(rx_copybreak,
! 162: "Breakpoint in bytes for copy-only-tiny-frames");
! 163: MODULE_PARM_DESC(multicast_filter_limit,
! 164: "Multicast addresses before switching to Rx-all-multicast");
1.1 root 165:
166: /*
167: Theory of Operation
168:
169: I. Board Compatibility
170:
1.1.1.2 ! root 171: This device driver is designed for the SMC "EPIC/100", the SMC
1.1 root 172: single-chip Ethernet controllers for PCI. This chip is used on
173: the SMC EtherPower II boards.
174:
175: II. Board-specific settings
176:
177: PCI bus devices are configured by the system at boot time, so no jumpers
178: need to be set on the board. The system BIOS will assign the
179: PCI INTA signal to a (preferably otherwise unused) system IRQ line.
180: Note: Kernel versions earlier than 1.3.73 do not support shared PCI
181: interrupt lines.
182:
183: III. Driver operation
184:
185: IIIa. Ring buffers
186:
187: IVb. References
188:
1.1.1.2 ! root 189: http://www.smsc.com/main/datasheets/83c171.pdf
! 190: http://www.smsc.com/main/datasheets/83c175.pdf
! 191: http://scyld.com/expert/NWay.html
! 192: http://www.national.com/pf/DP/DP83840A.html
1.1 root 193:
194: IVc. Errata
195:
196: */
197:
1.1.1.2 ! root 198: static void *epic_probe1(struct pci_dev *pdev, void *init_dev,
! 199: long ioaddr, int irq, int chip_idx, int find_cnt);
! 200: static int epic_pwr_event(void *dev_instance, int event);
1.1 root 201:
1.1.1.2 ! root 202: enum chip_capability_flags { MII_PWRDWN=1, TYPE2_INTR=2, NO_MII=4 };
1.1 root 203:
1.1.1.2 ! root 204: #define EPIC_TOTAL_SIZE 0x100
! 205: #ifdef USE_IO_OPS
! 206: #define EPIC_IOTYPE PCI_USES_MASTER|PCI_USES_IO|PCI_ADDR0
! 207: #else
! 208: #define EPIC_IOTYPE PCI_USES_MASTER|PCI_USES_MEM|PCI_ADDR1
! 209: #endif
! 210:
! 211: static struct pci_id_info pci_id_tbl[] = {
! 212: {"SMSC EPIC 83c172", {0x000510B8, 0xffffffff, 0,0, 9,0xff},
! 213: EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | MII_PWRDWN, },
! 214: {"SMSC EPIC 83c171", {0x000510B8, 0xffffffff, 0,0, 6,0xff},
! 215: EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | MII_PWRDWN, },
! 216: {"SMSC EPIC/100 83c170", {0x000510B8, 0xffffffff, 0x0ab41092, 0xffffffff},
! 217: EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | NO_MII | MII_PWRDWN, },
! 218: {"SMSC EPIC/100 83c170", {0x000510B8, 0xffffffff},
! 219: EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR, },
! 220: {"SMSC EPIC/C 83c175", {0x000610B8, 0xffffffff},
! 221: EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | MII_PWRDWN, },
1.1 root 222: {0,},
223: };
224:
1.1.1.2 ! root 225: struct drv_id_info epic_drv_id = {
! 226: "epic100", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_id_tbl,
! 227: epic_probe1, epic_pwr_event };
! 228:
! 229: #ifndef USE_IO_OPS
! 230: #undef inb
! 231: #undef inw
! 232: #undef inl
! 233: #undef outb
! 234: #undef outw
! 235: #undef outl
! 236: #define inb readb
! 237: #define inw readw
! 238: #define inl readl
! 239: #define outb writeb
! 240: #define outw writew
! 241: #define outl writel
! 242: #endif
! 243:
1.1 root 244: /* Offsets to registers, using the (ugh) SMC names. */
245: enum epic_registers {
246: COMMAND=0, INTSTAT=4, INTMASK=8, GENCTL=0x0C, NVCTL=0x10, EECTL=0x14,
247: PCIBurstCnt=0x18,
248: TEST1=0x1C, CRCCNT=0x20, ALICNT=0x24, MPCNT=0x28, /* Rx error counters. */
249: MIICtrl=0x30, MIIData=0x34, MIICfg=0x38,
250: LAN0=64, /* MAC address. */
251: MC0=80, /* Multicast filter table. */
252: RxCtrl=96, TxCtrl=112, TxSTAT=0x74,
253: PRxCDAR=0x84, RxSTAT=0xA4, EarlyRx=0xB0, PTxCDAR=0xC4, TxThresh=0xDC,
254: };
255:
256: /* Interrupt register bits, using my own meaningful names. */
257: enum IntrStatus {
1.1.1.2 ! root 258: TxIdle=0x40000, RxIdle=0x20000, IntrSummary=0x010000,
! 259: PCIBusErr170=0x7000, PCIBusErr175=0x1000, PhyEvent175=0x8000,
! 260: RxStarted=0x0800, RxEarlyWarn=0x0400, CntFull=0x0200, TxUnderrun=0x0100,
! 261: TxEmpty=0x0080, TxDone=0x0020, RxError=0x0010,
! 262: RxOverflow=0x0008, RxFull=0x0004, RxHeader=0x0002, RxDone=0x0001,
! 263: };
! 264: enum CommandBits {
! 265: StopRx=1, StartRx=2, TxQueued=4, RxQueued=8,
! 266: StopTxDMA=0x20, StopRxDMA=0x40, RestartTx=0x80,
1.1 root 267: };
268:
269: /* The EPIC100 Rx and Tx buffer descriptors. */
270:
271: struct epic_tx_desc {
1.1.1.2 ! root 272: u32 txstatus;
1.1 root 273: u32 bufaddr;
1.1.1.2 ! root 274: u32 buflength;
1.1 root 275: u32 next;
276: };
277:
278: struct epic_rx_desc {
1.1.1.2 ! root 279: u32 rxstatus;
1.1 root 280: u32 bufaddr;
281: u32 buflength;
282: u32 next;
283: };
284:
1.1.1.2 ! root 285: enum desc_status_bits {
! 286: DescOwn=0x8000,
! 287: };
1.1 root 288:
1.1.1.2 ! root 289: #define PRIV_ALIGN 15 /* Required alignment mask */
! 290: struct epic_private {
! 291: /* Tx and Rx rings first so that they remain paragraph aligned. */
1.1 root 292: struct epic_rx_desc rx_ring[RX_RING_SIZE];
293: struct epic_tx_desc tx_ring[TX_RING_SIZE];
294: /* The saved address of a sent-in-place packet/buffer, for skfree(). */
295: struct sk_buff* tx_skbuff[TX_RING_SIZE];
296: /* The addresses of receive-in-place skbuffs. */
297: struct sk_buff* rx_skbuff[RX_RING_SIZE];
298:
1.1.1.2 ! root 299: struct net_device *next_module;
! 300: void *priv_addr; /* Unaligned address for kfree */
1.1 root 301:
1.1.1.2 ! root 302: /* Ring pointers. */
! 303: spinlock_t lock; /* Group with Tx control cache line. */
! 304: unsigned int cur_tx, dirty_tx;
! 305: struct descriptor *last_tx_desc;
! 306:
! 307: unsigned int cur_rx, dirty_rx;
! 308: unsigned int rx_buf_sz; /* Based on MTU+slack. */
! 309: struct descriptor *last_rx_desc;
! 310: long last_rx_time; /* Last Rx, in jiffies. */
! 311: int rx_copybreak;
! 312:
! 313: int msg_level;
! 314: int max_interrupt_work;
! 315: struct pci_dev *pci_dev; /* PCI bus location. */
! 316: int chip_id, chip_flags;
1.1 root 317:
318: struct net_device_stats stats;
319: struct timer_list timer; /* Media selection timer. */
1.1.1.2 ! root 320: int tx_threshold;
! 321: int genctl; /* Including Rx threshold. */
! 322: u32 cur_rx_mode;
1.1 root 323: unsigned char mc_filter[8];
1.1.1.2 ! root 324: int multicast_filter_limit;
! 325:
1.1 root 326: signed char phys[4]; /* MII device addresses. */
1.1.1.2 ! root 327: u16 mii_bmcr; /* MII control register */
! 328: u16 advertising; /* NWay media advertisement */
! 329: int mii_phy_cnt;
1.1 root 330: unsigned int tx_full:1; /* The Tx queue is full. */
331: unsigned int full_duplex:1; /* Current duplex setting. */
1.1.1.2 ! root 332: unsigned int duplex_lock:1; /* Duplex forced by the user. */
! 333: unsigned int default_port; /* Last dev->if_port value. */
1.1 root 334: unsigned int media2:4; /* Secondary monitored media port. */
335: unsigned int medialock:1; /* Don't sense media type. */
336: unsigned int mediasense:1; /* Media sensing in progress. */
337: };
338:
1.1.1.2 ! root 339: static int epic_open(struct net_device *dev);
1.1 root 340: static int read_eeprom(long ioaddr, int location);
1.1.1.2 ! root 341: static int mdio_read(struct net_device *dev, int phy_id, int location);
! 342: static void mdio_write(struct net_device *dev, int phy_id, int loc, int val);
! 343: static void epic_start(struct net_device *dev, int restart);
! 344: static void check_media(struct net_device *dev);
1.1 root 345: static void epic_timer(unsigned long data);
1.1.1.2 ! root 346: static void epic_tx_timeout(struct net_device *dev);
! 347: static void epic_init_ring(struct net_device *dev);
! 348: static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev);
! 349: static int epic_rx(struct net_device *dev);
1.1 root 350: static void epic_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
1.1.1.2 ! root 351: static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
! 352: static int epic_close(struct net_device *dev);
! 353: static struct net_device_stats *epic_get_stats(struct net_device *dev);
! 354: static void set_rx_mode(struct net_device *dev);
1.1 root 355:
356:
357: /* A list of all installed EPIC devices, for removing the driver module. */
1.1.1.2 ! root 358: static struct net_device *root_epic_dev = NULL;
1.1 root 359:
1.1.1.2 ! root 360: static void *epic_probe1(struct pci_dev *pdev, void *init_dev,
! 361: long ioaddr, int irq, int chip_idx, int card_idx)
1.1 root 362: {
1.1.1.2 ! root 363: struct net_device *dev;
1.1 root 364: struct epic_private *ep;
1.1.1.2 ! root 365: void *priv_mem;
1.1 root 366: int i, option = 0, duplex = 0;
367:
1.1.1.2 ! root 368: dev = init_etherdev(init_dev, 0);
! 369: if (!dev)
! 370: return NULL;
1.1 root 371:
1.1.1.2 ! root 372: if (dev->mem_start) {
1.1 root 373: option = dev->mem_start;
374: duplex = (dev->mem_start & 16) ? 1 : 0;
375: } else if (card_idx >= 0 && card_idx < MAX_UNITS) {
376: if (options[card_idx] >= 0)
377: option = options[card_idx];
378: if (full_duplex[card_idx] >= 0)
379: duplex = full_duplex[card_idx];
380: }
381:
382: dev->base_addr = ioaddr;
1.1.1.2 ! root 383: dev->irq = irq;
! 384: printk(KERN_INFO "%s: %s at %#lx, %2.2x:%2.2x IRQ %d, ",
! 385: dev->name, pci_id_tbl[chip_idx].name, ioaddr,
! 386: pci_bus_number(pdev), pci_devfn(pdev)>>3, dev->irq);
1.1 root 387:
388: /* Bring the chip out of low-power mode. */
389: outl(0x4200, ioaddr + GENCTL);
1.1.1.2 ! root 390: /* Magic from SMSC app note 7.15 */
1.1 root 391: outl(0x0008, ioaddr + TEST1);
392:
393: /* Turn on the MII transceiver. */
394: outl(0x12, ioaddr + MIICfg);
1.1.1.2 ! root 395: if (pci_id_tbl[chip_idx].drv_flags & NO_MII)
1.1 root 396: outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
397: outl(0x0200, ioaddr + GENCTL);
398:
1.1.1.2 ! root 399: if (((1 << debug) - 1) & NETIF_MSG_MISC) {
! 400: printk(KERN_DEBUG "%s: EEPROM contents\n", dev->name);
! 401: for (i = 0; i < 64; i++)
! 402: printk(" %4.4x%s", read_eeprom(ioaddr, i),
! 403: i % 16 == 15 ? "\n" : "");
! 404: }
! 405:
! 406: /* Note: the '175 does not have a serial EEPROM. */
1.1 root 407: for (i = 0; i < 3; i++)
1.1.1.2 ! root 408: ((u16 *)dev->dev_addr)[i] = le16_to_cpu(inw(ioaddr + LAN0 + i*4));
1.1 root 409:
410: for (i = 0; i < 5; i++)
411: printk("%2.2x:", dev->dev_addr[i]);
412: printk("%2.2x.\n", dev->dev_addr[i]);
413:
1.1.1.2 ! root 414: /* Make certain elements e.g. descriptor lists are aligned. */
! 415: priv_mem = kmalloc(sizeof(*ep) + PRIV_ALIGN, GFP_KERNEL);
! 416: /* Check for the very unlikely case of no memory. */
! 417: if (priv_mem == NULL)
! 418: return NULL;
1.1 root 419:
420: /* We do a request_region() to register /proc/ioports info. */
1.1.1.2 ! root 421: request_region(ioaddr, pci_id_tbl[chip_idx].io_size, dev->name);
1.1 root 422:
1.1.1.2 ! root 423: dev->priv = ep = (void *)(((long)priv_mem + PRIV_ALIGN) & ~PRIV_ALIGN);
1.1 root 424: memset(ep, 0, sizeof(*ep));
1.1.1.2 ! root 425: ep->priv_addr = priv_mem;
1.1 root 426:
427: ep->next_module = root_epic_dev;
428: root_epic_dev = dev;
429:
1.1.1.2 ! root 430: ep->pci_dev = pdev;
! 431: ep->chip_id = chip_idx;
! 432: ep->chip_flags = pci_id_tbl[chip_idx].drv_flags;
! 433: ep->msg_level = (1 << debug) - 1;
! 434: ep->rx_copybreak = rx_copybreak;
! 435: ep->max_interrupt_work = max_interrupt_work;
! 436: ep->multicast_filter_limit = multicast_filter_limit;
! 437:
! 438: /* The lower four bits are non-TP media types. */
! 439: if (option > 0) {
! 440: if (option & 0x220)
! 441: ep->duplex_lock = ep->full_duplex = 1;
! 442: ep->default_port = option & 0xFFFF;
! 443: ep->medialock = 1;
! 444: }
! 445: if (duplex) {
! 446: ep->duplex_lock = ep->full_duplex = 1;
! 447: printk(KERN_INFO "%s: Forced full duplex operation requested.\n",
! 448: dev->name);
! 449: }
! 450: dev->if_port = ep->default_port;
1.1 root 451:
452: /* Find the connected MII xcvrs.
453: Doing this in open() would allow detecting external xcvrs later, but
1.1.1.2 ! root 454: takes much time and no cards have external MII. */
1.1 root 455: {
1.1.1.2 ! root 456: int phy, phy_idx = 0;
! 457: for (phy = 1; phy < 32 && phy_idx < sizeof(ep->phys); phy++) {
! 458: int mii_status = mdio_read(dev, phy, 1);
! 459: if (mii_status != 0xffff && mii_status != 0x0000) {
1.1 root 460: ep->phys[phy_idx++] = phy;
1.1.1.2 ! root 461: printk(KERN_INFO "%s: Located MII transceiver #%d control "
! 462: "%4.4x status %4.4x.\n",
! 463: dev->name, phy, mdio_read(dev, phy, 0), mii_status);
1.1 root 464: }
465: }
1.1.1.2 ! root 466: ep->mii_phy_cnt = phy_idx;
! 467: }
! 468: if (ep->mii_phy_cnt == 0 && ! (ep->chip_flags & NO_MII)) {
! 469: printk(KERN_WARNING "%s: ***WARNING***: No MII transceiver found!\n",
! 470: dev->name);
! 471: /* Use the known PHY address of the EPII. */
! 472: ep->phys[0] = 3;
! 473: }
! 474:
! 475: if (ep->mii_phy_cnt) {
! 476: int phy = ep->phys[0];
! 477: int xcvr = ep->default_port & 0x330;
! 478: if (xcvr) {
! 479: printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n",
! 480: (xcvr & 0x300 ? 100 : 10),
! 481: (xcvr & 0x220 ? "full" : "half"));
! 482: ep->mii_bmcr = xcvr & 0x300 ? 0x2000 : 0; /* 10/100mbps? */
! 483: ep->mii_bmcr |= xcvr & 0x220 ? 0x0100 : 0; /* duplex */
! 484: mdio_write(dev, phy, 0, ep->mii_bmcr);
! 485: } else {
! 486: ep->mii_bmcr = 0x3000;
! 487: ep->advertising = mdio_read(dev, phy, 4);
! 488: printk(KERN_INFO "%s: Autonegotiation advertising %4.4x link "
! 489: "partner %4.4x.\n",
! 490: dev->name, ep->advertising, mdio_read(dev, phy, 5));
1.1 root 491: }
492: }
493:
1.1.1.2 ! root 494: #if EPIC_POWER_SAVE
1.1 root 495: /* Turn off the MII xcvr (175 only!), leave the chip in low-power mode. */
1.1.1.2 ! root 496: if (ep->chip_flags & MII_PWRDWN)
1.1 root 497: outl(inl(ioaddr + NVCTL) & ~0x483C, ioaddr + NVCTL);
1.1.1.2 ! root 498: #endif
1.1 root 499: outl(0x0008, ioaddr + GENCTL);
500:
501: /* The Epic-specific entries in the device structure. */
502: dev->open = &epic_open;
503: dev->hard_start_xmit = &epic_start_xmit;
504: dev->stop = &epic_close;
505: dev->get_stats = &epic_get_stats;
506: dev->set_multicast_list = &set_rx_mode;
507: dev->do_ioctl = &mii_ioctl;
508:
509: return dev;
510: }
511:
512: /* Serial EEPROM section. */
513:
514: /* EEPROM_Ctrl bits. */
515: #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
516: #define EE_CS 0x02 /* EEPROM chip select. */
517: #define EE_DATA_WRITE 0x08 /* EEPROM chip data in. */
518: #define EE_WRITE_0 0x01
519: #define EE_WRITE_1 0x09
520: #define EE_DATA_READ 0x10 /* EEPROM chip data out. */
521: #define EE_ENB (0x0001 | EE_CS)
522:
523: /* Delay between EEPROM clock transitions.
1.1.1.2 ! root 524: This serves to flush the operation to the PCI bus.
1.1 root 525: */
526:
1.1.1.2 ! root 527: #define eeprom_delay() inl(ee_addr)
1.1 root 528:
529: /* The EEPROM commands include the alway-set leading bit. */
530: #define EE_WRITE_CMD (5 << 6)
531: #define EE_READ64_CMD (6 << 6)
532: #define EE_READ256_CMD (6 << 8)
533: #define EE_ERASE_CMD (7 << 6)
534:
535: static int read_eeprom(long ioaddr, int location)
536: {
537: int i;
538: int retval = 0;
539: long ee_addr = ioaddr + EECTL;
540: int read_cmd = location |
1.1.1.2 ! root 541: (inl(ee_addr) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD);
1.1 root 542:
543: outl(EE_ENB & ~EE_CS, ee_addr);
544: outl(EE_ENB, ee_addr);
545:
546: /* Shift the read command bits out. */
547: for (i = 12; i >= 0; i--) {
548: short dataval = (read_cmd & (1 << i)) ? EE_WRITE_1 : EE_WRITE_0;
549: outl(EE_ENB | dataval, ee_addr);
1.1.1.2 ! root 550: eeprom_delay();
1.1 root 551: outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1.1.1.2 ! root 552: eeprom_delay();
1.1 root 553: }
554: outl(EE_ENB, ee_addr);
555:
556: for (i = 16; i > 0; i--) {
557: outl(EE_ENB | EE_SHIFT_CLK, ee_addr);
1.1.1.2 ! root 558: eeprom_delay();
1.1 root 559: retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0);
560: outl(EE_ENB, ee_addr);
1.1.1.2 ! root 561: eeprom_delay();
1.1 root 562: }
563:
564: /* Terminate the EEPROM access. */
565: outl(EE_ENB & ~EE_CS, ee_addr);
566: return retval;
567: }
568:
569: #define MII_READOP 1
570: #define MII_WRITEOP 2
1.1.1.2 ! root 571: static int mdio_read(struct net_device *dev, int phy_id, int location)
1.1 root 572: {
1.1.1.2 ! root 573: long ioaddr = dev->base_addr;
! 574: int read_cmd = (phy_id << 9) | (location << 4) | MII_READOP;
1.1 root 575: int i;
576:
1.1.1.2 ! root 577: outl(read_cmd, ioaddr + MIICtrl);
! 578: /* Typical operation takes 25 loops. */
! 579: for (i = 400; i > 0; i--)
! 580: if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0) {
! 581: /* Work around read failure bug. */
! 582: if (phy_id == 1 && location < 6
! 583: && inw(ioaddr + MIIData) == 0xffff) {
! 584: outl(read_cmd, ioaddr + MIICtrl);
! 585: continue;
! 586: }
1.1 root 587: return inw(ioaddr + MIIData);
1.1.1.2 ! root 588: }
1.1 root 589: return 0xffff;
590: }
591:
1.1.1.2 ! root 592: static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1.1 root 593: {
1.1.1.2 ! root 594: long ioaddr = dev->base_addr;
1.1 root 595: int i;
596:
597: outw(value, ioaddr + MIIData);
1.1.1.2 ! root 598: outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl);
1.1 root 599: for (i = 10000; i > 0; i--) {
600: if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0)
601: break;
602: }
603: return;
604: }
605:
606:
1.1.1.2 ! root 607: static int epic_open(struct net_device *dev)
1.1 root 608: {
609: struct epic_private *ep = (struct epic_private *)dev->priv;
610:
611: MOD_INC_USE_COUNT;
612:
1.1.1.2 ! root 613: if (request_irq(dev->irq, &epic_interrupt, SA_SHIRQ, dev->name, dev)) {
! 614: MOD_DEC_USE_COUNT;
! 615: return -EAGAIN;
1.1 root 616: }
617:
1.1.1.2 ! root 618: epic_init_ring(dev);
! 619: check_media(dev);
! 620: epic_start(dev, 0);
1.1 root 621:
622: /* Set the timer to switch to check for link beat and perhaps switch
623: to an alternate media type. */
624: init_timer(&ep->timer);
1.1.1.2 ! root 625: ep->timer.expires = jiffies + 3*HZ;
1.1 root 626: ep->timer.data = (unsigned long)dev;
627: ep->timer.function = &epic_timer; /* timer handler */
628: add_timer(&ep->timer);
629:
630: return 0;
631: }
632:
633: /* Reset the chip to recover from a PCI transaction error.
634: This may occur at interrupt time. */
1.1.1.2 ! root 635: static void epic_pause(struct net_device *dev)
1.1 root 636: {
637: long ioaddr = dev->base_addr;
638: struct epic_private *ep = (struct epic_private *)dev->priv;
639:
640: /* Disable interrupts by clearing the interrupt mask. */
641: outl(0x00000000, ioaddr + INTMASK);
642: /* Stop the chip's Tx and Rx DMA processes. */
1.1.1.2 ! root 643: outw(StopRx | StopTxDMA | StopRxDMA, ioaddr + COMMAND);
1.1 root 644:
645: /* Update the error counts. */
646: if (inw(ioaddr + COMMAND) != 0xffff) {
647: ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
648: ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
649: ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
650: }
651:
652: /* Remove the packets on the Rx queue. */
653: epic_rx(dev);
654: }
655:
1.1.1.2 ! root 656: static void epic_start(struct net_device *dev, int restart)
1.1 root 657: {
658: long ioaddr = dev->base_addr;
659: struct epic_private *ep = (struct epic_private *)dev->priv;
660: int i;
661:
1.1.1.2 ! root 662: if (restart) {
! 663: /* Soft reset the chip. */
! 664: outl(0x4001, ioaddr + GENCTL);
! 665: printk(KERN_DEBUG "%s: Restarting the EPIC chip, Rx %d/%d Tx %d/%d.\n",
! 666: dev->name, ep->cur_rx, ep->dirty_rx, ep->dirty_tx, ep->cur_tx);
! 667: udelay(1);
! 668:
! 669: /* This magic is documented in SMSC app note 7.15 */
! 670: for (i = 16; i > 0; i--)
! 671: outl(0x0008, ioaddr + TEST1);
! 672: }
! 673:
! 674: #if defined(__powerpc__) || defined(__sparc__) || defined(__BIG_ENDIAN)
! 675: ep->genctl = 0x0432 | (RX_FIFO_THRESH<<8);
! 676: #elif defined(__LITTLE_ENDIAN) || defined(__i386__)
! 677: ep->genctl = 0x0412 | (RX_FIFO_THRESH<<8);
1.1 root 678: #else
1.1.1.2 ! root 679: #error The byte order of this architecture is not defined.
1.1 root 680: #endif
1.1.1.2 ! root 681:
! 682: /* Power and reset the PHY. */
! 683: if (ep->chip_flags & MII_PWRDWN)
1.1 root 684: outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
1.1.1.2 ! root 685: if (restart) {
! 686: outl(ep->genctl | 0x4000, ioaddr + GENCTL);
! 687: inl(ioaddr + GENCTL);
! 688: }
! 689: outl(ep->genctl, ioaddr + GENCTL);
! 690:
! 691: if (dev->if_port == 2 || dev->if_port == 5) { /* 10base2 or AUI */
! 692: outl(0x13, ioaddr + MIICfg);
! 693: printk(KERN_INFO "%s: Disabling MII PHY to use 10base2/AUI.\n",
! 694: dev->name);
! 695: mdio_write(dev, ep->phys[0], 0, 0x0C00);
! 696: } else {
! 697: outl(0x12, ioaddr + MIICfg);
! 698: mdio_write(dev, ep->phys[0], 0, ep->advertising);
! 699: mdio_write(dev, ep->phys[0], 0, ep->mii_bmcr);
! 700: check_media(dev);
! 701: }
1.1 root 702:
703: for (i = 0; i < 3; i++)
1.1.1.2 ! root 704: outl(cpu_to_le16(((u16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4);
1.1 root 705:
1.1.1.2 ! root 706: ep->tx_threshold = TX_FIFO_THRESH;
! 707: outl(ep->tx_threshold, ioaddr + TxThresh);
1.1 root 708: outl(ep->full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);
1.1.1.2 ! root 709: outl(virt_to_bus(&ep->rx_ring[ep->cur_rx % RX_RING_SIZE]),
! 710: ioaddr + PRxCDAR);
! 711: outl(virt_to_bus(&ep->tx_ring[ep->dirty_tx % TX_RING_SIZE]),
1.1 root 712: ioaddr + PTxCDAR);
713:
714: /* Start the chip's Rx process. */
715: set_rx_mode(dev);
1.1.1.2 ! root 716: outl(StartRx | RxQueued, ioaddr + COMMAND);
! 717:
! 718: if ( ! restart)
! 719: netif_start_tx_queue(dev);
1.1 root 720:
721: /* Enable interrupts by setting the interrupt mask. */
1.1.1.2 ! root 722: outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
! 723: | CntFull | TxUnderrun | TxDone | TxEmpty
1.1 root 724: | RxError | RxOverflow | RxFull | RxHeader | RxDone,
725: ioaddr + INTMASK);
1.1.1.2 ! root 726: if (ep->msg_level & NETIF_MSG_IFUP)
! 727: printk(KERN_DEBUG "%s: epic_start() done, cmd status %4.4x, "
! 728: "ctl %4.4x interrupt %4.4x.\n",
! 729: dev->name, (int)inl(ioaddr + COMMAND),
! 730: (int)inl(ioaddr + GENCTL), (int)inl(ioaddr + INTSTAT));
1.1 root 731: return;
732: }
733:
1.1.1.2 ! root 734: static void check_media(struct net_device *dev)
! 735: {
! 736: struct epic_private *ep = (struct epic_private *)dev->priv;
! 737: long ioaddr = dev->base_addr;
! 738: int mii_reg5 = ep->mii_phy_cnt ? mdio_read(dev, ep->phys[0], 5) : 0;
! 739: int negotiated = mii_reg5 & ep->advertising;
! 740: int duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
! 741:
! 742: if (ep->duplex_lock)
! 743: return;
! 744: if (mii_reg5 == 0xffff) /* Bogus read */
! 745: return;
! 746: if (ep->full_duplex != duplex) {
! 747: ep->full_duplex = duplex;
! 748: printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
! 749: " partner capability of %4.4x.\n", dev->name,
! 750: ep->full_duplex ? "full" : "half", ep->phys[0], mii_reg5);
! 751: outl(ep->full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);
! 752: }
! 753: }
! 754:
1.1 root 755: static void epic_timer(unsigned long data)
756: {
1.1.1.2 ! root 757: struct net_device *dev = (struct net_device *)data;
1.1 root 758: struct epic_private *ep = (struct epic_private *)dev->priv;
759: long ioaddr = dev->base_addr;
1.1.1.2 ! root 760: int next_tick = 5*HZ;
1.1 root 761:
1.1.1.2 ! root 762: if (ep->msg_level & NETIF_MSG_TIMER) {
! 763: printk(KERN_DEBUG "%s: Media monitor tick, Tx status %8.8x.\n",
! 764: dev->name, (int)inl(ioaddr + TxSTAT));
1.1 root 765: printk(KERN_DEBUG "%s: Other registers are IntMask %4.4x "
766: "IntStatus %4.4x RxStatus %4.4x.\n",
1.1.1.2 ! root 767: dev->name, (int)inl(ioaddr + INTMASK),
! 768: (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));
1.1 root 769: }
770:
1.1.1.2 ! root 771: if (ep->cur_tx - ep->dirty_tx > 1 &&
! 772: jiffies - dev->trans_start > TX_TIMEOUT) {
! 773: printk(KERN_WARNING "%s: Tx hung, %d vs. %d.\n",
! 774: dev->name, ep->cur_tx, ep->dirty_tx);
! 775: epic_tx_timeout(dev);
1.1 root 776: }
1.1.1.2 ! root 777:
! 778: check_media(dev);
! 779:
! 780: ep->timer.expires = jiffies + next_tick;
! 781: add_timer(&ep->timer);
1.1 root 782: }
783:
1.1.1.2 ! root 784: static void epic_tx_timeout(struct net_device *dev)
1.1 root 785: {
786: struct epic_private *ep = (struct epic_private *)dev->priv;
787: long ioaddr = dev->base_addr;
1.1.1.2 ! root 788: int tx_status = inw(ioaddr + TxSTAT);
1.1 root 789:
1.1.1.2 ! root 790: printk(KERN_WARNING "%s: EPIC transmit timeout, Tx status %4.4x.\n",
! 791: dev->name, tx_status);
! 792: if (ep->msg_level & NETIF_MSG_TX_ERR)
! 793: printk(KERN_DEBUG "%s: Tx indices: dirty_tx %d, cur_tx %d.\n",
! 794: dev->name, ep->dirty_tx, ep->cur_tx);
! 795: if (tx_status & 0x10) { /* Tx FIFO underflow. */
1.1 root 796: ep->stats.tx_fifo_errors++;
1.1.1.2 ! root 797: outl(RestartTx, ioaddr + COMMAND);
! 798: } else {
! 799: epic_start(dev, 1);
! 800: outl(TxQueued, dev->base_addr + COMMAND);
1.1 root 801: }
802:
803: dev->trans_start = jiffies;
804: ep->stats.tx_errors++;
805: return;
806: }
807:
808: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1.1.1.2 ! root 809: static void epic_init_ring(struct net_device *dev)
1.1 root 810: {
811: struct epic_private *ep = (struct epic_private *)dev->priv;
812: int i;
813:
814: ep->tx_full = 0;
1.1.1.2 ! root 815: ep->lock = (spinlock_t) SPIN_LOCK_UNLOCKED;
! 816: ep->dirty_tx = ep->cur_tx = 0;
! 817: ep->cur_rx = ep->dirty_rx = 0;
! 818: ep->last_rx_time = jiffies;
! 819: ep->rx_buf_sz = (dev->mtu <= 1522 ? PKT_BUF_SZ : dev->mtu + 14);
1.1 root 820:
1.1.1.2 ! root 821: /* Initialize all Rx descriptors. */
1.1 root 822: for (i = 0; i < RX_RING_SIZE; i++) {
1.1.1.2 ! root 823: ep->rx_ring[i].rxstatus = 0;
! 824: ep->rx_ring[i].buflength = ep->rx_buf_sz;
1.1 root 825: ep->rx_ring[i].next = virt_to_bus(&ep->rx_ring[i+1]);
1.1.1.2 ! root 826: ep->rx_skbuff[i] = 0;
1.1 root 827: }
828: /* Mark the last entry as wrapping the ring. */
829: ep->rx_ring[i-1].next = virt_to_bus(&ep->rx_ring[0]);
830:
1.1.1.2 ! root 831: /* Fill in the Rx buffers. Handle allocation failure gracefully. */
! 832: for (i = 0; i < RX_RING_SIZE; i++) {
! 833: struct sk_buff *skb = dev_alloc_skb(ep->rx_buf_sz);
! 834: ep->rx_skbuff[i] = skb;
! 835: if (skb == NULL)
! 836: break;
! 837: skb->dev = dev; /* Mark as being used by this device. */
! 838: skb_reserve(skb, 2); /* 16 byte align the IP header. */
! 839: ep->rx_ring[i].bufaddr = virt_to_bus(skb->tail);
! 840: ep->rx_ring[i].rxstatus = DescOwn;
! 841: }
! 842: ep->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
! 843:
1.1 root 844: /* The Tx buffer descriptor is filled in as needed, but we
845: do need to clear the ownership bit. */
846: for (i = 0; i < TX_RING_SIZE; i++) {
847: ep->tx_skbuff[i] = 0;
1.1.1.2 ! root 848: ep->tx_ring[i].txstatus = 0x0000;
1.1 root 849: ep->tx_ring[i].next = virt_to_bus(&ep->tx_ring[i+1]);
850: }
851: ep->tx_ring[i-1].next = virt_to_bus(&ep->tx_ring[0]);
1.1.1.2 ! root 852: return;
1.1 root 853: }
854:
1.1.1.2 ! root 855: static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
1.1 root 856: {
857: struct epic_private *ep = (struct epic_private *)dev->priv;
1.1.1.2 ! root 858: int entry, free_count;
! 859: u32 ctrl_word;
! 860: unsigned long flags;
! 861:
! 862: /* Block a timer-based transmit from overlapping. */
! 863: if (netif_pause_tx_queue(dev) != 0) {
! 864: /* This watchdog code is redundant with the media monitor timer. */
! 865: if (jiffies - dev->trans_start > TX_TIMEOUT)
! 866: epic_tx_timeout(dev);
1.1 root 867: return 1;
868: }
869:
1.1.1.2 ! root 870: /* Caution: the write order is important here, set the field with the
! 871: "ownership" bit last. */
1.1 root 872:
873: /* Calculate the next Tx descriptor entry. */
1.1.1.2 ! root 874: spin_lock_irqsave(&ep->lock, flags);
! 875: free_count = ep->cur_tx - ep->dirty_tx;
1.1 root 876: entry = ep->cur_tx % TX_RING_SIZE;
877:
878: ep->tx_skbuff[entry] = skb;
879: ep->tx_ring[entry].bufaddr = virt_to_bus(skb->data);
880:
1.1.1.2 ! root 881: if (free_count < TX_QUEUE_LEN/2) {/* Typical path */
! 882: ctrl_word = 0x100000; /* No interrupt */
! 883: } else if (free_count == TX_QUEUE_LEN/2) {
! 884: ctrl_word = 0x140000; /* Tx-done intr. */
! 885: } else if (free_count < TX_QUEUE_LEN - 1) {
! 886: ctrl_word = 0x100000; /* No Tx-done intr. */
1.1 root 887: } else {
1.1.1.2 ! root 888: /* Leave room for an additional entry. */
! 889: ctrl_word = 0x140000; /* Tx-done intr. */
! 890: ep->tx_full = 1;
! 891: }
! 892: ep->tx_ring[entry].buflength = ctrl_word | skb->len;
! 893: ep->tx_ring[entry].txstatus =
! 894: ((skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN) << 16)
! 895: | DescOwn;
1.1 root 896:
897: ep->cur_tx++;
1.1.1.2 ! root 898: if (ep->tx_full) {
! 899: /* Check for a just-cleared queue. */
! 900: if (ep->cur_tx - (volatile int)ep->dirty_tx < TX_QUEUE_LEN - 2) {
! 901: netif_unpause_tx_queue(dev);
! 902: ep->tx_full = 0;
! 903: } else
! 904: netif_stop_tx_queue(dev);
! 905: } else
! 906: netif_unpause_tx_queue(dev);
! 907:
! 908: spin_unlock_irqrestore(&ep->lock, flags);
1.1 root 909: /* Trigger an immediate transmit demand. */
1.1.1.2 ! root 910: outl(TxQueued, dev->base_addr + COMMAND);
1.1 root 911:
912: dev->trans_start = jiffies;
1.1.1.2 ! root 913: if (ep->msg_level & NETIF_MSG_TX_QUEUED)
1.1 root 914: printk(KERN_DEBUG "%s: Queued Tx packet size %d to slot %d, "
915: "flag %2.2x Tx status %8.8x.\n",
1.1.1.2 ! root 916: dev->name, (int)skb->len, entry, ctrl_word,
! 917: (int)inl(dev->base_addr + TxSTAT));
1.1 root 918:
919: return 0;
920: }
921:
922: /* The interrupt handler does all of the Rx thread work and cleans up
923: after the Tx thread. */
924: static void epic_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
925: {
1.1.1.2 ! root 926: struct net_device *dev = (struct net_device *)dev_instance;
! 927: struct epic_private *ep = (struct epic_private *)dev->priv;
! 928: long ioaddr = dev->base_addr;
! 929: int status, boguscnt = max_interrupt_work;
1.1 root 930:
931: do {
932: status = inl(ioaddr + INTSTAT);
933: /* Acknowledge all of the current interrupt sources ASAP. */
934: outl(status & 0x00007fff, ioaddr + INTSTAT);
935:
1.1.1.2 ! root 936: if (ep->msg_level & NETIF_MSG_INTR)
! 937: printk(KERN_DEBUG "%s: Interrupt, status=%#8.8x new "
! 938: "intstat=%#8.8x.\n",
! 939: dev->name, status, (int)inl(ioaddr + INTSTAT));
1.1 root 940:
941: if ((status & IntrSummary) == 0)
942: break;
943:
1.1.1.2 ! root 944: if (status & (RxDone | RxStarted | RxEarlyWarn | RxOverflow))
1.1 root 945: epic_rx(dev);
946:
947: if (status & (TxEmpty | TxDone)) {
1.1.1.2 ! root 948: unsigned int dirty_tx, cur_tx;
1.1 root 949:
1.1.1.2 ! root 950: /* Note: if this lock becomes a problem we can narrow the locked
! 951: region at the cost of occasionally grabbing the lock more
! 952: times. */
! 953: spin_lock(&ep->lock);
! 954: cur_tx = ep->cur_tx;
! 955: dirty_tx = ep->dirty_tx;
! 956: for (; cur_tx - dirty_tx > 0; dirty_tx++) {
1.1 root 957: int entry = dirty_tx % TX_RING_SIZE;
1.1.1.2 ! root 958: int txstatus = ep->tx_ring[entry].txstatus;
1.1 root 959:
1.1.1.2 ! root 960: if (txstatus & DescOwn)
1.1 root 961: break; /* It still hasn't been Txed */
962:
963: if ( ! (txstatus & 0x0001)) {
964: /* There was an major error, log it. */
965: #ifndef final_version
1.1.1.2 ! root 966: if (ep->msg_level & NETIF_MSG_TX_ERR)
! 967: printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
1.1 root 968: dev->name, txstatus);
969: #endif
970: ep->stats.tx_errors++;
971: if (txstatus & 0x1050) ep->stats.tx_aborted_errors++;
972: if (txstatus & 0x0008) ep->stats.tx_carrier_errors++;
973: if (txstatus & 0x0040) ep->stats.tx_window_errors++;
974: if (txstatus & 0x0010) ep->stats.tx_fifo_errors++;
975: #ifdef ETHER_STATS
976: if (txstatus & 0x1000) ep->stats.collisions16++;
977: #endif
978: } else {
1.1.1.2 ! root 979: if (ep->msg_level & NETIF_MSG_TX_DONE)
! 980: printk(KERN_DEBUG "%s: Transmit done, Tx status "
! 981: "%8.8x.\n", dev->name, txstatus);
1.1 root 982: #ifdef ETHER_STATS
983: if ((txstatus & 0x0002) != 0) ep->stats.tx_deferred++;
984: #endif
985: ep->stats.collisions += (txstatus >> 8) & 15;
986: ep->stats.tx_packets++;
1.1.1.2 ! root 987: #if LINUX_VERSION_CODE > 0x20127
! 988: ep->stats.tx_bytes += ep->tx_skbuff[entry]->len;
! 989: #endif
1.1 root 990: }
991:
992: /* Free the original skb. */
1.1.1.2 ! root 993: dev_free_skb_irq(ep->tx_skbuff[entry]);
1.1 root 994: ep->tx_skbuff[entry] = 0;
995: }
996:
997: #ifndef final_version
1.1.1.2 ! root 998: if (cur_tx - dirty_tx > TX_RING_SIZE) {
! 999: printk(KERN_WARNING "%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
! 1000: dev->name, dirty_tx, cur_tx, ep->tx_full);
1.1 root 1001: dirty_tx += TX_RING_SIZE;
1002: }
1003: #endif
1004: ep->dirty_tx = dirty_tx;
1.1.1.2 ! root 1005: if (ep->tx_full
! 1006: && cur_tx - dirty_tx < TX_QUEUE_LEN - 4) {
! 1007: /* The ring is no longer full, allow new TX entries. */
! 1008: ep->tx_full = 0;
! 1009: spin_unlock(&ep->lock);
! 1010: netif_resume_tx_queue(dev);
! 1011: } else
! 1012: spin_unlock(&ep->lock);
1.1 root 1013: }
1014:
1015: /* Check uncommon events all at once. */
1.1.1.2 ! root 1016: if (status & (CntFull | TxUnderrun | RxOverflow | RxFull |
1.1 root 1017: PCIBusErr170 | PCIBusErr175)) {
1018: if (status == 0xffffffff) /* Chip failed or removed (CardBus). */
1019: break;
1020: /* Always update the error counts to avoid overhead later. */
1021: ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
1022: ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
1023: ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
1024:
1025: if (status & TxUnderrun) { /* Tx FIFO underflow. */
1026: ep->stats.tx_fifo_errors++;
1.1.1.2 ! root 1027: outl(ep->tx_threshold += 128, ioaddr + TxThresh);
1.1 root 1028: /* Restart the transmit process. */
1.1.1.2 ! root 1029: outl(RestartTx, ioaddr + COMMAND);
1.1 root 1030: }
1031: if (status & RxOverflow) { /* Missed a Rx frame. */
1032: ep->stats.rx_errors++;
1033: }
1.1.1.2 ! root 1034: if (status & (RxOverflow | RxFull))
! 1035: outw(RxQueued, ioaddr + COMMAND);
1.1 root 1036: if (status & PCIBusErr170) {
1037: printk(KERN_ERR "%s: PCI Bus Error! EPIC status %4.4x.\n",
1038: dev->name, status);
1039: epic_pause(dev);
1.1.1.2 ! root 1040: epic_start(dev, 1);
1.1 root 1041: }
1042: /* Clear all error sources. */
1043: outl(status & 0x7f18, ioaddr + INTSTAT);
1044: }
1045: if (--boguscnt < 0) {
1.1.1.2 ! root 1046: printk(KERN_WARNING "%s: Too much work at interrupt, "
1.1 root 1047: "IntrStatus=0x%8.8x.\n",
1048: dev->name, status);
1049: /* Clear all interrupt sources. */
1050: outl(0x0001ffff, ioaddr + INTSTAT);
1.1.1.2 ! root 1051: /* Ill-advised: Slowly stop emitting this message. */
! 1052: max_interrupt_work++;
1.1 root 1053: break;
1054: }
1055: } while (1);
1056:
1.1.1.2 ! root 1057: if (ep->msg_level & NETIF_MSG_INTR)
! 1058: printk(KERN_DEBUG "%s: Exiting interrupt, intr_status=%#4.4x.\n",
! 1059: dev->name, status);
1.1 root 1060:
1061: return;
1062: }
1063:
1.1.1.2 ! root 1064: static int epic_rx(struct net_device *dev)
1.1 root 1065: {
1066: struct epic_private *ep = (struct epic_private *)dev->priv;
1067: int entry = ep->cur_rx % RX_RING_SIZE;
1.1.1.2 ! root 1068: int rx_work_limit = ep->dirty_rx + RX_RING_SIZE - ep->cur_rx;
1.1 root 1069: int work_done = 0;
1070:
1.1.1.2 ! root 1071: if (ep->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 1072: printk(KERN_DEBUG " In epic_rx(), entry %d %8.8x.\n", entry,
1.1.1.2 ! root 1073: ep->rx_ring[entry].rxstatus);
1.1 root 1074: /* If we own the next entry, it's a new packet. Send it up. */
1.1.1.2 ! root 1075: while ((ep->rx_ring[entry].rxstatus & DescOwn) == 0) {
! 1076: int status = ep->rx_ring[entry].rxstatus;
1.1 root 1077:
1.1.1.2 ! root 1078: if (ep->msg_level & NETIF_MSG_RX_STATUS)
1.1 root 1079: printk(KERN_DEBUG " epic_rx() status was %8.8x.\n", status);
1.1.1.2 ! root 1080: if (--rx_work_limit < 0)
! 1081: break;
1.1 root 1082: if (status & 0x2006) {
1.1.1.2 ! root 1083: if (ep->msg_level & NETIF_MSG_RX_ERR)
! 1084: printk(KERN_DEBUG "%s: epic_rx() error status was %8.8x.\n",
! 1085: dev->name, status);
1.1 root 1086: if (status & 0x2000) {
1087: printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1088: "multiple buffers, status %4.4x!\n", dev->name, status);
1089: ep->stats.rx_length_errors++;
1090: } else if (status & 0x0006)
1091: /* Rx Frame errors are counted in hardware. */
1092: ep->stats.rx_errors++;
1093: } else {
1094: /* Malloc up new buffer, compatible with net-2e. */
1095: /* Omit the four octet CRC from the length. */
1.1.1.2 ! root 1096: short pkt_len = (status >> 16) - 4;
1.1 root 1097: struct sk_buff *skb;
1098:
1.1.1.2 ! root 1099: if (pkt_len > PKT_BUF_SZ - 4) {
! 1100: printk(KERN_ERR "%s: Oversized Ethernet frame, status %x "
! 1101: "%d bytes.\n",
! 1102: dev->name, pkt_len, status);
! 1103: pkt_len = 1514;
! 1104: }
! 1105: if (ep->msg_level & NETIF_MSG_RX_STATUS)
! 1106: printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d"
! 1107: ", bogus_cnt %d.\n", pkt_len, rx_work_limit);
1.1 root 1108: /* Check if the packet is long enough to accept without copying
1109: to a minimally-sized skbuff. */
1110: if (pkt_len < rx_copybreak
1111: && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1112: skb->dev = dev;
1113: skb_reserve(skb, 2); /* 16 byte align the IP header */
1.1.1.2 ! root 1114: #if 1 /* HAS_IP_COPYSUM */
! 1115: eth_copy_and_sum(skb, ep->rx_skbuff[entry]->tail, pkt_len, 0);
1.1 root 1116: skb_put(skb, pkt_len);
1117: #else
1.1.1.2 ! root 1118: memcpy(skb_put(skb, pkt_len), ep->rx_skbuff[entry]->tail,
! 1119: pkt_len);
1.1 root 1120: #endif
1121: } else {
1122: skb_put(skb = ep->rx_skbuff[entry], pkt_len);
1123: ep->rx_skbuff[entry] = NULL;
1124: }
1125: skb->protocol = eth_type_trans(skb, dev);
1126: netif_rx(skb);
1127: ep->stats.rx_packets++;
1.1.1.2 ! root 1128: #if LINUX_VERSION_CODE > 0x20127
! 1129: ep->stats.rx_bytes += pkt_len;
! 1130: #endif
1.1 root 1131: }
1132: work_done++;
1133: entry = (++ep->cur_rx) % RX_RING_SIZE;
1134: }
1135:
1136: /* Refill the Rx ring buffers. */
1137: for (; ep->cur_rx - ep->dirty_rx > 0; ep->dirty_rx++) {
1138: entry = ep->dirty_rx % RX_RING_SIZE;
1139: if (ep->rx_skbuff[entry] == NULL) {
1140: struct sk_buff *skb;
1.1.1.2 ! root 1141: skb = ep->rx_skbuff[entry] = dev_alloc_skb(ep->rx_buf_sz);
1.1 root 1142: if (skb == NULL)
1143: break;
1144: skb->dev = dev; /* Mark as being used by this device. */
1145: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1146: ep->rx_ring[entry].bufaddr = virt_to_bus(skb->tail);
1147: work_done++;
1148: }
1.1.1.2 ! root 1149: ep->rx_ring[entry].rxstatus = DescOwn;
1.1 root 1150: }
1151: return work_done;
1152: }
1153:
1.1.1.2 ! root 1154: static int epic_close(struct net_device *dev)
1.1 root 1155: {
1156: long ioaddr = dev->base_addr;
1157: struct epic_private *ep = (struct epic_private *)dev->priv;
1158: int i;
1159:
1.1.1.2 ! root 1160: netif_stop_tx_queue(dev);
1.1 root 1161:
1.1.1.2 ! root 1162: if (ep->msg_level & NETIF_MSG_IFDOWN)
! 1163: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %8.8x.\n",
! 1164: dev->name, (int)inl(ioaddr + INTSTAT));
1.1 root 1165:
1.1.1.2 ! root 1166: epic_pause(dev);
1.1 root 1167: del_timer(&ep->timer);
1168: free_irq(dev->irq, dev);
1169:
1170: /* Free all the skbuffs in the Rx queue. */
1171: for (i = 0; i < RX_RING_SIZE; i++) {
1172: struct sk_buff *skb = ep->rx_skbuff[i];
1173: ep->rx_skbuff[i] = 0;
1.1.1.2 ! root 1174: ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */
1.1 root 1175: ep->rx_ring[i].buflength = 0;
1176: ep->rx_ring[i].bufaddr = 0xBADF00D0; /* An invalid address. */
1177: if (skb) {
1178: #if LINUX_VERSION_CODE < 0x20100
1179: skb->free = 1;
1180: #endif
1.1.1.2 ! root 1181: dev_free_skb(skb);
1.1 root 1182: }
1183: }
1184: for (i = 0; i < TX_RING_SIZE; i++) {
1185: if (ep->tx_skbuff[i])
1.1.1.2 ! root 1186: dev_free_skb(ep->tx_skbuff[i]);
1.1 root 1187: ep->tx_skbuff[i] = 0;
1188: }
1189:
1190: /* Green! Leave the chip in low-power mode. */
1.1.1.2 ! root 1191: outl(0x440008, ioaddr + GENCTL);
1.1 root 1192:
1193: MOD_DEC_USE_COUNT;
1194: return 0;
1195: }
1196:
1.1.1.2 ! root 1197: static struct net_device_stats *epic_get_stats(struct net_device *dev)
1.1 root 1198: {
1199: struct epic_private *ep = (struct epic_private *)dev->priv;
1200: long ioaddr = dev->base_addr;
1201:
1.1.1.2 ! root 1202: if (netif_running(dev)) {
1.1 root 1203: /* Update the error counts. */
1204: ep->stats.rx_missed_errors += inb(ioaddr + MPCNT);
1205: ep->stats.rx_frame_errors += inb(ioaddr + ALICNT);
1206: ep->stats.rx_crc_errors += inb(ioaddr + CRCCNT);
1207: }
1208:
1209: return &ep->stats;
1210: }
1211:
1212: /* Set or clear the multicast filter for this adaptor.
1213: Note that we only use exclusion around actually queueing the
1214: new frame, not around filling ep->setup_frame. This is non-deterministic
1215: when re-entered but still correct. */
1216:
1217: /* The little-endian AUTODIN II ethernet CRC calculation.
1218: N.B. Do not use for bulk data, use a table-based routine instead.
1219: This is common code and should be moved to net/core/crc.c */
1220: static unsigned const ethernet_polynomial_le = 0xedb88320U;
1221: static inline unsigned ether_crc_le(int length, unsigned char *data)
1222: {
1223: unsigned int crc = 0xffffffff; /* Initial value. */
1224: while(--length >= 0) {
1225: unsigned char current_octet = *data++;
1226: int bit;
1227: for (bit = 8; --bit >= 0; current_octet >>= 1) {
1228: if ((crc ^ current_octet) & 1) {
1229: crc >>= 1;
1230: crc ^= ethernet_polynomial_le;
1231: } else
1232: crc >>= 1;
1233: }
1234: }
1235: return crc;
1236: }
1237:
1.1.1.2 ! root 1238: static void set_rx_mode(struct net_device *dev)
1.1 root 1239: {
1240: long ioaddr = dev->base_addr;
1241: struct epic_private *ep = (struct epic_private *)dev->priv;
1242: unsigned char mc_filter[8]; /* Multicast hash filter */
1.1.1.2 ! root 1243: u32 new_rx_mode;
1.1 root 1244: int i;
1245:
1246: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1.1.1.2 ! root 1247: new_rx_mode = 0x002C;
1.1 root 1248: /* Unconditionally log net taps. */
1249: printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1250: memset(mc_filter, 0xff, sizeof(mc_filter));
1251: } else if ((dev->mc_count > 0) || (dev->flags & IFF_ALLMULTI)) {
1252: /* There is apparently a chip bug, so the multicast filter
1253: is never enabled. */
1254: /* Too many to filter perfectly -- accept all multicasts. */
1255: memset(mc_filter, 0xff, sizeof(mc_filter));
1.1.1.2 ! root 1256: new_rx_mode = 0x000C;
1.1 root 1257: } else if (dev->mc_count == 0) {
1.1.1.2 ! root 1258: memset(mc_filter, 0, sizeof(mc_filter));
! 1259: new_rx_mode = 0x0004;
1.1 root 1260: } else { /* Never executed, for now. */
1261: struct dev_mc_list *mclist;
1262:
1263: memset(mc_filter, 0, sizeof(mc_filter));
1264: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1265: i++, mclist = mclist->next)
1266: set_bit(ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x3f,
1267: mc_filter);
1.1.1.2 ! root 1268: new_rx_mode = 0x000C;
! 1269: }
! 1270: if (ep->cur_rx_mode != new_rx_mode) {
! 1271: ep->cur_rx_mode = new_rx_mode;
! 1272: outl(new_rx_mode, ioaddr + RxCtrl);
1.1 root 1273: }
1274: /* ToDo: perhaps we need to stop the Tx and Rx process here? */
1275: if (memcmp(mc_filter, ep->mc_filter, sizeof(mc_filter))) {
1276: for (i = 0; i < 4; i++)
1277: outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4);
1278: memcpy(ep->mc_filter, mc_filter, sizeof(mc_filter));
1279: }
1280: return;
1281: }
1282:
1.1.1.2 ! root 1283: static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1.1 root 1284: {
1.1.1.2 ! root 1285: struct epic_private *ep = (void *)dev->priv;
1.1 root 1286: long ioaddr = dev->base_addr;
1287: u16 *data = (u16 *)&rq->ifr_data;
1.1.1.2 ! root 1288: u32 *data32 = (void *)&rq->ifr_data;
1.1 root 1289:
1290: switch(cmd) {
1.1.1.2 ! root 1291: case 0x8947: case 0x89F0:
! 1292: /* SIOCGMIIPHY: Get the address of the PHY in use. */
! 1293: data[0] = ep->phys[0] & 0x1f;
1.1 root 1294: /* Fall Through */
1.1.1.2 ! root 1295: case 0x8948: case 0x89F1:
! 1296: /* SIOCGMIIREG: Read the specified MII register. */
! 1297: if (! netif_running(dev)) {
1.1 root 1298: outl(0x0200, ioaddr + GENCTL);
1299: outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
1300: }
1.1.1.2 ! root 1301: data[3] = mdio_read(dev, data[0] & 0x1f, data[1] & 0x1f);
! 1302: #if defined(PWRDWN_AFTER_IOCTL)
! 1303: if (! netif_running(dev)) {
1.1 root 1304: outl(0x0008, ioaddr + GENCTL);
1305: outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL);
1306: }
1.1.1.2 ! root 1307: #endif
1.1 root 1308: return 0;
1.1.1.2 ! root 1309: case 0x8949: case 0x89F2:
! 1310: /* SIOCSMIIREG: Write the specified MII register */
! 1311: if (!capable(CAP_NET_ADMIN))
1.1 root 1312: return -EPERM;
1.1.1.2 ! root 1313: if (! netif_running(dev)) {
1.1 root 1314: outl(0x0200, ioaddr + GENCTL);
1315: outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
1316: }
1.1.1.2 ! root 1317: if (data[0] == ep->phys[0]) {
! 1318: u16 value = data[2];
! 1319: switch (data[1]) {
! 1320: case 0:
! 1321: /* Check for autonegotiation on or reset. */
! 1322: ep->duplex_lock = (value & 0x9000) ? 0 : 1;
! 1323: if (ep->duplex_lock)
! 1324: ep->full_duplex = (value & 0x0100) ? 1 : 0;
! 1325: break;
! 1326: case 4: ep->advertising = value; break;
! 1327: }
! 1328: /* Perhaps check_duplex(dev), depending on chip semantics. */
! 1329: }
! 1330: mdio_write(dev, data[0] & 0x1f, data[1] & 0x1f, data[2]);
! 1331: #if defined(PWRDWN_AFTER_IOCTL)
! 1332: if (! netif_running(dev)) {
1.1 root 1333: outl(0x0008, ioaddr + GENCTL);
1334: outl((inl(ioaddr + NVCTL) & ~0x483C) | 0x0000, ioaddr + NVCTL);
1335: }
1.1.1.2 ! root 1336: #endif
! 1337: return 0;
! 1338: case SIOCGPARAMS:
! 1339: data32[0] = ep->msg_level;
! 1340: data32[1] = ep->multicast_filter_limit;
! 1341: data32[2] = ep->max_interrupt_work;
! 1342: data32[3] = ep->rx_copybreak;
! 1343: return 0;
! 1344: case SIOCSPARAMS:
! 1345: if (!capable(CAP_NET_ADMIN))
! 1346: return -EPERM;
! 1347: ep->msg_level = data32[0];
! 1348: ep->multicast_filter_limit = data32[1];
! 1349: ep->max_interrupt_work = data32[2];
! 1350: ep->rx_copybreak = data32[3];
1.1 root 1351: return 0;
1352: default:
1353: return -EOPNOTSUPP;
1354: }
1355: }
1356:
1.1.1.2 ! root 1357: static int epic_pwr_event(void *dev_instance, int event)
! 1358: {
! 1359: struct net_device *dev = dev_instance;
! 1360: struct epic_private *ep = (struct epic_private *)dev->priv;
! 1361: long ioaddr = dev->base_addr;
! 1362: if (ep->msg_level & NETIF_MSG_LINK)
! 1363: printk(KERN_DEBUG "%s: Handling power event %d.\n", dev->name, event);
! 1364: switch(event) {
! 1365: case DRV_SUSPEND:
! 1366: epic_pause(dev);
! 1367: /* Put the chip into low-power mode. */
! 1368: outl(0x0008, ioaddr + GENCTL);
! 1369: break;
! 1370: case DRV_RESUME:
! 1371: epic_start(dev, 1);
! 1372: break;
! 1373: case DRV_DETACH: {
! 1374: struct net_device **devp, **next;
! 1375: if (dev->flags & IFF_UP) {
! 1376: dev_close(dev);
! 1377: dev->flags &= ~(IFF_UP|IFF_RUNNING);
! 1378: }
! 1379: unregister_netdev(dev);
! 1380: release_region(dev->base_addr, pci_id_tbl[ep->chip_id].io_size);
! 1381: #ifndef USE_IO_OPS
! 1382: iounmap((char *)dev->base_addr);
! 1383: #endif
! 1384: for (devp = &root_epic_dev; *devp; devp = next) {
! 1385: next = &((struct epic_private *)(*devp)->priv)->next_module;
! 1386: if (*devp == dev) {
! 1387: *devp = *next;
! 1388: break;
! 1389: }
! 1390: }
! 1391: if (ep->priv_addr)
! 1392: kfree(ep->priv_addr);
! 1393: kfree(dev);
! 1394: /*MOD_DEC_USE_COUNT;*/
! 1395: break;
! 1396: }
! 1397: }
! 1398:
! 1399: return 0;
! 1400: }
! 1401:
1.1 root 1402:
1403: #ifdef CARDBUS
1404:
1405: #include <pcmcia/driver_ops.h>
1406:
1407: static dev_node_t *epic_attach(dev_locator_t *loc)
1408: {
1.1.1.2 ! root 1409: struct net_device *dev;
1.1 root 1410: u16 dev_id;
1.1.1.2 ! root 1411: u32 pciaddr;
1.1 root 1412: u8 bus, devfn, irq;
1.1.1.2 ! root 1413: long ioaddr;
1.1 root 1414:
1415: if (loc->bus != LOC_PCI) return NULL;
1416: bus = loc->b.pci.bus; devfn = loc->b.pci.devfn;
1.1.1.2 ! root 1417: printk(KERN_DEBUG "epic_attach(bus %d, function %d)\n", bus, devfn);
! 1418: #ifdef USE_IO_OPS
! 1419: pcibios_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_0, &pciaddr);
! 1420: ioaddr = pciaddr & PCI_BASE_ADDRESS_IO_MASK;
! 1421: #else
! 1422: pcibios_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_1, &pciaddr);
! 1423: ioaddr = (long)ioremap(pciaddr & PCI_BASE_ADDRESS_MEM_MASK,
! 1424: pci_id_tbl[1].io_size);
! 1425: #endif
1.1 root 1426: pcibios_read_config_byte(bus, devfn, PCI_INTERRUPT_LINE, &irq);
1427: pcibios_read_config_word(bus, devfn, PCI_DEVICE_ID, &dev_id);
1.1.1.2 ! root 1428: if (ioaddr == 0 || irq == 0) {
! 1429: printk(KERN_ERR "The EPIC/C CardBus Ethernet interface at %d/%d was "
! 1430: "not assigned an %s.\n"
! 1431: KERN_ERR " It will not be activated.\n",
! 1432: bus, devfn, ioaddr == 0 ? "address" : "IRQ");
! 1433: return NULL;
! 1434: }
! 1435: dev = epic_probe1(pci_find_slot(bus, devfn), NULL, ioaddr, irq, 1, 0);
1.1 root 1436: if (dev) {
1437: dev_node_t *node = kmalloc(sizeof(dev_node_t), GFP_KERNEL);
1438: strcpy(node->dev_name, dev->name);
1439: node->major = node->minor = 0;
1440: node->next = NULL;
1441: MOD_INC_USE_COUNT;
1442: return node;
1443: }
1444: return NULL;
1445: }
1446:
1447: static void epic_suspend(dev_node_t *node)
1448: {
1.1.1.2 ! root 1449: struct net_device **devp, **next;
1.1 root 1450: printk(KERN_INFO "epic_suspend(%s)\n", node->dev_name);
1451: for (devp = &root_epic_dev; *devp; devp = next) {
1452: next = &((struct epic_private *)(*devp)->priv)->next_module;
1453: if (strcmp((*devp)->name, node->dev_name) == 0) break;
1454: }
1455: if (*devp) {
1456: long ioaddr = (*devp)->base_addr;
1457: epic_pause(*devp);
1458: /* Put the chip into low-power mode. */
1459: outl(0x0008, ioaddr + GENCTL);
1460: }
1461: }
1462: static void epic_resume(dev_node_t *node)
1463: {
1.1.1.2 ! root 1464: struct net_device **devp, **next;
1.1 root 1465: printk(KERN_INFO "epic_resume(%s)\n", node->dev_name);
1466: for (devp = &root_epic_dev; *devp; devp = next) {
1467: next = &((struct epic_private *)(*devp)->priv)->next_module;
1468: if (strcmp((*devp)->name, node->dev_name) == 0) break;
1469: }
1470: if (*devp) {
1.1.1.2 ! root 1471: epic_start(*devp, 1);
1.1 root 1472: }
1473: }
1474: static void epic_detach(dev_node_t *node)
1475: {
1.1.1.2 ! root 1476: struct net_device **devp, **next;
1.1 root 1477: printk(KERN_INFO "epic_detach(%s)\n", node->dev_name);
1478: for (devp = &root_epic_dev; *devp; devp = next) {
1479: next = &((struct epic_private *)(*devp)->priv)->next_module;
1480: if (strcmp((*devp)->name, node->dev_name) == 0) break;
1481: }
1482: if (*devp) {
1483: unregister_netdev(*devp);
1.1.1.2 ! root 1484: release_region((*devp)->base_addr, EPIC_TOTAL_SIZE);
! 1485: #ifndef USE_IO_OPS
! 1486: iounmap((char *)(*devp)->base_addr);
! 1487: #endif
1.1 root 1488: kfree(*devp);
1489: *devp = *next;
1490: kfree(node);
1491: MOD_DEC_USE_COUNT;
1492: }
1493: }
1494:
1495: struct driver_operations epic_ops = {
1496: "epic_cb", epic_attach, epic_suspend, epic_resume, epic_detach
1497: };
1498:
1499: #endif /* Cardbus support */
1500:
1501:
1502: #ifdef MODULE
1503:
1.1.1.2 ! root 1504: int init_module(void)
1.1 root 1505: {
1.1.1.2 ! root 1506: /* Emit version even if no cards detected. */
! 1507: printk(KERN_INFO "%s", version);
1.1 root 1508:
1509: #ifdef CARDBUS
1510: register_driver(&epic_ops);
1511: return 0;
1512: #else
1.1.1.2 ! root 1513: return pci_drv_register(&epic_drv_id, NULL);
1.1 root 1514: #endif
1515: }
1516:
1.1.1.2 ! root 1517: void cleanup_module(void)
1.1 root 1518: {
1.1.1.2 ! root 1519: struct net_device *next_dev;
1.1 root 1520:
1521: #ifdef CARDBUS
1522: unregister_driver(&epic_ops);
1.1.1.2 ! root 1523: #else
! 1524: pci_drv_unregister(&epic_drv_id);
1.1 root 1525: #endif
1526:
1527: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1528: while (root_epic_dev) {
1.1.1.2 ! root 1529: struct epic_private *ep = (struct epic_private *)root_epic_dev->priv;
1.1 root 1530: unregister_netdev(root_epic_dev);
1.1.1.2 ! root 1531: release_region(root_epic_dev->base_addr, pci_id_tbl[ep->chip_id].io_size);
! 1532: #ifndef USE_IO_OPS
! 1533: iounmap((char *)root_epic_dev->base_addr);
! 1534: #endif
! 1535: next_dev = ep->next_module;
! 1536: if (ep->priv_addr)
! 1537: kfree(ep->priv_addr);
1.1 root 1538: kfree(root_epic_dev);
1539: root_epic_dev = next_dev;
1540: }
1541: }
1.1.1.2 ! root 1542: #else
! 1543: int epic100_probe(struct net_device *dev)
! 1544: {
! 1545: int retval = pci_drv_register(&epic_drv_id, dev);
! 1546: if (retval >= 0)
! 1547: printk(KERN_INFO "%s", version);
! 1548: return retval;
! 1549: }
1.1 root 1550: #endif /* MODULE */
1551:
1552: /*
1553: * Local variables:
1.1.1.2 ! root 1554: * compile-command: "gcc -DMODULE -Wall -Wstrict-prototypes -O6 -c epic100.c"
! 1555: * cardbus-compile-command: "gcc -DCARDBUS -DMODULE -Wall -Wstrict-prototypes -O6 -c epic100.c -o epic_cb.o -I/usr/src/pcmcia/include/"
1.1 root 1556: * c-indent-level: 4
1557: * c-basic-offset: 4
1558: * tab-width: 4
1559: * End:
1560: */
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