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1.1 root 1: /* intel-gige.c: A Linux device driver for Intel Gigabit Ethernet adapters. */
2: /*
3: Written 2000-2002 by Donald Becker.
4: Copyright Scyld Computing Corporation.
5:
6: This software may be used and distributed according to the terms of
7: the GNU General Public License (GPL), incorporated herein by reference.
8: You should have received a copy of the GPL with this file.
9: Drivers based on or derived from this code fall under the GPL and must
10: retain the authorship, copyright and license notice. This file is not
11: a complete program and may only be used when the entire operating
12: system is licensed under the GPL.
13:
14: The author may be reached as [email protected], or C/O
15: Scyld Computing Corporation
16: 410 Severn Ave., Suite 210
17: Annapolis MD 21403
18:
19: Support information and updates available at
20: http://www.scyld.com/network/ethernet.html
21: */
22:
23: /* These identify the driver base version and may not be removed. */
24: static const char version1[] =
25: "intel-gige.c:v0.14 11/17/2002 Written by Donald Becker <[email protected]>\n";
26: static const char version2[] =
27: " http://www.scyld.com/network/ethernet.html\n";
28:
29: /* Automatically extracted configuration info:
30: probe-func: igige_probe
31: config-in: tristate 'Intel PCI Gigabit Ethernet support' CONFIG_IGIGE
32:
33: c-help-name: Intel PCI Gigabit Ethernet support
34: c-help-symbol: CONFIG_IGIGE
35: c-help: This driver is for the Intel PCI Gigabit Ethernet
36: c-help: adapter series.
37: c-help: More specific information and updates are available from
38: c-help: http://www.scyld.com/network/drivers.html
39: */
40:
41: /* The user-configurable values.
42: These may be modified when a driver module is loaded.*/
43:
44: /* Message enable level: 0..31 = no..all messages. See NETIF_MSG docs. */
45: static int debug = 2;
46:
47: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48: static int max_interrupt_work = 20;
49:
50: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
51: This chip has a 16 element perfect filter, and an unusual 4096 bit
52: hash filter based directly on address bits, not the Ethernet CRC.
53: It is costly to recalculate a large, frequently changing table.
54: However even a large table may useful in some nearly-static environments.
55: */
56: static int multicast_filter_limit = 15;
57:
58: /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
59: Setting to > 1518 effectively disables this feature. */
60: static int rx_copybreak = 0;
61:
62: /* Used to pass the media type, etc.
63: The media type is passed in 'options[]'. The full_duplex[] table only
64: allows the duplex to be forced on, implicitly disabling autonegotiation.
65: Setting the entry to zero still allows a link to autonegotiate to full
66: duplex.
67: */
68: #define MAX_UNITS 8 /* More are supported, limit only on options */
69: static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
70: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
71:
72: /* The delay before announcing a Rx or Tx has completed. */
73: static int rx_intr_holdoff = 0;
74: static int tx_intr_holdoff = 128;
75:
76: /* Operational parameters that are set at compile time. */
77:
78: /* Keep the ring sizes a power of two to avoid divides.
79: The compiler will convert <unsigned>'%'<2^N> into a bit mask.
80: Making the Tx ring too large decreases the effectiveness of channel
81: bonding and packet priority.
82: There are no ill effects from too-large receive rings. */
83: #if ! defined(final_version) /* Stress the driver. */
84: #define TX_RING_SIZE 8
85: #define TX_QUEUE_LEN 5
86: #define RX_RING_SIZE 4
87: #else
88: #define TX_RING_SIZE 16
89: #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
90: #define RX_RING_SIZE 32
91: #endif
92:
93: /* Operational parameters that usually are not changed. */
94: /* Time in jiffies before concluding the transmitter is hung. */
95: #define TX_TIMEOUT (6*HZ)
96:
97: /* Allocation size of Rx buffers with normal sized Ethernet frames.
98: Do not change this value without good reason. This is not a limit,
99: but a way to keep a consistent allocation size among drivers.
100: */
101: #define PKT_BUF_SZ 1536
102:
103: #ifndef __KERNEL__
104: #define __KERNEL__
105: #endif
106: #if !defined(__OPTIMIZE__)
107: #warning You must compile this file with the correct options!
108: #warning See the last lines of the source file.
109: #error You must compile this driver with "-O".
110: #endif
111:
112: /* Include files, designed to support most kernel versions 2.0.0 and later. */
113: #include <linux/config.h>
114: #if defined(CONFIG_SMP) && ! defined(__SMP__)
115: #define __SMP__
116: #endif
117: #if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)
118: #define MODVERSIONS
119: #endif
120:
121: #include <linux/version.h>
122: #if defined(MODVERSIONS)
123: #include <linux/modversions.h>
124: #endif
125: #include <linux/module.h>
126:
127: #include <linux/kernel.h>
128: #include <linux/string.h>
129: #include <linux/timer.h>
130: #include <linux/errno.h>
131: #include <linux/ioport.h>
132: #if LINUX_VERSION_CODE >= 0x20400
133: #include <linux/slab.h>
134: #else
135: #include <linux/malloc.h>
136: #endif
137: #include <linux/interrupt.h>
138: #include <linux/pci.h>
139: #include <linux/netdevice.h>
140: #include <linux/etherdevice.h>
141: #include <linux/skbuff.h>
142: #include <asm/processor.h> /* Processor type for cache alignment. */
143: #include <asm/bitops.h>
144: #include <asm/io.h>
145:
146: #ifdef INLINE_PCISCAN
147: #include "k_compat.h"
148: #else
149: #include "pci-scan.h"
150: #include "kern_compat.h"
151: #endif
152:
153: /* Condensed operations for readability. */
154: #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
155: #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
156:
157: #if (LINUX_VERSION_CODE >= 0x20100) && defined(MODULE)
158: char kernel_version[] = UTS_RELEASE;
159: #endif
160:
161: MODULE_AUTHOR("Donald Becker <[email protected]>");
162: MODULE_DESCRIPTION("Intel Gigabit Ethernet driver");
163: MODULE_LICENSE("GPL");
164: MODULE_PARM(debug, "i");
165: MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
166: MODULE_PARM(rx_copybreak, "i");
167: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
168: MODULE_PARM(multicast_filter_limit, "i");
169: MODULE_PARM(max_interrupt_work, "i");
170: MODULE_PARM_DESC(debug, "Driver message level (0-31)");
171: MODULE_PARM_DESC(options, "Force transceiver type or fixed speed+duplex");
172: MODULE_PARM_DESC(max_interrupt_work,
173: "Driver maximum events handled per interrupt");
174: MODULE_PARM_DESC(full_duplex,
175: "Non-zero to set forced full duplex (deprecated).");
176: MODULE_PARM_DESC(rx_copybreak,
177: "Breakpoint in bytes for copy-only-tiny-frames");
178: MODULE_PARM_DESC(multicast_filter_limit,
179: "Multicast addresses before switching to Rx-all-multicast");
180:
181: /*
182: Theory of Operation
183:
184: I. Board Compatibility
185:
186: This driver is for the Intel Gigabit Ethernet adapter.
187:
188: II. Board-specific settings
189:
190: III. Driver operation
191:
192: IIIa. Descriptor Rings
193:
194: This driver uses two statically allocated fixed-size descriptor arrays
195: treated as rings by the hardware. The ring sizes are set at compile time
196: by RX/TX_RING_SIZE.
197:
198: IIIb/c. Transmit/Receive Structure
199:
200: This driver uses a zero-copy receive and transmit scheme.
201: The driver allocates full frame size skbuffs for the Rx ring buffers at
202: open() time and passes the skb->data field to the chip as receive data
203: buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
204: a fresh skbuff is allocated and the frame is copied to the new skbuff.
205: When the incoming frame is larger, the skbuff is passed directly up the
206: protocol stack. Buffers consumed this way are replaced by newly allocated
207: skbuffs in a later phase of receives.
208:
209: The RX_COPYBREAK value is chosen to trade-off the memory wasted by
210: using a full-sized skbuff for small frames vs. the copying costs of larger
211: frames. New boards are typically used in generously configured machines
212: and the underfilled buffers have negligible impact compared to the benefit of
213: a single allocation size, so the default value of zero results in never
214: copying packets. When copying is done, the cost is usually mitigated by using
215: a combined copy/checksum routine. Copying also preloads the cache, which is
216: most useful with small frames.
217:
218: A subtle aspect of the operation is that the IP header at offset 14 in an
219: ethernet frame isn't longword aligned for further processing.
220: When unaligned buffers are permitted by the hardware (and always on copies)
221: frames are put into the skbuff at an offset of "+2", 16-byte aligning
222: the IP header.
223:
224: IIId. Synchronization
225:
226: The driver runs as two independent, single-threaded flows of control.
227: One is the send-packet routine which is single-threaded by the queue
228: layer. The other thread is the interrupt handler, which is single
229: threaded by the hardware and interrupt handling software.
230:
231: The send packet thread has partial control over the Tx ring. At the
232: start of a transmit attempt netif_pause_tx_queue(dev) is called. If the
233: transmit attempt fills the Tx queue controlled by the chip, the driver
234: informs the software queue layer by not calling
235: netif_unpause_tx_queue(dev) on exit.
236:
237: The interrupt handler has exclusive control over the Rx ring and records stats
238: from the Tx ring. After reaping the stats, it marks the Tx queue entry as
239: empty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, it
240: clears both the tx_full and tbusy flags.
241:
242: IIId. SMP semantics
243:
244: The following are serialized with respect to each other via the "xmit_lock".
245: dev->hard_start_xmit() Transmit a packet
246: dev->tx_timeout() Transmit watchdog for stuck Tx
247: dev->set_multicast_list() Set the recieve filter.
248: Note: The Tx timeout watchdog code is implemented by the timer routine in
249: kernels up to 2.2.*. In 2.4.* and later the timeout code is part of the
250: driver interface.
251:
252: The following fall under the global kernel lock. The module will not be
253: unloaded during the call, unless a call with a potential reschedule e.g.
254: kmalloc() is called. No other synchronization assertion is made.
255: dev->open()
256: dev->do_ioctl()
257: dev->get_stats()
258: Caution: The lock for dev->open() is commonly broken with request_irq() or
259: kmalloc(). It is best to avoid any lock-breaking call in do_ioctl() and
260: get_stats(), or additional module locking code must be implemented.
261:
262: The following is self-serialized (no simultaneous entry)
263: An handler registered with request_irq().
264:
265: IV. Notes
266:
267: IVb. References
268:
269: Intel has also released a Linux driver for this product, "e1000".
270:
271: IVc. Errata
272:
273: */
274:
275:
276:
277: static void *igige_probe1(struct pci_dev *pdev, void *init_dev,
278: long ioaddr, int irq, int chip_idx, int find_cnt);
279: static int netdev_pwr_event(void *dev_instance, int event);
280: enum chip_capability_flags { CanHaveMII=1, };
281: #define PCI_IOTYPE ()
282:
283: static struct pci_id_info pci_id_tbl[] = {
284: {"Intel Gigabit Ethernet adapter", {0x10008086, 0xffffffff, },
285: PCI_USES_MASTER | PCI_USES_MEM | PCI_ADDR0, 0x1ffff, 0},
286: {0,}, /* 0 terminated list. */
287: };
288:
289: struct drv_id_info igige_drv_id = {
290: "intel-gige", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_id_tbl,
291: igige_probe1, netdev_pwr_event };
292:
293: /* This hardware only has a PCI memory space BAR, not I/O space. */
294: #ifdef USE_IO_OPS
295: #error This driver only works with PCI memory space access.
296: #endif
297:
298: /* Offsets to the device registers.
299: */
300: enum register_offsets {
301: ChipCtrl=0x00, ChipStatus=0x08, EECtrl=0x10,
302: FlowCtrlAddrLo=0x028, FlowCtrlAddrHi=0x02c, FlowCtrlType=0x030,
303: VLANetherType=0x38,
304:
305: RxAddrCAM=0x040,
306: IntrStatus=0x0C0, /* Interrupt, Clear on Read, AKA ICR */
307: IntrEnable=0x0D0, /* Set enable mask when '1' AKA IMS */
308: IntrDisable=0x0D8, /* Clear enable mask when '1' */
309:
310: RxControl=0x100,
311: RxQ0IntrDelay=0x108, /* Rx list #0 interrupt delay timer. */
312: RxRingPtr=0x110, /* Rx Desc. list #0 base address, 64bits */
313: RxRingLen=0x118, /* Num bytes of Rx descriptors in ring. */
314: RxDescHead=0x120,
315: RxDescTail=0x128,
316:
317: RxQ1IntrDelay=0x130, /* Rx list #1 interrupt delay timer. */
318: RxRing1Ptr=0x138, /* Rx Desc. list #1 base address, 64bits */
319: RxRing1Len=0x140, /* Num bytes of Rx descriptors in ring. */
320: RxDesc1Head=0x148,
321: RxDesc1Tail=0x150,
322:
323: FlowCtrlTimer=0x170, FlowCtrlThrshHi=0x160, FlowCtrlThrshLo=0x168,
324: TxConfigReg=0x178,
325: RxConfigReg=0x180,
326: MulticastArray=0x200,
327:
328: TxControl=0x400,
329: TxQState=0x408, /* 64 bit queue state */
330: TxIPG=0x410, /* Inter-Packet Gap */
331: TxRingPtr=0x420, TxRingLen=0x428,
332: TxDescHead=0x430, TxDescTail=0x438, TxIntrDelay=0x440,
333:
334: RxCRCErrs=0x4000, RxMissed=0x4010,
335:
336: TxStatus=0x408,
337: RxStatus=0x180,
338: };
339:
340: /* Bits in the interrupt status/mask registers. */
341: enum intr_status_bits {
342: IntrTxDone=0x0001, /* Tx packet queued */
343: IntrLinkChange=0x0004, /* Link Status Change */
344: IntrRxSErr=0x0008, /* Rx Symbol/Sequence error */
345: IntrRxEmpty=0x0010, /* Rx queue 0 Empty */
346: IntrRxQ1Empty=0x0020, /* Rx queue 1 Empty */
347: IntrRxDone=0x0080, /* Rx Done, Queue 0*/
348: IntrRxDoneQ1=0x0100, /* Rx Done, Queue 0*/
349: IntrPCIErr=0x0200, /* PCI Bus Error */
350:
351: IntrTxEmpty=0x0002, /* Guess */
352: StatsMax=0x1000, /* Unknown */
353: };
354:
355: /* Bits in the RxFilterMode register. */
356: enum rx_mode_bits {
357: RxCtrlReset=0x01, RxCtrlEnable=0x02, RxCtrlAllUnicast=0x08,
358: RxCtrlAllMulticast=0x10,
359: RxCtrlLoopback=0xC0, /* We never configure loopback */
360: RxCtrlAcceptBroadcast=0x8000,
361: /* Aliased names.*/
362: AcceptAllPhys=0x08, AcceptAllMulticast=0x10, AcceptBroadcast=0x8000,
363: AcceptMyPhys=0,
364: AcceptMulticast=0,
365: };
366:
367: /* The Rx and Tx buffer descriptors. */
368: struct rx_desc {
369: u32 buf_addr;
370: u32 buf_addr_hi;
371: u32 csum_length; /* Checksum and length */
372: u32 status; /* Errors and status. */
373: };
374:
375: struct tx_desc {
376: u32 buf_addr;
377: u32 buf_addr_hi;
378: u32 cmd_length;
379: u32 status; /* And errors */
380: };
381:
382: /* Bits in tx_desc.cmd_length */
383: enum tx_cmd_bits {
384: TxDescEndPacket=0x02000000, TxCmdIntrDelay=0x80000000,
385: TxCmdAddCRC=0x02000000, TxCmdDoTx=0x13000000,
386: };
387: enum tx_status_bits {
388: TxDescDone=0x0001, TxDescEndPkt=0x0002,
389: };
390:
391: /* Bits in tx_desc.status */
392: enum rx_status_bits {
393: RxDescDone=0x0001, RxDescEndPkt=0x0002,
394: };
395:
396:
397: #define PRIV_ALIGN 15 /* Required alignment mask */
398: /* Use __attribute__((aligned (L1_CACHE_BYTES))) to maintain alignment
399: within the structure. */
400: struct netdev_private {
401: struct net_device *next_module; /* Link for devices of this type. */
402: void *priv_addr; /* Unaligned address for kfree */
403: const char *product_name;
404: /* The addresses of receive-in-place skbuffs. */
405: struct sk_buff* rx_skbuff[RX_RING_SIZE];
406: /* The saved address of a sent-in-place packet/buffer, for later free(). */
407: struct sk_buff* tx_skbuff[TX_RING_SIZE];
408: struct net_device_stats stats;
409: struct timer_list timer; /* Media monitoring timer. */
410: /* Keep frequently used values adjacent for cache effect. */
411: int msg_level;
412: int chip_id, drv_flags;
413: struct pci_dev *pci_dev;
414: int max_interrupt_work;
415: int intr_enable;
416: long in_interrupt; /* Word-long for SMP locks. */
417:
418: struct rx_desc *rx_ring;
419: struct rx_desc *rx_head_desc;
420: unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
421: unsigned int rx_buf_sz; /* Based on MTU+slack. */
422: int rx_copybreak;
423:
424: struct tx_desc *tx_ring;
425: unsigned int cur_tx, dirty_tx;
426: unsigned int tx_full:1; /* The Tx queue is full. */
427:
428: unsigned int rx_mode;
429: unsigned int tx_config;
430: int multicast_filter_limit;
431: /* These values track the transceiver/media in use. */
432: unsigned int full_duplex:1; /* Full-duplex operation requested. */
433: unsigned int duplex_lock:1;
434: unsigned int medialock:1; /* Do not sense media. */
435: unsigned int default_port; /* Last dev->if_port value. */
436: };
437:
438: static int eeprom_read(long ioaddr, int location);
439: static int netdev_open(struct net_device *dev);
440: static int change_mtu(struct net_device *dev, int new_mtu);
441: static void check_duplex(struct net_device *dev);
442: static void netdev_timer(unsigned long data);
443: static void tx_timeout(struct net_device *dev);
444: static void init_ring(struct net_device *dev);
445: static int start_tx(struct sk_buff *skb, struct net_device *dev);
446: static void intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
447: static void netdev_error(struct net_device *dev, int intr_status);
448: static int netdev_rx(struct net_device *dev);
449: static void netdev_error(struct net_device *dev, int intr_status);
450: static void set_rx_mode(struct net_device *dev);
451: static struct net_device_stats *get_stats(struct net_device *dev);
452: static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
453: static int netdev_close(struct net_device *dev);
454:
455:
456:
457: /* A list of our installed devices, for removing the driver module. */
458: static struct net_device *root_net_dev = NULL;
459:
460: #ifndef MODULE
461: int igige_probe(struct net_device *dev)
462: {
463: if (pci_drv_register(&igige_drv_id, dev) < 0)
464: return -ENODEV;
465: printk(KERN_INFO "%s" KERN_INFO "%s", version1, version2);
466: return 0;
467: }
468: #endif
469:
470: static void *igige_probe1(struct pci_dev *pdev, void *init_dev,
471: long ioaddr, int irq, int chip_idx, int card_idx)
472: {
473: struct net_device *dev;
474: struct netdev_private *np;
475: void *priv_mem;
476: int i, option = card_idx < MAX_UNITS ? options[card_idx] : 0;
477:
478: dev = init_etherdev(init_dev, 0);
479: if (!dev)
480: return NULL;
481:
482: printk(KERN_INFO "%s: %s at 0x%lx, ",
483: dev->name, pci_id_tbl[chip_idx].name, ioaddr);
484:
485: for (i = 0; i < 3; i++)
486: ((u16*)dev->dev_addr)[i] = le16_to_cpu(eeprom_read(ioaddr, i));
487: for (i = 0; i < 5; i++)
488: printk("%2.2x:", dev->dev_addr[i]);
489: printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
490:
491: /* Make certain elements e.g. descriptor lists are aligned. */
492: priv_mem = kmalloc(sizeof(*np) + PRIV_ALIGN, GFP_KERNEL);
493: /* Check for the very unlikely case of no memory. */
494: if (priv_mem == NULL)
495: return NULL;
496:
497: /* Do bogusness checks before this point.
498: We do a request_region() only to register /proc/ioports info. */
499: request_region(ioaddr, pci_id_tbl[chip_idx].io_size, dev->name);
500:
501: /* Reset the chip to erase previous misconfiguration. */
502: writel(0x04000000, ioaddr + ChipCtrl);
503:
504: dev->base_addr = ioaddr;
505: dev->irq = irq;
506:
507: dev->priv = np = (void *)(((long)priv_mem + PRIV_ALIGN) & ~PRIV_ALIGN);
508: memset(np, 0, sizeof(*np));
509: np->priv_addr = priv_mem;
510:
511: np->next_module = root_net_dev;
512: root_net_dev = dev;
513:
514: np->pci_dev = pdev;
515: np->chip_id = chip_idx;
516: np->drv_flags = pci_id_tbl[chip_idx].drv_flags;
517: np->msg_level = (1 << debug) - 1;
518: np->rx_copybreak = rx_copybreak;
519: np->max_interrupt_work = max_interrupt_work;
520: np->multicast_filter_limit = multicast_filter_limit;
521:
522: if (dev->mem_start)
523: option = dev->mem_start;
524:
525: /* The lower four bits are the media type. */
526: if (option > 0) {
527: if (option & 0x2220)
528: np->full_duplex = 1;
529: np->default_port = option & 0x3330;
530: if (np->default_port)
531: np->medialock = 1;
532: }
533: if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
534: np->full_duplex = 1;
535:
536: if (np->full_duplex)
537: np->duplex_lock = 1;
538:
539: #if ! defined(final_version) /* Dump the EEPROM contents during development. */
540: if (np->msg_level & NETIF_MSG_MISC) {
541: int sum = 0;
542: for (i = 0; i < 0x40; i++) {
543: int eeval = eeprom_read(ioaddr, i);
544: printk("%4.4x%s", eeval, i % 16 != 15 ? " " : "\n");
545: sum += eeval;
546: }
547: printk(KERN_DEBUG "%s: EEPROM checksum %4.4X (expected value 0xBABA).\n",
548: dev->name, sum & 0xffff);
549: }
550: #endif
551:
552: /* The chip-specific entries in the device structure. */
553: dev->open = &netdev_open;
554: dev->hard_start_xmit = &start_tx;
555: dev->stop = &netdev_close;
556: dev->get_stats = &get_stats;
557: dev->set_multicast_list = &set_rx_mode;
558: dev->do_ioctl = &mii_ioctl;
559: dev->change_mtu = &change_mtu;
560:
561: /* Turn off VLAN and clear the VLAN filter. */
562: writel(0x04000000, ioaddr + VLANetherType);
563: for (i = 0x600; i < 0x800; i+=4)
564: writel(0, ioaddr + i);
565: np->tx_config = 0x80000020;
566: writel(np->tx_config, ioaddr + TxConfigReg);
567: {
568: int eeword10 = eeprom_read(ioaddr, 10);
569: writel(((eeword10 & 0x01e0) << 17) | ((eeword10 & 0x0010) << 3),
570: ioaddr + ChipCtrl);
571: }
572:
573: return dev;
574: }
575:
576:
577: /* Read the EEPROM interface with a serial bit streams generated by the
578: host processor.
579: The example below is for the common 93c46 EEPROM, 64 16 bit words. */
580:
581: /* Delay between EEPROM clock transitions.
582: The effectivly flushes the write cache to prevent quick double-writes.
583: */
584: #define eeprom_delay(ee_addr) readl(ee_addr)
585:
586: enum EEPROM_Ctrl_Bits {
587: EE_ShiftClk=0x01, EE_ChipSelect=0x02, EE_DataIn=0x08, EE_DataOut=0x04,
588: };
589: #define EE_Write0 (EE_ChipSelect)
590: #define EE_Write1 (EE_ChipSelect | EE_DataOut)
591:
592: /* The EEPROM commands include the alway-set leading bit. */
593: enum EEPROM_Cmds { EE_WriteCmd=5, EE_ReadCmd=6, EE_EraseCmd=7, };
594:
595: static int eeprom_read(long addr, int location)
596: {
597: int i;
598: int retval = 0;
599: long ee_addr = addr + EECtrl;
600: int read_cmd = ((EE_ReadCmd<<6) | location) << 16 ;
601: int cmd_len = 2+6+16;
602: u32 baseval = readl(ee_addr) & ~0x0f;
603:
604: writel(EE_Write0 | baseval, ee_addr);
605:
606: /* Shift the read command bits out. */
607: for (i = cmd_len; i >= 0; i--) {
608: int dataval = baseval |
609: ((read_cmd & (1 << i)) ? EE_Write1 : EE_Write0);
610: writel(dataval, ee_addr);
611: eeprom_delay(ee_addr);
612: writel(dataval | EE_ShiftClk, ee_addr);
613: eeprom_delay(ee_addr);
614: retval = (retval << 1) | ((readl(ee_addr) & EE_DataIn) ? 1 : 0);
615: }
616:
617: /* Terminate the EEPROM access. */
618: writel(baseval | EE_Write0, ee_addr);
619: writel(baseval & ~EE_ChipSelect, ee_addr);
620: return retval;
621: }
622:
623:
624:
625: static int netdev_open(struct net_device *dev)
626: {
627: struct netdev_private *np = (struct netdev_private *)dev->priv;
628: long ioaddr = dev->base_addr;
629:
630: /* Some chips may need to be reset. */
631:
632: MOD_INC_USE_COUNT;
633:
634: if (np->tx_ring == 0)
635: np->tx_ring = (void *)get_free_page(GFP_KERNEL);
636: if (np->tx_ring == 0)
637: return -ENOMEM;
638: if (np->rx_ring == 0)
639: np->rx_ring = (void *)get_free_page(GFP_KERNEL);
640: if (np->tx_ring == 0) {
641: free_page((long)np->tx_ring);
642: return -ENOMEM;
643: }
644:
645: /* Note that both request_irq() and init_ring() call kmalloc(), which
646: break the global kernel lock protecting this routine. */
647: if (request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev)) {
648: MOD_DEC_USE_COUNT;
649: return -EAGAIN;
650: }
651:
652: if (np->msg_level & NETIF_MSG_IFUP)
653: printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
654: dev->name, dev->irq);
655:
656: init_ring(dev);
657:
658: writel(0, ioaddr + RxControl);
659: writel(virt_to_bus(np->rx_ring), ioaddr + RxRingPtr);
660: #if ADDRLEN == 64
661: writel(virt_to_bus(np->rx_ring) >> 32, ioaddr + RxRingPtr + 4);
662: #else
663: writel(0, ioaddr + RxRingPtr + 4);
664: #endif
665:
666: writel(RX_RING_SIZE * sizeof(struct rx_desc), ioaddr + RxRingLen);
667: writel(0x80000000 | rx_intr_holdoff, ioaddr + RxQ0IntrDelay);
668: writel(0, ioaddr + RxDescHead);
669: writel(np->dirty_rx + RX_RING_SIZE, ioaddr + RxDescTail);
670:
671: /* Zero the unused Rx ring #1. */
672: writel(0, ioaddr + RxQ1IntrDelay);
673: writel(0, ioaddr + RxRing1Ptr);
674: writel(0, ioaddr + RxRing1Ptr + 4);
675: writel(0, ioaddr + RxRing1Len);
676: writel(0, ioaddr + RxDesc1Head);
677: writel(0, ioaddr + RxDesc1Tail);
678:
679: /* Use 0x002000FA for half duplex. */
680: writel(0x000400FA, ioaddr + TxControl);
681:
682: writel(virt_to_bus(np->tx_ring), ioaddr + TxRingPtr);
683: #if ADDRLEN == 64
684: writel(virt_to_bus(np->tx_ring) >> 32, ioaddr + TxRingPtr + 4);
685: #else
686: writel(0, ioaddr + TxRingPtr + 4);
687: #endif
688:
689: writel(TX_RING_SIZE * sizeof(struct tx_desc), ioaddr + TxRingLen);
690: writel(0, ioaddr + TxDescHead);
691: writel(0, ioaddr + TxDescTail);
692: writel(0, ioaddr + TxQState);
693: writel(0, ioaddr + TxQState + 4);
694:
695: /* Set IPG register with Ethernet standard values. */
696: writel(0x00A0080A, ioaddr + TxIPG);
697: /* The delay before announcing a Tx has completed. */
698: writel(tx_intr_holdoff, ioaddr + TxIntrDelay);
699:
700: writel(((u32*)dev->dev_addr)[0], ioaddr + RxAddrCAM);
701: writel(0x80000000 | ((((u32*)dev->dev_addr)[1]) & 0xffff),
702: ioaddr + RxAddrCAM + 4);
703:
704: /* Initialize other registers. */
705: /* Configure the PCI bus bursts and FIFO thresholds. */
706:
707: if (dev->if_port == 0)
708: dev->if_port = np->default_port;
709:
710: np->in_interrupt = 0;
711:
712: np->rx_mode = RxCtrlEnable;
713: set_rx_mode(dev);
714:
715: /* Tx mode */
716: np->tx_config = 0x80000020;
717: writel(np->tx_config, ioaddr + TxConfigReg);
718:
719: /* Flow control */
720: writel(0x00C28001, ioaddr + FlowCtrlAddrLo);
721: writel(0x00000100, ioaddr + FlowCtrlAddrHi);
722: writel(0x8808, ioaddr + FlowCtrlType);
723: writel(0x0100, ioaddr + FlowCtrlTimer);
724: writel(0x8000, ioaddr + FlowCtrlThrshHi);
725: writel(0x4000, ioaddr + FlowCtrlThrshLo);
726:
727: netif_start_tx_queue(dev);
728:
729: /* Enable interrupts by setting the interrupt mask. */
730: writel(IntrTxDone | IntrLinkChange | IntrRxDone | IntrPCIErr
731: | IntrRxEmpty | IntrRxSErr, ioaddr + IntrEnable);
732:
733: /* writel(1, dev->base_addr + RxCmd);*/
734:
735: if (np->msg_level & NETIF_MSG_IFUP)
736: printk(KERN_DEBUG "%s: Done netdev_open(), status: %x Rx %x Tx %x.\n",
737: dev->name, (int)readl(ioaddr + ChipStatus),
738: (int)readl(ioaddr + RxStatus), (int)readl(ioaddr + TxStatus));
739:
740: /* Set the timer to check for link beat. */
741: init_timer(&np->timer);
742: np->timer.expires = jiffies + 3*HZ;
743: np->timer.data = (unsigned long)dev;
744: np->timer.function = &netdev_timer; /* timer handler */
745: add_timer(&np->timer);
746:
747: return 0;
748: }
749:
750: /* Update for jumbo frames...
751: Changing the MTU while active is not allowed.
752: */
753: static int change_mtu(struct net_device *dev, int new_mtu)
754: {
755: if ((new_mtu < 68) || (new_mtu > 1500))
756: return -EINVAL;
757: if (netif_running(dev))
758: return -EBUSY;
759: dev->mtu = new_mtu;
760: return 0;
761: }
762:
763: static void check_duplex(struct net_device *dev)
764: {
765: struct netdev_private *np = (struct netdev_private *)dev->priv;
766: long ioaddr = dev->base_addr;
767: int chip_ctrl = readl(ioaddr + ChipCtrl);
768: int rx_cfg = readl(ioaddr + RxConfigReg);
769: int tx_cfg = readl(ioaddr + TxConfigReg);
770: #if 0
771: int chip_status = readl(ioaddr + ChipStatus);
772: #endif
773:
774: if (np->msg_level & NETIF_MSG_LINK)
775: printk(KERN_DEBUG "%s: Link changed status. Ctrl %x rxcfg %8.8x "
776: "txcfg %8.8x.\n",
777: dev->name, chip_ctrl, rx_cfg, tx_cfg);
778: if (np->medialock) {
779: if (np->full_duplex)
780: ;
781: }
782: /* writew(new_tx_mode, ioaddr + TxMode); */
783: }
784:
785: static void netdev_timer(unsigned long data)
786: {
787: struct net_device *dev = (struct net_device *)data;
788: struct netdev_private *np = (struct netdev_private *)dev->priv;
789: long ioaddr = dev->base_addr;
790: int next_tick = 10*HZ;
791:
792: if (np->msg_level & NETIF_MSG_TIMER) {
793: printk(KERN_DEBUG "%s: Media selection timer tick, status %8.8x, "
794: "Tx %x Rx %x.\n",
795: dev->name, (int)readl(ioaddr + ChipStatus),
796: (int)readl(ioaddr + TxStatus), (int)readl(ioaddr + RxStatus));
797: }
798: /* This will either have a small false-trigger window or will not catch
799: tbusy incorrectly set when the queue is empty. */
800: if ((jiffies - dev->trans_start) > TX_TIMEOUT &&
801: (np->cur_tx - np->dirty_tx > 0 ||
802: netif_queue_paused(dev)) ) {
803: tx_timeout(dev);
804: }
805: check_duplex(dev);
806: np->timer.expires = jiffies + next_tick;
807: add_timer(&np->timer);
808: }
809:
810: static void tx_timeout(struct net_device *dev)
811: {
812: struct netdev_private *np = (struct netdev_private *)dev->priv;
813: long ioaddr = dev->base_addr;
814:
815: printk(KERN_WARNING "%s: Transmit timed out, status %8.8x,"
816: " resetting...\n", dev->name, (int)readl(ioaddr + ChipStatus));
817:
818: #ifndef __alpha__
819: if (np->msg_level & NETIF_MSG_TX_ERR) {
820: int i;
821: printk(KERN_DEBUG " Tx registers: ");
822: for (i = 0x400; i < 0x444; i += 8)
823: printk(" %8.8x", (int)readl(ioaddr + i));
824: printk("\n"KERN_DEBUG " Rx ring %p: ", np->rx_ring);
825: for (i = 0; i < RX_RING_SIZE; i++)
826: printk(" %8.8x", (unsigned int)np->rx_ring[i].status);
827: printk("\n"KERN_DEBUG" Tx ring %p: ", np->tx_ring);
828: for (i = 0; i < TX_RING_SIZE; i++)
829: printk(" %4.4x", np->tx_ring[i].status);
830: printk("\n");
831: }
832: #endif
833:
834: /* Perhaps we should reinitialize the hardware here. */
835: dev->if_port = 0;
836: /* Stop and restart the chip's Tx processes . */
837:
838: /* Trigger an immediate transmit demand. */
839:
840: dev->trans_start = jiffies;
841: np->stats.tx_errors++;
842: return;
843: }
844:
845:
846: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
847: static void init_ring(struct net_device *dev)
848: {
849: struct netdev_private *np = (struct netdev_private *)dev->priv;
850: int i;
851:
852: np->tx_full = 0;
853: np->cur_rx = np->cur_tx = 0;
854: np->dirty_rx = np->dirty_tx = 0;
855:
856: np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
857: np->rx_head_desc = &np->rx_ring[0];
858:
859: /* Initialize all Rx descriptors. */
860: for (i = 0; i < RX_RING_SIZE; i++) {
861: np->rx_skbuff[i] = 0;
862: }
863:
864: /* The number of ring descriptors is set by the ring length register,
865: thus the chip does not use 'next_desc' chains. */
866:
867: /* Fill in the Rx buffers. Allocation failures are acceptable. */
868: for (i = 0; i < RX_RING_SIZE; i++) {
869: struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
870: np->rx_skbuff[i] = skb;
871: if (skb == NULL)
872: break;
873: skb->dev = dev; /* Mark as being used by this device. */
874: skb_reserve(skb, 2); /* 16 byte align the IP header. */
875: np->rx_ring[i].buf_addr = virt_to_le32desc(skb->tail);
876: np->rx_ring[i].buf_addr_hi = 0;
877: np->rx_ring[i].status = 0;
878: }
879: np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
880:
881: for (i = 0; i < TX_RING_SIZE; i++) {
882: np->tx_skbuff[i] = 0;
883: np->tx_ring[i].status = 0;
884: }
885: return;
886: }
887:
888: static int start_tx(struct sk_buff *skb, struct net_device *dev)
889: {
890: struct netdev_private *np = (struct netdev_private *)dev->priv;
891: unsigned entry;
892:
893: /* Block a timer-based transmit from overlapping. This happens when
894: packets are presumed lost, and we use this check the Tx status. */
895: if (netif_pause_tx_queue(dev) != 0) {
896: /* This watchdog code is redundant with the media monitor timer. */
897: if (jiffies - dev->trans_start > TX_TIMEOUT)
898: tx_timeout(dev);
899: return 1;
900: }
901:
902: /* Calculate the next Tx descriptor entry. */
903: entry = np->cur_tx % TX_RING_SIZE;
904:
905: np->tx_skbuff[entry] = skb;
906:
907: /* Note: Descriptors may be uncached. Write each field only once. */
908: np->tx_ring[entry].buf_addr = virt_to_le32desc(skb->data);
909: np->tx_ring[entry].buf_addr_hi = 0;
910: np->tx_ring[entry].cmd_length = cpu_to_le32(TxCmdDoTx | skb->len);
911: np->tx_ring[entry].status = 0;
912:
913: /* Non-CC architectures: explicitly flush descriptor and packet.
914: cache_flush(np->tx_ring[entry], sizeof np->tx_ring[entry]);
915: cache_flush(skb->data, skb->len);
916: */
917:
918: np->cur_tx++;
919: if (np->cur_tx - np->dirty_tx >= TX_QUEUE_LEN - 1) {
920: np->tx_full = 1;
921: /* Check for a just-cleared queue. */
922: if (np->cur_tx - (volatile int)np->dirty_tx < TX_QUEUE_LEN - 2) {
923: netif_unpause_tx_queue(dev);
924: np->tx_full = 0;
925: } else
926: netif_stop_tx_queue(dev);
927: } else
928: netif_unpause_tx_queue(dev); /* Typical path */
929:
930: /* Inform the chip we have another Tx. */
931: if (np->msg_level & NETIF_MSG_TX_QUEUED)
932: printk(KERN_DEBUG "%s: Tx queued to slot %d, desc tail now %d "
933: "writing %d.\n",
934: dev->name, entry, (int)readl(dev->base_addr + TxDescTail),
935: np->cur_tx % TX_RING_SIZE);
936: writel(np->cur_tx % TX_RING_SIZE, dev->base_addr + TxDescTail);
937:
938: dev->trans_start = jiffies;
939:
940: if (np->msg_level & NETIF_MSG_TX_QUEUED) {
941: printk(KERN_DEBUG "%s: Transmit frame #%d (%x) queued in slot %d.\n",
942: dev->name, np->cur_tx, (int)virt_to_bus(&np->tx_ring[entry]),
943: entry);
944: }
945: return 0;
946: }
947:
948: /* The interrupt handler does all of the Rx thread work and cleans up
949: after the Tx thread. */
950: static void intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
951: {
952: struct net_device *dev = (struct net_device *)dev_instance;
953: struct netdev_private *np;
954: long ioaddr;
955: int work_limit;
956:
957: ioaddr = dev->base_addr;
958: np = (struct netdev_private *)dev->priv;
959: work_limit = np->max_interrupt_work;
960:
961: #if defined(__i386__) && LINUX_VERSION_CODE < 0x020300
962: /* A lock to prevent simultaneous entry bug on Intel SMP machines. */
963: if (test_and_set_bit(0, (void*)&dev->interrupt)) {
964: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
965: dev->name);
966: dev->interrupt = 0; /* Avoid halting machine. */
967: return;
968: }
969: #endif
970:
971: do {
972: u32 intr_status = readl(ioaddr + IntrStatus);
973:
974: if (np->msg_level & NETIF_MSG_INTR)
975: printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
976: dev->name, intr_status);
977:
978: if (intr_status == 0 || intr_status == 0xffffffff)
979: break;
980:
981: if (intr_status & IntrRxDone)
982: netdev_rx(dev);
983:
984: for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
985: int entry = np->dirty_tx % TX_RING_SIZE;
986: if (np->tx_ring[entry].status == 0)
987: break;
988: if (np->msg_level & NETIF_MSG_TX_DONE)
989: printk(KERN_DEBUG "%s: Transmit done, Tx status %8.8x.\n",
990: dev->name, np->tx_ring[entry].status);
991: np->stats.tx_packets++;
992: #if LINUX_VERSION_CODE > 0x20127
993: np->stats.tx_bytes += np->tx_skbuff[entry]->len;
994: #endif
995: /* Free the original skb. */
996: dev_free_skb_irq(np->tx_skbuff[entry]);
997: np->tx_skbuff[entry] = 0;
998: }
999: /* Note the 4 slot hysteresis to mark the queue non-full. */
1000: if (np->tx_full && np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
1001: /* The ring is no longer full, allow new TX entries. */
1002: np->tx_full = 0;
1003: netif_resume_tx_queue(dev);
1004: }
1005:
1006: /* Abnormal error summary/uncommon events handlers. */
1007: if (intr_status & (IntrPCIErr | IntrLinkChange | StatsMax))
1008: netdev_error(dev, intr_status);
1009:
1010: if (--work_limit < 0) {
1011: printk(KERN_WARNING "%s: Too much work at interrupt, "
1012: "status=0x%4.4x.\n",
1013: dev->name, intr_status);
1014: break;
1015: }
1016: } while (1);
1017:
1018: if (np->msg_level & NETIF_MSG_INTR)
1019: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1020: dev->name, (int)readl(ioaddr + IntrStatus));
1021:
1022: #if defined(__i386__) && LINUX_VERSION_CODE < 0x020300
1023: clear_bit(0, (void*)&dev->interrupt);
1024: #endif
1025: return;
1026: }
1027:
1028: /* This routine is logically part of the interrupt handler, but separated
1029: for clarity and better register allocation. */
1030: static int netdev_rx(struct net_device *dev)
1031: {
1032: struct netdev_private *np = (struct netdev_private *)dev->priv;
1033: int entry = np->cur_rx % RX_RING_SIZE;
1034: int boguscnt = np->dirty_rx + RX_RING_SIZE - np->cur_rx;
1035:
1036: if (np->msg_level & NETIF_MSG_RX_STATUS) {
1037: printk(KERN_DEBUG " In netdev_rx(), entry %d status %4.4x.\n",
1038: entry, np->rx_ring[entry].status);
1039: }
1040:
1041: /* If EOP is set on the next entry, it's a new packet. Send it up. */
1042: while (np->rx_head_desc->status & cpu_to_le32(RxDescDone)) {
1043: struct rx_desc *desc = np->rx_head_desc;
1044: u32 desc_status = le32_to_cpu(desc->status);
1045: int data_size = le32_to_cpu(desc->csum_length);
1046:
1047: if (np->msg_level & NETIF_MSG_RX_STATUS)
1048: printk(KERN_DEBUG " netdev_rx() status was %8.8x.\n",
1049: desc_status);
1050: if (--boguscnt < 0)
1051: break;
1052: if ( ! (desc_status & RxDescEndPkt)) {
1053: printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1054: "multiple buffers, entry %#x length %d status %4.4x!\n",
1055: dev->name, np->cur_rx, data_size, desc_status);
1056: np->stats.rx_length_errors++;
1057: } else {
1058: struct sk_buff *skb;
1059: /* Reported length should omit the CRC. */
1060: int pkt_len = (data_size & 0xffff) - 4;
1061:
1062: #ifndef final_version
1063: if (np->msg_level & NETIF_MSG_RX_STATUS)
1064: printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d"
1065: " of %d, bogus_cnt %d.\n",
1066: pkt_len, data_size, boguscnt);
1067: #endif
1068: /* Check if the packet is long enough to accept without copying
1069: to a minimally-sized skbuff. */
1070: if (pkt_len < np->rx_copybreak
1071: && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1072: skb->dev = dev;
1073: skb_reserve(skb, 2); /* 16 byte align the IP header */
1074: #if HAS_IP_COPYSUM /* Call copy + cksum if available. */
1075: eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0);
1076: skb_put(skb, pkt_len);
1077: #else
1078: memcpy(skb_put(skb, pkt_len), np->rx_skbuff[entry]->tail,
1079: pkt_len);
1080: #endif
1081: } else {
1082: char *temp = skb_put(skb = np->rx_skbuff[entry], pkt_len);
1083: np->rx_skbuff[entry] = NULL;
1084: #ifndef final_version /* Remove after testing. */
1085: if (le32desc_to_virt(np->rx_ring[entry].buf_addr) != temp)
1086: printk(KERN_ERR "%s: Internal fault: The skbuff addresses "
1087: "do not match in netdev_rx: %p vs. %p / %p.\n",
1088: dev->name,
1089: le32desc_to_virt(np->rx_ring[entry].buf_addr),
1090: skb->head, temp);
1091: #endif
1092: }
1093: #ifndef final_version /* Remove after testing. */
1094: /* You will want this info for the initial debug. */
1095: if (np->msg_level & NETIF_MSG_PKTDATA)
1096: printk(KERN_DEBUG " Rx data %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:"
1097: "%2.2x %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x %2.2x%2.2x "
1098: "%d.%d.%d.%d.\n",
1099: skb->data[0], skb->data[1], skb->data[2], skb->data[3],
1100: skb->data[4], skb->data[5], skb->data[6], skb->data[7],
1101: skb->data[8], skb->data[9], skb->data[10],
1102: skb->data[11], skb->data[12], skb->data[13],
1103: skb->data[14], skb->data[15], skb->data[16],
1104: skb->data[17]);
1105: #endif
1106: skb->protocol = eth_type_trans(skb, dev);
1107: /* Note: checksum -> skb->ip_summed = CHECKSUM_UNNECESSARY; */
1108: netif_rx(skb);
1109: dev->last_rx = jiffies;
1110: np->stats.rx_packets++;
1111: #if LINUX_VERSION_CODE > 0x20127
1112: np->stats.rx_bytes += pkt_len;
1113: #endif
1114: }
1115: entry = (++np->cur_rx) % RX_RING_SIZE;
1116: np->rx_head_desc = &np->rx_ring[entry];
1117: }
1118:
1119: /* Refill the Rx ring buffers. */
1120: for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1121: struct sk_buff *skb;
1122: entry = np->dirty_rx % RX_RING_SIZE;
1123: if (np->rx_skbuff[entry] == NULL) {
1124: skb = dev_alloc_skb(np->rx_buf_sz);
1125: np->rx_skbuff[entry] = skb;
1126: if (skb == NULL)
1127: break; /* Better luck next round. */
1128: skb->dev = dev; /* Mark as being used by this device. */
1129: skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1130: np->rx_ring[entry].buf_addr = virt_to_le32desc(skb->tail);
1131: }
1132: np->rx_ring[entry].status = 0;
1133: }
1134:
1135: /* Restart Rx engine if stopped. */
1136: /* writel(1, dev->base_addr + RxCmd); */
1137: return 0;
1138: }
1139:
1140: static void netdev_error(struct net_device *dev, int intr_status)
1141: {
1142: long ioaddr = dev->base_addr;
1143: struct netdev_private *np = (struct netdev_private *)dev->priv;
1144:
1145: if (intr_status & IntrLinkChange) {
1146: int chip_ctrl = readl(ioaddr + ChipCtrl);
1147: if (np->msg_level & NETIF_MSG_LINK)
1148: printk(KERN_ERR "%s: Link changed: Autonegotiation on-going.\n",
1149: dev->name);
1150: if (chip_ctrl & 1)
1151: netif_link_up(dev);
1152: else
1153: netif_link_down(dev);
1154: check_duplex(dev);
1155: }
1156: if (intr_status & StatsMax) {
1157: get_stats(dev);
1158: }
1159: if ((intr_status & ~(IntrLinkChange|StatsMax))
1160: && (np->msg_level & NETIF_MSG_DRV))
1161: printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1162: dev->name, intr_status);
1163: /* Hmmmmm, it's not clear how to recover from PCI faults. */
1164: if (intr_status & IntrPCIErr)
1165: np->stats.tx_fifo_errors++;
1166: }
1167:
1168: static struct net_device_stats *get_stats(struct net_device *dev)
1169: {
1170: long ioaddr = dev->base_addr;
1171: struct netdev_private *np = (struct netdev_private *)dev->priv;
1172: int crc_errs = readl(ioaddr + RxCRCErrs);
1173:
1174: if (crc_errs != 0xffffffff) {
1175: /* We need not lock this segment of code for SMP.
1176: The non-atomic-add vulnerability is very small
1177: and statistics are non-critical. */
1178: np->stats.rx_crc_errors += readl(ioaddr + RxCRCErrs);
1179: np->stats.rx_missed_errors += readl(ioaddr + RxMissed);
1180: }
1181:
1182: return &np->stats;
1183: }
1184:
1185: /* The little-endian AUTODIN II ethernet CRC calculations.
1186: A big-endian version is also available.
1187: This is slow but compact code. Do not use this routine for bulk data,
1188: use a table-based routine instead.
1189: This is common code and should be moved to net/core/crc.c.
1190: Chips may use the upper or lower CRC bits, and may reverse and/or invert
1191: them. Select the endian-ness that results in minimal calculations.
1192: */
1193: static unsigned const ethernet_polynomial_le = 0xedb88320U;
1194: static inline unsigned ether_crc_le(int length, unsigned char *data)
1195: {
1196: unsigned int crc = 0xffffffff; /* Initial value. */
1197: while(--length >= 0) {
1198: unsigned char current_octet = *data++;
1199: int bit;
1200: for (bit = 8; --bit >= 0; current_octet >>= 1) {
1201: if ((crc ^ current_octet) & 1) {
1202: crc >>= 1;
1203: crc ^= ethernet_polynomial_le;
1204: } else
1205: crc >>= 1;
1206: }
1207: }
1208: return crc;
1209: }
1210:
1211: static void set_rx_mode(struct net_device *dev)
1212: {
1213: long ioaddr = dev->base_addr;
1214: struct netdev_private *np = (struct netdev_private *)dev->priv;
1215: u32 new_mc_filter[128]; /* Multicast filter table */
1216: u32 new_rx_mode = np->rx_mode;
1217:
1218: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1219: /* Unconditionally log net taps. */
1220: printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1221: new_rx_mode |=
1222: RxCtrlAcceptBroadcast | RxCtrlAllMulticast | RxCtrlAllUnicast;
1223: } else if ((dev->mc_count > np->multicast_filter_limit)
1224: || (dev->flags & IFF_ALLMULTI)) {
1225: /* Too many to match, or accept all multicasts. */
1226: new_rx_mode &= ~RxCtrlAllUnicast;
1227: new_rx_mode |= RxCtrlAcceptBroadcast | RxCtrlAllMulticast;
1228: } else {
1229: struct dev_mc_list *mclist;
1230: int i;
1231: memset(new_mc_filter, 0, sizeof(new_mc_filter));
1232: for (i = 0, mclist = dev->mc_list; mclist && i < 15;
1233: i++, mclist = mclist->next) {
1234: writel(((u32*)mclist->dmi_addr)[0], ioaddr + RxAddrCAM + 8 + i*8);
1235: writel((((u32*)mclist->dmi_addr)[1] & 0xffff) | 0x80000000,
1236: ioaddr + RxAddrCAM + 12 + i*8);
1237: }
1238: for (; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
1239: set_bit(((u32*)mclist->dmi_addr)[1] & 0xfff,
1240: new_mc_filter);
1241: }
1242: new_rx_mode &= ~RxCtrlAllUnicast | RxCtrlAllMulticast;
1243: new_rx_mode |= RxCtrlAcceptBroadcast;
1244: if (dev->mc_count > 15)
1245: for (i = 0; i < 128; i++)
1246: writel(new_mc_filter[i], ioaddr + MulticastArray + (i<<2));
1247: }
1248: if (np->rx_mode != new_rx_mode)
1249: writel(np->rx_mode = new_rx_mode, ioaddr + RxControl);
1250: }
1251:
1252: static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1253: {
1254: struct netdev_private *np = (struct netdev_private *)dev->priv;
1255: u32 *data32 = (void *)&rq->ifr_data;
1256:
1257: switch(cmd) {
1258: case SIOCGPARAMS:
1259: data32[0] = np->msg_level;
1260: data32[1] = np->multicast_filter_limit;
1261: data32[2] = np->max_interrupt_work;
1262: data32[3] = np->rx_copybreak;
1263: return 0;
1264: case SIOCSPARAMS:
1265: if (!capable(CAP_NET_ADMIN))
1266: return -EPERM;
1267: np->msg_level = data32[0];
1268: np->multicast_filter_limit = data32[1];
1269: np->max_interrupt_work = data32[2];
1270: np->rx_copybreak = data32[3];
1271: return 0;
1272: default:
1273: return -EOPNOTSUPP;
1274: }
1275: }
1276:
1277: static int netdev_close(struct net_device *dev)
1278: {
1279: long ioaddr = dev->base_addr;
1280: struct netdev_private *np = (struct netdev_private *)dev->priv;
1281: int i;
1282:
1283: netif_stop_tx_queue(dev);
1284:
1285: if (np->msg_level & NETIF_MSG_IFDOWN) {
1286: printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x "
1287: "Rx %4.4x Int %2.2x.\n",
1288: dev->name, (int)readl(ioaddr + TxStatus),
1289: (int)readl(ioaddr + RxStatus), (int)readl(ioaddr + IntrStatus));
1290: printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1291: dev->name, np->cur_tx, np->dirty_tx, np->cur_rx, np->dirty_rx);
1292: }
1293:
1294: /* Disable interrupts by clearing the interrupt mask. */
1295: writel(~0, ioaddr + IntrDisable);
1296: readl(ioaddr + IntrStatus);
1297:
1298: /* Reset everything. */
1299: writel(0x04000000, ioaddr + ChipCtrl);
1300:
1301: del_timer(&np->timer);
1302:
1303: #ifdef __i386__
1304: if (np->msg_level & NETIF_MSG_IFDOWN) {
1305: printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1306: (int)virt_to_bus(np->tx_ring));
1307: for (i = 0; i < TX_RING_SIZE; i++)
1308: printk(" #%d desc. buf %8.8x, length %8.8x, status %8.8x.\n",
1309: i, np->tx_ring[i].buf_addr, np->tx_ring[i].cmd_length,
1310: np->tx_ring[i].status);
1311: printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1312: (int)virt_to_bus(np->rx_ring));
1313: for (i = 0; i < RX_RING_SIZE; i++) {
1314: printk(KERN_DEBUG " #%d desc. %4.4x %4.4x %8.8x\n",
1315: i, np->rx_ring[i].csum_length,
1316: np->rx_ring[i].status, np->rx_ring[i].buf_addr);
1317: if (np->rx_ring[i].buf_addr) {
1318: if (*(u8*)np->rx_skbuff[i]->tail != 0x69) {
1319: u16 *pkt_buf = (void *)np->rx_skbuff[i]->tail;
1320: int j;
1321: for (j = 0; j < 0x50; j++)
1322: printk(" %4.4x", pkt_buf[j]);
1323: printk("\n");
1324: }
1325: }
1326: }
1327: }
1328: #endif /* __i386__ debugging only */
1329:
1330: free_irq(dev->irq, dev);
1331:
1332: /* Free all the skbuffs in the Rx queue. */
1333: for (i = 0; i < RX_RING_SIZE; i++) {
1334: np->rx_ring[i].status = 0;
1335: np->rx_ring[i].buf_addr = 0xBADF00D0; /* An invalid address. */
1336: if (np->rx_skbuff[i]) {
1337: #if LINUX_VERSION_CODE < 0x20100
1338: np->rx_skbuff[i]->free = 1;
1339: #endif
1340: dev_free_skb(np->rx_skbuff[i]);
1341: }
1342: np->rx_skbuff[i] = 0;
1343: }
1344: for (i = 0; i < TX_RING_SIZE; i++) {
1345: if (np->tx_skbuff[i])
1346: dev_free_skb(np->tx_skbuff[i]);
1347: np->tx_skbuff[i] = 0;
1348: }
1349:
1350: MOD_DEC_USE_COUNT;
1351:
1352: return 0;
1353: }
1354:
1355: static int netdev_pwr_event(void *dev_instance, int event)
1356: {
1357: struct net_device *dev = dev_instance;
1358: struct netdev_private *np = (struct netdev_private *)dev->priv;
1359: long ioaddr = dev->base_addr;
1360:
1361: if (np->msg_level & NETIF_MSG_LINK)
1362: printk(KERN_DEBUG "%s: Handling power event %d.\n", dev->name, event);
1363: switch(event) {
1364: case DRV_ATTACH:
1365: MOD_INC_USE_COUNT;
1366: break;
1367: case DRV_SUSPEND:
1368: /* Disable interrupts, stop Tx and Rx. */
1369: writel(~0, ioaddr + IntrDisable);
1370: /* writel(2, ioaddr + RxCmd); */
1371: /* writew(2, ioaddr + TxCmd); */
1372: break;
1373: case DRV_RESUME:
1374: /* This is incomplete: the actions are very chip specific. */
1375: set_rx_mode(dev);
1376: break;
1377: case DRV_DETACH: {
1378: struct net_device **devp, **next;
1379: if (dev->flags & IFF_UP) {
1380: /* Some, but not all, kernel versions close automatically. */
1381: dev_close(dev);
1382: dev->flags &= ~(IFF_UP|IFF_RUNNING);
1383: }
1384: unregister_netdev(dev);
1385: release_region(dev->base_addr, pci_id_tbl[np->chip_id].io_size);
1386: iounmap((char *)dev->base_addr);
1387: for (devp = &root_net_dev; *devp; devp = next) {
1388: next = &((struct netdev_private *)(*devp)->priv)->next_module;
1389: if (*devp == dev) {
1390: *devp = *next;
1391: break;
1392: }
1393: }
1394: if (np->priv_addr)
1395: kfree(np->priv_addr);
1396: kfree(dev);
1397: MOD_DEC_USE_COUNT;
1398: break;
1399: }
1400: }
1401:
1402: return 0;
1403: }
1404:
1405:
1406: #ifdef MODULE
1407: int init_module(void)
1408: {
1409: /* Emit version even if no cards detected. */
1410: printk(KERN_INFO "%s" KERN_INFO "%s", version1, version2);
1411: return pci_drv_register(&igige_drv_id, NULL);
1412: }
1413:
1414: void cleanup_module(void)
1415: {
1416: struct net_device *next_dev;
1417:
1418: pci_drv_unregister(&igige_drv_id);
1419:
1420: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1421: while (root_net_dev) {
1422: struct netdev_private *np = (void *)(root_net_dev->priv);
1423: unregister_netdev(root_net_dev);
1424: release_region(root_net_dev->base_addr,
1425: pci_id_tbl[np->chip_id].io_size);
1426: iounmap((char *)(root_net_dev->base_addr));
1427: next_dev = np->next_module;
1428: if (np->tx_ring == 0)
1429: free_page((long)np->tx_ring);
1430: if (np->rx_ring == 0)
1431: free_page((long)np->rx_ring);
1432: if (np->priv_addr)
1433: kfree(np->priv_addr);
1434: kfree(root_net_dev);
1435: root_net_dev = next_dev;
1436: }
1437: }
1438:
1439: #endif /* MODULE */
1440:
1441: /*
1442: * Local variables:
1443: * compile-command: "make KERNVER=`uname -r` intel-gige.o"
1444: * compile-cmd: "gcc -DMODULE -Wall -Wstrict-prototypes -O6 -c intel-gige.c"
1445: * simple-compile-command: "gcc -DMODULE -O6 -c intel-gige.c"
1446: * c-indent-level: 4
1447: * c-basic-offset: 4
1448: * tab-width: 4
1449: * End:
1450: */
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