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1.1 root 1: /********************************************************************
2: *
3: * Linux ThunderLAN Driver
4: *
5: * tlan.c
6: * by James Banks
7: *
8: * (C) 1997-1998 Caldera, Inc.
9: * (C) 1998 James Banks
10: *
11: * This software may be used and distributed according to the terms
12: * of the GNU Public License, incorporated herein by reference.
13: *
14: ** This file is best viewed/edited with columns>=132.
15: *
16: ** Useful (if not required) reading:
17: *
18: * Texas Instruments, ThunderLAN Programmer's Guide,
19: * TI Literature Number SPWU013A
20: * available in PDF format from www.ti.com
21: * Level One, LXT901 and LXT970 Data Sheets
22: * available in PDF format from www.level1.com
23: * National Semiconductor, DP83840A Data Sheet
24: * available in PDF format from www.national.com
25: * Microchip Technology, 24C01A/02A/04A Data Sheet
26: * available in PDF format from www.microchip.com
27: *
28: ********************************************************************/
29:
30:
31: #include <linux/module.h>
32:
33: #include "tlan.h"
34:
35: #include <linux/bios32.h>
36: #include <linux/ioport.h>
37: #include <linux/pci.h>
38: #include <linux/etherdevice.h>
39: #include <linux/delay.h>
40:
41:
42:
43: typedef u32 (TLanIntVectorFunc)( struct device *, u16 );
44:
45:
46: #ifdef MODULE
47:
48: static struct device *TLanDevices = NULL;
49: static int TLanDevicesInstalled = 0;
50:
51: #endif
52:
53:
54: static int debug = 0;
55: static int aui = 0;
56: static int sa_int = 0;
57: static int bbuf = 0;
58: static int duplex = 0;
59: static int speed = 0;
60: static u8 *TLanPadBuffer;
61: static char TLanSignature[] = "TLAN";
62: static int TLanVersionMajor = 1;
63: static int TLanVersionMinor = 0;
64:
65:
66: static TLanAdapterEntry TLanAdapterList[] = {
67: { PCI_VENDOR_ID_COMPAQ,
68: PCI_DEVICE_ID_NETELLIGENT_10,
69: "Compaq Netelligent 10 T PCI UTP",
70: TLAN_ADAPTER_ACTIVITY_LED,
71: 0x83
72: },
73: { PCI_VENDOR_ID_COMPAQ,
74: PCI_DEVICE_ID_NETELLIGENT_10_100,
75: "Compaq Netelligent 10/100 TX PCI UTP",
76: TLAN_ADAPTER_ACTIVITY_LED,
77: 0x83
78: },
79: { PCI_VENDOR_ID_COMPAQ,
80: PCI_DEVICE_ID_NETFLEX_3P_INTEGRATED,
81: "Compaq Integrated NetFlex-3/P",
82: TLAN_ADAPTER_NONE,
83: 0x83
84: },
85: { PCI_VENDOR_ID_COMPAQ,
86: PCI_DEVICE_ID_NETFLEX_3P,
87: "Compaq NetFlex-3/P",
88: TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY,
89: 0x83
90: },
91: { PCI_VENDOR_ID_COMPAQ,
92: PCI_DEVICE_ID_NETFLEX_3P_BNC,
93: "Compaq NetFlex-3/P",
94: TLAN_ADAPTER_NONE,
95: 0x83
96: },
97: { PCI_VENDOR_ID_COMPAQ,
98: PCI_DEVICE_ID_NETELLIGENT_10_100_PROLIANT,
99: "Compaq Netelligent Integrated 10/100 TX UTP",
100: TLAN_ADAPTER_NONE,
101: 0x83
102: },
103: { PCI_VENDOR_ID_COMPAQ,
104: PCI_DEVICE_ID_NETELLIGENT_10_100_DUAL,
105: "Compaq Netelligent Dual 10/100 TX PCI UTP",
106: TLAN_ADAPTER_NONE,
107: 0x83
108: },
109: { PCI_VENDOR_ID_COMPAQ,
110: PCI_DEVICE_ID_DESKPRO_4000_5233MMX,
111: "Compaq Netelligent 10/100 TX Embedded UTP",
112: TLAN_ADAPTER_NONE,
113: 0x83
114: },
115: { PCI_VENDOR_ID_OLICOM,
116: PCI_DEVICE_ID_OLICOM_OC2183,
117: "Olicom OC-2183/2185",
118: TLAN_ADAPTER_USE_INTERN_10,
119: 0xF8
120: },
121: { PCI_VENDOR_ID_OLICOM,
122: PCI_DEVICE_ID_OLICOM_OC2325,
123: "Olicom OC-2325",
124: TLAN_ADAPTER_UNMANAGED_PHY,
125: 0xF8
126: },
127: { PCI_VENDOR_ID_OLICOM,
128: PCI_DEVICE_ID_OLICOM_OC2326,
129: "Olicom OC-2326",
130: TLAN_ADAPTER_USE_INTERN_10,
131: 0xF8
132: },
133: { PCI_VENDOR_ID_COMPAQ,
134: PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
135: "Compaq Netelligent 10/100 TX UTP",
136: TLAN_ADAPTER_ACTIVITY_LED,
137: 0x83
138: },
139: { PCI_VENDOR_ID_COMPAQ,
140: PCI_DEVICE_ID_NETELLIGENT_10_T2,
141: "Compaq Netelligent 10 T/2 PCI UTP/Coax",
142: TLAN_ADAPTER_NONE,
143: 0x83
144: },
145: { 0,
146: 0,
147: NULL,
148: 0,
149: 0
150: } /* End of List */
151: };
152:
153:
154: static int TLan_PciProbe( u8 *, u8 *, u8 *, u8 *, u32 *, u32 * );
155: static int TLan_Init( struct device * );
156: static int TLan_Open(struct device *dev);
157: static int TLan_StartTx(struct sk_buff *, struct device *);
158: static void TLan_HandleInterrupt(int, void *, struct pt_regs *);
159: static int TLan_Close(struct device *);
160: static struct net_device_stats *TLan_GetStats( struct device * );
161: static void TLan_SetMulticastList( struct device * );
162:
163: static u32 TLan_HandleInvalid( struct device *, u16 );
164: static u32 TLan_HandleTxEOF( struct device *, u16 );
165: static u32 TLan_HandleStatOverflow( struct device *, u16 );
166: static u32 TLan_HandleRxEOF( struct device *, u16 );
167: static u32 TLan_HandleDummy( struct device *, u16 );
168: static u32 TLan_HandleTxEOC( struct device *, u16 );
169: static u32 TLan_HandleStatusCheck( struct device *, u16 );
170: static u32 TLan_HandleRxEOC( struct device *, u16 );
171:
172: static void TLan_Timer( unsigned long );
173:
174: static void TLan_ResetLists( struct device * );
175: static void TLan_FreeLists( struct device * );
176: static void TLan_PrintDio( u16 );
177: static void TLan_PrintList( TLanList *, char *, int );
178: static void TLan_ReadAndClearStats( struct device *, int );
179: static void TLan_ResetAdapter( struct device * );
180: static void TLan_FinishReset( struct device * );
181: static void TLan_SetMac( struct device *, int areg, char *mac );
182:
183: static void TLan_PhyPrint( struct device * );
184: static void TLan_PhyDetect( struct device * );
185: static void TLan_PhyPowerDown( struct device * );
186: static void TLan_PhyPowerUp( struct device * );
187: static void TLan_PhyReset( struct device * );
188: static void TLan_PhyStartLink( struct device * );
189: static void TLan_PhyFinishAutoNeg( struct device * );
190: /*
191: static int TLan_PhyNop( struct device * );
192: static int TLan_PhyInternalCheck( struct device * );
193: static int TLan_PhyInternalService( struct device * );
194: static int TLan_PhyDp83840aCheck( struct device * );
195: */
196:
197: static int TLan_MiiReadReg( struct device *, u16, u16, u16 * );
198: static void TLan_MiiSendData( u16, u32, unsigned );
199: static void TLan_MiiSync( u16 );
200: static void TLan_MiiWriteReg( struct device *, u16, u16, u16 );
201:
202: static void TLan_EeSendStart( u16 );
203: static int TLan_EeSendByte( u16, u8, int );
204: static void TLan_EeReceiveByte( u16, u8 *, int );
205: static int TLan_EeReadByte( struct device *, u8, u8 * );
206:
207:
208: static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
209: TLan_HandleInvalid,
210: TLan_HandleTxEOF,
211: TLan_HandleStatOverflow,
212: TLan_HandleRxEOF,
213: TLan_HandleDummy,
214: TLan_HandleTxEOC,
215: TLan_HandleStatusCheck,
216: TLan_HandleRxEOC
217: };
218:
219: static inline void
220: TLan_SetTimer( struct device *dev, u32 ticks, u32 type )
221: {
222: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
223:
224: cli();
225: if ( priv->timer.function != NULL ) {
226: return;
227: }
228: priv->timer.function = &TLan_Timer;
229: sti();
230:
231: priv->timer.data = (unsigned long) dev;
232: priv->timer.expires = jiffies + ticks;
233: priv->timerSetAt = jiffies;
234: priv->timerType = type;
235: add_timer( &priv->timer );
236:
237: } /* TLan_SetTimer */
238:
239:
240: /*****************************************************************************
241: ******************************************************************************
242:
243: ThunderLAN Driver Primary Functions
244:
245: These functions are more or less common to all Linux network drivers.
246:
247: ******************************************************************************
248: *****************************************************************************/
249:
250:
251: #ifdef MODULE
252:
253: /***************************************************************
254: * init_module
255: *
256: * Returns:
257: * 0 if module installed ok, non-zero if not.
258: * Parms:
259: * None
260: *
261: * This function begins the setup of the driver creating a
262: * pad buffer, finding all TLAN devices (matching
263: * TLanAdapterList entries), and creating and initializing a
264: * device structure for each adapter.
265: *
266: **************************************************************/
267:
268: extern int init_module(void)
269: {
270: TLanPrivateInfo *priv;
271: u8 bus;
272: struct device *dev;
273: size_t dev_size;
274: u8 dfn;
275: u32 index;
276: int failed;
277: int found;
278: u32 io_base;
279: u8 irq;
280: u8 rev;
281:
282: printk( "TLAN driver, v%d.%d, (C) 1997-8 Caldera, Inc.\n",
283: TLanVersionMajor,
284: TLanVersionMinor
285: );
286: TLanPadBuffer = (u8 *) kmalloc( TLAN_MIN_FRAME_SIZE,
287: ( GFP_KERNEL | GFP_DMA )
288: );
289: if ( TLanPadBuffer == NULL ) {
290: printk( "TLAN: Could not allocate memory for pad buffer.\n" );
291: return -ENOMEM;
292: }
293:
294: memset( TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE );
295:
296: dev_size = sizeof(struct device) + sizeof(TLanPrivateInfo);
297:
298: while ( ( found = TLan_PciProbe( &bus, &dfn, &irq, &rev, &io_base, &index ) ) ) {
299: dev = (struct device *) kmalloc( dev_size, GFP_KERNEL );
300: if ( dev == NULL ) {
301: printk( "TLAN: Could not allocate memory for device.\n" );
302: continue;
303: }
304: memset( dev, 0, dev_size );
305:
306: dev->priv = priv = ( (void *) dev ) + sizeof(struct device);
307: dev->name = priv->devName;
308: strcpy( priv->devName, " " );
309: dev->base_addr = io_base;
310: dev->irq = irq;
311: dev->init = TLan_Init;
312:
313: priv->adapter = &TLanAdapterList[index];
314: priv->adapterRev = rev;
315: priv->aui = aui;
316: if ( ( duplex != 1 ) && ( duplex != 2 ) ) {
317: duplex = 0;
318: }
319: priv->duplex = duplex;
320: if ( ( speed != 10 ) && ( speed != 100 ) ) {
321: speed = 0;
322: }
323: priv->speed = speed;
324: priv->sa_int = sa_int;
325: priv->debug = debug;
326:
327: ether_setup( dev );
328:
329: failed = register_netdev( dev );
330:
331: if ( failed ) {
332: printk( "TLAN: Could not register device.\n" );
333: kfree( dev );
334: } else {
335: priv->nextDevice = TLanDevices;
336: TLanDevices = dev;
337: TLanDevicesInstalled++;
338: printk("TLAN: %s irq=%2d io=%04x, %s, Rev. %d\n",
339: dev->name,
340: (int) dev->irq,
341: (int) dev->base_addr,
342: priv->adapter->deviceLabel,
343: priv->adapterRev );
344: }
345: }
346:
347: /* printk( "TLAN: Found %d device(s).\n", TLanDevicesInstalled ); */
348:
349: return ( ( TLanDevicesInstalled >= 0 ) ? 0 : -ENODEV );
350:
351: } /* init_module */
352:
353:
354:
355:
356: /***************************************************************
357: * cleanup_module
358: *
359: * Returns:
360: * Nothing
361: * Parms:
362: * None
363: *
364: * Goes through the TLanDevices list and frees the device
365: * structs and memory associated with each device (lists
366: * and buffers). It also ureserves the IO port regions
367: * associated with this device.
368: *
369: **************************************************************/
370:
371: extern void cleanup_module(void)
372: {
373: struct device *dev;
374: TLanPrivateInfo *priv;
375:
376: while ( TLanDevicesInstalled ) {
377: dev = TLanDevices;
378: priv = (TLanPrivateInfo *) dev->priv;
379: if ( priv->dmaStorage ) {
380: kfree( priv->dmaStorage );
381: }
382: release_region( dev->base_addr, 0x10 );
383: unregister_netdev( dev );
384: TLanDevices = priv->nextDevice;
385: kfree( dev );
386: TLanDevicesInstalled--;
387: }
388: kfree( TLanPadBuffer );
389:
390: } /* cleanup_module */
391:
392:
393: #else /* MODULE */
394:
395:
396:
397:
398: /***************************************************************
399: * tlan_probe
400: *
401: * Returns:
402: * 0 on success, error code on error
403: * Parms:
404: * dev device struct to use if adapter is
405: * found.
406: *
407: * The name is lower case to fit in with all the rest of
408: * the netcard_probe names. This function looks for a/
409: * another TLan based adapter, setting it up with the
410: * provided device struct if one is found.
411: *
412: **************************************************************/
413:
414: extern int tlan_probe( struct device *dev )
415: {
416: TLanPrivateInfo *priv;
417: static int pad_allocated = 0;
418: int found;
419: u8 bus, dfn, irq, rev;
420: u32 io_base, index;
421:
422: found = TLan_PciProbe( &bus, &dfn, &irq, &rev, &io_base, &index );
423:
424: if ( ! found ) {
425: return -ENODEV;
426: }
427:
428: dev->priv = kmalloc( sizeof(TLanPrivateInfo), GFP_KERNEL );
429:
430: if ( dev->priv == NULL ) {
431: printk( "TLAN: Could not allocate memory for device.\n" );
432: return -ENOMEM;
433: }
434:
435: memset( dev->priv, 0, sizeof(TLanPrivateInfo) );
436:
437: if ( ! pad_allocated ) {
438: TLanPadBuffer = (u8 *) kmalloc( TLAN_MIN_FRAME_SIZE,
439: // ( GFP_KERNEL | GFP_DMA )
440: ( GFP_KERNEL )
441: );
442: if ( TLanPadBuffer == NULL ) {
443: printk( "TLAN: Could not allocate memory for padding.\n" );
444: kfree( dev->priv );
445: return -ENOMEM;
446: } else {
447: pad_allocated = 1;
448: memset( TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE );
449: }
450: }
451:
452: priv = (TLanPrivateInfo *) dev->priv;
453:
454: dev->name = priv->devName;
455: strcpy( priv->devName, " " );
456:
457: dev = init_etherdev( dev, sizeof(TLanPrivateInfo) );
458:
459: dev->base_addr = io_base;
460: dev->irq = irq;
461:
462:
463: priv->adapter = &TLanAdapterList[index];
464: priv->adapterRev = rev;
465: priv->aui = dev->mem_start & 0x01;
466: priv->duplex = ( ( dev->mem_start & 0x0C ) == 0x0C ) ? 0 : ( dev->mem_start & 0x0C ) >> 2;
467: priv->speed = ( ( dev->mem_start & 0x30 ) == 0x30 ) ? 0 : ( dev->mem_start & 0x30 ) >> 4;
468: if ( priv->speed == 0x1 ) {
469: priv->speed = TLAN_SPEED_10;
470: } else if ( priv->speed == 0x2 ) {
471: priv->speed = TLAN_SPEED_100;
472: }
473: priv->sa_int = dev->mem_start & 0x02;
474: priv->debug = dev->mem_end;
475:
476:
477: printk("TLAN %d.%d: %s irq=%2d io=%04x, %s, Rev. %d\n",
478: TLanVersionMajor,
479: TLanVersionMinor,
480: dev->name,
481: (int) irq,
482: io_base,
483: priv->adapter->deviceLabel,
484: priv->adapterRev );
485:
486: TLan_Init( dev );
487:
488: return 0;
489:
490: } /* tlan_probe */
491:
492:
493: #endif /* MODULE */
494:
495:
496:
497:
498: /***************************************************************
499: * TLan_PciProbe
500: *
501: * Returns:
502: * 1 if another TLAN card was found, 0 if not.
503: * Parms:
504: * pci_bus The PCI bus the card was found
505: * on.
506: * pci_dfn The PCI whatever the card was
507: * found at.
508: * pci_irq The IRQ of the found adapter.
509: * pci_rev The revision of the adapter.
510: * pci_io_base The first IO port used by the
511: * adapter.
512: * dl_ix The index in the device list
513: * of the adapter.
514: *
515: * This function searches for an adapter with PCI vendor
516: * and device IDs matching those in the TLanAdapterList.
517: * The function 'remembers' the last device it found,
518: * and so finds a new device (if anymore are to be found)
519: * each time the function is called. It then looks up
520: * pertinent PCI info and returns it to the caller.
521: *
522: **************************************************************/
523:
524: int TLan_PciProbe( u8 *pci_bus, u8 *pci_dfn, u8 *pci_irq, u8 *pci_rev, u32 *pci_io_base, u32 *dl_ix )
525: {
526: static int dl_index = 0;
527: static int pci_index = 0;
528:
529: int not_found;
530: u8 pci_latency;
531: u16 pci_command;
532: int reg;
533:
534:
535: if ( ! pcibios_present() ) {
536: printk( "TLAN: PCI Bios not present.\n" );
537: return 0;
538: }
539:
540: for (; TLanAdapterList[dl_index].vendorId != 0; dl_index++) {
541:
542: not_found = pcibios_find_device(
543: TLanAdapterList[dl_index].vendorId,
544: TLanAdapterList[dl_index].deviceId,
545: pci_index,
546: pci_bus,
547: pci_dfn
548: );
549:
550: if ( ! not_found ) {
551:
552: TLAN_DBG(
553: TLAN_DEBUG_GNRL,
554: "TLAN: found: Vendor Id = 0x%hx, Device Id = 0x%hx\n",
555: TLanAdapterList[dl_index].vendorId,
556: TLanAdapterList[dl_index].deviceId
557: );
558:
559: pcibios_read_config_byte ( *pci_bus, *pci_dfn, PCI_REVISION_ID, pci_rev);
560: pcibios_read_config_byte ( *pci_bus, *pci_dfn, PCI_INTERRUPT_LINE, pci_irq);
561: pcibios_read_config_word ( *pci_bus, *pci_dfn, PCI_COMMAND, &pci_command);
562: pcibios_read_config_dword( *pci_bus, *pci_dfn, PCI_BASE_ADDRESS_0, pci_io_base);
563: pcibios_read_config_byte ( *pci_bus, *pci_dfn, PCI_LATENCY_TIMER, &pci_latency);
564:
565: if (pci_latency < 0x10) {
566: pcibios_write_config_byte( *pci_bus, *pci_dfn, PCI_LATENCY_TIMER, 0xff);
567: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: Setting latency timer to max.\n");
568: }
569:
570: for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg +=4 ) {
571: pcibios_read_config_dword( *pci_bus, *pci_dfn, reg, pci_io_base);
572: if ((pci_command & PCI_COMMAND_IO) && (*pci_io_base & 0x3)) {
573: *pci_io_base &= PCI_BASE_ADDRESS_IO_MASK;
574: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: IO mapping is available at %x.\n", *pci_io_base);
575: break;
576: } else {
577: *pci_io_base = 0;
578: }
579: }
580:
581: if ( *pci_io_base == 0 )
582: printk("TLAN: IO mapping not available, ignoring device.\n");
583:
584: if ( ! ( pci_command & PCI_COMMAND_MASTER ) ) {
585: pcibios_write_config_word ( *pci_bus, *pci_dfn, PCI_COMMAND, pci_command | PCI_COMMAND_MASTER );
586: printk( "TLAN: Activating PCI bus mastering for this device.\n" );
587: }
588:
589: pci_index++;
590:
591: if ( *pci_io_base ) {
592: *dl_ix = dl_index;
593: return 1;
594: }
595:
596: } else {
597: pci_index = 0;
598: }
599: }
600:
601: return 0;
602:
603: } /* TLan_PciProbe */
604:
605:
606:
607:
608: /***************************************************************
609: * TLan_Init
610: *
611: * Returns:
612: * 0 on success, error code otherwise.
613: * Parms:
614: * dev The structure of the device to be
615: * init'ed.
616: *
617: * This function completes the initialization of the
618: * device structure and driver. It reserves the IO
619: * addresses, allocates memory for the lists and bounce
620: * buffers, retrieves the MAC address from the eeprom
621: * and assignes the device's methods.
622: *
623: **************************************************************/
624:
625: int TLan_Init( struct device *dev )
626: {
627: int dma_size;
628: int err;
629: int i;
630: TLanPrivateInfo *priv;
631:
632: priv = (TLanPrivateInfo *) dev->priv;
633:
634: err = check_region( dev->base_addr, 0x10 );
635: if ( err ) {
636: printk( "TLAN: %s: Io port region 0x%lx size 0x%x in use.\n",
637: dev->name,
638: dev->base_addr,
639: 0x10 );
640: return -EIO;
641: }
642: request_region( dev->base_addr, 0x10, TLanSignature );
643:
644: if ( bbuf ) {
645: dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
646: * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
647: } else {
648: dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
649: * ( sizeof(TLanList) );
650: }
651:
652: priv->dmaStorage = kmalloc( dma_size, GFP_KERNEL | GFP_DMA );
653: if ( priv->dmaStorage == NULL ) {
654: printk( "TLAN: Could not allocate lists and buffers for %s.\n",
655: dev->name );
656: return -ENOMEM;
657: }
658: memset( priv->dmaStorage, 0, dma_size );
659: priv->rxList = (TLanList *)
660: ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
661: priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
662:
663: if ( bbuf ) {
664: priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
665: priv->txBuffer = priv->rxBuffer
666: + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
667: }
668:
669: err = 0;
670: for ( i = 0; i < 6 ; i++ )
671: err |= TLan_EeReadByte( dev,
672: (u8) priv->adapter->addrOfs + i,
673: (u8 *) &dev->dev_addr[i] );
674: if ( err ) {
675: printk( "TLAN: %s: Error reading MAC from eeprom: %d\n",
676: dev->name,
677: err );
678: }
679:
680: dev->addr_len = 6;
681:
682: dev->open = &TLan_Open;
683: dev->hard_start_xmit = &TLan_StartTx;
684: dev->stop = &TLan_Close;
685: dev->get_stats = &TLan_GetStats;
686: dev->set_multicast_list = &TLan_SetMulticastList;
687:
688:
689: return 0;
690:
691: } /* TLan_Init */
692:
693:
694:
695:
696: /***************************************************************
697: * TLan_Open
698: *
699: * Returns:
700: * 0 on success, error code otherwise.
701: * Parms:
702: * dev Structure of device to be opened.
703: *
704: * This routine puts the driver and TLAN adapter in a
705: * state where it is ready to send and receive packets.
706: * It allocates the IRQ, resets and brings the adapter
707: * out of reset, and allows interrupts. It also delays
708: * the startup for autonegotiation or sends a Rx GO
709: * command to the adapter, as appropriate.
710: *
711: **************************************************************/
712:
713: int TLan_Open( struct device *dev )
714: {
715: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
716: int err;
717:
718: priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
719: if ( priv->sa_int ) {
720: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: Using SA_INTERRUPT\n" );
721: err = request_irq( dev->irq, TLan_HandleInterrupt, SA_SHIRQ | SA_INTERRUPT, TLanSignature, dev );
722: } else {
723: err = request_irq( dev->irq, TLan_HandleInterrupt, SA_SHIRQ, TLanSignature, dev );
724: }
725: if ( err ) {
726: printk( "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
727: return -EAGAIN;
728: }
729:
730: MOD_INC_USE_COUNT;
731:
732: dev->tbusy = 0;
733: dev->interrupt = 0;
734: dev->start = 1;
735:
736: /* NOTE: It might not be necessary to read the stats before a
737: reset if you don't care what the values are.
738: */
739: TLan_ResetLists( dev );
740: TLan_ReadAndClearStats( dev, TLAN_IGNORE );
741: TLan_ResetAdapter( dev );
742:
743: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
744:
745: return 0;
746:
747: } /* TLan_Open */
748:
749:
750:
751:
752: /***************************************************************
753: * TLan_StartTx
754: *
755: * Returns:
756: * 0 on success, non-zero on failure.
757: * Parms:
758: * skb A pointer to the sk_buff containing the
759: * frame to be sent.
760: * dev The device to send the data on.
761: *
762: * This function adds a frame to the Tx list to be sent
763: * ASAP. First it verifies that the adapter is ready and
764: * there is room in the queue. Then it sets up the next
765: * available list, copies the frame to the corresponding
766: * buffer. If the adapter Tx channel is idle, it gives
767: * the adapter a Tx Go command on the list, otherwise it
768: * sets the forward address of the previous list to point
769: * to this one. Then it frees the sk_buff.
770: *
771: **************************************************************/
772:
773: int TLan_StartTx( struct sk_buff *skb, struct device *dev )
774: {
775: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
776: TLanList *tail_list;
777: u8 *tail_buffer;
778: int pad;
779:
780: if ( ! priv->phyOnline ) {
781: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: %s PHY is not ready\n", dev->name );
782: dev_kfree_skb( skb, FREE_WRITE );
783: return 0;
784: }
785:
786: tail_list = priv->txList + priv->txTail;
787:
788: if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
789: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
790: dev->tbusy = 1;
791: priv->txBusyCount++;
792: return 1;
793: }
794:
795: tail_list->forward = 0;
796:
797: if ( bbuf ) {
798: tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
799: memcpy( tail_buffer, skb->data, skb->len );
800: } else {
801: tail_list->buffer[0].address = virt_to_bus( skb->data );
802: tail_list->buffer[9].address = (u32) skb;
803: }
804:
805: pad = TLAN_MIN_FRAME_SIZE - skb->len;
806:
807: if ( pad > 0 ) {
808: tail_list->frameSize = (u16) skb->len + pad;
809: tail_list->buffer[0].count = (u32) skb->len;
810: tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
811: tail_list->buffer[1].address = virt_to_bus( TLanPadBuffer );
812: } else {
813: tail_list->frameSize = (u16) skb->len;
814: tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
815: tail_list->buffer[1].count = 0;
816: tail_list->buffer[1].address = 0;
817: }
818:
819: cli();
820: tail_list->cStat = TLAN_CSTAT_READY;
821: if ( ! priv->txInProgress ) {
822: priv->txInProgress = 1;
823: outw( 0x4, dev->base_addr + TLAN_HOST_INT );
824: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
825: outl( virt_to_bus( tail_list ), dev->base_addr + TLAN_CH_PARM );
826: outl( TLAN_HC_GO | TLAN_HC_ACK, dev->base_addr + TLAN_HOST_CMD );
827: } else {
828: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
829: if ( priv->txTail == 0 ) {
830: ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = virt_to_bus( tail_list );
831: } else {
832: ( priv->txList + ( priv->txTail - 1 ) )->forward = virt_to_bus( tail_list );
833: }
834: }
835: sti();
836:
837: CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
838:
839: if ( bbuf ) {
840: dev_kfree_skb( skb, FREE_WRITE );
841: }
842:
843: dev->trans_start = jiffies;
844: return 0;
845:
846: } /* TLan_StartTx */
847:
848:
849:
850:
851: /***************************************************************
852: * TLan_HandleInterrupt
853: *
854: * Returns:
855: * Nothing
856: * Parms:
857: * irq The line on which the interrupt
858: * occurred.
859: * dev_id A pointer to the device assigned to
860: * this irq line.
861: * regs ???
862: *
863: * This function handles an interrupt generated by its
864: * assigned TLAN adapter. The function deactivates
865: * interrupts on its adapter, records the type of
866: * interrupt, executes the appropriate subhandler, and
867: * acknowdges the interrupt to the adapter (thus
868: * re-enabling adapter interrupts.
869: *
870: **************************************************************/
871:
872: void TLan_HandleInterrupt(int irq, void *dev_id, struct pt_regs *regs)
873: {
874: u32 ack;
875: struct device *dev;
876: u32 host_cmd;
877: u16 host_int;
878: int type;
879:
880: dev = (struct device *) dev_id;
881:
882: cli();
883: if ( dev->interrupt ) {
884: printk( "TLAN: Re-entering interrupt handler for %s: %d.\n" , dev->name, dev->interrupt );
885: }
886: dev->interrupt++;
887:
888: host_int = inw( dev->base_addr + TLAN_HOST_INT );
889: outw( host_int, dev->base_addr + TLAN_HOST_INT );
890:
891: type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
892:
893: ack = TLanIntVector[type]( dev, host_int );
894:
895: if ( ack ) {
896: host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
897: outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
898: }
899:
900: dev->interrupt--;
901: sti();
902:
903: } /* TLan_HandleInterrupts */
904:
905:
906:
907:
908: /***************************************************************
909: * TLan_Close
910: *
911: * Returns:
912: * An error code.
913: * Parms:
914: * dev The device structure of the device to
915: * close.
916: *
917: * This function shuts down the adapter. It records any
918: * stats, puts the adapter into reset state, deactivates
919: * its time as needed, and frees the irq it is using.
920: *
921: **************************************************************/
922:
923: int TLan_Close(struct device *dev)
924: {
925: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
926:
927: dev->start = 0;
928: dev->tbusy = 1;
929:
930: TLan_ReadAndClearStats( dev, TLAN_RECORD );
931: outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
932: if ( priv->timer.function != NULL )
933: del_timer( &priv->timer );
934: free_irq( dev->irq, dev );
935: TLan_FreeLists( dev );
936: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: Device %s closed.\n", dev->name );
937:
938: MOD_DEC_USE_COUNT;
939:
940: return 0;
941:
942: } /* TLan_Close */
943:
944:
945:
946:
947: /***************************************************************
948: * TLan_GetStats
949: *
950: * Returns:
951: * A pointer to the device's statistics structure.
952: * Parms:
953: * dev The device structure to return the
954: * stats for.
955: *
956: * This function updates the devices statistics by reading
957: * the TLAN chip's onboard registers. Then it returns the
958: * address of the statistics structure.
959: *
960: **************************************************************/
961:
962: struct net_device_stats *TLan_GetStats( struct device *dev )
963: {
964: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
965: int i;
966:
967: /* Should only read stats if open ? */
968: TLan_ReadAndClearStats( dev, TLAN_RECORD );
969:
970: TLAN_DBG( TLAN_DEBUG_RX, "TLAN RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
971: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
972: if ( debug & TLAN_DEBUG_GNRL ) {
973: TLan_PrintDio( dev->base_addr );
974: TLan_PhyPrint( dev );
975: }
976: if ( debug & TLAN_DEBUG_LIST ) {
977: for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
978: TLan_PrintList( priv->rxList + i, "RX", i );
979: for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
980: TLan_PrintList( priv->txList + i, "TX", i );
981: }
982:
983: return ( &( (TLanPrivateInfo *) dev->priv )->stats );
984:
985: } /* TLan_GetStats */
986:
987:
988:
989:
990: /***************************************************************
991: * TLan_SetMulticastList
992: *
993: * Returns:
994: * Nothing
995: * Parms:
996: * dev The device structure to set the
997: * multicast list for.
998: *
999: * This function sets the TLAN adaptor to various receive
1000: * modes. If the IFF_PROMISC flag is set, promiscuous
1001: * mode is acitviated. Otherwise, promiscuous mode is
1002: * turned off. If the IFF_ALLMULTI flag is set, then
1003: * the hash table is set to receive all group addresses.
1004: * Otherwise, the first three multicast addresses are
1005: * stored in AREG_1-3, and the rest are selected via the
1006: * hash table, as necessary.
1007: *
1008: **************************************************************/
1009:
1010: void TLan_SetMulticastList( struct device *dev )
1011: {
1012: struct dev_mc_list *dmi = dev->mc_list;
1013: u32 hash1 = 0;
1014: u32 hash2 = 0;
1015: int i;
1016: u32 offset;
1017: u8 tmp;
1018:
1019: if ( dev->flags & IFF_PROMISC ) {
1020: tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1021: TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1022: } else {
1023: tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1024: TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1025: if ( dev->flags & IFF_ALLMULTI ) {
1026: for ( i = 0; i < 3; i++ )
1027: TLan_SetMac( dev, i + 1, NULL );
1028: TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1029: TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1030: } else {
1031: for ( i = 0; i < dev->mc_count; i++ ) {
1032: if ( i < 3 ) {
1033: TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1034: } else {
1035: offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
1036: if ( offset < 32 )
1037: hash1 |= ( 1 << offset );
1038: else
1039: hash2 |= ( 1 << ( offset - 32 ) );
1040: }
1041: dmi = dmi->next;
1042: }
1043: for ( ; i < 3; i++ )
1044: TLan_SetMac( dev, i + 1, NULL );
1045: TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1046: TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1047: }
1048: }
1049:
1050: } /* TLan_SetMulticastList */
1051:
1052:
1053:
1054: /*****************************************************************************
1055: ******************************************************************************
1056:
1057: ThunderLAN Driver Interrupt Vectors and Table
1058:
1059: Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1060: Programmer's Guide" for more informations on handling interrupts
1061: generated by TLAN based adapters.
1062:
1063: ******************************************************************************
1064: *****************************************************************************/
1065:
1066:
1067: /***************************************************************
1068: * TLan_HandleInvalid
1069: *
1070: * Returns:
1071: * 0
1072: * Parms:
1073: * dev Device assigned the IRQ that was
1074: * raised.
1075: * host_int The contents of the HOST_INT
1076: * port.
1077: *
1078: * This function handles invalid interrupts. This should
1079: * never happen unless some other adapter is trying to use
1080: * the IRQ line assigned to the device.
1081: *
1082: **************************************************************/
1083:
1084: u32 TLan_HandleInvalid( struct device *dev, u16 host_int )
1085: {
1086: host_int = 0;
1087: /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1088: return 0;
1089:
1090: } /* TLan_HandleInvalid */
1091:
1092:
1093:
1094:
1095: /***************************************************************
1096: * TLan_HandleTxEOF
1097: *
1098: * Returns:
1099: * 1
1100: * Parms:
1101: * dev Device assigned the IRQ that was
1102: * raised.
1103: * host_int The contents of the HOST_INT
1104: * port.
1105: *
1106: * This function handles Tx EOF interrupts which are raised
1107: * by the adapter when it has completed sending the
1108: * contents of a buffer. If detemines which list/buffer
1109: * was completed and resets it. If the buffer was the last
1110: * in the channel (EOC), then the function checks to see if
1111: * another buffer is ready to send, and if so, sends a Tx
1112: * Go command. Finally, the driver activates/continues the
1113: * activity LED.
1114: *
1115: **************************************************************/
1116:
1117: u32 TLan_HandleTxEOF( struct device *dev, u16 host_int )
1118: {
1119: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1120: int eoc = 0;
1121: TLanList *head_list;
1122: u32 ack = 1;
1123:
1124: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1125: host_int = 0;
1126: head_list = priv->txList + priv->txHead;
1127:
1128: if ( ! bbuf ) {
1129: dev_kfree_skb( (struct sk_buff *) head_list->buffer[9].address, FREE_WRITE );
1130: head_list->buffer[9].address = 0;
1131: }
1132:
1133: if ( head_list->cStat & TLAN_CSTAT_EOC )
1134: eoc = 1;
1.1.1.2 ! root 1135: if (!(head_list->cStat & TLAN_CSTAT_FRM_CMP)) {
1.1 root 1136: printk( "TLAN: Received interrupt for uncompleted TX frame.\n" );
1137: }
1138:
1139: #if LINUX_KERNEL_VERSION > 0x20100
1140: priv->stats->tx_bytes += head_list->frameSize;
1141: #endif
1142:
1143: head_list->cStat = TLAN_CSTAT_UNUSED;
1144: dev->tbusy = 0;
1145: CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1146: if ( eoc ) {
1147: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1148: head_list = priv->txList + priv->txHead;
1149: if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1150: outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM );
1151: ack |= TLAN_HC_GO;
1152: } else {
1153: priv->txInProgress = 0;
1154: }
1155: }
1156:
1157: if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1158: TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1159: if ( priv->timer.function == NULL ) {
1160: TLan_SetTimer( dev, TLAN_TIMER_ACT_DELAY, TLAN_TIMER_ACTIVITY );
1161: } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1162: priv->timerSetAt = jiffies;
1163: }
1164: }
1165:
1166: return ack;
1167:
1168: } /* TLan_HandleTxEOF */
1169:
1170:
1171:
1172:
1173: /***************************************************************
1174: * TLan_HandleStatOverflow
1175: *
1176: * Returns:
1177: * 1
1178: * Parms:
1179: * dev Device assigned the IRQ that was
1180: * raised.
1181: * host_int The contents of the HOST_INT
1182: * port.
1183: *
1184: * This function handles the Statistics Overflow interrupt
1185: * which means that one or more of the TLAN statistics
1186: * registers has reached 1/2 capacity and needs to be read.
1187: *
1188: **************************************************************/
1189:
1190: u32 TLan_HandleStatOverflow( struct device *dev, u16 host_int )
1191: {
1192: host_int = 0;
1193: TLan_ReadAndClearStats( dev, TLAN_RECORD );
1194:
1195: return 1;
1196:
1197: } /* TLan_HandleStatOverflow */
1198:
1199:
1200:
1201:
1202: /***************************************************************
1203: * TLan_HandleRxEOF
1204: *
1205: * Returns:
1206: * 1
1207: * Parms:
1208: * dev Device assigned the IRQ that was
1209: * raised.
1210: * host_int The contents of the HOST_INT
1211: * port.
1212: *
1213: * This function handles the Rx EOF interrupt which
1214: * indicates a frame has been received by the adapter from
1215: * the net and the frame has been transferred to memory.
1216: * The function determines the bounce buffer the frame has
1217: * been loaded into, creates a new sk_buff big enough to
1218: * hold the frame, and sends it to protocol stack. It
1219: * then resets the used buffer and appends it to the end
1220: * of the list. If the frame was the last in the Rx
1221: * channel (EOC), the function restarts the receive channel
1222: * by sending an Rx Go command to the adapter. Then it
1223: * activates/continues the activity LED.
1224: *
1225: **************************************************************/
1226:
1227: u32 TLan_HandleRxEOF( struct device *dev, u16 host_int )
1228: {
1229: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1230: u32 ack = 1;
1231: int eoc = 0;
1232: u8 *head_buffer;
1233: TLanList *head_list;
1234: struct sk_buff *skb;
1235: TLanList *tail_list;
1236: void *t;
1237:
1238: TLAN_DBG( TLAN_DEBUG_RX, "TLAN RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1239: host_int = 0;
1240: head_list = priv->rxList + priv->rxHead;
1241: tail_list = priv->rxList + priv->rxTail;
1242:
1243: if ( head_list->cStat & TLAN_CSTAT_EOC ) {
1244: eoc = 1;
1245: }
1246:
1.1.1.2 ! root 1247: if (!(head_list->cStat & TLAN_CSTAT_FRM_CMP)) {
1.1 root 1248: printk( "TLAN: Received interrupt for uncompleted RX frame.\n" );
1249: } else if ( bbuf ) {
1250: skb = dev_alloc_skb( head_list->frameSize + 7 );
1251: if ( skb == NULL ) {
1252: printk( "TLAN: Couldn't allocate memory for received data.\n" );
1253: } else {
1254: head_buffer = priv->rxBuffer + ( priv->rxHead * TLAN_MAX_FRAME_SIZE );
1255: skb->dev = dev;
1256: skb_reserve( skb, 2 );
1257: t = (void *) skb_put( skb, head_list->frameSize );
1258:
1259: #if LINUX_KERNEL_VERSION > 0x20100
1260: priv->stats->rx_bytes += head_list->frameSize;
1261: #endif
1262:
1263: memcpy( t, head_buffer, head_list->frameSize );
1264: skb->protocol = eth_type_trans( skb, dev );
1265: netif_rx( skb );
1266: }
1267: } else {
1268: skb = (struct sk_buff *) head_list->buffer[9].address;
1269: head_list->buffer[9].address = 0;
1270: skb_trim( skb, head_list->frameSize );
1271:
1272: #if LINUX_KERNEL_VERSION > 0x20100
1273: priv->stats->rx_bytes += head_list->frameSize;
1274: #endif
1275:
1276: skb->protocol = eth_type_trans( skb, dev );
1277: netif_rx( skb );
1278:
1279: skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1280: if ( skb == NULL ) {
1281: printk( "TLAN: Couldn't allocate memory for received data.\n" );
1282: /* If this ever happened it would be a problem */
1283: } else {
1284: skb->dev = dev;
1285: skb_reserve( skb, 2 );
1286: t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
1287: head_list->buffer[0].address = virt_to_bus( t );
1288: head_list->buffer[9].address = (u32) skb;
1289: }
1290: }
1291:
1292: head_list->forward = 0;
1293: head_list->frameSize = TLAN_MAX_FRAME_SIZE;
1294: head_list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1295: tail_list->forward = virt_to_bus( head_list );
1296:
1297: CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1298: CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1299:
1300: if ( eoc ) {
1301: TLAN_DBG( TLAN_DEBUG_RX, "TLAN RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1302: head_list = priv->rxList + priv->rxHead;
1303: outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM );
1304: ack |= TLAN_HC_GO | TLAN_HC_RT;
1305: priv->rxEocCount++;
1306: }
1307:
1308: if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1309: TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1310: if ( priv->timer.function == NULL ) {
1311: TLan_SetTimer( dev, TLAN_TIMER_ACT_DELAY, TLAN_TIMER_ACTIVITY );
1312: } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1313: priv->timerSetAt = jiffies;
1314: }
1315: }
1316:
1317: dev->last_rx = jiffies;
1318:
1319: return ack;
1320:
1321: } /* TLan_HandleRxEOF */
1322:
1323:
1324:
1325:
1326: /***************************************************************
1327: * TLan_HandleDummy
1328: *
1329: * Returns:
1330: * 1
1331: * Parms:
1332: * dev Device assigned the IRQ that was
1333: * raised.
1334: * host_int The contents of the HOST_INT
1335: * port.
1336: *
1337: * This function handles the Dummy interrupt, which is
1338: * raised whenever a test interrupt is generated by setting
1339: * the Req_Int bit of HOST_CMD to 1.
1340: *
1341: **************************************************************/
1342:
1343: u32 TLan_HandleDummy( struct device *dev, u16 host_int )
1344: {
1345: host_int = 0;
1346: printk( "TLAN: Test interrupt on %s.\n", dev->name );
1347: return 1;
1348:
1349: } /* TLan_HandleDummy */
1350:
1351:
1352:
1353:
1354: /***************************************************************
1355: * TLan_HandleTxEOC
1356: *
1357: * Returns:
1358: * 1
1359: * Parms:
1360: * dev Device assigned the IRQ that was
1361: * raised.
1362: * host_int The contents of the HOST_INT
1363: * port.
1364: *
1365: * This driver is structured to determine EOC occurances by
1366: * reading the CSTAT member of the list structure. Tx EOC
1367: * interrupts are disabled via the DIO INTDIS register.
1368: * However, TLAN chips before revision 3.0 didn't have this
1369: * functionality, so process EOC events if this is the
1370: * case.
1371: *
1372: **************************************************************/
1373:
1374: u32 TLan_HandleTxEOC( struct device *dev, u16 host_int )
1375: {
1376: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1377: TLanList *head_list;
1378: u32 ack = 1;
1379:
1380: host_int = 0;
1381: if ( priv->tlanRev < 0x30 ) {
1382: TLAN_DBG( TLAN_DEBUG_TX, "TLAN TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1383: head_list = priv->txList + priv->txHead;
1384: if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1385: outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM );
1386: ack |= TLAN_HC_GO;
1387: } else {
1388: priv->txInProgress = 0;
1389: }
1390: }
1391:
1392: return ack;
1393:
1394: } /* TLan_HandleTxEOC */
1395:
1396:
1397:
1398:
1399: /***************************************************************
1400: * TLan_HandleStatusCheck
1401: *
1402: * Returns:
1403: * 0 if Adapter check, 1 if Network Status check.
1404: * Parms:
1405: * dev Device assigned the IRQ that was
1406: * raised.
1407: * host_int The contents of the HOST_INT
1408: * port.
1409: *
1410: * This function handles Adapter Check/Network Status
1411: * interrupts generated by the adapter. It checks the
1412: * vector in the HOST_INT register to determine if it is
1413: * an Adapter Check interrupt. If so, it resets the
1414: * adapter. Otherwise it clears the status registers
1415: * and services the PHY.
1416: *
1417: **************************************************************/
1418:
1419: u32 TLan_HandleStatusCheck( struct device *dev, u16 host_int )
1420: {
1421: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1422: u32 ack;
1423: u32 error;
1424: u8 net_sts;
1425: u32 phy;
1426: u16 tlphy_ctl;
1427: u16 tlphy_sts;
1428:
1429: ack = 1;
1430: if ( host_int & TLAN_HI_IV_MASK ) {
1431: error = inl( dev->base_addr + TLAN_CH_PARM );
1432: printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1433: TLan_ReadAndClearStats( dev, TLAN_RECORD );
1434: outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1435: TLan_FreeLists( dev );
1436: TLan_ResetLists( dev );
1437: TLan_ResetAdapter( dev );
1438: dev->tbusy = 0;
1439: ack = 0;
1440: } else {
1441: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Status Check\n", dev->name );
1442: phy = priv->phy[priv->phyNum];
1443:
1444: net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1445: if ( net_sts ) {
1446: TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1447: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1448: }
1449: if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1450: TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1451: TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1452: if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1453: tlphy_ctl |= TLAN_TC_SWAPOL;
1454: TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1455: } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1456: tlphy_ctl &= ~TLAN_TC_SWAPOL;
1457: TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1458: }
1459:
1460: if (debug) {
1461: TLan_PhyPrint( dev );
1462: }
1463: }
1464: }
1465:
1466: return ack;
1467:
1468: } /* TLan_HandleStatusCheck */
1469:
1470:
1471:
1472:
1473: /***************************************************************
1474: * TLan_HandleRxEOC
1475: *
1476: * Returns:
1477: * 1
1478: * Parms:
1479: * dev Device assigned the IRQ that was
1480: * raised.
1481: * host_int The contents of the HOST_INT
1482: * port.
1483: *
1484: * This driver is structured to determine EOC occurances by
1485: * reading the CSTAT member of the list structure. Rx EOC
1486: * interrupts are disabled via the DIO INTDIS register.
1487: * However, TLAN chips before revision 3.0 didn't have this
1488: * CSTAT member or a INTDIS register, so if this chip is
1489: * pre-3.0, process EOC interrupts normally.
1490: *
1491: **************************************************************/
1492:
1493: u32 TLan_HandleRxEOC( struct device *dev, u16 host_int )
1494: {
1495: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1496: TLanList *head_list;
1497: u32 ack = 1;
1498:
1499: host_int = 0;
1500: if ( priv->tlanRev < 0x30 ) {
1501: TLAN_DBG( TLAN_DEBUG_RX, "TLAN RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1502: head_list = priv->rxList + priv->rxHead;
1503: outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM );
1504: ack |= TLAN_HC_GO | TLAN_HC_RT;
1505: priv->rxEocCount++;
1506: }
1507:
1508: return ack;
1509:
1510: } /* TLan_HandleRxEOC */
1511:
1512:
1513:
1514:
1515: /*****************************************************************************
1516: ******************************************************************************
1517:
1518: ThunderLAN Driver Timer Function
1519:
1520: ******************************************************************************
1521: *****************************************************************************/
1522:
1523:
1524: /***************************************************************
1525: * TLan_Timer
1526: *
1527: * Returns:
1528: * Nothing
1529: * Parms:
1530: * data A value given to add timer when
1531: * add_timer was called.
1532: *
1533: * This function handles timed functionality for the
1534: * TLAN driver. The two current timer uses are for
1535: * delaying for autonegotionation and driving the ACT LED.
1536: * - Autonegotiation requires being allowed about
1537: * 2 1/2 seconds before attempting to transmit a
1538: * packet. It would be a very bad thing to hang
1539: * the kernel this long, so the driver doesn't
1540: * allow transmission 'til after this time, for
1541: * certain PHYs. It would be much nicer if all
1542: * PHYs were interrupt-capable like the internal
1543: * PHY.
1544: * - The ACT LED, which shows adapter activity, is
1545: * driven by the driver, and so must be left on
1546: * for a short period to power up the LED so it
1547: * can be seen. This delay can be changed by
1548: * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1549: * if desired. 10 jiffies produces a slightly
1550: * sluggish response.
1551: *
1552: **************************************************************/
1553:
1554: void TLan_Timer( unsigned long data )
1555: {
1556: struct device *dev = (struct device *) data;
1557: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1558: u32 elapsed;
1559:
1560: priv->timer.function = NULL;
1561:
1562: switch ( priv->timerType ) {
1563: case TLAN_TIMER_PHY_PDOWN:
1564: TLan_PhyPowerDown( dev );
1565: break;
1566: case TLAN_TIMER_PHY_PUP:
1567: TLan_PhyPowerUp( dev );
1568: break;
1569: case TLAN_TIMER_PHY_RESET:
1570: TLan_PhyReset( dev );
1571: break;
1572: case TLAN_TIMER_PHY_START_LINK:
1573: TLan_PhyStartLink( dev );
1574: break;
1575: case TLAN_TIMER_PHY_FINISH_AN:
1576: TLan_PhyFinishAutoNeg( dev );
1577: break;
1578: case TLAN_TIMER_FINISH_RESET:
1579: TLan_FinishReset( dev );
1580: break;
1581: case TLAN_TIMER_ACTIVITY:
1582: cli();
1583: if ( priv->timer.function == NULL ) {
1584: elapsed = jiffies - priv->timerSetAt;
1585: if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1586: TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1587: } else {
1588: priv->timer.function = &TLan_Timer;
1589: priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1590: sti();
1591: add_timer( &priv->timer );
1592: }
1593: }
1594: sti();
1595: break;
1596: default:
1597: break;
1598: }
1599:
1600: } /* TLan_Timer */
1601:
1602:
1603:
1604:
1605: /*****************************************************************************
1606: ******************************************************************************
1607:
1608: ThunderLAN Driver Adapter Related Routines
1609:
1610: ******************************************************************************
1611: *****************************************************************************/
1612:
1613:
1614: /***************************************************************
1615: * TLan_ResetLists
1616: *
1617: * Returns:
1618: * Nothing
1619: * Parms:
1620: * dev The device structure with the list
1621: * stuctures to be reset.
1622: *
1623: * This routine sets the variables associated with managing
1624: * the TLAN lists to their initial values.
1625: *
1626: **************************************************************/
1627:
1628: void TLan_ResetLists( struct device *dev )
1629: {
1630: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1631: int i;
1632: TLanList *list;
1633: struct sk_buff *skb;
1634: void *t = NULL;
1635:
1636: priv->txHead = 0;
1637: priv->txTail = 0;
1638: for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1639: list = priv->txList + i;
1640: list->cStat = TLAN_CSTAT_UNUSED;
1641: if ( bbuf ) {
1642: list->buffer[0].address = virt_to_bus( priv->txBuffer + ( i * TLAN_MAX_FRAME_SIZE ) );
1643: } else {
1644: list->buffer[0].address = 0;
1645: }
1646: list->buffer[2].count = 0;
1647: list->buffer[2].address = 0;
1648: }
1649:
1650: priv->rxHead = 0;
1651: priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1652: for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1653: list = priv->rxList + i;
1654: list->cStat = TLAN_CSTAT_READY;
1655: list->frameSize = TLAN_MAX_FRAME_SIZE;
1656: list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1657: if ( bbuf ) {
1658: list->buffer[0].address = virt_to_bus( priv->rxBuffer + ( i * TLAN_MAX_FRAME_SIZE ) );
1659: } else {
1660: skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1661: if ( skb == NULL ) {
1662: printk( "TLAN: Couldn't allocate memory for received data.\n" );
1663: /* If this ever happened it would be a problem */
1664: } else {
1665: skb->dev = dev;
1666: skb_reserve( skb, 2 );
1667: t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
1668: }
1669: list->buffer[0].address = virt_to_bus( t );
1670: list->buffer[9].address = (u32) skb;
1671: }
1672: list->buffer[1].count = 0;
1673: list->buffer[1].address = 0;
1674: if ( i < TLAN_NUM_RX_LISTS - 1 )
1675: list->forward = virt_to_bus( list + 1 );
1676: else
1677: list->forward = 0;
1678: }
1679:
1680: } /* TLan_ResetLists */
1681:
1682:
1683: void TLan_FreeLists( struct device *dev )
1684: {
1685: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1686: int i;
1687: TLanList *list;
1688: struct sk_buff *skb;
1689:
1690: if ( ! bbuf ) {
1691: for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1692: list = priv->txList + i;
1693: skb = (struct sk_buff *) list->buffer[9].address;
1694: if ( skb ) {
1695: dev_kfree_skb( skb, FREE_WRITE );
1696: list->buffer[9].address = 0;
1697: }
1698: }
1699:
1700: for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1701: list = priv->rxList + i;
1702: skb = (struct sk_buff *) list->buffer[9].address;
1703: if ( skb ) {
1704: dev_kfree_skb( skb, FREE_READ );
1705: list->buffer[9].address = 0;
1706: }
1707: }
1708: }
1709:
1710: } /* TLan_FreeLists */
1711:
1712:
1713:
1714:
1715: /***************************************************************
1716: * TLan_PrintDio
1717: *
1718: * Returns:
1719: * Nothing
1720: * Parms:
1721: * io_base Base IO port of the device of
1722: * which to print DIO registers.
1723: *
1724: * This function prints out all the internal (DIO)
1725: * registers of a TLAN chip.
1726: *
1727: **************************************************************/
1728:
1729: void TLan_PrintDio( u16 io_base )
1730: {
1731: u32 data0, data1;
1732: int i;
1733:
1734: printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
1735: printk( "TLAN: Off. +0 +4\n" );
1736: for ( i = 0; i < 0x4C; i+= 8 ) {
1737: data0 = TLan_DioRead32( io_base, i );
1738: data1 = TLan_DioRead32( io_base, i + 0x4 );
1739: printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
1740: }
1741:
1742: } /* TLan_PrintDio */
1743:
1744:
1745:
1746:
1747: /***************************************************************
1748: * TLan_PrintList
1749: *
1750: * Returns:
1751: * Nothing
1752: * Parms:
1753: * list A pointer to the TLanList structure to
1754: * be printed.
1755: * type A string to designate type of list,
1756: * "Rx" or "Tx".
1757: * num The index of the list.
1758: *
1759: * This function prints out the contents of the list
1760: * pointed to by the list parameter.
1761: *
1762: **************************************************************/
1763:
1764: void TLan_PrintList( TLanList *list, char *type, int num)
1765: {
1766: int i;
1767:
1768: printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
1769: printk( "TLAN: Forward = 0x%08x\n", list->forward );
1770: printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
1771: printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
1772: /* for ( i = 0; i < 10; i++ ) { */
1773: for ( i = 0; i < 2; i++ ) {
1774: printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
1775: }
1776:
1777: } /* TLan_PrintList */
1778:
1779:
1780:
1781:
1782: /***************************************************************
1783: * TLan_ReadAndClearStats
1784: *
1785: * Returns:
1786: * Nothing
1787: * Parms:
1788: * dev Pointer to device structure of adapter
1789: * to which to read stats.
1790: * record Flag indicating whether to add
1791: *
1792: * This functions reads all the internal status registers
1793: * of the TLAN chip, which clears them as a side effect.
1794: * It then either adds the values to the device's status
1795: * struct, or discards them, depending on whether record
1796: * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
1797: *
1798: **************************************************************/
1799:
1800: void TLan_ReadAndClearStats( struct device *dev, int record )
1801: {
1802: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1803: u32 tx_good, tx_under;
1804: u32 rx_good, rx_over;
1805: u32 def_tx, crc, code;
1806: u32 multi_col, single_col;
1807: u32 excess_col, late_col, loss;
1808:
1809: outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
1810: tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
1811: tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
1812: tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
1813: tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
1814:
1815: outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
1816: rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
1817: rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
1818: rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
1819: rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
1820:
1821: outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
1822: def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
1823: def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
1824: crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
1825: code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
1826:
1827: outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
1828: multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
1829: multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
1830: single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
1831: single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
1832:
1833: outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
1834: excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
1835: late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
1836: loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
1837:
1838: if ( record ) {
1839: priv->stats.rx_packets += rx_good;
1840: priv->stats.rx_errors += rx_over + crc + code;
1841: priv->stats.tx_packets += tx_good;
1842: priv->stats.tx_errors += tx_under + loss;
1843: priv->stats.collisions += multi_col + single_col + excess_col + late_col;
1844:
1845: priv->stats.rx_over_errors += rx_over;
1846: priv->stats.rx_crc_errors += crc;
1847: priv->stats.rx_frame_errors += code;
1848:
1849: priv->stats.tx_aborted_errors += tx_under;
1850: priv->stats.tx_carrier_errors += loss;
1851: }
1852:
1853: } /* TLan_ReadAndClearStats */
1854:
1855:
1856:
1857:
1858: /***************************************************************
1859: * TLan_Reset
1860: *
1861: * Returns:
1862: * 0
1863: * Parms:
1864: * dev Pointer to device structure of adapter
1865: * to be reset.
1866: *
1867: * This function resets the adapter and it's physical
1868: * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
1869: * Programmer's Guide" for details. The routine tries to
1870: * implement what is detailed there, though adjustments
1871: * have been made.
1872: *
1873: **************************************************************/
1874:
1875: void
1876: TLan_ResetAdapter( struct device *dev )
1877: {
1878: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1879: int i;
1880: u32 addr;
1881: u32 data;
1882: u8 data8;
1883:
1884: priv->tlanFullDuplex = FALSE;
1885: /* 1. Assert reset bit. */
1886:
1887: data = inl(dev->base_addr + TLAN_HOST_CMD);
1888: data |= TLAN_HC_AD_RST;
1889: outl(data, dev->base_addr + TLAN_HOST_CMD);
1890:
1891: udelay(1000);
1892:
1893: /* 2. Turn off interrupts. ( Probably isn't necessary ) */
1894:
1895: data = inl(dev->base_addr + TLAN_HOST_CMD);
1896: data |= TLAN_HC_INT_OFF;
1897: outl(data, dev->base_addr + TLAN_HOST_CMD);
1898:
1899: /* 3. Clear AREGs and HASHs. */
1900:
1901: for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
1902: TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
1903: }
1904:
1905: /* 4. Setup NetConfig register. */
1906:
1907: data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
1908: TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
1909:
1910: /* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
1911:
1912: outl( TLAN_HC_LD_TMR | 0x0, dev->base_addr + TLAN_HOST_CMD );
1913: outl( TLAN_HC_LD_THR | 0x1, dev->base_addr + TLAN_HOST_CMD );
1914:
1915: /* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
1916:
1917: outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
1918: addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
1919: TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
1920:
1921: /* 7. Setup the remaining registers. */
1922:
1923: if ( priv->tlanRev >= 0x30 ) {
1924: data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
1925: TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
1926: }
1927: TLan_PhyDetect( dev );
1928: data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
1929: if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
1930: data |= TLAN_NET_CFG_BIT;
1931: if ( priv->aui == 1 ) {
1932: TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
1933: } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
1934: TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
1935: priv->tlanFullDuplex = TRUE;
1936: } else {
1937: TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
1938: }
1939: }
1940: if ( priv->phyNum == 0 ) {
1941: data |= TLAN_NET_CFG_PHY_EN;
1942: }
1943: TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
1944:
1945: if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
1946: TLan_FinishReset( dev );
1947: } else {
1948: TLan_PhyPowerDown( dev );
1949: }
1950:
1951: } /* TLan_ResetAdapter */
1952:
1953:
1954:
1955:
1956: void
1957: TLan_FinishReset( struct device *dev )
1958: {
1959: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
1960: u8 data;
1961: u32 phy;
1962: u8 sio;
1963: u16 status;
1964: u16 tlphy_ctl;
1965:
1966: phy = priv->phy[priv->phyNum];
1967:
1968: data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
1969: if ( priv->tlanFullDuplex ) {
1970: data |= TLAN_NET_CMD_DUPLEX;
1971: }
1972: TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
1973: data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1974: if ( priv->phyNum == 0 ) {
1975: data |= TLAN_NET_MASK_MASK7;
1976: }
1977: TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
1978: TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, TLAN_MAX_FRAME_SIZE );
1979:
1980: if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
1981: status = MII_GS_LINK;
1982: printk( "TLAN: %s: Link forced.\n", dev->name );
1983: } else {
1984: TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
1985: udelay( 1000 );
1986: TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
1987: if ( status & MII_GS_LINK ) {
1988: printk( "TLAN: %s: Link active.\n", dev->name );
1989: TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1990: }
1991: }
1992:
1993: if ( priv->phyNum == 0 ) {
1994: TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1995: tlphy_ctl |= TLAN_TC_INTEN;
1996: TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
1997: sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
1998: sio |= TLAN_NET_SIO_MINTEN;
1999: TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2000: }
2001:
2002: if ( status & MII_GS_LINK ) {
2003: TLan_SetMac( dev, 0, dev->dev_addr );
2004: priv->phyOnline = 1;
2005: outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2006: if ( debug >= 1 ) {
2007: outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2008: }
2009: outl( virt_to_bus( priv->rxList ), dev->base_addr + TLAN_CH_PARM );
2010: outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2011: } else {
2012: printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2013: TLan_SetTimer( dev, 1000, TLAN_TIMER_FINISH_RESET );
2014: return;
2015: }
2016:
2017: } /* TLan_FinishReset */
2018:
2019:
2020:
2021:
2022: /***************************************************************
2023: * TLan_SetMac
2024: *
2025: * Returns:
2026: * Nothing
2027: * Parms:
2028: * dev Pointer to device structure of adapter
2029: * on which to change the AREG.
2030: * areg The AREG to set the address in (0 - 3).
2031: * mac A pointer to an array of chars. Each
2032: * element stores one byte of the address.
2033: * IE, it isn't in ascii.
2034: *
2035: * This function transfers a MAC address to one of the
2036: * TLAN AREGs (address registers). The TLAN chip locks
2037: * the register on writing to offset 0 and unlocks the
2038: * register after writing to offset 5. If NULL is passed
2039: * in mac, then the AREG is filled with 0's.
2040: *
2041: **************************************************************/
2042:
2043: void TLan_SetMac( struct device *dev, int areg, char *mac )
2044: {
2045: int i;
2046:
2047: areg *= 6;
2048:
2049: if ( mac != NULL ) {
2050: for ( i = 0; i < 6; i++ )
2051: TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2052: } else {
2053: for ( i = 0; i < 6; i++ )
2054: TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2055: }
2056:
2057: } /* TLan_SetMac */
2058:
2059:
2060:
2061:
2062: /*****************************************************************************
2063: ******************************************************************************
2064:
2065: ThunderLAN Driver PHY Layer Routines
2066:
2067: ******************************************************************************
2068: *****************************************************************************/
2069:
2070:
2071:
2072: /*********************************************************************
2073: * TLan_PhyPrint
2074: *
2075: * Returns:
2076: * Nothing
2077: * Parms:
2078: * dev A pointer to the device structure of the
2079: * TLAN device having the PHYs to be detailed.
2080: *
2081: * This function prints the registers a PHY (aka tranceiver).
2082: *
2083: ********************************************************************/
2084:
2085: void TLan_PhyPrint( struct device *dev )
2086: {
2087: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2088: u16 i, data0, data1, data2, data3, phy;
2089:
2090: phy = priv->phy[priv->phyNum];
2091:
2092: if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2093: printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2094: } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2095: printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2096: printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2097: for ( i = 0; i < 0x20; i+= 4 ) {
2098: printk( "TLAN: 0x%02x", i );
2099: TLan_MiiReadReg( dev, phy, i, &data0 );
2100: printk( " 0x%04hx", data0 );
2101: TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2102: printk( " 0x%04hx", data1 );
2103: TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2104: printk( " 0x%04hx", data2 );
2105: TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2106: printk( " 0x%04hx\n", data3 );
2107: }
2108: } else {
2109: printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2110: }
2111:
2112: } /* TLan_PhyPrint */
2113:
2114:
2115:
2116:
2117: /*********************************************************************
2118: * TLan_PhyDetect
2119: *
2120: * Returns:
2121: * Nothing
2122: * Parms:
2123: * dev A pointer to the device structure of the adapter
2124: * for which the PHY needs determined.
2125: *
2126: * So far I've found that adapters which have external PHYs
2127: * may also use the internal PHY for part of the functionality.
2128: * (eg, AUI/Thinnet). This function finds out if this TLAN
2129: * chip has an internal PHY, and then finds the first external
2130: * PHY (starting from address 0) if it exists).
2131: *
2132: ********************************************************************/
2133:
2134: void TLan_PhyDetect( struct device *dev )
2135: {
2136: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2137: u16 control;
2138: u16 hi;
2139: u16 lo;
2140: u32 phy;
2141:
2142: if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2143: priv->phyNum = 0xFFFF;
2144: return;
2145: }
2146:
2147: TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
2148:
2149: if ( hi != 0xFFFF ) {
2150: priv->phy[0] = TLAN_PHY_MAX_ADDR;
2151: } else {
2152: priv->phy[0] = TLAN_PHY_NONE;
2153: }
2154:
2155: priv->phy[1] = TLAN_PHY_NONE;
2156: for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2157: TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2158: TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2159: TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2160: if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2161: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2162: if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2163: priv->phy[1] = phy;
2164: }
2165: }
2166: }
2167:
2168: if ( priv->phy[1] != TLAN_PHY_NONE ) {
2169: priv->phyNum = 1;
2170: } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2171: priv->phyNum = 0;
2172: } else {
2173: printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2174: }
2175:
2176: } /* TLan_PhyDetect */
2177:
2178:
2179:
2180:
2181: void TLan_PhyPowerDown( struct device *dev )
2182: {
2183: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2184: u16 value;
2185:
2186: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Powering down PHY(s).\n", dev->name );
2187: value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2188: TLan_MiiSync( dev->base_addr );
2189: TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2190: if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2191: TLan_MiiSync( dev->base_addr );
2192: TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2193: }
2194:
2195: /* Wait for 5 jiffies (50 ms) and powerup
2196: * This is abitrary. It is intended to make sure the
2197: * tranceiver settles.
2198: */
2199: TLan_SetTimer( dev, 5, TLAN_TIMER_PHY_PUP );
2200:
2201: } /* TLan_PhyPowerDown */
2202:
2203:
2204:
2205:
2206: void TLan_PhyPowerUp( struct device *dev )
2207: {
2208: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2209: u16 value;
2210:
2211: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Powering up PHY.\n", dev->name );
2212: TLan_MiiSync( dev->base_addr );
2213: value = MII_GC_LOOPBK;
2214: TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2215:
2216: /* Wait for 50 jiffies (500 ms) and reset the
2217: * tranceiver. The TLAN docs say both 50 ms and
2218: * 500 ms, so do the longer, just in case
2219: */
2220: TLan_SetTimer( dev, 50, TLAN_TIMER_PHY_RESET );
2221:
2222: } /* TLan_PhyPowerUp */
2223:
2224:
2225:
2226:
2227: void TLan_PhyReset( struct device *dev )
2228: {
2229: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2230: u16 phy;
2231: u16 value;
2232:
2233: phy = priv->phy[priv->phyNum];
2234:
2235: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Reseting PHY.\n", dev->name );
2236: TLan_MiiSync( dev->base_addr );
2237: value = MII_GC_LOOPBK | MII_GC_RESET;
2238: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2239: TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2240: while ( value & MII_GC_RESET ) {
2241: TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2242: }
2243: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0 );
2244:
2245: /* Wait for 50 jiffies (500 ms) and initialize.
2246: * I don't remember why I wait this long.
2247: */
2248: TLan_SetTimer( dev, 50, TLAN_TIMER_PHY_START_LINK );
2249:
2250: } /* TLan_PhyReset */
2251:
2252:
2253:
2254:
2255: void TLan_PhyStartLink( struct device *dev )
2256: {
2257: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2258: u16 ability;
2259: u16 control;
2260: u16 data;
2261: u16 phy;
2262: u16 status;
2263: u16 tctl;
2264:
2265: phy = priv->phy[priv->phyNum];
2266:
2267: TLAN_DBG( TLAN_DEBUG_GNRL, "TLAN: %s: Trying to activate link.\n", dev->name );
2268: TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2269: if ( ( status & MII_GS_AUTONEG ) &&
2270: ( priv->duplex == TLAN_DUPLEX_DEFAULT ) &&
2271: ( priv->speed == TLAN_SPEED_DEFAULT ) &&
2272: ( ! priv->aui ) ) {
2273: ability = status >> 11;
2274:
2275: if ( priv->speed == TLAN_SPEED_10 ) {
2276: ability &= 0x0003;
2277: } else if ( priv->speed == TLAN_SPEED_100 ) {
2278: ability &= 0x001C;
2279: }
2280:
2281: if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2282: ability &= 0x000A;
2283: } else if ( priv->duplex == TLAN_DUPLEX_HALF ) {
2284: ability &= 0x0005;
2285: }
2286:
2287: TLan_MiiWriteReg( dev, phy, MII_AN_ADV, ( ability << 5 ) | 1 );
2288: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2289: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2290:
2291: /* Wait for 400 jiffies (4 sec) for autonegotiation
2292: * to complete. The max spec time is less than this
2293: * but the card need additional time to start AN.
2294: * .5 sec should be plenty extra.
2295: */
2296: printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2297: TLan_SetTimer( dev, 400, TLAN_TIMER_PHY_FINISH_AN );
2298: return;
2299: }
2300:
2301: if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2302: priv->phyNum = 0;
2303: data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2304: TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2305: TLan_SetTimer( dev, 4, TLAN_TIMER_PHY_PDOWN );
2306: return;
2307: } else if ( priv->phyNum == 0 ) {
2308: TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2309: if ( priv->aui ) {
2310: tctl |= TLAN_TC_AUISEL;
2311: } else {
2312: tctl &= ~TLAN_TC_AUISEL;
2313: control = 0;
2314: if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2315: control |= MII_GC_DUPLEX;
2316: priv->tlanFullDuplex = TRUE;
2317: }
2318: if ( priv->speed == TLAN_SPEED_100 ) {
2319: control |= MII_GC_SPEEDSEL;
2320: }
2321: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2322: }
2323: TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2324: }
2325:
2326: /* Wait for 100 jiffies (1 sec) to give the tranceiver time
2327: * to establish link.
2328: */
2329: TLan_SetTimer( dev, 100, TLAN_TIMER_FINISH_RESET );
2330:
2331: } /* TLan_PhyStartLink */
2332:
2333:
2334:
2335:
2336: void TLan_PhyFinishAutoNeg( struct device *dev )
2337: {
2338: TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
2339: u16 an_adv;
2340: u16 an_lpa;
2341: u16 data;
2342: u16 mode;
2343: u16 phy;
2344: u16 status;
2345:
2346: phy = priv->phy[priv->phyNum];
2347:
2348: TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2349: if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2350: /* Wait for 800 jiffies (8 sec) to give the process
2351: * more time. Perhaps we should fail after a while.
2352: */
2353: printk( "TLAN: Giving autonegotiation more time.\n" );
2354: TLan_SetTimer( dev, 800, TLAN_TIMER_PHY_FINISH_AN );
2355: return;
2356: }
2357:
2358: printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2359: TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2360: TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2361: mode = an_adv & an_lpa & 0x03E0;
2362: if ( mode & 0x0100 ) {
2363: priv->tlanFullDuplex = TRUE;
2364: } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2365: priv->tlanFullDuplex = TRUE;
2366: }
2367:
2368: if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2369: priv->phyNum = 0;
2370: data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2371: TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2372: TLan_SetTimer( dev, 40, TLAN_TIMER_PHY_PDOWN );
2373: return;
2374: }
2375:
2376: if ( priv->phyNum == 0 ) {
2377: if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2378: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2379: printk( "TLAN: Starting internal PHY with DUPLEX\n" );
2380: } else {
2381: TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2382: printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2383: }
2384: }
2385:
2386: /* Wait for 10 jiffies (100 ms). No reason in partiticular.
2387: */
2388: TLan_SetTimer( dev, 10, TLAN_TIMER_FINISH_RESET );
2389:
2390: } /* TLan_PhyFinishAutoNeg */
2391:
2392:
2393:
2394:
2395: /*****************************************************************************
2396: ******************************************************************************
2397:
2398: ThunderLAN Driver MII Routines
2399:
2400: These routines are based on the information in Chap. 2 of the
2401: "ThunderLAN Programmer's Guide", pp. 15-24.
2402:
2403: ******************************************************************************
2404: *****************************************************************************/
2405:
2406:
2407: /***************************************************************
2408: * TLan_MiiReadReg
2409: *
2410: * Returns:
2411: * 0 if ack received ok
2412: * 1 otherwise.
2413: *
2414: * Parms:
2415: * dev The device structure containing
2416: * The io address and interrupt count
2417: * for this device.
2418: * phy The address of the PHY to be queried.
2419: * reg The register whose contents are to be
2420: * retreived.
2421: * val A pointer to a variable to store the
2422: * retrieved value.
2423: *
2424: * This function uses the TLAN's MII bus to retreive the contents
2425: * of a given register on a PHY. It sends the appropriate info
2426: * and then reads the 16-bit register value from the MII bus via
2427: * the TLAN SIO register.
2428: *
2429: **************************************************************/
2430:
2431: int TLan_MiiReadReg( struct device *dev, u16 phy, u16 reg, u16 *val )
2432: {
2433: u8 nack;
2434: u16 sio, tmp;
2435: u32 i;
2436: int err;
2437: int minten;
2438:
2439: err = FALSE;
2440: outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2441: sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2442:
2443: if ( dev->interrupt == 0 )
2444: cli();
2445: dev->interrupt++;
2446:
2447: TLan_MiiSync(dev->base_addr);
2448:
2449: minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2450: if ( minten )
2451: TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2452:
2453: TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2454: TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2455: TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2456: TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2457:
2458:
2459: TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2460:
2461: TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2462: TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2463: TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2464:
2465: nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2466: TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2467: if (nack) { /* No ACK, so fake it */
2468: for (i = 0; i < 16; i++) {
2469: TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2470: TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2471: }
2472: tmp = 0xffff;
2473: err = TRUE;
2474: } else { /* ACK, so read data */
2475: for (tmp = 0, i = 0x8000; i; i >>= 1) {
2476: TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2477: if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2478: tmp |= i;
2479: TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2480: }
2481: }
2482:
2483:
2484: TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2485: TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2486:
2487: if ( minten )
2488: TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2489:
2490: *val = tmp;
2491:
2492: dev->interrupt--;
2493: if ( dev->interrupt == 0 )
2494: sti();
2495:
2496: return err;
2497:
2498: } /* TLan_MiiReadReg */
2499:
2500:
2501:
2502:
2503: /***************************************************************
2504: * TLan_MiiSendData
2505: *
2506: * Returns:
2507: * Nothing
2508: * Parms:
2509: * base_port The base IO port of the adapter in
2510: * question.
2511: * dev The address of the PHY to be queried.
2512: * data The value to be placed on the MII bus.
2513: * num_bits The number of bits in data that are to
2514: * be placed on the MII bus.
2515: *
2516: * This function sends on sequence of bits on the MII
2517: * configuration bus.
2518: *
2519: **************************************************************/
2520:
2521: void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2522: {
2523: u16 sio;
2524: u32 i;
2525:
2526: if ( num_bits == 0 )
2527: return;
2528:
2529: outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2530: sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2531: TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2532:
2533: for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2534: TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2535: TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2536: if ( data & i )
2537: TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2538: else
2539: TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2540: TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2541: TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2542: }
2543:
2544: } /* TLan_MiiSendData */
2545:
2546:
2547:
2548:
2549: /***************************************************************
2550: * TLan_MiiSync
2551: *
2552: * Returns:
2553: * Nothing
2554: * Parms:
2555: * base_port The base IO port of the adapter in
2556: * question.
2557: *
2558: * This functions syncs all PHYs in terms of the MII configuration
2559: * bus.
2560: *
2561: **************************************************************/
2562:
2563: void TLan_MiiSync( u16 base_port )
2564: {
2565: int i;
2566: u16 sio;
2567:
2568: outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2569: sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2570:
2571: TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
2572: for ( i = 0; i < 32; i++ ) {
2573: TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2574: TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2575: }
2576:
2577: } /* TLan_MiiSync */
2578:
2579:
2580:
2581:
2582: /***************************************************************
2583: * TLan_MiiWriteReg
2584: *
2585: * Returns:
2586: * Nothing
2587: * Parms:
2588: * dev The device structure for the device
2589: * to write to.
2590: * phy The address of the PHY to be written to.
2591: * reg The register whose contents are to be
2592: * written.
2593: * val The value to be written to the register.
2594: *
2595: * This function uses the TLAN's MII bus to write the contents of a
2596: * given register on a PHY. It sends the appropriate info and then
2597: * writes the 16-bit register value from the MII configuration bus
2598: * via the TLAN SIO register.
2599: *
2600: **************************************************************/
2601:
2602: void TLan_MiiWriteReg( struct device *dev, u16 phy, u16 reg, u16 val )
2603: {
2604: u16 sio;
2605: int minten;
2606:
2607: outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2608: sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2609:
2610: if ( dev->interrupt == 0 )
2611: cli();
2612: dev->interrupt++;
2613:
2614: TLan_MiiSync( dev->base_addr );
2615:
2616: minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2617: if ( minten )
2618: TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
2619:
2620: TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2621: TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
2622: TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2623: TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2624:
2625: TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
2626: TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
2627:
2628: TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
2629: TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2630:
2631: if ( minten )
2632: TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
2633:
2634: dev->interrupt--;
2635: if ( dev->interrupt == 0 )
2636: sti();
2637:
2638: } /* TLan_MiiWriteReg */
2639:
2640:
2641:
2642:
2643: /*****************************************************************************
2644: ******************************************************************************
2645:
2646: ThunderLAN Driver Eeprom routines
2647:
2648: The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
2649: EEPROM. These functions are based on information in Microchip's
2650: data sheet. I don't know how well this functions will work with
2651: other EEPROMs.
2652:
2653: ******************************************************************************
2654: *****************************************************************************/
2655:
2656:
2657: /***************************************************************
2658: * TLan_EeSendStart
2659: *
2660: * Returns:
2661: * Nothing
2662: * Parms:
2663: * io_base The IO port base address for the
2664: * TLAN device with the EEPROM to
2665: * use.
2666: *
2667: * This function sends a start cycle to an EEPROM attached
2668: * to a TLAN chip.
2669: *
2670: **************************************************************/
2671:
2672: void TLan_EeSendStart( u16 io_base )
2673: {
2674: u16 sio;
2675:
2676: outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
2677: sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
2678:
2679: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2680: TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
2681: TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
2682: TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
2683: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2684:
2685: } /* TLan_EeSendStart */
2686:
2687:
2688:
2689:
2690: /***************************************************************
2691: * TLan_EeSendByte
2692: *
2693: * Returns:
2694: * If the correct ack was received, 0, otherwise 1
2695: * Parms: io_base The IO port base address for the
2696: * TLAN device with the EEPROM to
2697: * use.
2698: * data The 8 bits of information to
2699: * send to the EEPROM.
2700: * stop If TLAN_EEPROM_STOP is passed, a
2701: * stop cycle is sent after the
2702: * byte is sent after the ack is
2703: * read.
2704: *
2705: * This function sends a byte on the serial EEPROM line,
2706: * driving the clock to send each bit. The function then
2707: * reverses transmission direction and reads an acknowledge
2708: * bit.
2709: *
2710: **************************************************************/
2711:
2712: int TLan_EeSendByte( u16 io_base, u8 data, int stop )
2713: {
2714: int err;
2715: u8 place;
2716: u16 sio;
2717:
2718: outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
2719: sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
2720:
2721: /* Assume clock is low, tx is enabled; */
2722: for ( place = 0x80; place != 0; place >>= 1 ) {
2723: if ( place & data )
2724: TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
2725: else
2726: TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
2727: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2728: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2729: }
2730: TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
2731: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2732: err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
2733: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2734: TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
2735:
2736: if ( ( ! err ) && stop ) {
2737: TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
2738: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2739: TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
2740: }
2741:
2742: return ( err );
2743:
2744: } /* TLan_EeSendByte */
2745:
2746:
2747:
2748:
2749: /***************************************************************
2750: * TLan_EeReceiveByte
2751: *
2752: * Returns:
2753: * Nothing
2754: * Parms:
2755: * io_base The IO port base address for the
2756: * TLAN device with the EEPROM to
2757: * use.
2758: * data An address to a char to hold the
2759: * data sent from the EEPROM.
2760: * stop If TLAN_EEPROM_STOP is passed, a
2761: * stop cycle is sent after the
2762: * byte is received, and no ack is
2763: * sent.
2764: *
2765: * This function receives 8 bits of data from the EEPROM
2766: * over the serial link. It then sends and ack bit, or no
2767: * ack and a stop bit. This function is used to retrieve
2768: * data after the address of a byte in the EEPROM has been
2769: * sent.
2770: *
2771: **************************************************************/
2772:
2773: void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
2774: {
2775: u8 place;
2776: u16 sio;
2777:
2778: outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
2779: sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
2780: *data = 0;
2781:
2782: /* Assume clock is low, tx is enabled; */
2783: TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
2784: for ( place = 0x80; place; place >>= 1 ) {
2785: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2786: if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
2787: *data |= place;
2788: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2789: }
2790:
2791: TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
2792: if ( ! stop ) {
2793: TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
2794: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2795: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2796: } else {
2797: TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
2798: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2799: TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
2800: TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
2801: TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
2802: TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
2803: }
2804:
2805: } /* TLan_EeReceiveByte */
2806:
2807:
2808:
2809:
2810: /***************************************************************
2811: * TLan_EeReadByte
2812: *
2813: * Returns:
2814: * No error = 0, else, the stage at which the error
2815: * occured.
2816: * Parms:
2817: * io_base The IO port base address for the
2818: * TLAN device with the EEPROM to
2819: * use.
2820: * ee_addr The address of the byte in the
2821: * EEPROM whose contents are to be
2822: * retrieved.
2823: * data An address to a char to hold the
2824: * data obtained from the EEPROM.
2825: *
2826: * This function reads a byte of information from an byte
2827: * cell in the EEPROM.
2828: *
2829: **************************************************************/
2830:
2831: int TLan_EeReadByte( struct device *dev, u8 ee_addr, u8 *data )
2832: {
2833: int err;
2834:
2835: if ( dev->interrupt == 0 )
2836: cli();
2837: dev->interrupt++;
2838:
2839: TLan_EeSendStart( dev->base_addr );
2840: err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
2841: if (err)
2842: return 1;
2843: err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
2844: if (err)
2845: return 2;
2846: TLan_EeSendStart( dev->base_addr );
2847: err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
2848: if (err)
2849: return 3;
2850: TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
2851:
2852: dev->interrupt--;
2853: if ( dev->interrupt == 0 )
2854: sti();
2855:
2856: return 0;
2857:
2858: } /* TLan_EeReadByte */
2859:
2860:
2861:
2862:
2863:
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