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1.1 root 1: /* via-rhine.c: A Linux Ethernet device driver for VIA Rhine family chips. */
2: /*
3: Written 1998 by Donald Becker.
4:
5: This software may be used and distributed according to the terms
6: of the GNU Public License (GPL), incorporated herein by reference.
7: Drivers derived from this code also fall under the GPL and must retain
8: this authorship and copyright notice.
9:
10: This driver is designed for the VIA VT86c100A Rhine-II PCI Fast Ethernet
11: controller. It also works with the older 3043 Rhine-I chip.
12:
13: The author may be reached as [email protected], or
14: Donald Becker
15: 312 Severn Ave. #W302
16: Annapolis MD 21403
17:
18: Support and updates available at
19: http://cesdis.gsfc.nasa.gov/linux/drivers/via-rhine.html
20: */
21:
22: static const char *versionA =
23: "via-rhine.c:v1.00 9/5/98 Written by Donald Becker\n";
24: static const char *versionB =
25: " http://cesdis.gsfc.nasa.gov/linux/drivers/via-rhine.html\n";
26:
27: /* A few user-configurable values. These may be modified when a driver
28: module is loaded.*/
29:
30: static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
31: static int max_interrupt_work = 20;
32: static int min_pci_latency = 64;
33:
34: /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
35: Setting to > 1518 effectively disables this feature. */
36: static int rx_copybreak = 0;
37:
38: /* Used to pass the media type, etc.
39: Both 'options[]' and 'full_duplex[]' should exist for driver
40: interoperability.
41: The media type is usually passed in 'options[]'.
42: */
43: #define MAX_UNITS 8 /* More are supported, limit only on options */
44: static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
45: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
46:
47: /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
48: The Rhine has a 64 element 8390-like hash table. */
49: static const int multicast_filter_limit = 32;
50:
51: /* Operational parameters that are set at compile time. */
52:
53: /* Keep the ring sizes a power of two for compile efficiency.
54: The compiler will convert <unsigned>'%'<2^N> into a bit mask.
55: Making the Tx ring too large decreases the effectiveness of channel
56: bonding and packet priority.
57: There are no ill effects from too-large receive rings. */
58: #define TX_RING_SIZE 8
59: #define RX_RING_SIZE 16
60:
61: /* Operational parameters that usually are not changed. */
62: /* Time in jiffies before concluding the transmitter is hung. */
63: #define TX_TIMEOUT (2*HZ)
64:
65: #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
66:
67: /* Include files, designed to support most kernel versions 2.0.0 and later. */
68: #include <linux/config.h>
69: #include <linux/version.h>
70: #ifdef MODULE
71: #ifdef MODVERSIONS
72: #include <linux/modversions.h>
73: #endif
74: #include <linux/module.h>
75: #else
76: #define MOD_INC_USE_COUNT
77: #define MOD_DEC_USE_COUNT
78: #endif
79:
80: #include <linux/kernel.h>
81: #include <linux/string.h>
82: #include <linux/timer.h>
83: #include <linux/errno.h>
84: #include <linux/ioport.h>
85: #include <linux/malloc.h>
86: #include <linux/interrupt.h>
87: #include <linux/pci.h>
88: #include <linux/netdevice.h>
89: #include <linux/etherdevice.h>
90: #include <linux/skbuff.h>
91: #include <asm/processor.h> /* Processor type for cache alignment. */
92: #include <asm/bitops.h>
93: #include <asm/io.h>
94:
95: /* This driver was written to use PCI memory space, however some boards
96: only work with I/O space accesses. */
97: #define VIA_USE_IO
98: #ifdef VIA_USE_IO
99: #undef readb
100: #undef readw
101: #undef readl
102: #undef writeb
103: #undef writew
104: #undef writel
105: #define readb inb
106: #define readw inw
107: #define readl inl
108: #define writeb outb
109: #define writew outw
110: #define writel outl
111: #endif
112:
113: /* Kernel compatibility defines, some common to David Hind's PCMCIA package.
114: This is only in the support-all-kernels source code. */
115:
116: #define RUN_AT(x) (jiffies + (x))
117:
118: #if (LINUX_VERSION_CODE >= 0x20100)
119: char kernel_version[] = UTS_RELEASE;
120: #else
121: #ifndef __alpha__
122: #define ioremap vremap
123: #define iounmap vfree
124: #endif
125: #endif
126: #if defined(MODULE) && LINUX_VERSION_CODE > 0x20115
127: MODULE_AUTHOR("Donald Becker <[email protected]>");
128: MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");
129: MODULE_PARM(max_interrupt_work, "i");
130: MODULE_PARM(min_pci_latency, "i");
131: MODULE_PARM(debug, "i");
132: MODULE_PARM(rx_copybreak, "i");
133: MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
134: MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
135: #endif
136: #if LINUX_VERSION_CODE < 0x20123
137: #define test_and_set_bit(val, addr) set_bit(val, addr)
138: #endif
139: #if LINUX_VERSION_CODE <= 0x20139
140: #define net_device_stats enet_statistics
141: #else
142: #define NETSTATS_VER2
143: #endif
144: #if LINUX_VERSION_CODE < 0x20155 || defined(CARDBUS)
145: /* Grrrr, the PCI code changed, but did not consider CardBus... */
146: #include <linux/bios32.h>
147: #define PCI_SUPPORT_VER1
148: #else
149: #define PCI_SUPPORT_VER2
150: #endif
151: #if LINUX_VERSION_CODE < 0x20159
152: #define dev_free_skb(skb) dev_kfree_skb(skb, FREE_WRITE);
153: #else
154: #define dev_free_skb(skb) dev_kfree_skb(skb);
155: #endif
156:
157:
158: /*
159: Theory of Operation
160:
161: I. Board Compatibility
162:
163: This driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernet
164: controller.
165:
166: II. Board-specific settings
167:
168: Boards with this chip are functional only in a bus-master PCI slot.
169:
170: Many operational settings are loaded from the EEPROM to the Config word at
171: offset 0x78. This driver assumes that they are correct.
172: If this driver is compiled to use PCI memory space operations the EEPROM
173: must be configured to enable memory ops.
174:
175: III. Driver operation
176:
177: IIIa. Ring buffers
178:
179: This driver uses two statically allocated fixed-size descriptor lists
180: formed into rings by a branch from the final descriptor to the beginning of
181: the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
182:
183: IIIb/c. Transmit/Receive Structure
184:
185: This driver attempts to use a zero-copy receive and transmit scheme.
186:
187: Alas, all data buffers are required to start on a 32 bit boundary, so
188: the driver must often copy transmit packets into bounce buffers.
189:
190: The driver allocates full frame size skbuffs for the Rx ring buffers at
191: open() time and passes the skb->data field to the chip as receive data
192: buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
193: a fresh skbuff is allocated and the frame is copied to the new skbuff.
194: When the incoming frame is larger, the skbuff is passed directly up the
195: protocol stack. Buffers consumed this way are replaced by newly allocated
196: skbuffs in the last phase of netdev_rx().
197:
198: The RX_COPYBREAK value is chosen to trade-off the memory wasted by
199: using a full-sized skbuff for small frames vs. the copying costs of larger
200: frames. New boards are typically used in generously configured machines
201: and the underfilled buffers have negligible impact compared to the benefit of
202: a single allocation size, so the default value of zero results in never
203: copying packets. When copying is done, the cost is usually mitigated by using
204: a combined copy/checksum routine. Copying also preloads the cache, which is
205: most useful with small frames.
206:
207: Since the VIA chips are only able to transfer data to buffers on 32 bit
208: boundaries, the the IP header at offset 14 in an ethernet frame isn't
209: longword aligned for further processing. Copying these unaligned buffers
210: has the beneficial effect of 16-byte aligning the IP header.
211:
212: IIId. Synchronization
213:
214: The driver runs as two independent, single-threaded flows of control. One
215: is the send-packet routine, which enforces single-threaded use by the
216: dev->tbusy flag. The other thread is the interrupt handler, which is single
217: threaded by the hardware and interrupt handling software.
218:
219: The send packet thread has partial control over the Tx ring and 'dev->tbusy'
220: flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
221: queue slot is empty, it clears the tbusy flag when finished otherwise it sets
222: the 'lp->tx_full' flag.
223:
224: The interrupt handler has exclusive control over the Rx ring and records stats
225: from the Tx ring. After reaping the stats, it marks the Tx queue entry as
226: empty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, it
227: clears both the tx_full and tbusy flags.
228:
229: IV. Notes
230:
231: IVb. References
232:
233: Preliminary VT86C100A manual from http://www.via.com.tw/
234: http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
235: http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
236:
237: IVc. Errata
238:
239: The VT86C100A manual is not reliable information.
240: The chip does not handle unaligned transmit or receive buffers, resulting
241: in significant performance degradation for bounce buffer copies on transmit
242: and unaligned IP headers on receive.
243: The chip does not pad to minimum transmit length.
244:
245: */
246:
247:
248:
249: /* This table drives the PCI probe routines. It's mostly boilerplate in all
250: of the drivers, and will likely be provided by some future kernel.
251: Note the matching code -- the first table entry matchs all 56** cards but
252: second only the 1234 card.
253: */
254: enum pci_flags_bit {
255: PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
256: PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
257: };
258: struct pci_id_info {
259: const char *name;
260: u16 vendor_id, device_id, device_id_mask, flags;
261: int io_size;
262: struct device *(*probe1)(int pci_bus, int pci_devfn, struct device *dev,
263: long ioaddr, int irq, int chip_idx, int fnd_cnt);
264: };
265:
266: static struct device *via_probe1(int pci_bus, int pci_devfn,
267: struct device *dev, long ioaddr, int irq,
268: int chp_idx, int fnd_cnt);
269:
270: static struct pci_id_info pci_tbl[] = {
271: { "VIA VT86C100A Rhine-II", 0x1106, 0x6100, 0xffff,
272: PCI_USES_MEM|PCI_USES_IO|PCI_USES_MEM|PCI_USES_MASTER, 128, via_probe1},
273: { "VIA VT3043 Rhine", 0x1106, 0x3043, 0xffff,
274: PCI_USES_IO|PCI_USES_MEM|PCI_USES_MASTER, 128, via_probe1},
275: {0,}, /* 0 terminated list. */
276: };
277:
278:
279: /* A chip capabilities table, matching the entries in pci_tbl[] above. */
280: enum chip_capability_flags {CanHaveMII=1, };
281: struct chip_info {
282: int io_size;
283: int flags;
284: } static cap_tbl[] = {
285: {128, CanHaveMII, },
286: {128, CanHaveMII, },
287: };
288:
289:
290: /* Offsets to the device registers.
291: */
292: enum register_offsets {
293: StationAddr=0x00, RxConfig=0x06, TxConfig=0x07, ChipCmd=0x08,
294: IntrStatus=0x0C, IntrEnable=0x0E,
295: MulticastFilter0=0x10, MulticastFilter1=0x14,
296: RxRingPtr=0x18, TxRingPtr=0x1C,
297: MIIPhyAddr=0x6C, MIIStatus=0x6D, PCIConfig=0x6E,
298: MIICmd=0x70, MIIRegAddr=0x71, MIIData=0x72,
299: Config=0x78, RxMissed=0x7C, RxCRCErrs=0x7E,
300: };
301:
302: /* Bits in the interrupt status/mask registers. */
303: enum intr_status_bits {
304: IntrRxDone=0x0001, IntrRxErr=0x0004, IntrRxEmpty=0x0020,
305: IntrTxDone=0x0002, IntrTxAbort=0x0008, IntrTxUnderrun=0x0010,
306: IntrPCIErr=0x0040,
307: IntrStatsMax=0x0080, IntrRxEarly=0x0100, IntrMIIChange=0x0200,
308: IntrRxOverflow=0x0400, IntrRxDropped=0x0800, IntrRxNoBuf=0x1000,
309: IntrTxAborted=0x2000, IntrLinkChange=0x4000,
310: IntrRxWakeUp=0x8000,
311: IntrNormalSummary=0x0003, IntrAbnormalSummary=0x8260,
312: };
313:
314:
315: /* The Rx and Tx buffer descriptors. */
316: struct rx_desc {
317: u16 rx_status;
318: u16 rx_length;
319: u32 desc_length;
320: u32 addr;
321: u32 next_desc;
322: };
323: struct tx_desc {
324: u16 tx_status;
325: u16 tx_own;
326: u32 desc_length;
327: u32 addr;
328: u32 next_desc;
329: };
330:
331: /* Bits in *_desc.status */
332: enum rx_status_bits {
333: RxDescOwn=0x80000000, RxOK=0x8000, RxWholePkt=0x0300, RxErr=0x008F};
334: enum desc_status_bits {
335: DescOwn=0x8000, DescEndPacket=0x4000, DescIntr=0x1000,
336: };
337:
338: /* Bits in ChipCmd. */
339: enum chip_cmd_bits {
340: CmdInit=0x0001, CmdStart=0x0002, CmdStop=0x0004, CmdRxOn=0x0008,
341: CmdTxOn=0x0010, CmdTxDemand=0x0020, CmdRxDemand=0x0040,
342: CmdEarlyRx=0x0100, CmdEarlyTx=0x0200, CmdFDuplex=0x0400,
343: CmdNoTxPoll=0x0800, CmdReset=0x8000,
344: };
345:
346: struct netdev_private {
347: /* Descriptor rings first for alignment. */
348: struct rx_desc rx_ring[RX_RING_SIZE];
349: struct tx_desc tx_ring[TX_RING_SIZE];
350: /* The addresses of receive-in-place skbuffs. */
351: struct sk_buff* rx_skbuff[RX_RING_SIZE];
352: /* The saved address of a sent-in-place packet/buffer, for later free(). */
353: struct sk_buff* tx_skbuff[TX_RING_SIZE];
354: unsigned char *tx_buf[TX_RING_SIZE]; /* Tx bounce buffers */
355: unsigned char *tx_bufs; /* Tx bounce buffer region. */
356: struct device *next_module; /* Link for devices of this type. */
357: struct net_device_stats stats;
358: struct timer_list timer; /* Media monitoring timer. */
359: unsigned char pci_bus, pci_devfn;
360: /* Frequently used values: keep some adjacent for cache effect. */
361: int chip_id;
362: long in_interrupt; /* Word-long for SMP locks. */
363: struct rx_desc *rx_head_desc;
364: unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
365: unsigned int cur_tx, dirty_tx;
366: unsigned int rx_buf_sz; /* Based on MTU+slack. */
367: u16 chip_cmd; /* Current setting for ChipCmd */
368: unsigned int tx_full:1; /* The Tx queue is full. */
369: /* These values are keep track of the transceiver/media in use. */
370: unsigned int full_duplex:1; /* Full-duplex operation requested. */
371: unsigned int duplex_lock:1;
372: unsigned int medialock:1; /* Do not sense media. */
373: unsigned int default_port:4; /* Last dev->if_port value. */
374: u8 tx_thresh, rx_thresh;
375: /* MII transceiver section. */
376: int mii_cnt; /* MII device addresses. */
377: u16 advertising; /* NWay media advertisement */
378: unsigned char phys[2]; /* MII device addresses. */
379: };
380:
381: static int mdio_read(struct device *dev, int phy_id, int location);
382: static void mdio_write(struct device *dev, int phy_id, int location, int value);
383: static int netdev_open(struct device *dev);
384: static void check_duplex(struct device *dev);
385: static void netdev_timer(unsigned long data);
386: static void tx_timeout(struct device *dev);
387: static void init_ring(struct device *dev);
388: static int start_tx(struct sk_buff *skb, struct device *dev);
389: static void intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
390: static int netdev_rx(struct device *dev);
391: static void netdev_error(struct device *dev, int intr_status);
392: static void set_rx_mode(struct device *dev);
393: static struct net_device_stats *get_stats(struct device *dev);
394: static int mii_ioctl(struct device *dev, struct ifreq *rq, int cmd);
395: static int netdev_close(struct device *dev);
396:
397:
398:
399: /* A list of our installed devices, for removing the driver module. */
400: static struct device *root_net_dev = NULL;
401:
402: /* Ideally we would detect all network cards in slot order. That would
403: be best done a central PCI probe dispatch, which wouldn't work
404: well when dynamically adding drivers. So instead we detect just the
405: cards we know about in slot order. */
406:
407: static int pci_etherdev_probe(struct device *dev, struct pci_id_info pci_tbl[])
408: {
409: int cards_found = 0;
410: int pci_index = 0;
411: unsigned char pci_bus, pci_device_fn;
412:
413: if ( ! pcibios_present())
414: return -ENODEV;
415:
416: for (;pci_index < 0xff; pci_index++) {
417: u16 vendor, device, pci_command, new_command;
418: int chip_idx, irq;
419: long pciaddr;
420: long ioaddr;
421:
422: if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8, pci_index,
423: &pci_bus, &pci_device_fn)
424: != PCIBIOS_SUCCESSFUL)
425: break;
426: pcibios_read_config_word(pci_bus, pci_device_fn,
427: PCI_VENDOR_ID, &vendor);
428: pcibios_read_config_word(pci_bus, pci_device_fn,
429: PCI_DEVICE_ID, &device);
430:
431: for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++)
432: if (vendor == pci_tbl[chip_idx].vendor_id
433: && (device & pci_tbl[chip_idx].device_id_mask) ==
434: pci_tbl[chip_idx].device_id)
435: break;
436: if (pci_tbl[chip_idx].vendor_id == 0) /* Compiled out! */
437: continue;
438:
439: {
440: #if defined(PCI_SUPPORT_VER2)
441: struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn);
442: #ifdef VIA_USE_IO
443: pciaddr = pdev->base_address[0];
444: #else
445: pciaddr = pdev->base_address[1];
446: #endif
447: irq = pdev->irq;
448: #else
449: u32 pci_memaddr;
450: u8 pci_irq_line;
451: pcibios_read_config_byte(pci_bus, pci_device_fn,
452: PCI_INTERRUPT_LINE, &pci_irq_line);
453: #ifdef VIA_USE_IO
454: pcibios_read_config_dword(pci_bus, pci_device_fn,
455: PCI_BASE_ADDRESS_0, &pci_memaddr);
456: pciaddr = pci_memaddr;
457: #else
458: pcibios_read_config_dword(pci_bus, pci_device_fn,
459: PCI_BASE_ADDRESS_1, &pci_memaddr);
460: pciaddr = pci_memaddr;
461: #endif
462: irq = pci_irq_line;
463: #endif
464: }
465:
466: if (debug > 2)
467: printk(KERN_INFO "Found %s at PCI address %#lx, IRQ %d.\n",
468: pci_tbl[chip_idx].name, pciaddr, irq);
469:
470: if (pci_tbl[chip_idx].flags & PCI_USES_IO) {
471: if (check_region(pciaddr, pci_tbl[chip_idx].io_size))
472: continue;
473: ioaddr = pciaddr & ~3;
474: } else if ((ioaddr = (long)ioremap(pciaddr & ~0xf,
475: pci_tbl[chip_idx].io_size)) == 0) {
476: printk(KERN_INFO "Failed to map PCI address %#lx.\n",
477: pciaddr);
478: continue;
479: }
480:
481: pcibios_read_config_word(pci_bus, pci_device_fn,
482: PCI_COMMAND, &pci_command);
483: new_command = pci_command | (pci_tbl[chip_idx].flags & 7);
484: if (pci_command != new_command) {
485: printk(KERN_INFO " The PCI BIOS has not enabled the"
486: " device at %d/%d! Updating PCI command %4.4x->%4.4x.\n",
487: pci_bus, pci_device_fn, pci_command, new_command);
488: pcibios_write_config_word(pci_bus, pci_device_fn,
489: PCI_COMMAND, new_command);
490: }
491:
492: dev = pci_tbl[chip_idx].probe1(pci_bus, pci_device_fn, dev, ioaddr,
493: irq, chip_idx, cards_found);
494:
495: if (dev && (pci_tbl[chip_idx].flags & PCI_COMMAND_MASTER)) {
496: u8 pci_latency;
497: pcibios_read_config_byte(pci_bus, pci_device_fn,
498: PCI_LATENCY_TIMER, &pci_latency);
499: if (pci_latency < min_pci_latency) {
500: printk(KERN_INFO " PCI latency timer (CFLT) is "
501: "unreasonably low at %d. Setting to %d clocks.\n",
502: pci_latency, min_pci_latency);
503: pcibios_write_config_byte(pci_bus, pci_device_fn,
504: PCI_LATENCY_TIMER, min_pci_latency);
505: }
506: }
507: dev = 0;
508: cards_found++;
509: }
510:
511: return cards_found ? 0 : -ENODEV;
512: }
513:
514: #ifndef MODULE
515: int via_rhine_probe(struct device *dev)
516: {
517: return pci_etherdev_probe(dev, pci_tbl);
518: }
519: #endif
520:
521: static struct device *via_probe1(int pci_bus, int pci_devfn,
522: struct device *dev, long ioaddr, int irq,
523: int chip_id, int card_idx)
524: {
525: static int did_version = 0; /* Already printed version info */
526: struct netdev_private *np;
527: int i, option = card_idx < MAX_UNITS ? options[card_idx] : 0;
528:
529: if (debug > 0 && did_version++ == 0)
530: printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
531:
532: dev = init_etherdev(dev, 0);
533:
534: printk(KERN_INFO "%s: %s at 0x%lx, ",
535: dev->name, pci_tbl[chip_id].name, ioaddr);
536:
537: /* Ideally we would be read the EEPROM but access may be locked. */
538: for (i = 0; i <6; i++)
539: dev->dev_addr[i] = readb(ioaddr + StationAddr + i);
540: for (i = 0; i < 5; i++)
541: printk("%2.2x:", dev->dev_addr[i]);
542: printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
543:
544: #ifdef VIA_USE_IO
545: request_region(ioaddr, pci_tbl[chip_id].io_size, dev->name);
546: #endif
547:
548: /* Reset the chip to erase previous misconfiguration. */
549: writew(CmdReset, ioaddr + ChipCmd);
550:
551: dev->base_addr = ioaddr;
552: dev->irq = irq;
553:
554: /* Make certain the descriptor lists are cache-aligned. */
555: np = (void *)(((long)kmalloc(sizeof(*np), GFP_KERNEL) + 31) & ~31);
556: memset(np, 0, sizeof(*np));
557: dev->priv = np;
558:
559: np->next_module = root_net_dev;
560: root_net_dev = dev;
561:
562: np->pci_bus = pci_bus;
563: np->pci_devfn = pci_devfn;
564: np->chip_id = chip_id;
565:
566: if (dev->mem_start)
567: option = dev->mem_start;
568:
569: /* The lower four bits are the media type. */
570: if (option > 0) {
571: if (option & 0x200)
572: np->full_duplex = 1;
573: np->default_port = option & 15;
574: if (np->default_port)
575: np->medialock = 1;
576: }
577: if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
578: np->full_duplex = 1;
579:
580: if (np->full_duplex)
581: np->duplex_lock = 1;
582:
583: /* The chip-specific entries in the device structure. */
584: dev->open = &netdev_open;
585: dev->hard_start_xmit = &start_tx;
586: dev->stop = &netdev_close;
587: dev->get_stats = &get_stats;
588: dev->set_multicast_list = &set_rx_mode;
589: dev->do_ioctl = &mii_ioctl;
590:
591: if (cap_tbl[np->chip_id].flags & CanHaveMII) {
592: int phy, phy_idx = 0;
593: np->phys[0] = 1; /* Standard for this chip. */
594: for (phy = 1; phy < 32 && phy_idx < 4; phy++) {
595: int mii_status = mdio_read(dev, phy, 1);
596: if (mii_status != 0xffff && mii_status != 0x0000) {
597: np->phys[phy_idx++] = phy;
598: np->advertising = mdio_read(dev, phy, 4);
599: printk(KERN_INFO "%s: MII PHY found at address %d, status "
600: "0x%4.4x advertising %4.4x Link %4.4x.\n",
601: dev->name, phy, mii_status, np->advertising,
602: mdio_read(dev, phy, 5));
603: }
604: }
605: np->mii_cnt = phy_idx;
606: }
607:
608: return dev;
609: }
610:
611:
612: /* Read and write over the MII Management Data I/O (MDIO) interface. */
613:
614: static int mdio_read(struct device *dev, int phy_id, int regnum)
615: {
616: long ioaddr = dev->base_addr;
617: int boguscnt = 1024;
618:
619: /* Wait for a previous command to complete. */
620: while ((readb(ioaddr + MIICmd) & 0x60) && --boguscnt > 0)
621: ;
622: writeb(0x00, ioaddr + MIICmd);
623: writeb(phy_id, ioaddr + MIIPhyAddr);
624: writeb(regnum, ioaddr + MIIRegAddr);
625: writeb(0x40, ioaddr + MIICmd); /* Trigger read */
626: boguscnt = 1024;
627: while ((readb(ioaddr + MIICmd) & 0x40) && --boguscnt > 0)
628: ;
629: return readw(ioaddr + MIIData);
630: }
631:
632: static void mdio_write(struct device *dev, int phy_id, int regnum, int value)
633: {
634: long ioaddr = dev->base_addr;
635: int boguscnt = 1024;
636:
637: /* Wait for a previous command to complete. */
638: while ((readb(ioaddr + MIICmd) & 0x60) && --boguscnt > 0)
639: ;
640: writeb(0x00, ioaddr + MIICmd);
641: writeb(phy_id, ioaddr + MIIPhyAddr);
642: writeb(regnum, ioaddr + MIIRegAddr);
643: writew(value, ioaddr + MIIData);
644: writeb(0x20, ioaddr + MIICmd); /* Trigger write. */
645: return;
646: }
647:
648:
649: static int netdev_open(struct device *dev)
650: {
651: struct netdev_private *np = (struct netdev_private *)dev->priv;
652: long ioaddr = dev->base_addr;
653: int i;
654:
655: /* Reset the chip. */
656: writew(CmdReset, ioaddr + ChipCmd);
657:
658: if (request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev))
659: return -EAGAIN;
660:
661: if (debug > 1)
662: printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
663: dev->name, dev->irq);
664:
665: MOD_INC_USE_COUNT;
666:
667: init_ring(dev);
668:
669: writel(virt_to_bus(np->rx_ring), ioaddr + RxRingPtr);
670: writel(virt_to_bus(np->tx_ring), ioaddr + TxRingPtr);
671:
672: for (i = 0; i < 6; i++)
673: writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
674:
675: /* Initialize other registers. */
676: writew(0x0006, ioaddr + PCIConfig); /* Tune configuration??? */
677: /* Configure the FIFO thresholds. */
678: writeb(0x20, ioaddr + TxConfig); /* Initial threshold 32 bytes */
679: np->tx_thresh = 0x20;
680: np->rx_thresh = 0x60; /* Written in set_rx_mode(). */
681:
682: if (dev->if_port == 0)
683: dev->if_port = np->default_port;
684:
685: dev->tbusy = 0;
686: dev->interrupt = 0;
687: np->in_interrupt = 0;
688:
689: set_rx_mode(dev);
690:
691: dev->start = 1;
692:
693: /* Enable interrupts by setting the interrupt mask. */
694: writew(IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow| IntrRxDropped|
695: IntrTxDone | IntrTxAbort | IntrTxUnderrun |
696: IntrPCIErr | IntrStatsMax | IntrLinkChange | IntrMIIChange,
697: ioaddr + IntrEnable);
698:
699: np->chip_cmd = CmdStart|CmdTxOn|CmdRxOn|CmdNoTxPoll;
700: writew(np->chip_cmd, ioaddr + ChipCmd);
701:
702: check_duplex(dev);
703:
704: if (debug > 2)
705: printk(KERN_DEBUG "%s: Done netdev_open(), status %4.4x "
706: "MII status: %4.4x.\n",
707: dev->name, readw(ioaddr + ChipCmd),
708: mdio_read(dev, np->phys[0], 1));
709:
710: /* Set the timer to check for link beat. */
711: init_timer(&np->timer);
712: np->timer.expires = RUN_AT(1);
713: np->timer.data = (unsigned long)dev;
714: np->timer.function = &netdev_timer; /* timer handler */
715: add_timer(&np->timer);
716:
717: return 0;
718: }
719:
720: static void check_duplex(struct device *dev)
721: {
722: struct netdev_private *np = (struct netdev_private *)dev->priv;
723: long ioaddr = dev->base_addr;
724: int mii_reg5 = mdio_read(dev, np->phys[0], 5);
725: int duplex;
726:
727: if (np->duplex_lock || mii_reg5 == 0xffff)
728: return;
729: duplex = (mii_reg5 & 0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
730: if (np->full_duplex != duplex) {
731: np->full_duplex = duplex;
732: if (debug)
733: printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
734: " partner capability of %4.4x.\n", dev->name,
735: duplex ? "full" : "half", np->phys[0], mii_reg5);
736: if (duplex)
737: np->chip_cmd |= CmdFDuplex;
738: else
739: np->chip_cmd &= ~CmdFDuplex;
740: writew(np->chip_cmd, ioaddr + ChipCmd);
741: }
742: }
743:
744: static void netdev_timer(unsigned long data)
745: {
746: struct device *dev = (struct device *)data;
747: struct netdev_private *np = (struct netdev_private *)dev->priv;
748: long ioaddr = dev->base_addr;
749: int next_tick = 10*HZ;
750:
751: if (debug > 3) {
752: printk(KERN_DEBUG "%s: VIA Rhine monitor tick, status %4.4x.\n",
753: dev->name, readw(ioaddr + IntrStatus));
754: }
755: check_duplex(dev);
756:
757: np->timer.expires = RUN_AT(next_tick);
758: add_timer(&np->timer);
759: }
760:
761: static void tx_timeout(struct device *dev)
762: {
763: struct netdev_private *np = (struct netdev_private *)dev->priv;
764: long ioaddr = dev->base_addr;
765:
766: printk(KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
767: "%4.4x, resetting...\n",
768: dev->name, readw(ioaddr + IntrStatus),
769: mdio_read(dev, np->phys[0], 1));
770:
771: /* Perhaps we should reinitialize the hardware here. */
772: dev->if_port = 0;
773: /* Stop and restart the chip's Tx processes . */
774:
775: /* Trigger an immediate transmit demand. */
776:
777: dev->trans_start = jiffies;
778: np->stats.tx_errors++;
779: return;
780: }
781:
782:
783: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
784: static void init_ring(struct device *dev)
785: {
786: struct netdev_private *np = (struct netdev_private *)dev->priv;
787: int i;
788:
789: np->tx_full = 0;
790: np->cur_rx = np->cur_tx = 0;
791: np->dirty_rx = np->dirty_tx = 0;
792:
793: np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
794: np->rx_head_desc = &np->rx_ring[0];
795:
796: for (i = 0; i < RX_RING_SIZE; i++) {
797: np->rx_ring[i].rx_status = 0;
798: np->rx_ring[i].rx_length = 0;
799: np->rx_ring[i].desc_length = np->rx_buf_sz;
800: np->rx_ring[i].next_desc = virt_to_bus(&np->rx_ring[i+1]);
801: np->rx_skbuff[i] = 0;
802: }
803: /* Mark the last entry as wrapping the ring. */
804: np->rx_ring[i-1].next_desc = virt_to_bus(&np->rx_ring[0]);
805:
806: /* Fill in the Rx buffers. */
807: for (i = 0; i < RX_RING_SIZE; i++) {
808: struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
809: np->rx_skbuff[i] = skb;
810: if (skb == NULL)
811: break;
812: skb->dev = dev; /* Mark as being used by this device. */
813: np->rx_ring[i].addr = virt_to_bus(skb->tail);
814: np->rx_ring[i].rx_status = 0;
815: np->rx_ring[i].rx_length = DescOwn;
816: }
817: np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
818:
819: for (i = 0; i < TX_RING_SIZE; i++) {
820: np->tx_skbuff[i] = 0;
821: np->tx_ring[i].tx_own = 0;
822: np->tx_ring[i].desc_length = 0x00e08000;
823: np->tx_ring[i].next_desc = virt_to_bus(&np->tx_ring[i+1]);
824: np->tx_buf[i] = kmalloc(PKT_BUF_SZ, GFP_KERNEL);
825: }
826: np->tx_ring[i-1].next_desc = virt_to_bus(&np->tx_ring[0]);
827:
828: return;
829: }
830:
831: static int start_tx(struct sk_buff *skb, struct device *dev)
832: {
833: struct netdev_private *np = (struct netdev_private *)dev->priv;
834: unsigned entry;
835:
836: /* Block a timer-based transmit from overlapping. This could better be
837: done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
838: if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
839: if (jiffies - dev->trans_start < TX_TIMEOUT)
840: return 1;
841: tx_timeout(dev);
842: return 1;
843: }
844:
845: /* Caution: the write order is important here, set the field
846: with the "ownership" bits last. */
847:
848: /* Calculate the next Tx descriptor entry. */
849: entry = np->cur_tx % TX_RING_SIZE;
850:
851: np->tx_skbuff[entry] = skb;
852:
853: if ((long)skb->data & 3) { /* Must use alignment buffer. */
854: if (np->tx_buf[entry] == NULL &&
855: (np->tx_buf[entry] = kmalloc(PKT_BUF_SZ, GFP_KERNEL)) == NULL)
856: return 1;
857: memcpy(np->tx_buf[entry], skb->data, skb->len);
858: np->tx_ring[entry].addr = virt_to_bus(np->tx_buf[entry]);
859: } else
860: np->tx_ring[entry].addr = virt_to_bus(skb->data);
861:
862: np->tx_ring[entry].desc_length = 0x00E08000 |
863: (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN);
864: np->tx_ring[entry].tx_own = DescOwn;
865:
866: np->cur_tx++;
867:
868: /* Non-x86 Todo: explicitly flush cache lines here. */
869:
870: /* Wake the potentially-idle transmit channel. */
871: writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
872:
873: if (np->cur_tx - np->dirty_tx < TX_RING_SIZE - 1)
874: clear_bit(0, (void*)&dev->tbusy); /* Typical path */
875: else
876: np->tx_full = 1;
877: dev->trans_start = jiffies;
878:
879: if (debug > 4) {
880: printk(KERN_DEBUG "%s: Transmit frame #%d queued in slot %d.\n",
881: dev->name, np->cur_tx, entry);
882: }
883: return 0;
884: }
885:
886: /* The interrupt handler does all of the Rx thread work and cleans up
887: after the Tx thread. */
888: static void intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
889: {
890: struct device *dev = (struct device *)dev_instance;
891: struct netdev_private *np;
892: long ioaddr, boguscnt = max_interrupt_work;
893:
894: ioaddr = dev->base_addr;
895: np = (struct netdev_private *)dev->priv;
896: #if defined(__i386__)
897: /* A lock to prevent simultaneous entry bug on Intel SMP machines. */
898: if (test_and_set_bit(0, (void*)&dev->interrupt)) {
899: printk(KERN_ERR"%s: SMP simultaneous entry of an interrupt handler.\n",
900: dev->name);
901: dev->interrupt = 0; /* Avoid halting machine. */
902: return;
903: }
904: #else
905: if (dev->interrupt) {
906: printk(KERN_ERR "%s: Re-entering the interrupt handler.\n", dev->name);
907: return;
908: }
909: dev->interrupt = 1;
910: #endif
911:
912: do {
913: u32 intr_status = readw(ioaddr + IntrStatus);
914:
915: /* Acknowledge all of the current interrupt sources ASAP. */
916: writew(intr_status & 0xffff, ioaddr + IntrStatus);
917:
918: if (debug > 4)
919: printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
920: dev->name, intr_status);
921:
922: if (intr_status == 0)
923: break;
924:
925: if (intr_status & (IntrRxDone | IntrRxErr | IntrRxDropped |
926: IntrRxWakeUp | IntrRxEmpty | IntrRxNoBuf))
927: netdev_rx(dev);
928:
929: for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
930: int entry = np->dirty_tx % TX_RING_SIZE;
931: int txstatus;
932: if (np->tx_ring[entry].tx_own)
933: break;
934: txstatus = np->tx_ring[entry].tx_status;
935: if (debug > 6)
936: printk(KERN_DEBUG " Tx scavenge %d status %4.4x.\n",
937: entry, txstatus);
938: if (txstatus & 0x8000) {
939: if (debug > 1)
940: printk(KERN_DEBUG "%s: Transmit error, Tx status %4.4x.\n",
941: dev->name, txstatus);
942: np->stats.tx_errors++;
943: if (txstatus & 0x0400) np->stats.tx_carrier_errors++;
944: if (txstatus & 0x0200) np->stats.tx_window_errors++;
945: if (txstatus & 0x0100) np->stats.tx_aborted_errors++;
946: if (txstatus & 0x0080) np->stats.tx_heartbeat_errors++;
947: if (txstatus & 0x0002) np->stats.tx_fifo_errors++;
948: #ifdef ETHER_STATS
949: if (txstatus & 0x0100) np->stats.collisions16++;
950: #endif
951: /* Transmitter restarted in 'abnormal' handler. */
952: } else {
953: #ifdef ETHER_STATS
954: if (txstatus & 0x0001) np->stats.tx_deferred++;
955: #endif
956: np->stats.collisions += (txstatus >> 3) & 15;
957: #if defined(NETSTATS_VER2)
958: np->stats.tx_bytes += np->tx_ring[entry].desc_length & 0x7ff;
959: #endif
960: np->stats.tx_packets++;
961: }
962: /* Free the original skb. */
963: dev_free_skb(np->tx_skbuff[entry]);
964: np->tx_skbuff[entry] = 0;
965: }
966: if (np->tx_full && dev->tbusy
967: && np->cur_tx - np->dirty_tx < TX_RING_SIZE - 4) {
968: /* The ring is no longer full, clear tbusy. */
969: np->tx_full = 0;
970: clear_bit(0, (void*)&dev->tbusy);
971: mark_bh(NET_BH);
972: }
973:
974: /* Abnormal error summary/uncommon events handlers. */
975: if (intr_status & (IntrPCIErr | IntrLinkChange | IntrMIIChange |
976: IntrStatsMax | IntrTxAbort | IntrTxUnderrun))
977: netdev_error(dev, intr_status);
978:
979: if (--boguscnt < 0) {
980: printk(KERN_WARNING "%s: Too much work at interrupt, "
981: "status=0x%4.4x.\n",
982: dev->name, intr_status);
983: break;
984: }
985: } while (1);
986:
987: if (debug > 3)
988: printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
989: dev->name, readw(ioaddr + IntrStatus));
990:
991: #if defined(__i386__)
992: clear_bit(0, (void*)&dev->interrupt);
993: #else
994: dev->interrupt = 0;
995: #endif
996: return;
997: }
998:
999: /* This routine is logically part of the interrupt handler, but isolated
1000: for clarity and better register allocation. */
1001: static int netdev_rx(struct device *dev)
1002: {
1003: struct netdev_private *np = (struct netdev_private *)dev->priv;
1004: int entry = np->cur_rx % RX_RING_SIZE;
1005: int boguscnt = np->dirty_rx + RX_RING_SIZE - np->cur_rx;
1006:
1007: if (debug > 4) {
1008: printk(KERN_DEBUG " In netdev_rx(), entry %d status %4.4x.\n",
1009: entry, np->rx_head_desc->rx_length);
1010: }
1011:
1012: /* If EOP is set on the next entry, it's a new packet. Send it up. */
1013: while ( ! (np->rx_head_desc->rx_length & DescOwn)) {
1014: struct rx_desc *desc = np->rx_head_desc;
1015: int data_size = desc->rx_length;
1016: u16 desc_status = desc->rx_status;
1017:
1018: if (debug > 4)
1019: printk(KERN_DEBUG " netdev_rx() status is %4.4x.\n",
1020: desc_status);
1021: if (--boguscnt < 0)
1022: break;
1023: if ( (desc_status & (RxWholePkt | RxErr)) != RxWholePkt) {
1024: if ((desc_status & RxWholePkt) != RxWholePkt) {
1025: printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1026: "multiple buffers, entry %#x length %d status %4.4x!\n",
1027: dev->name, np->cur_rx, data_size, desc_status);
1028: printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1029: dev->name, np->rx_head_desc,
1030: &np->rx_ring[np->cur_rx % RX_RING_SIZE]);
1031: np->stats.rx_length_errors++;
1032: } else if (desc_status & RxErr) {
1033: /* There was a error. */
1034: if (debug > 2)
1035: printk(KERN_DEBUG " netdev_rx() Rx error was %8.8x.\n",
1036: desc_status);
1037: np->stats.rx_errors++;
1038: if (desc_status & 0x0030) np->stats.rx_length_errors++;
1039: if (desc_status & 0x0048) np->stats.rx_fifo_errors++;
1040: if (desc_status & 0x0004) np->stats.rx_frame_errors++;
1041: if (desc_status & 0x0002) np->stats.rx_crc_errors++;
1042: }
1043: } else {
1044: struct sk_buff *skb;
1045: /* Length should omit the CRC */
1046: u16 pkt_len = data_size - 4;
1047:
1048: /* Check if the packet is long enough to accept without copying
1049: to a minimally-sized skbuff. */
1050: if (pkt_len < rx_copybreak
1051: && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1052: skb->dev = dev;
1053: skb_reserve(skb, 2); /* 16 byte align the IP header */
1054: #if ! defined(__alpha__) || USE_IP_COPYSUM /* Avoid misaligned on Alpha */
1055: eth_copy_and_sum(skb, bus_to_virt(desc->addr),
1056: pkt_len, 0);
1057: skb_put(skb, pkt_len);
1058: #else
1059: memcpy(skb_put(skb,pkt_len), bus_to_virt(desc->addr), pkt_len);
1060: #endif
1061: } else {
1062: skb_put(skb = np->rx_skbuff[entry], pkt_len);
1063: np->rx_skbuff[entry] = NULL;
1064: }
1065: skb->protocol = eth_type_trans(skb, dev);
1066: netif_rx(skb);
1067: dev->last_rx = jiffies;
1068: np->stats.rx_packets++;
1069: }
1070: entry = (++np->cur_rx) % RX_RING_SIZE;
1071: np->rx_head_desc = &np->rx_ring[entry];
1072: }
1073:
1074: /* Refill the Rx ring buffers. */
1075: for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1076: struct sk_buff *skb;
1077: entry = np->dirty_rx % RX_RING_SIZE;
1078: if (np->rx_skbuff[entry] == NULL) {
1079: skb = dev_alloc_skb(np->rx_buf_sz);
1080: np->rx_skbuff[entry] = skb;
1081: if (skb == NULL)
1082: break; /* Better luck next round. */
1083: skb->dev = dev; /* Mark as being used by this device. */
1084: np->rx_ring[entry].addr = virt_to_bus(skb->tail);
1085: }
1086: np->rx_ring[entry].rx_status = 0;
1087: np->rx_ring[entry].rx_length = DescOwn;
1088: }
1089:
1090: /* Pre-emptively restart Rx engine. */
1091: writew(CmdRxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1092: return 0;
1093: }
1094:
1095: static void netdev_error(struct device *dev, int intr_status)
1096: {
1097: struct netdev_private *np = (struct netdev_private *)dev->priv;
1098: long ioaddr = dev->base_addr;
1099:
1100: if (intr_status & (IntrMIIChange | IntrLinkChange)) {
1101: if (readb(ioaddr + MIIStatus) & 0x02)
1102: /* Link failed, restart autonegotiation. */
1103: mdio_write(dev, np->phys[0], 0, 0x3300);
1104: else
1105: check_duplex(dev);
1106: if (debug)
1107: printk(KERN_ERR "%s: MII status changed: Autonegotiation "
1108: "advertising %4.4x partner %4.4x.\n", dev->name,
1109: mdio_read(dev, np->phys[0], 4),
1110: mdio_read(dev, np->phys[0], 5));
1111: }
1112: if (intr_status & IntrStatsMax) {
1113: np->stats.rx_crc_errors += readw(ioaddr + RxCRCErrs);
1114: np->stats.rx_missed_errors += readw(ioaddr + RxMissed);
1115: writel(0, RxMissed);
1116: }
1117: if (intr_status & IntrTxAbort) {
1118: /* Stats counted in Tx-done handler, just restart Tx. */
1119: writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1120: }
1121: if (intr_status & IntrTxUnderrun) {
1122: if (np->tx_thresh < 0xE0)
1123: writeb(np->tx_thresh += 0x20, ioaddr + TxConfig);
1124: if (debug > 1)
1125: printk(KERN_INFO "%s: Transmitter underrun, increasing Tx "
1126: "threshold setting to %2.2x.\n", dev->name, np->tx_thresh);
1127: }
1128: if ((intr_status & ~(IntrLinkChange|IntrStatsMax|IntrTxAbort)) && debug) {
1129: printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1130: dev->name, intr_status);
1131: /* Recovery for other fault sources not known. */
1132: writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1133: }
1134: }
1135:
1136: static struct enet_statistics *get_stats(struct device *dev)
1137: {
1138: struct netdev_private *np = (struct netdev_private *)dev->priv;
1139: long ioaddr = dev->base_addr;
1140:
1141: /* Nominally we should lock this segment of code for SMP, although
1142: the vulnerability window is very small and statistics are
1143: non-critical. */
1144: np->stats.rx_crc_errors += readw(ioaddr + RxCRCErrs);
1145: np->stats.rx_missed_errors += readw(ioaddr + RxMissed);
1146: writel(0, RxMissed);
1147:
1148: return &np->stats;
1149: }
1150:
1151: /* The big-endian AUTODIN II ethernet CRC calculation.
1152: N.B. Do not use for bulk data, use a table-based routine instead.
1153: This is common code and should be moved to net/core/crc.c */
1154: static unsigned const ethernet_polynomial = 0x04c11db7U;
1155: static inline u32 ether_crc(int length, unsigned char *data)
1156: {
1157: int crc = -1;
1158:
1159: while(--length >= 0) {
1160: unsigned char current_octet = *data++;
1161: int bit;
1162: for (bit = 0; bit < 8; bit++, current_octet >>= 1) {
1163: crc = (crc << 1) ^
1164: ((crc < 0) ^ (current_octet & 1) ? ethernet_polynomial : 0);
1165: }
1166: }
1167: return crc;
1168: }
1169:
1170: static void set_rx_mode(struct device *dev)
1171: {
1172: struct netdev_private *np = (struct netdev_private *)dev->priv;
1173: long ioaddr = dev->base_addr;
1174: u32 mc_filter[2]; /* Multicast hash filter */
1175: u8 rx_mode; /* Note: 0x02=accept runt, 0x01=accept errs */
1176:
1177: if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1178: /* Unconditionally log net taps. */
1179: printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1180: rx_mode = 0x1C;
1181: } else if ((dev->mc_count > multicast_filter_limit)
1182: || (dev->flags & IFF_ALLMULTI)) {
1183: /* Too many to match, or accept all multicasts. */
1184: rx_mode = 0x0C;
1185: } else {
1186: struct dev_mc_list *mclist;
1187: int i;
1188: memset(mc_filter, 0, sizeof(mc_filter));
1189: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1190: i++, mclist = mclist->next) {
1191: set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26,
1192: mc_filter);
1193: }
1194: writel(mc_filter[0], ioaddr + MulticastFilter0);
1195: writel(mc_filter[1], ioaddr + MulticastFilter1);
1196: rx_mode = 0x0C;
1197: }
1198: writeb(np->rx_thresh | rx_mode, ioaddr + RxConfig);
1199: }
1200:
1201: static int mii_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1202: {
1203: u16 *data = (u16 *)&rq->ifr_data;
1204:
1205: switch(cmd) {
1206: case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1207: data[0] = ((struct netdev_private *)dev->priv)->phys[0] & 0x1f;
1208: /* Fall Through */
1209: case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1210: data[3] = mdio_read(dev, data[0] & 0x1f, data[1] & 0x1f);
1211: return 0;
1212: case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1213: if (!suser())
1214: return -EPERM;
1215: mdio_write(dev, data[0] & 0x1f, data[1] & 0x1f, data[2]);
1216: return 0;
1217: default:
1218: return -EOPNOTSUPP;
1219: }
1220: }
1221:
1222: static int netdev_close(struct device *dev)
1223: {
1224: long ioaddr = dev->base_addr;
1225: struct netdev_private *np = (struct netdev_private *)dev->priv;
1226: int i;
1227:
1228: dev->start = 0;
1229: dev->tbusy = 1;
1230:
1231: if (debug > 1)
1232: printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n",
1233: dev->name, readw(ioaddr + ChipCmd));
1234:
1235: /* Disable interrupts by clearing the interrupt mask. */
1236: writew(0x0000, ioaddr + IntrEnable);
1237:
1238: /* Stop the chip's Tx and Rx processes. */
1239: writew(CmdStop, ioaddr + ChipCmd);
1240:
1241: del_timer(&np->timer);
1242:
1243: free_irq(dev->irq, dev);
1244:
1245: /* Free all the skbuffs in the Rx queue. */
1246: for (i = 0; i < RX_RING_SIZE; i++) {
1247: np->rx_ring[i].rx_length = 0;
1248: np->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1249: if (np->rx_skbuff[i]) {
1250: #if LINUX_VERSION_CODE < 0x20100
1251: np->rx_skbuff[i]->free = 1;
1252: #endif
1253: dev_free_skb(np->rx_skbuff[i]);
1254: }
1255: np->rx_skbuff[i] = 0;
1256: }
1257: for (i = 0; i < TX_RING_SIZE; i++) {
1258: if (np->tx_skbuff[i])
1259: dev_free_skb(np->tx_skbuff[i]);
1260: np->tx_skbuff[i] = 0;
1261: }
1262:
1263: MOD_DEC_USE_COUNT;
1264:
1265: return 0;
1266: }
1267:
1268:
1269: #ifdef MODULE
1270: int init_module(void)
1271: {
1272: if (debug) /* Emit version even if no cards detected. */
1273: printk(KERN_INFO "%s" KERN_INFO "%s", versionA, versionB);
1274: #ifdef CARDBUS
1275: register_driver(ðerdev_ops);
1276: return 0;
1277: #else
1278: return pci_etherdev_probe(NULL, pci_tbl);
1279: #endif
1280: }
1281:
1282: void cleanup_module(void)
1283: {
1284:
1285: #ifdef CARDBUS
1286: unregister_driver(ðerdev_ops);
1287: #endif
1288:
1289: /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1290: while (root_net_dev) {
1291: struct netdev_private *np =
1292: (struct netdev_private *)(root_net_dev->priv);
1293: unregister_netdev(root_net_dev);
1294: #ifdef VIA_USE_IO
1295: release_region(root_net_dev->base_addr, pci_tbl[np->chip_id].io_size);
1296: #else
1297: iounmap((char *)(root_net_dev->base_addr));
1298: #endif
1299: kfree(root_net_dev);
1300: root_net_dev = np->next_module;
1301: #if 0
1302: kfree(np); /* Assumption: no struct realignment. */
1303: #endif
1304: }
1305: }
1306:
1307: #endif /* MODULE */
1308:
1309: /*
1310: * Local variables:
1311: * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c via-rhine.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1312: * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c via-rhine.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1313: * c-indent-level: 4
1314: * c-basic-offset: 4
1315: * tab-width: 4
1316: * End:
1317: */
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