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1.1 root 1: /*
2: * Wavelan ISA driver
3: *
4: * Jean II - HPLB '96
5: *
6: * Reorganisation and extension of the driver.
7: * Original copyrigth follow. See wavelan.p.h for details.
8: *
9: * This file contain the declarations of the Wavelan hardware. Note that
10: * the Wavelan ISA include a i82586 controler (see definitions in
11: * file i82586.h).
12: *
13: * The main difference between the ISA hardware and the pcmcia one is
14: * the Ethernet Controler (i82586 instead of i82593).
15: * The i82586 allow multiple transmit buffers. The PSA need to be accessed
16: * through the host interface.
17: */
18:
19: #ifndef _WAVELAN_H
20: #define _WAVELAN_H
21:
22: /* The detection of the wavelan card is made by reading the MAC
23: * address from the card and checking it. If you have a non AT&T
24: * product (OEM, like DEC RoamAbout, or Digital Ocean, Epson, ...),
25: * you might need to modify this part to accomodate your hardware...
26: */
27: const char MAC_ADDRESSES[][3] =
28: {
29: { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */
30: { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */
31: /* Add your card here and send me the patch ! */
32: };
33:
34: #define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
35:
36: #define WAVELAN_MTU 1500 /* Maximum size of WaveLAN packet */
37:
38: #define MAXDATAZ (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
39:
40: /*************************** PC INTERFACE ****************************/
41:
42: /*
43: * Host Adaptor structure.
44: * (base is board port address).
45: */
46: typedef union hacs_u hacs_u;
47: union hacs_u
48: {
49: unsigned short hu_command; /* Command register */
50: #define HACR_RESET 0x0001 /* Reset board */
51: #define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
52: #define HACR_16BITS 0x0004 /* 16 bits operation (0 => 8bits) */
53: #define HACR_OUT0 0x0008 /* General purpose output pin 0 */
54: /* not used - must be 1 */
55: #define HACR_OUT1 0x0010 /* General purpose output pin 1 */
56: /* not used - must be 1 */
57: #define HACR_82586_INT_ENABLE 0x0020 /* Enable 82586 interrupts */
58: #define HACR_MMC_INT_ENABLE 0x0040 /* Enable MMC interrupts */
59: #define HACR_INTR_CLR_ENABLE 0x0080 /* Enable interrupt status read/clear */
60: unsigned short hu_status; /* Status Register */
61: #define HASR_82586_INTR 0x0001 /* Interrupt request from 82586 */
62: #define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
63: #define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
64: #define HASR_PSA_BUSY 0x0008 /* LAN parameter storage area busy */
65: };
66:
67: typedef struct ha_t ha_t;
68: struct ha_t
69: {
70: hacs_u ha_cs; /* Command and status registers */
71: #define ha_command ha_cs.hu_command
72: #define ha_status ha_cs.hu_status
73: unsigned short ha_mmcr; /* Modem Management Ctrl Register */
74: unsigned short ha_pior0; /* Program I/O Address Register Port 0 */
75: unsigned short ha_piop0; /* Program I/O Port 0 */
76: unsigned short ha_pior1; /* Program I/O Address Register Port 1 */
77: unsigned short ha_piop1; /* Program I/O Port 1 */
78: unsigned short ha_pior2; /* Program I/O Address Register Port 2 */
79: unsigned short ha_piop2; /* Program I/O Port 2 */
80: };
81:
82: #define HA_SIZE 16
83:
84: #define hoff(p,f) (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
85: #define HACR(p) hoff(p, ha_command)
86: #define HASR(p) hoff(p, ha_status)
87: #define MMCR(p) hoff(p, ha_mmcr)
88: #define PIOR0(p) hoff(p, ha_pior0)
89: #define PIOP0(p) hoff(p, ha_piop0)
90: #define PIOR1(p) hoff(p, ha_pior1)
91: #define PIOP1(p) hoff(p, ha_piop1)
92: #define PIOR2(p) hoff(p, ha_pior2)
93: #define PIOP2(p) hoff(p, ha_piop2)
94:
95: /*
96: * Program I/O Mode Register values.
97: */
98: #define STATIC_PIO 0 /* Mode 1: static mode */
99: /* RAM access ??? */
100: #define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
101: /* RAM access ??? */
102: #define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
103: /* RAM access ??? */
104: #define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
105: /* Parameter access. */
106: #define PIO_MASK 3 /* register mask */
107: #define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
108:
109: #define HACR_DEFAULT (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
110: #define HACR_INTRON (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
111:
112: /************************** MEMORY LAYOUT **************************/
113:
114: /*
115: * Onboard 64k RAM layout.
116: * (Offsets from 0x0000.)
117: */
118: #define OFFSET_RU 0x0000 /* 75 % memory */
119: #define OFFSET_CU 0xC000 /* 25 % memory */
120: #define OFFSET_SCB (OFFSET_ISCP - sizeof(scb_t))
121: #define OFFSET_ISCP (OFFSET_SCP - sizeof(iscp_t))
122: #define OFFSET_SCP I82586_SCP_ADDR
123:
124: #define RXBLOCKZ (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
125: #define TXBLOCKZ (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
126:
127: #define NRXBLOCKS ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
128: #define NTXBLOCKS ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
129:
130: /********************** PARAMETER STORAGE AREA **********************/
131:
132: /*
133: * Parameter Storage Area (PSA).
134: */
135: typedef struct psa_t psa_t;
136: struct psa_t
137: {
138: unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
139: unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
140: unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
141: unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
142: unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
143: unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
144: unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
145: unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
146: unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
147: unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
148:
149: unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
150: unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
151: unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
152: #define PSA_UNIVERSAL 0 /* Universal (factory) */
153: #define PSA_LOCAL 1 /* Local */
154: unsigned char psa_comp_number; /* [0x1D] Compatability Number: */
155: #define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
156: #define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
157: #define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
158: #define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
159: #define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
160: unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
161: unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
162: #define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
163: unsigned char psa_subband; /* [0x20] Subband */
164: #define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
165: #define PSA_SUBBAND_2425 1 /* 2425 MHz */
166: #define PSA_SUBBAND_2460 2 /* 2460 MHz */
167: #define PSA_SUBBAND_2484 3 /* 2484 MHz */
168: #define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
169: unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
170: unsigned char psa_mod_delay; /* [0x22] Modem Delay ??? (reserved) */
171: unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
172: unsigned char psa_nwid_select; /* [0x25] Network ID Select On Off */
173: unsigned char psa_encryption_select; /* [0x26] Encryption On Off */
174: unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
175: unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
176: unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
177: unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
178: unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
179: unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
180: unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
181: unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
182: };
183:
184: #define PSA_SIZE 64
185:
186: /* Calculate offset of a field in the above structure
187: * Warning : only even addresses are used */
188: #define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
189:
190: /******************** MODEM MANAGEMENT INTERFACE ********************/
191:
192: /*
193: * Modem Management Controller (MMC) write structure.
194: */
195: typedef struct mmw_t mmw_t;
196: struct mmw_t
197: {
198: unsigned char mmw_encr_key[8]; /* encryption key */
199: unsigned char mmw_encr_enable; /* enable/disable encryption */
200: #define MMW_ENCR_ENABLE_MODE 0x02 /* Mode of security option */
201: #define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option */
202: unsigned char mmw_unused0[1]; /* unused */
203: unsigned char mmw_des_io_invert; /* Encryption option */
204: #define MMW_DES_IO_INVERT_RES 0x0F /* Reserved */
205: #define MMW_DES_IO_INVERT_CTRL 0xF0 /* Control ??? (set to 0) */
206: unsigned char mmw_unused1[5]; /* unused */
207: unsigned char mmw_loopt_sel; /* looptest selection */
208: #define MMW_LOOPT_SEL_DIS_NWID 0x40 /* disable NWID filtering */
209: #define MMW_LOOPT_SEL_INT 0x20 /* activate Attention Request */
210: #define MMW_LOOPT_SEL_LS 0x10 /* looptest w/o collision avoidance */
211: #define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
212: #define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
213: #define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
214: #define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
215: unsigned char mmw_jabber_enable; /* jabber timer enable */
216: /* Abort transmissions > 200 ms */
217: unsigned char mmw_freeze; /* freeze / unfreeeze signal level */
218: /* 0 : signal level & qual updated for every new message, 1 : frozen */
219: unsigned char mmw_anten_sel; /* antenna selection */
220: #define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
221: #define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
222: unsigned char mmw_ifs; /* inter frame spacing */
223: /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
224: unsigned char mmw_mod_delay; /* modem delay (synchro) */
225: unsigned char mmw_jam_time; /* jamming time (after collision) */
226: unsigned char mmw_unused2[1]; /* unused */
227: unsigned char mmw_thr_pre_set; /* level threshold preset */
228: /* Discard all packet with signal < this value (4) */
229: unsigned char mmw_decay_prm; /* decay parameters */
230: unsigned char mmw_decay_updat_prm; /* decay update parameterz */
231: unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
232: /* Discard all packet with quality < this value (3) */
233: unsigned char mmw_netw_id_l; /* NWID low order byte */
234: unsigned char mmw_netw_id_h; /* NWID high order byte */
235: /* Network ID or Domain : create virtual net on the air */
236:
237: /* 2.0 Hardware extension - frequency selection support */
238: unsigned char mmw_mode_select; /* for analog tests (set to 0) */
239: unsigned char mmw_unused3[1]; /* unused */
240: unsigned char mmw_fee_ctrl; /* frequency eeprom control */
241: #define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions */
242: #define MMW_FEE_CTRL_DWLD 0x08 /* Download eeprom to mmc */
243: #define MMW_FEE_CTRL_CMD 0x07 /* EEprom commands : */
244: #define MMW_FEE_CTRL_READ 0x06 /* Read */
245: #define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
246: #define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address */
247: #define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses */
248: #define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
249: #define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
250: #define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
251: #define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers */
252: #define MMW_FEE_CTRL_PRWRITE 0x15 /* Write addr in protect register */
253: #define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
254: /* Never issue this command (PRDS) : it's irreversible !!! */
255:
256: unsigned char mmw_fee_addr; /* EEprom address */
257: #define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel */
258: #define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
259: #define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
260: #define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
261: #define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
262: #define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
263:
264: unsigned char mmw_fee_data_l; /* Write data to EEprom */
265: unsigned char mmw_fee_data_h; /* high octet */
266: unsigned char mmw_ext_ant; /* Setting for external antenna */
267: #define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
268: #define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
269: #define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
270: #define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
271: #define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
272: };
273:
274: #define MMW_SIZE 37
275:
276: #define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
277:
278: /*
279: * Modem Management Controller (MMC) read structure.
280: */
281: typedef struct mmr_t mmr_t;
282: struct mmr_t
283: {
284: unsigned char mmr_unused0[8]; /* unused */
285: unsigned char mmr_des_status; /* encryption status */
286: unsigned char mmr_des_avail; /* encryption available (0x55 read) */
287: #define MMR_DES_AVAIL_DES 0x55 /* DES available */
288: #define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
289: unsigned char mmr_des_io_invert; /* des I/O invert register */
290: unsigned char mmr_unused1[5]; /* unused */
291: unsigned char mmr_dce_status; /* DCE status */
292: #define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
293: #define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
294: #define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
295: #define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
296: unsigned char mmr_dsp_id; /* DSP id (AA = Daedalus rev A) */
297: unsigned char mmr_unused2[2]; /* unused */
298: unsigned char mmr_correct_nwid_l; /* # of correct NWID's rxd (low) */
299: unsigned char mmr_correct_nwid_h; /* # of correct NWID's rxd (high) */
300: /* Warning : Read high order octet first !!! */
301: unsigned char mmr_wrong_nwid_l; /* # of wrong NWID's rxd (low) */
302: unsigned char mmr_wrong_nwid_h; /* # of wrong NWID's rxd (high) */
303: unsigned char mmr_thr_pre_set; /* level threshold preset */
304: #define MMR_THR_PRE_SET 0x3F /* level threshold preset */
305: #define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
306: unsigned char mmr_signal_lvl; /* signal level */
307: #define MMR_SIGNAL_LVL 0x3F /* signal level */
308: #define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
309: unsigned char mmr_silence_lvl; /* silence level (noise) */
310: #define MMR_SILENCE_LVL 0x3F /* silence level */
311: #define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
312: unsigned char mmr_sgnl_qual; /* signal quality */
313: #define MMR_SGNL_QUAL 0x0F /* signal quality */
314: #define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
315: unsigned char mmr_netw_id_l; /* NWID low order byte ??? */
316: unsigned char mmr_unused3[3]; /* unused */
317:
318: /* 2.0 Hardware extension - frequency selection support */
319: unsigned char mmr_fee_status; /* Status of frequency eeprom */
320: #define MMR_FEE_STATUS_ID 0xF0 /* Modem revision id */
321: #define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
322: #define MMR_FEE_STATUS_BUSY 0x04 /* EEprom busy */
323: unsigned char mmr_unused4[1]; /* unused */
324: unsigned char mmr_fee_data_l; /* Read data from eeprom (low) */
325: unsigned char mmr_fee_data_h; /* Read data from eeprom (high) */
326: };
327:
328: #define MMR_SIZE 36
329:
330: #define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
331:
332: /* Make the two above structures one */
333: typedef union mm_t
334: {
335: struct mmw_t w; /* Write to the mmc */
336: struct mmr_t r; /* Read from the mmc */
337: } mm_t;
338:
339: #endif /* _WAVELAN_H */
340:
341: /*
342: * This software may only be used and distributed
343: * according to the terms of the GNU Public License.
344: *
345: * For more details, see wavelan.c.
346: */
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