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1.1 root 1: /*
2:
3: FlashPoint.c -- FlashPoint SCCB Manager for Linux
4:
5: This file contains the FlashPoint SCCB Manager from BusLogic's FlashPoint
6: Driver Developer's Kit, with minor modifications by Leonard N. Zubkoff for
7: Linux compatibility. It was provided by BusLogic in the form of 16 separate
8: source files, which would have unnecessarily cluttered the scsi directory, so
9: the individual files have been combined into this single file.
10:
11: Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
12:
13: This file is available under both the GNU General Public License
14: and a BSD-style copyright; see LICENSE.FlashPoint for details.
15:
16: */
17:
18:
19: #include <linux/config.h>
20:
21:
22: #ifndef CONFIG_SCSI_OMIT_FLASHPOINT
23:
24:
25: #define UNIX
26: #define FW_TYPE _SCCB_MGR_
27: #define MAX_CARDS 8
28: #undef BUSTYPE_PCI
29:
30:
31: #define OS_InPortByte(port) inb(port)
32: #define OS_InPortWord(port) inw(port)
33: #define OS_InPortLong(port) inl(port)
34: #define OS_OutPortByte(port, value) outb(value, port)
35: #define OS_OutPortWord(port, value) outw(value, port)
36: #define OS_OutPortLong(port, value) outl(value, port)
37: #define OS_Lock(x)
38: #define OS_UnLock(x)
39:
40:
41: /*
42: Define name replacements for compatibility with the Linux BusLogic Driver.
43: */
44:
45: #define SccbMgr_sense_adapter FlashPoint_ProbeHostAdapter
46: #define SccbMgr_config_adapter FlashPoint_HardwareResetHostAdapter
47: #define SccbMgr_unload_card FlashPoint_ReleaseHostAdapter
48: #define SccbMgr_start_sccb FlashPoint_StartCCB
49: #define SccbMgr_abort_sccb FlashPoint_AbortCCB
50: #define SccbMgr_my_int FlashPoint_InterruptPending
51: #define SccbMgr_isr FlashPoint_HandleInterrupt
52:
53:
54: /*
55: Define name replacements to avoid kernel namespace pollution.
56: */
57:
58: #define BL_Card FPT_BL_Card
59: #define BusMasterInit FPT_BusMasterInit
60: #define CalcCrc16 FPT_CalcCrc16
61: #define CalcLrc FPT_CalcLrc
62: #define ChkIfChipInitialized FPT_ChkIfChipInitialized
63: #define DiagBusMaster FPT_DiagBusMaster
64: #define DiagEEPROM FPT_DiagEEPROM
65: #define DiagXbow FPT_DiagXbow
66: #define GetTarLun FPT_GetTarLun
67: #define RNVRamData FPT_RNVRamData
68: #define RdStack FPT_RdStack
69: #define SccbMgrTableInitAll FPT_SccbMgrTableInitAll
70: #define SccbMgrTableInitCard FPT_SccbMgrTableInitCard
71: #define SccbMgrTableInitTarget FPT_SccbMgrTableInitTarget
72: #define SccbMgr_bad_isr FPT_SccbMgr_bad_isr
73: #define SccbMgr_scsi_reset FPT_SccbMgr_scsi_reset
74: #define SccbMgr_timer_expired FPT_SccbMgr_timer_expired
75: #define SendMsg FPT_SendMsg
76: #define Wait FPT_Wait
77: #define Wait1Second FPT_Wait1Second
78: #define WrStack FPT_WrStack
79: #define XbowInit FPT_XbowInit
80: #define autoCmdCmplt FPT_autoCmdCmplt
81: #define autoLoadDefaultMap FPT_autoLoadDefaultMap
82: #define busMstrDataXferStart FPT_busMstrDataXferStart
83: #define busMstrSGDataXferStart FPT_busMstrSGDataXferStart
84: #define busMstrTimeOut FPT_busMstrTimeOut
85: #define dataXferProcessor FPT_dataXferProcessor
86: #define default_intena FPT_default_intena
87: #define hostDataXferAbort FPT_hostDataXferAbort
88: #define hostDataXferRestart FPT_hostDataXferRestart
89: #define inisci FPT_inisci
90: #define mbCards FPT_mbCards
91: #define nvRamInfo FPT_nvRamInfo
92: #define phaseBusFree FPT_phaseBusFree
93: #define phaseChkFifo FPT_phaseChkFifo
94: #define phaseCommand FPT_phaseCommand
95: #define phaseDataIn FPT_phaseDataIn
96: #define phaseDataOut FPT_phaseDataOut
97: #define phaseDecode FPT_phaseDecode
98: #define phaseIllegal FPT_phaseIllegal
99: #define phaseMsgIn FPT_phaseMsgIn
100: #define phaseMsgOut FPT_phaseMsgOut
101: #define phaseStatus FPT_phaseStatus
102: #define queueAddSccb FPT_queueAddSccb
103: #define queueCmdComplete FPT_queueCmdComplete
104: #define queueDisconnect FPT_queueDisconnect
105: #define queueFindSccb FPT_queueFindSccb
106: #define queueFlushSccb FPT_queueFlushSccb
107: #define queueFlushTargSccb FPT_queueFlushTargSccb
108: #define queueSearchSelect FPT_queueSearchSelect
109: #define queueSelectFail FPT_queueSelectFail
110: #define s_PhaseTbl FPT_s_PhaseTbl
111: #define scamHAString FPT_scamHAString
112: #define scamInfo FPT_scamInfo
113: #define scarb FPT_scarb
114: #define scasid FPT_scasid
115: #define scbusf FPT_scbusf
116: #define sccbMgrTbl FPT_sccbMgrTbl
117: #define schkdd FPT_schkdd
118: #define scini FPT_scini
119: #define sciso FPT_sciso
120: #define scmachid FPT_scmachid
121: #define scsavdi FPT_scsavdi
122: #define scsel FPT_scsel
123: #define scsell FPT_scsell
124: #define scsendi FPT_scsendi
125: #define scvalq FPT_scvalq
126: #define scwirod FPT_scwirod
127: #define scwiros FPT_scwiros
128: #define scwtsel FPT_scwtsel
129: #define scxferc FPT_scxferc
130: #define sdecm FPT_sdecm
131: #define sfm FPT_sfm
132: #define shandem FPT_shandem
133: #define sinits FPT_sinits
134: #define sisyncn FPT_sisyncn
135: #define sisyncr FPT_sisyncr
136: #define siwidn FPT_siwidn
137: #define siwidr FPT_siwidr
138: #define sres FPT_sres
139: #define sresb FPT_sresb
140: #define ssel FPT_ssel
141: #define ssenss FPT_ssenss
142: #define sssyncv FPT_sssyncv
143: #define stsyncn FPT_stsyncn
144: #define stwidn FPT_stwidn
145: #define sxfrp FPT_sxfrp
146: #define utilEERead FPT_utilEERead
147: #define utilEEReadOrg FPT_utilEEReadOrg
148: #define utilEESendCmdAddr FPT_utilEESendCmdAddr
149: #define utilEEWrite FPT_utilEEWrite
150: #define utilEEWriteOnOff FPT_utilEEWriteOnOff
151: #define utilUpdateResidual FPT_utilUpdateResidual
152:
153:
154: /*----------------------------------------------------------------------
155: *
156: *
157: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
158: *
159: * This file is available under both the GNU General Public License
160: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
161: *
162: * $Workfile: globals.h $
163: *
164: * Description: Common shared global defines.
165: *
166: * $Date: 1999/04/26 05:53:56 $
167: *
168: * $Revision: 1.1 $
169: *
170: *----------------------------------------------------------------------*/
171: #ifndef __GLOBALS_H__
172: #define __GLOBALS_H__
173:
174: #define _UCB_MGR_ 1
175: #define _SCCB_MGR_ 2
176:
177: /*#include <osflags.h>*/
178:
179: #define MAX_CDBLEN 12
180:
181: #define SCAM_LEV_2 1
182:
183: #define CRCMASK 0xA001
184:
185: /* In your osflags.h file, please ENSURE that only ONE OS FLAG
186: is on at a time !!! Also, please make sure you turn set the
187: variable FW_TYPE to either _UCB_MGR_ or _SCCB_MGR_ !!! */
188:
189: #if defined(DOS) || defined(WIN95_16) || defined(OS2) || defined(OTHER_16)
190: #define COMPILER_16_BIT 1
191: #elif defined(NETWARE) || defined(NT) || defined(WIN95_32) || defined(UNIX) || defined(OTHER_32) || defined(SOLARIS_REAL_MODE)
192: #define COMPILER_32_BIT 1
193: #endif
194:
195:
196: #define BL_VENDOR_ID 0x104B
197: #define FP_DEVICE_ID 0x8130
198: #define MM_DEVICE_ID 0x1040
199:
200:
201: #ifndef FALSE
202: #define FALSE 0
203: #endif
204: #ifndef TRUE
205: #define TRUE (!(FALSE))
206: #endif
207:
208: #ifndef NULL
209: #define NULL 0
210: #endif
211:
212: #define FAILURE 0xFFFFFFFFL
213:
214:
215: typedef unsigned char UCHAR;
216: typedef unsigned short USHORT;
217: typedef unsigned int UINT;
218: typedef unsigned long ULONG;
219: typedef unsigned char * PUCHAR;
220: typedef unsigned short* PUSHORT;
221: typedef unsigned long * PULONG;
222: typedef void * PVOID;
223:
224:
225: #if defined(COMPILER_16_BIT)
226: typedef unsigned char far * uchar_ptr;
227: typedef unsigned short far * ushort_ptr;
228: typedef unsigned long far * ulong_ptr;
229: #endif /* 16_BIT_COMPILER */
230:
231: #if defined(COMPILER_32_BIT)
232: typedef unsigned char * uchar_ptr;
233: typedef unsigned short * ushort_ptr;
234: typedef unsigned long * ulong_ptr;
235: #endif /* 32_BIT_COMPILER */
236:
237:
238: /* NEW TYPE DEFINITIONS (shared with Mylex North)
239:
240: ** Use following type defines to avoid confusion in 16 and 32-bit
241: ** environments. Avoid using 'int' as it denotes 16 bits in 16-bit
242: ** environment and 32 in 32-bit environments.
243:
244: */
245:
246: #define s08bits char
247: #define s16bits short
248: #define s32bits long
249:
250: #define u08bits unsigned s08bits
251: #define u16bits unsigned s16bits
252: #define u32bits unsigned s32bits
253:
254: #if defined(COMPILER_16_BIT)
255:
256: typedef u08bits far * pu08bits;
257: typedef u16bits far * pu16bits;
258: typedef u32bits far * pu32bits;
259:
260: #endif /* COMPILER_16_BIT */
261:
262: #if defined(COMPILER_32_BIT)
263:
264: typedef u08bits * pu08bits;
265: typedef u16bits * pu16bits;
266: typedef u32bits * pu32bits;
267:
268: #endif /* COMPILER_32_BIT */
269:
270:
271: #define BIT(x) ((UCHAR)(1<<(x))) /* single-bit mask in bit position x */
272: #define BITW(x) ((USHORT)(1<<(x))) /* single-bit mask in bit position x */
273:
274:
275:
276: #if defined(DOS)
277: /*#include <dos.h>*/
278: #undef inportb /* undefine for Borland Lib */
279: #undef inport /* they may have define I/O function in LIB */
280: #undef outportb
281: #undef outport
282:
283: #define OS_InPortByte(ioport) inportb(ioport)
284: #define OS_InPortWord(ioport) inport(ioport)
285: #define OS_InPortLong(ioport) inportq(ioport, val)
286: #define OS_OutPortByte(ioport, val) outportb(ioport, val)
287: #define OS_OutPortWord(ioport, val) outport(ioport, val)
288: #define OS_OutPortLong(ioport) outportq(ioport, val)
289: #endif /* DOS */
290:
291: #if defined(NETWARE) || defined(OTHER_32) || defined(OTHER_16)
292: extern u08bits OS_InPortByte(u32bits ioport);
293: extern u16bits OS_InPortWord(u32bits ioport);
294: extern u32bits OS_InPortLong(u32bits ioport);
295:
296: extern OS_InPortByteBuffer(u32bits ioport, pu08bits buffer, u32bits count);
297: extern OS_InPortWordBuffer(u32bits ioport, pu16bits buffer, u32bits count);
298: extern OS_OutPortByte(u32bits ioport, u08bits val);
299: extern OS_OutPortWord(u32bits ioport, u16bits val);
300: extern OS_OutPortLong(u32bits ioport, u32bits val);
301: extern OS_OutPortByteBuffer(u32bits ioport, pu08bits buffer, u32bits count);
302: extern OS_OutPortWordBuffer(u32bits ioport, pu16bits buffer, u32bits count);
303: #endif /* NETWARE || OTHER_32 || OTHER_16 */
304:
305: #if defined (NT) || defined(WIN95_32) || defined(WIN95_16)
306: #if defined(NT)
307:
308: extern __declspec(dllimport) u08bits ScsiPortReadPortUchar(pu08bits ioport);
309: extern __declspec(dllimport) u16bits ScsiPortReadPortUshort(pu16bits ioport);
310: extern __declspec(dllimport) u32bits ScsiPortReadPortUlong(pu32bits ioport);
311: extern __declspec(dllimport) void ScsiPortWritePortUchar(pu08bits ioport, u08bits val);
312: extern __declspec(dllimport) void ScsiPortWritePortUshort(pu16bits port, u16bits val);
313: extern __declspec(dllimport) void ScsiPortWritePortUlong(pu32bits port, u32bits val);
314:
315: #else
316:
317: extern u08bits ScsiPortReadPortUchar(pu08bits ioport);
318: extern u16bits ScsiPortReadPortUshort(pu16bits ioport);
319: extern u32bits ScsiPortReadPortUlong(pu32bits ioport);
320: extern void ScsiPortWritePortUchar(pu08bits ioport, u08bits val);
321: extern void ScsiPortWritePortUshort(pu16bits port, u16bits val);
322: extern void ScsiPortWritePortUlong(pu32bits port, u32bits val);
323: #endif
324:
325:
326: #define OS_InPortByte(ioport) ScsiPortReadPortUchar((pu08bits) ioport)
327: #define OS_InPortWord(ioport) ScsiPortReadPortUshort((pu16bits) ioport)
328: #define OS_InPortLong(ioport) ScsiPortReadPortUlong((pu32bits) ioport)
329:
330: #define OS_OutPortByte(ioport, val) ScsiPortWritePortUchar((pu08bits) ioport, (u08bits) val)
331: #define OS_OutPortWord(ioport, val) ScsiPortWritePortUshort((pu16bits) ioport, (u16bits) val)
332: #define OS_OutPortLong(ioport, val) ScsiPortWritePortUlong((pu32bits) ioport, (u32bits) val)
333: #define OS_OutPortByteBuffer(ioport, buffer, count) \
334: ScsiPortWritePortBufferUchar((pu08bits)&port, (pu08bits) buffer, (u32bits) count)
335: #define OS_OutPortWordBuffer(ioport, buffer, count) \
336: ScsiPortWritePortBufferUshort((pu16bits)&port, (pu16bits) buffer, (u32bits) count)
337:
338: #define OS_Lock(x)
339: #define OS_UnLock(x)
340: #endif /* NT || WIN95_32 || WIN95_16 */
341:
342: #if defined (UNIX) && !defined(OS_InPortByte)
343: #define OS_InPortByte(ioport) inb((u16bits)ioport)
344: #define OS_InPortWord(ioport) inw((u16bits)ioport)
345: #define OS_InPortLong(ioport) inl((u16bits)ioport)
346: #define OS_OutPortByte(ioport,val) outb((u16bits)ioport, (u08bits)val)
347: #define OS_OutPortWord(ioport,val) outw((u16bits)ioport, (u16bits)val)
348: #define OS_OutPortLong(ioport,val) outl((u16bits)ioport, (u32bits)val)
349:
350: #define OS_Lock(x)
351: #define OS_UnLock(x)
352: #endif /* UNIX */
353:
354:
355: #if defined(OS2)
356: extern u08bits inb(u32bits ioport);
357: extern u16bits inw(u32bits ioport);
358: extern void outb(u32bits ioport, u08bits val);
359: extern void outw(u32bits ioport, u16bits val);
360:
361: #define OS_InPortByte(ioport) inb(ioport)
362: #define OS_InPortWord(ioport) inw(ioport)
363: #define OS_OutPortByte(ioport, val) outb(ioport, val)
364: #define OS_OutPortWord(ioport, val) outw(ioport, val)
365: extern u32bits OS_InPortLong(u32bits ioport);
366: extern void OS_OutPortLong(u32bits ioport, u32bits val);
367:
368: #define OS_Lock(x)
369: #define OS_UnLock(x)
370: #endif /* OS2 */
371:
372: #if defined(SOLARIS_REAL_MODE)
373:
374: extern unsigned char inb(unsigned long ioport);
375: extern unsigned short inw(unsigned long ioport);
376:
377: #define OS_InPortByte(ioport) inb(ioport)
378: #define OS_InPortWord(ioport) inw(ioport)
379:
380: extern void OS_OutPortByte(unsigned long ioport, unsigned char val);
381: extern void OS_OutPortWord(unsigned long ioport, unsigned short val);
382: extern unsigned long OS_InPortLong(unsigned long ioport);
383: extern void OS_OutPortLong(unsigned long ioport, unsigned long val);
384:
385: #define OS_Lock(x)
386: #define OS_UnLock(x)
387:
388: #endif /* SOLARIS_REAL_MODE */
389:
390: #endif /* __GLOBALS_H__ */
391:
392: /*----------------------------------------------------------------------
393: *
394: *
395: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
396: *
397: * This file is available under both the GNU General Public License
398: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
399: *
400: * $Workfile: sccbmgr.h $
401: *
402: * Description: Common shared SCCB Interface defines and SCCB
403: * Manager specifics defines.
404: *
405: * $Date: 1999/04/26 05:53:56 $
406: *
407: * $Revision: 1.1 $
408: *
409: *----------------------------------------------------------------------*/
410:
411: #ifndef __SCCB_H__
412: #define __SCCB_H__
413:
414: /*#include <osflags.h>*/
415: /*#include <globals.h>*/
416:
417: #if defined(BUGBUG)
418: #define debug_size 32
419: #endif
420:
421: #if defined(DOS)
422:
423: typedef struct _SCCB near *PSCCB;
424: #if (FW_TYPE == _SCCB_MGR_)
425: typedef void (*CALL_BK_FN)(PSCCB);
426: #endif
427:
428: #elif defined(OS2)
429:
430: typedef struct _SCCB far *PSCCB;
431: #if (FW_TYPE == _SCCB_MGR_)
432: typedef void (far *CALL_BK_FN)(PSCCB);
433: #endif
434:
435: #else
436:
437: typedef struct _SCCB *PSCCB;
438: #if (FW_TYPE == _SCCB_MGR_)
439: typedef void (*CALL_BK_FN)(PSCCB);
440: #endif
441:
442: #endif
443:
444:
445: typedef struct SCCBMgr_info {
446: ULONG si_baseaddr;
447: UCHAR si_present;
448: UCHAR si_intvect;
449: UCHAR si_id;
450: UCHAR si_lun;
451: USHORT si_fw_revision;
452: USHORT si_per_targ_init_sync;
453: USHORT si_per_targ_fast_nego;
454: USHORT si_per_targ_ultra_nego;
455: USHORT si_per_targ_no_disc;
456: USHORT si_per_targ_wide_nego;
457: USHORT si_flags;
458: UCHAR si_card_family;
459: UCHAR si_bustype;
460: UCHAR si_card_model[3];
461: UCHAR si_relative_cardnum;
462: UCHAR si_reserved[4];
463: ULONG si_OS_reserved;
464: UCHAR si_XlatInfo[4];
465: ULONG si_reserved2[5];
466: ULONG si_secondary_range;
467: } SCCBMGR_INFO;
468:
469: #if defined(DOS)
470: typedef SCCBMGR_INFO * PSCCBMGR_INFO;
471: #else
472: #if defined (COMPILER_16_BIT)
473: typedef SCCBMGR_INFO far * PSCCBMGR_INFO;
474: #else
475: typedef SCCBMGR_INFO * PSCCBMGR_INFO;
476: #endif
477: #endif // defined(DOS)
478:
479:
480:
481:
482: #if (FW_TYPE==_SCCB_MGR_)
483: #define SCSI_PARITY_ENA 0x0001
484: #define LOW_BYTE_TERM 0x0010
485: #define HIGH_BYTE_TERM 0x0020
486: #define BUSTYPE_PCI 0x3
487: #endif
488:
489: #define SUPPORT_16TAR_32LUN 0x0002
490: #define SOFT_RESET 0x0004
491: #define EXTENDED_TRANSLATION 0x0008
492: #define POST_ALL_UNDERRRUNS 0x0040
493: #define FLAG_SCAM_ENABLED 0x0080
494: #define FLAG_SCAM_LEVEL2 0x0100
495:
496:
497:
498:
499: #define HARPOON_FAMILY 0x02
500:
501:
502: #define ISA_BUS_CARD 0x01
503: #define EISA_BUS_CARD 0x02
504: #define PCI_BUS_CARD 0x03
505: #define VESA_BUS_CARD 0x04
506:
507: /* SCCB struc used for both SCCB and UCB manager compiles!
508: * The UCB Manager treats the SCCB as it's 'native hardware structure'
509: */
510:
511:
512: #pragma pack(1)
513: typedef struct _SCCB {
514: UCHAR OperationCode;
515: UCHAR ControlByte;
516: UCHAR CdbLength;
517: UCHAR RequestSenseLength;
518: ULONG DataLength;
519: ULONG DataPointer;
520: UCHAR CcbRes[2];
521: UCHAR HostStatus;
522: UCHAR TargetStatus;
523: UCHAR TargID;
524: UCHAR Lun;
525: UCHAR Cdb[12];
526: UCHAR CcbRes1;
527: UCHAR Reserved1;
528: ULONG Reserved2;
529: ULONG SensePointer;
530:
531:
532: CALL_BK_FN SccbCallback; /* VOID (*SccbCallback)(); */
533: ULONG SccbIOPort; /* Identifies board base port */
534: UCHAR SccbStatus;
535: UCHAR SCCBRes2;
536: USHORT SccbOSFlags;
537:
538:
539: ULONG Sccb_XferCnt; /* actual transfer count */
540: ULONG Sccb_ATC;
541: ULONG SccbVirtDataPtr; /* virtual addr for OS/2 */
542: ULONG Sccb_res1;
543: USHORT Sccb_MGRFlags;
544: USHORT Sccb_sgseg;
545: UCHAR Sccb_scsimsg; /* identify msg for selection */
546: UCHAR Sccb_tag;
547: UCHAR Sccb_scsistat;
548: UCHAR Sccb_idmsg; /* image of last msg in */
549: PSCCB Sccb_forwardlink;
550: PSCCB Sccb_backlink;
551: ULONG Sccb_savedATC;
552: UCHAR Save_Cdb[6];
553: UCHAR Save_CdbLen;
554: UCHAR Sccb_XferState;
555: ULONG Sccb_SGoffset;
556: #if (FW_TYPE == _UCB_MGR_)
557: PUCB Sccb_ucb_ptr;
558: #endif
559: } SCCB;
560:
561: #define SCCB_SIZE sizeof(SCCB)
562:
563: #pragma pack()
564:
565:
566:
567: #define SCSI_INITIATOR_COMMAND 0x00
568: #define TARGET_MODE_COMMAND 0x01
569: #define SCATTER_GATHER_COMMAND 0x02
570: #define RESIDUAL_COMMAND 0x03
571: #define RESIDUAL_SG_COMMAND 0x04
572: #define RESET_COMMAND 0x81
573:
574:
575: #define F_USE_CMD_Q 0x20 /*Inidcates TAGGED command. */
576: #define TAG_TYPE_MASK 0xC0 /*Type of tag msg to send. */
577: #define TAG_Q_MASK 0xE0
578: #define SCCB_DATA_XFER_OUT 0x10 /* Write */
579: #define SCCB_DATA_XFER_IN 0x08 /* Read */
580:
581:
582: #define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */
583: #define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */
584:
585:
586: #define BUS_FREE_ST 0
587: #define SELECT_ST 1
588: #define SELECT_BDR_ST 2 /* Select w\ Bus Device Reset */
589: #define SELECT_SN_ST 3 /* Select w\ Sync Nego */
590: #define SELECT_WN_ST 4 /* Select w\ Wide Data Nego */
591: #define SELECT_Q_ST 5 /* Select w\ Tagged Q'ing */
592: #define COMMAND_ST 6
593: #define DATA_OUT_ST 7
594: #define DATA_IN_ST 8
595: #define DISCONNECT_ST 9
596: #define STATUS_ST 10
597: #define ABORT_ST 11
598: #define MESSAGE_ST 12
599:
600:
601: #define F_HOST_XFER_DIR 0x01
602: #define F_ALL_XFERRED 0x02
603: #define F_SG_XFER 0x04
604: #define F_AUTO_SENSE 0x08
605: #define F_ODD_BALL_CNT 0x10
606: #define F_NO_DATA_YET 0x80
607:
608:
609: #define F_STATUSLOADED 0x01
610: #define F_MSGLOADED 0x02
611: #define F_DEV_SELECTED 0x04
612:
613:
614: #define SCCB_COMPLETE 0x00 /* SCCB completed without error */
615: #define SCCB_DATA_UNDER_RUN 0x0C
616: #define SCCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */
617: #define SCCB_DATA_OVER_RUN 0x12
618: #define SCCB_UNEXPECTED_BUS_FREE 0x13 /* Target dropped SCSI BSY */
619: #define SCCB_PHASE_SEQUENCE_FAIL 0x14 /* Target bus phase sequence failure */
620:
621: #define SCCB_INVALID_OP_CODE 0x16 /* SCCB invalid operation code */
622: #define SCCB_INVALID_SCCB 0x1A /* Invalid SCCB - bad parameter */
623: #define SCCB_GROSS_FW_ERR 0x27 /* Major problem! */
624: #define SCCB_BM_ERR 0x30 /* BusMaster error. */
625: #define SCCB_PARITY_ERR 0x34 /* SCSI parity error */
626:
627:
628:
629: #if (FW_TYPE==_UCB_MGR_)
630: #define HBA_AUTO_SENSE_FAIL 0x1B
631: #define HBA_TQ_REJECTED 0x1C
632: #define HBA_UNSUPORTED_MSG 0x1D
633: #define HBA_HW_ERROR 0x20
634: #define HBA_ATN_NOT_RESPONDED 0x21
635: #define HBA_SCSI_RESET_BY_ADAPTER 0x22
636: #define HBA_SCSI_RESET_BY_TARGET 0x23
637: #define HBA_WRONG_CONNECTION 0x24
638: #define HBA_BUS_DEVICE_RESET 0x25
639: #define HBA_ABORT_QUEUE 0x26
640:
641: #else // these are not defined in BUDI/UCB
642:
643: #define SCCB_INVALID_DIRECTION 0x18 /* Invalid target direction */
644: #define SCCB_DUPLICATE_SCCB 0x19 /* Duplicate SCCB */
645: #define SCCB_SCSI_RST 0x35 /* SCSI RESET detected. */
646:
647: #endif // (FW_TYPE==_UCB_MGR_)
648:
649:
650: #define SCCB_IN_PROCESS 0x00
651: #define SCCB_SUCCESS 0x01
652: #define SCCB_ABORT 0x02
653: #define SCCB_NOT_FOUND 0x03
654: #define SCCB_ERROR 0x04
655: #define SCCB_INVALID 0x05
656:
657: #define SCCB_SIZE sizeof(SCCB)
658:
659:
660:
661:
662: #if (FW_TYPE == _UCB_MGR_)
663: void SccbMgr_start_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb);
664: s32bits SccbMgr_abort_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb);
665: u08bits SccbMgr_my_int(CARD_HANDLE pCurrCard);
666: s32bits SccbMgr_isr(CARD_HANDLE pCurrCard);
667: void SccbMgr_scsi_reset(CARD_HANDLE pCurrCard);
668: void SccbMgr_timer_expired(CARD_HANDLE pCurrCard);
669: void SccbMgr_unload_card(CARD_HANDLE pCurrCard);
670: void SccbMgr_restore_foreign_state(CARD_HANDLE pCurrCard);
671: void SccbMgr_restore_native_state(CARD_HANDLE pCurrCard);
672: void SccbMgr_save_foreign_state(PADAPTER_INFO pAdapterInfo);
673:
674: #endif
675:
676:
677: #if (FW_TYPE == _SCCB_MGR_)
678:
679: #if defined (DOS)
680: int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo);
681: USHORT SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo);
682: void SccbMgr_start_sccb(USHORT pCurrCard, PSCCB p_SCCB);
683: int SccbMgr_abort_sccb(USHORT pCurrCard, PSCCB p_SCCB);
684: UCHAR SccbMgr_my_int(USHORT pCurrCard);
685: int SccbMgr_isr(USHORT pCurrCard);
686: void SccbMgr_scsi_reset(USHORT pCurrCard);
687: void SccbMgr_timer_expired(USHORT pCurrCard);
688: USHORT SccbMgr_status(USHORT pCurrCard);
689: void SccbMgr_unload_card(USHORT pCurrCard);
690:
691: #else //non-DOS
692:
693: int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo);
694: ULONG SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo);
695: void SccbMgr_start_sccb(ULONG pCurrCard, PSCCB p_SCCB);
696: int SccbMgr_abort_sccb(ULONG pCurrCard, PSCCB p_SCCB);
697: UCHAR SccbMgr_my_int(ULONG pCurrCard);
698: int SccbMgr_isr(ULONG pCurrCard);
699: void SccbMgr_scsi_reset(ULONG pCurrCard);
700: void SccbMgr_enable_int(ULONG pCurrCard);
701: void SccbMgr_disable_int(ULONG pCurrCard);
702: void SccbMgr_timer_expired(ULONG pCurrCard);
703: void SccbMgr_unload_card(ULONG pCurrCard);
704:
705: #endif
706: #endif // (FW_TYPE == _SCCB_MGR_)
707:
708: #endif /* __SCCB_H__ */
709:
710: /*----------------------------------------------------------------------
711: *
712: *
713: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
714: *
715: * This file is available under both the GNU General Public License
716: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
717: *
718: * $Workfile: blx30.h $
719: *
720: * Description: This module contains SCCB/UCB Manager implementation
721: * specific stuff.
722: *
723: * $Date: 1999/04/26 05:53:56 $
724: *
725: * $Revision: 1.1 $
726: *
727: *----------------------------------------------------------------------*/
728:
729:
730: #ifndef __blx30_H__
731: #define __blx30_H__
732:
733: /*#include <globals.h>*/
734:
735: #define ORION_FW_REV 3110
736:
737:
738:
739:
740: #define HARP_REVD 1
741:
742:
743: #if defined(DOS)
744: #define QUEUE_DEPTH 8+1 /*1 for Normal disconnect 0 for Q'ing. */
745: #else
746: #define QUEUE_DEPTH 254+1 /*1 for Normal disconnect 32 for Q'ing. */
747: #endif // defined(DOS)
748:
749: #define MAX_MB_CARDS 4 /* Max. no of cards suppoerted on Mother Board */
750:
751: #define WIDE_SCSI 1
752:
753: #if defined(WIDE_SCSI)
754: #if defined(DOS)
755: #define MAX_SCSI_TAR 16
756: #define MAX_LUN 8
757: #define LUN_MASK 0x07
758: #else
759: #define MAX_SCSI_TAR 16
760: #define MAX_LUN 32
761: #define LUN_MASK 0x1f
762:
763: #endif
764: #else
765: #define MAX_SCSI_TAR 8
766: #define MAX_LUN 8
767: #define LUN_MASK 0x07
768: #endif
769:
770: #if defined(HARP_REVA)
771: #define SG_BUF_CNT 15 /*Number of prefetched elements. */
772: #else
773: #define SG_BUF_CNT 16 /*Number of prefetched elements. */
774: #endif
775:
776: #define SG_ELEMENT_SIZE 8 /*Eight byte per element. */
777: #define SG_LOCAL_MASK 0x00000000L
778: #define SG_ELEMENT_MASK 0xFFFFFFFFL
779:
780:
781: #if (FW_TYPE == _UCB_MGR_)
782: #define OPC_DECODE_NORMAL 0x0f7f
783: #endif // _UCB_MGR_
784:
785:
786:
787: #if defined(DOS)
788:
789: /*#include <dos.h>*/
790: #define RD_HARPOON(ioport) (OS_InPortByte(ioport))
791: #define RDW_HARPOON(ioport) (OS_InPortWord(ioport))
792: #define WR_HARPOON(ioport,val) (OS_OutPortByte(ioport,val))
793: #define WRW_HARPOON(ioport,val) (OS_OutPortWord(ioport,val))
794:
795: #define RD_HARP32(port,offset,data) asm{db 66h; \
796: push ax; \
797: mov dx,port; \
798: add dx, offset; \
799: db 66h; \
800: in ax,dx; \
801: db 66h; \
802: mov word ptr data,ax;\
803: db 66h; \
804: pop ax}
805:
806: #define WR_HARP32(port,offset,data) asm{db 66h; \
807: push ax; \
808: mov dx,port; \
809: add dx, offset; \
810: db 66h; \
811: mov ax,word ptr data;\
812: db 66h; \
813: out dx,ax; \
814: db 66h; \
815: pop ax}
816: #endif /* DOS */
817:
818: #if defined(NETWARE) || defined(OTHER_32) || defined(OTHER_16)
819: #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
820: #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
821: #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong(ioport + offset))
822: #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
823: #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
824: #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ioport + offset), data)
825: #endif /* NETWARE || OTHER_32 || OTHER_16 */
826:
827: #if defined(NT) || defined(WIN95_32) || defined(WIN95_16)
828: #define RD_HARPOON(ioport) OS_InPortByte((ULONG)ioport)
829: #define RDW_HARPOON(ioport) OS_InPortWord((ULONG)ioport)
830: #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
831: #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
832: #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
833: #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ULONG)(ioport + offset), data)
834: #endif /* NT || WIN95_32 || WIN95_16 */
835:
836: #if defined (UNIX)
837: #define RD_HARPOON(ioport) OS_InPortByte((u32bits)ioport)
838: #define RDW_HARPOON(ioport) OS_InPortWord((u32bits)ioport)
839: #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((u32bits)(ioport + offset)))
840: #define WR_HARPOON(ioport,val) OS_OutPortByte((u32bits)ioport,(u08bits) val)
841: #define WRW_HARPOON(ioport,val) OS_OutPortWord((u32bits)ioport,(u16bits)val)
842: #define WR_HARP32(ioport,offset,data) OS_OutPortLong((u32bits)(ioport + offset), data)
843: #endif /* UNIX */
844:
845: #if defined(OS2)
846: #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
847: #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
848: #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
849: #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
850: #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
851: #define WR_HARP32(ioport,offset,data) OS_OutPortLong(((ULONG)(ioport + offset)), data)
852: #endif /* OS2 */
853:
854: #if defined(SOLARIS_REAL_MODE)
855:
856: #define RD_HARPOON(ioport) OS_InPortByte((unsigned long)ioport)
857: #define RDW_HARPOON(ioport) OS_InPortWord((unsigned long)ioport)
858: #define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((ULONG)(ioport + offset)))
859: #define WR_HARPOON(ioport,val) OS_OutPortByte((ULONG)ioport,(UCHAR) val)
860: #define WRW_HARPOON(ioport,val) OS_OutPortWord((ULONG)ioport,(USHORT)val)
861: #define WR_HARP32(ioport,offset,data) OS_OutPortLong((ULONG)(ioport + offset), (ULONG)data)
862:
863: #endif /* SOLARIS_REAL_MODE */
864:
865: #endif /* __BLX30_H__ */
866:
867:
868: /*----------------------------------------------------------------------
869: *
870: *
871: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
872: *
873: * This file is available under both the GNU General Public License
874: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
875: *
876: * $Workfile: target.h $
877: *
878: * Description: Definitions for Target related structures
879: *
880: * $Date: 1999/04/26 05:53:56 $
881: *
882: * $Revision: 1.1 $
883: *
884: *----------------------------------------------------------------------*/
885:
886: #ifndef __TARGET__
887: #define __TARGET__
888:
889: /*#include <globals.h>*/
890: /*#include <blx30.h>*/
891:
892:
893: #define TAR_SYNC_MASK (BIT(7)+BIT(6))
894: #define SYNC_UNKNOWN 0x00
895: #define SYNC_TRYING BIT(6)
896: #define SYNC_SUPPORTED (BIT(7)+BIT(6))
897:
898: #define TAR_WIDE_MASK (BIT(5)+BIT(4))
899: #define WIDE_DISABLED 0x00
900: #define WIDE_ENABLED BIT(4)
901: #define WIDE_NEGOCIATED BIT(5)
902:
903: #define TAR_TAG_Q_MASK (BIT(3)+BIT(2))
904: #define TAG_Q_UNKNOWN 0x00
905: #define TAG_Q_TRYING BIT(2)
906: #define TAG_Q_REJECT BIT(3)
907: #define TAG_Q_SUPPORTED (BIT(3)+BIT(2))
908:
909: #define TAR_ALLOW_DISC BIT(0)
910:
911:
912: #define EE_SYNC_MASK (BIT(0)+BIT(1))
913: #define EE_SYNC_ASYNC 0x00
914: #define EE_SYNC_5MB BIT(0)
915: #define EE_SYNC_10MB BIT(1)
916: #define EE_SYNC_20MB (BIT(0)+BIT(1))
917:
918: #define EE_ALLOW_DISC BIT(6)
919: #define EE_WIDE_SCSI BIT(7)
920:
921:
922: #if defined(DOS)
923: typedef struct SCCBMgr_tar_info near *PSCCBMgr_tar_info;
924:
925: #elif defined(OS2)
926: typedef struct SCCBMgr_tar_info far *PSCCBMgr_tar_info;
927:
928: #else
929: typedef struct SCCBMgr_tar_info *PSCCBMgr_tar_info;
930:
931: #endif
932:
933:
934: typedef struct SCCBMgr_tar_info {
935:
936: PSCCB TarSelQ_Head;
937: PSCCB TarSelQ_Tail;
938: UCHAR TarLUN_CA; /*Contingent Allgiance */
939: UCHAR TarTagQ_Cnt;
940: UCHAR TarSelQ_Cnt;
941: UCHAR TarStatus;
942: UCHAR TarEEValue;
943: UCHAR TarSyncCtrl;
944: UCHAR TarReserved[2]; /* for alignment */
945: UCHAR LunDiscQ_Idx[MAX_LUN];
946: UCHAR TarLUNBusy[MAX_LUN];
947: } SCCBMGR_TAR_INFO;
948:
949: typedef struct NVRAMInfo {
950: UCHAR niModel; /* Model No. of card */
951: UCHAR niCardNo; /* Card no. */
952: #if defined(DOS)
953: USHORT niBaseAddr; /* Port Address of card */
954: #else
955: ULONG niBaseAddr; /* Port Address of card */
956: #endif
957: UCHAR niSysConf; /* Adapter Configuration byte - Byte 16 of eeprom map */
958: UCHAR niScsiConf; /* SCSI Configuration byte - Byte 17 of eeprom map */
959: UCHAR niScamConf; /* SCAM Configuration byte - Byte 20 of eeprom map */
960: UCHAR niAdapId; /* Host Adapter ID - Byte 24 of eerpom map */
961: UCHAR niSyncTbl[MAX_SCSI_TAR / 2]; /* Sync/Wide byte of targets */
962: UCHAR niScamTbl[MAX_SCSI_TAR][4]; /* Compressed Scam name string of Targets */
963: }NVRAMINFO;
964:
965: #if defined(DOS)
966: typedef NVRAMINFO near *PNVRamInfo;
967: #elif defined (OS2)
968: typedef NVRAMINFO far *PNVRamInfo;
969: #else
970: typedef NVRAMINFO *PNVRamInfo;
971: #endif
972:
973: #define MODEL_LT 1
974: #define MODEL_DL 2
975: #define MODEL_LW 3
976: #define MODEL_DW 4
977:
978:
979: typedef struct SCCBcard {
980: PSCCB currentSCCB;
981: #if (FW_TYPE==_SCCB_MGR_)
982: PSCCBMGR_INFO cardInfo;
983: #else
984: PADAPTER_INFO cardInfo;
985: #endif
986:
987: #if defined(DOS)
988: USHORT ioPort;
989: #else
990: ULONG ioPort;
991: #endif
992:
993: USHORT cmdCounter;
994: UCHAR discQCount;
995: UCHAR tagQ_Lst;
996: UCHAR cardIndex;
997: UCHAR scanIndex;
998: UCHAR globalFlags;
999: UCHAR ourId;
1000: PNVRamInfo pNvRamInfo;
1001: PSCCB discQ_Tbl[QUEUE_DEPTH];
1002:
1003: }SCCBCARD;
1004:
1005: #if defined(DOS)
1006: typedef struct SCCBcard near *PSCCBcard;
1007: #elif defined (OS2)
1008: typedef struct SCCBcard far *PSCCBcard;
1009: #else
1010: typedef struct SCCBcard *PSCCBcard;
1011: #endif
1012:
1013:
1014: #define F_TAG_STARTED 0x01
1015: #define F_CONLUN_IO 0x02
1016: #define F_DO_RENEGO 0x04
1017: #define F_NO_FILTER 0x08
1018: #define F_GREEN_PC 0x10
1019: #define F_HOST_XFER_ACT 0x20
1020: #define F_NEW_SCCB_CMD 0x40
1021: #define F_UPDATE_EEPROM 0x80
1022:
1023:
1024: #define ID_STRING_LENGTH 32
1025: #define TYPE_CODE0 0x63 /*Level2 Mstr (bits 7-6), */
1026:
1027: #define TYPE_CODE1 00 /*No ID yet */
1028:
1029: #define SLV_TYPE_CODE0 0xA3 /*Priority Bit set (bits 7-6), */
1030:
1031: #define ASSIGN_ID 0x00
1032: #define SET_P_FLAG 0x01
1033: #define CFG_CMPLT 0x03
1034: #define DOM_MSTR 0x0F
1035: #define SYNC_PTRN 0x1F
1036:
1037: #define ID_0_7 0x18
1038: #define ID_8_F 0x11
1039: #define ID_10_17 0x12
1040: #define ID_18_1F 0x0B
1041: #define MISC_CODE 0x14
1042: #define CLR_P_FLAG 0x18
1043: #define LOCATE_ON 0x12
1044: #define LOCATE_OFF 0x0B
1045:
1046: #define LVL_1_MST 0x00
1047: #define LVL_2_MST 0x40
1048: #define DOM_LVL_2 0xC0
1049:
1050:
1051: #define INIT_SELTD 0x01
1052: #define LEVEL2_TAR 0x02
1053:
1054:
1055: enum scam_id_st { ID0,ID1,ID2,ID3,ID4,ID5,ID6,ID7,ID8,ID9,ID10,ID11,ID12,
1056: ID13,ID14,ID15,ID_UNUSED,ID_UNASSIGNED,ID_ASSIGNED,LEGACY,
1057: CLR_PRIORITY,NO_ID_AVAIL };
1058:
1059: typedef struct SCCBscam_info {
1060:
1061: UCHAR id_string[ID_STRING_LENGTH];
1062: enum scam_id_st state;
1063:
1064: } SCCBSCAM_INFO, *PSCCBSCAM_INFO;
1065:
1066: #endif
1067: /*----------------------------------------------------------------------
1068: *
1069: *
1070: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
1071: *
1072: * This file is available under both the GNU General Public License
1073: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
1074: *
1075: * $Workfile: scsi2.h $
1076: *
1077: * Description: Register definitions for HARPOON ASIC.
1078: *
1079: * $Date: 1999/04/26 05:53:56 $
1080: *
1081: * $Revision: 1.1 $
1082: *
1083: *----------------------------------------------------------------------*/
1084:
1085: #ifndef __SCSI_H__
1086: #define __SCSI_H__
1087:
1088:
1089:
1090: #define SCSI_TEST_UNIT_READY 0x00
1091: #define SCSI_REZERO_UNIT 0x01
1092: #define SCSI_REQUEST_SENSE 0x03
1093: #define SCSI_FORMAT_UNIT 0x04
1094: #define SCSI_REASSIGN 0x07
1095: #define SCSI_READ 0x08
1096: #define SCSI_WRITE 0x0A
1097: #define SCSI_SEEK 0x0B
1098: #define SCSI_INQUIRY 0x12
1099: #define SCSI_MODE_SELECT 0x15
1100: #define SCSI_RESERVE_UNIT 0x16
1101: #define SCSI_RELEASE_UNIT 0x17
1102: #define SCSI_MODE_SENSE 0x1A
1103: #define SCSI_START_STOP_UNIT 0x1B
1104: #define SCSI_SEND_DIAGNOSTIC 0x1D
1105: #define SCSI_READ_CAPACITY 0x25
1106: #define SCSI_READ_EXTENDED 0x28
1107: #define SCSI_WRITE_EXTENDED 0x2A
1108: #define SCSI_SEEK_EXTENDED 0x2B
1109: #define SCSI_WRITE_AND_VERIFY 0x2E
1110: #define SCSI_VERIFY 0x2F
1111: #define SCSI_READ_DEFECT_DATA 0x37
1112: #define SCSI_WRITE_BUFFER 0x3B
1113: #define SCSI_READ_BUFFER 0x3C
1114: #define SCSI_RECV_DIAGNOSTIC 0x1C
1115: #define SCSI_READ_LONG 0x3E
1116: #define SCSI_WRITE_LONG 0x3F
1117: #define SCSI_LAST_SCSI_CMND SCSI_WRITE_LONG
1118: #define SCSI_INVALID_CMND 0xFF
1119:
1120:
1121:
1122: #define SSGOOD 0x00
1123: #define SSCHECK 0x02
1124: #define SSCOND_MET 0x04
1125: #define SSBUSY 0x08
1126: #define SSRESERVATION_CONFLICT 0x18
1127: #define SSCMD_TERM 0x22
1128: #define SSQ_FULL 0x28
1129:
1130:
1131: #define SKNO_SEN 0x00
1132: #define SKRECOV_ERR 0x01
1133: #define SKNOT_RDY 0x02
1134: #define SKMED_ERR 0x03
1135: #define SKHW_ERR 0x04
1136: #define SKILL_REQ 0x05
1137: #define SKUNIT_ATTN 0x06
1138: #define SKDATA_PROTECT 0x07
1139: #define SKBLNK_CHK 0x08
1140: #define SKCPY_ABORT 0x0A
1141: #define SKABORT_CMD 0x0B
1142: #define SKEQUAL 0x0C
1143: #define SKVOL_OVF 0x0D
1144: #define SKMIS_CMP 0x0E
1145:
1146:
1147: #define SMCMD_COMP 0x00
1148: #define SMEXT 0x01
1149: #define SMSAVE_DATA_PTR 0x02
1150: #define SMREST_DATA_PTR 0x03
1151: #define SMDISC 0x04
1152: #define SMINIT_DETEC_ERR 0x05
1153: #define SMABORT 0x06
1154: #define SMREJECT 0x07
1155: #define SMNO_OP 0x08
1156: #define SMPARITY 0x09
1157: #define SMDEV_RESET 0x0C
1158: #define SMABORT_TAG 0x0D
1159: #define SMINIT_RECOVERY 0x0F
1160: #define SMREL_RECOVERY 0x10
1161:
1162: #define SMIDENT 0x80
1163: #define DISC_PRIV 0x40
1164:
1165:
1166: #define SMSYNC 0x01
1167: #define SM10MBS 0x19 /* 100ns */
1168: #define SM5MBS 0x32 /* 200ns */
1169: #define SMOFFSET 0x0F /* Maxoffset value */
1170: #define SMWDTR 0x03
1171: #define SM8BIT 0x00
1172: #define SM16BIT 0x01
1173: #define SM32BIT 0x02
1174: #define SMIGNORWR 0x23 /* Ignore Wide Residue */
1175:
1176:
1177: #define ARBITRATION_DELAY 0x01 /* 2.4us using a 40Mhz clock */
1178: #define BUS_SETTLE_DELAY 0x01 /* 400ns */
1179: #define BUS_CLEAR_DELAY 0x01 /* 800ns */
1180:
1181:
1182:
1183: #define SPHASE_TO 0x0A /* 10 second timeout waiting for */
1184: #define SCMD_TO 0x0F /* Overall command timeout */
1185:
1186:
1187:
1188: #define SIX_BYTE_CMD 0x06
1189: #define TEN_BYTE_CMD 0x0A
1190: #define TWELVE_BYTE_CMD 0x0C
1191:
1192: #define ASYNC 0x00
1193: #define PERI25NS 0x06 /* 25/4ns to next clock for xbow. */
1194: #define SYNC10MBS 0x19
1195: #define SYNC5MBS 0x32
1196: #define MAX_OFFSET 0x0F /* Maxbyteoffset for Sync Xfers */
1197:
1198: #endif
1199: /*----------------------------------------------------------------------
1200: *
1201: *
1202: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
1203: *
1204: * This file is available under both the GNU General Public License
1205: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
1206: *
1207: * $Workfile: eeprom.h $
1208: *
1209: * Description: Definitions for EEPROM related structures
1210: *
1211: * $Date: 1999/04/26 05:53:56 $
1212: *
1213: * $Revision: 1.1 $
1214: *
1215: *----------------------------------------------------------------------*/
1216:
1217: #ifndef __EEPROM__
1218: #define __EEPROM__
1219:
1220: /*#include <globals.h>*/
1221:
1222: #define EEPROM_WD_CNT 256
1223:
1224: #define EEPROM_CHECK_SUM 0
1225: #define FW_SIGNATURE 2
1226: #define MODEL_NUMB_0 4
1227: #define MODEL_NUMB_1 5
1228: #define MODEL_NUMB_2 6
1229: #define MODEL_NUMB_3 7
1230: #define MODEL_NUMB_4 8
1231: #define MODEL_NUMB_5 9
1232: #define IO_BASE_ADDR 10
1233: #define IRQ_NUMBER 12
1234: #define PCI_INT_PIN 13
1235: #define BUS_DELAY 14 /*On time in byte 14 off delay in 15 */
1236: #define SYSTEM_CONFIG 16
1237: #define SCSI_CONFIG 17
1238: #define BIOS_CONFIG 18
1239: #define SPIN_UP_DELAY 19
1240: #define SCAM_CONFIG 20
1241: #define ADAPTER_SCSI_ID 24
1242:
1243:
1244: #define IGNORE_B_SCAN 32
1245: #define SEND_START_ENA 34
1246: #define DEVICE_ENABLE 36
1247:
1248: #define SYNC_RATE_TBL 38
1249: #define SYNC_RATE_TBL01 38
1250: #define SYNC_RATE_TBL23 40
1251: #define SYNC_RATE_TBL45 42
1252: #define SYNC_RATE_TBL67 44
1253: #define SYNC_RATE_TBL89 46
1254: #define SYNC_RATE_TBLab 48
1255: #define SYNC_RATE_TBLcd 50
1256: #define SYNC_RATE_TBLef 52
1257:
1258:
1259:
1260: #define EE_SCAMBASE 256
1261:
1262:
1263:
1264: #define DOM_MASTER (BIT(0) + BIT(1))
1265: #define SCAM_ENABLED BIT(2)
1266: #define SCAM_LEVEL2 BIT(3)
1267:
1268:
1269: #define RENEGO_ENA BITW(10)
1270: #define CONNIO_ENA BITW(11)
1271: #define GREEN_PC_ENA BITW(12)
1272:
1273:
1274: #define AUTO_RATE_00 00
1275: #define AUTO_RATE_05 01
1276: #define AUTO_RATE_10 02
1277: #define AUTO_RATE_20 03
1278:
1279: #define WIDE_NEGO_BIT BIT(7)
1280: #define DISC_ENABLE_BIT BIT(6)
1281:
1282:
1283: #endif
1284: /*----------------------------------------------------------------------
1285: *
1286: *
1287: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
1288: *
1289: * This file is available under both the GNU General Public License
1290: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
1291: *
1292: * $Workfile: harpoon.h $
1293: *
1294: * Description: Register definitions for HARPOON ASIC.
1295: *
1296: * $Date: 1999/04/26 05:53:56 $
1297: *
1298: * $Revision: 1.1 $
1299: *
1300: *----------------------------------------------------------------------*/
1301:
1302:
1303: /*#include <globals.h>*/
1304:
1305: #ifndef __HARPOON__
1306: #define __HARPOON__
1307:
1308:
1309: #define hp_vendor_id_0 0x00 /* LSB */
1310: #define ORION_VEND_0 0x4B
1311:
1312: #define hp_vendor_id_1 0x01 /* MSB */
1313: #define ORION_VEND_1 0x10
1314:
1315: #define hp_device_id_0 0x02 /* LSB */
1316: #define ORION_DEV_0 0x30
1317:
1318: #define hp_device_id_1 0x03 /* MSB */
1319: #define ORION_DEV_1 0x81
1320:
1321: /* Sub Vendor ID and Sub Device ID only available in
1322: Harpoon Version 2 and higher */
1323:
1324: #define hp_sub_vendor_id_0 0x04 /* LSB */
1325: #define hp_sub_vendor_id_1 0x05 /* MSB */
1326: #define hp_sub_device_id_0 0x06 /* LSB */
1327: #define hp_sub_device_id_1 0x07 /* MSB */
1328:
1329:
1330: #define hp_dual_addr_lo 0x08
1331: #define hp_dual_addr_lmi 0x09
1332: #define hp_dual_addr_hmi 0x0A
1333: #define hp_dual_addr_hi 0x0B
1334:
1335: #define hp_semaphore 0x0C
1336: #define SCCB_MGR_ACTIVE BIT(0)
1337: #define TICKLE_ME BIT(1)
1338: #define SCCB_MGR_PRESENT BIT(3)
1339: #define BIOS_IN_USE BIT(4)
1340:
1341: #define hp_user_defined_D 0x0D
1342:
1343: #define hp_reserved_E 0x0E
1344:
1345: #define hp_sys_ctrl 0x0F
1346:
1347: #define STOP_CLK BIT(0) /*Turn off BusMaster Clock */
1348: #define DRVR_RST BIT(1) /*Firmware Reset to 80C15 chip */
1349: #define HALT_MACH BIT(3) /*Halt State Machine */
1350: #define HARD_ABORT BIT(4) /*Hard Abort */
1351: #define DIAG_MODE BIT(5) /*Diagnostic Mode */
1352:
1353: #define BM_ABORT_TMOUT 0x50 /*Halt State machine time out */
1354:
1355: #define hp_sys_cfg 0x10
1356:
1357: #define DONT_RST_FIFO BIT(7) /*Don't reset FIFO */
1358:
1359:
1360: #define hp_host_ctrl0 0x11
1361:
1362: #define DUAL_ADDR_MODE BIT(0) /*Enable 64-bit addresses */
1363: #define IO_MEM_SPACE BIT(1) /*I/O Memory Space */
1364: #define RESOURCE_LOCK BIT(2) /*Enable Resource Lock */
1365: #define IGNOR_ACCESS_ERR BIT(3) /*Ignore Access Error */
1366: #define HOST_INT_EDGE BIT(4) /*Host interrupt level/edge mode sel */
1367: #define SIX_CLOCKS BIT(5) /*6 Clocks between Strobe */
1368: #define DMA_EVEN_PARITY BIT(6) /*Enable DMA Enen Parity */
1369:
1370: /*
1371: #define BURST_MODE BIT(0)
1372: */
1373:
1374: #define hp_reserved_12 0x12
1375:
1376: #define hp_host_blk_cnt 0x13
1377:
1378: #define XFER_BLK1 0x00 /* 0 0 0 1 byte per block*/
1379: #define XFER_BLK2 0x01 /* 0 0 1 2 byte per block*/
1380: #define XFER_BLK4 0x02 /* 0 1 0 4 byte per block*/
1381: #define XFER_BLK8 0x03 /* 0 1 1 8 byte per block*/
1382: #define XFER_BLK16 0x04 /* 1 0 0 16 byte per block*/
1383: #define XFER_BLK32 0x05 /* 1 0 1 32 byte per block*/
1384: #define XFER_BLK64 0x06 /* 1 1 0 64 byte per block*/
1385:
1386: #define BM_THRESHOLD 0x40 /* PCI mode can only xfer 16 bytes*/
1387:
1388:
1389: #define hp_reserved_14 0x14
1390: #define hp_reserved_15 0x15
1391: #define hp_reserved_16 0x16
1392:
1393: #define hp_int_mask 0x17
1394:
1395: #define INT_CMD_COMPL BIT(0) /* DMA command complete */
1396: #define INT_EXT_STATUS BIT(1) /* Extended Status Set */
1397: #define INT_SCSI BIT(2) /* Scsi block interrupt */
1398: #define INT_FIFO_RDY BIT(4) /* FIFO data ready */
1399:
1400:
1401: #define hp_xfer_cnt_lo 0x18
1402: #define hp_xfer_cnt_mi 0x19
1403: #define hp_xfer_cnt_hi 0x1A
1404: #define hp_xfer_cmd 0x1B
1405:
1406: #define XFER_HOST_DMA 0x00 /* 0 0 0 Transfer Host -> DMA */
1407: #define XFER_DMA_HOST 0x01 /* 0 0 1 Transfer DMA -> Host */
1408: #define XFER_HOST_MPU 0x02 /* 0 1 0 Transfer Host -> MPU */
1409: #define XFER_MPU_HOST 0x03 /* 0 1 1 Transfer MPU -> Host */
1410: #define XFER_DMA_MPU 0x04 /* 1 0 0 Transfer DMA -> MPU */
1411: #define XFER_MPU_DMA 0x05 /* 1 0 1 Transfer MPU -> DMA */
1412: #define SET_SEMAPHORE 0x06 /* 1 1 0 Set Semaphore */
1413: #define XFER_NOP 0x07 /* 1 1 1 Transfer NOP */
1414: #define XFER_MB_MPU 0x06 /* 1 1 0 Transfer MB -> MPU */
1415: #define XFER_MB_DMA 0x07 /* 1 1 1 Transfer MB -> DMA */
1416:
1417:
1418: #define XFER_HOST_AUTO 0x00 /* 0 0 Auto Transfer Size */
1419: #define XFER_HOST_8BIT 0x08 /* 0 1 8 BIT Transfer Size */
1420: #define XFER_HOST_16BIT 0x10 /* 1 0 16 BIT Transfer Size */
1421: #define XFER_HOST_32BIT 0x18 /* 1 1 32 BIT Transfer Size */
1422:
1423: #define XFER_DMA_8BIT 0x20 /* 0 1 8 BIT Transfer Size */
1424: #define XFER_DMA_16BIT 0x40 /* 1 0 16 BIT Transfer Size */
1425:
1426: #define DISABLE_INT BIT(7) /*Do not interrupt at end of cmd. */
1427:
1428: #define HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_8BIT))
1429: #define HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_8BIT))
1430: #define WIDE_HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_16BIT))
1431: #define WIDE_HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_16BIT))
1432:
1433: #define hp_host_addr_lo 0x1C
1434: #define hp_host_addr_lmi 0x1D
1435: #define hp_host_addr_hmi 0x1E
1436: #define hp_host_addr_hi 0x1F
1437:
1438: #define hp_pio_data 0x20
1439: #define hp_reserved_21 0x21
1440: #define hp_ee_ctrl 0x22
1441:
1442: #define EXT_ARB_ACK BIT(7)
1443: #define SCSI_TERM_ENA_H BIT(6) /* SCSI high byte terminator */
1444: #define SEE_MS BIT(5)
1445: #define SEE_CS BIT(3)
1446: #define SEE_CLK BIT(2)
1447: #define SEE_DO BIT(1)
1448: #define SEE_DI BIT(0)
1449:
1450: #define EE_READ 0x06
1451: #define EE_WRITE 0x05
1452: #define EWEN 0x04
1453: #define EWEN_ADDR 0x03C0
1454: #define EWDS 0x04
1455: #define EWDS_ADDR 0x0000
1456:
1457: #define hp_brdctl 0x23
1458:
1459: #define DAT_7 BIT(7)
1460: #define DAT_6 BIT(6)
1461: #define DAT_5 BIT(5)
1462: #define BRD_STB BIT(4)
1463: #define BRD_CS BIT(3)
1464: #define BRD_WR BIT(2)
1465:
1466: #define hp_reserved_24 0x24
1467: #define hp_reserved_25 0x25
1468:
1469:
1470:
1471:
1472: #define hp_bm_ctrl 0x26
1473:
1474: #define SCSI_TERM_ENA_L BIT(0) /*Enable/Disable external terminators */
1475: #define FLUSH_XFER_CNTR BIT(1) /*Flush transfer counter */
1476: #define BM_XFER_MIN_8 BIT(2) /*Enable bus master transfer of 9 */
1477: #define BIOS_ENA BIT(3) /*Enable BIOS/FLASH Enable */
1478: #define FORCE1_XFER BIT(5) /*Always xfer one byte in byte mode */
1479: #define FAST_SINGLE BIT(6) /*?? */
1480:
1481: #define BMCTRL_DEFAULT (FORCE1_XFER|FAST_SINGLE|SCSI_TERM_ENA_L)
1482:
1483: #define hp_reserved_27 0x27
1484:
1485: #define hp_sg_addr 0x28
1486: #define hp_page_ctrl 0x29
1487:
1488: #define SCATTER_EN BIT(0)
1489: #define SGRAM_ARAM BIT(1)
1490: #define BIOS_SHADOW BIT(2)
1491: #define G_INT_DISABLE BIT(3) /* Enable/Disable all Interrupts */
1492: #define NARROW_SCSI_CARD BIT(4) /* NARROW/WIDE SCSI config pin */
1493:
1494: #define hp_reserved_2A 0x2A
1495: #define hp_pci_cmd_cfg 0x2B
1496:
1497: #define IO_SPACE_ENA BIT(0) /*enable I/O space */
1498: #define MEM_SPACE_ENA BIT(1) /*enable memory space */
1499: #define BUS_MSTR_ENA BIT(2) /*enable bus master operation */
1500: #define MEM_WI_ENA BIT(4) /*enable Write and Invalidate */
1501: #define PAR_ERR_RESP BIT(6) /*enable parity error responce. */
1502:
1503: #define hp_reserved_2C 0x2C
1504:
1505: #define hp_pci_stat_cfg 0x2D
1506:
1507: #define DATA_PARITY_ERR BIT(0)
1508: #define REC_TARGET_ABORT BIT(4) /*received Target abort */
1509: #define REC_MASTER_ABORT BIT(5) /*received Master abort */
1510: #define SIG_SYSTEM_ERR BIT(6)
1511: #define DETECTED_PAR_ERR BIT(7)
1512:
1513: #define hp_reserved_2E 0x2E
1514:
1515: #define hp_sys_status 0x2F
1516:
1517: #define SLV_DATA_RDY BIT(0) /*Slave data ready */
1518: #define XFER_CNT_ZERO BIT(1) /*Transfer counter = 0 */
1519: #define BM_FIFO_EMPTY BIT(2) /*FIFO empty */
1520: #define BM_FIFO_FULL BIT(3) /*FIFO full */
1521: #define HOST_OP_DONE BIT(4) /*host operation done */
1522: #define DMA_OP_DONE BIT(5) /*DMA operation done */
1523: #define SLV_OP_DONE BIT(6) /*Slave operation done */
1524: #define PWR_ON_FLAG BIT(7) /*Power on flag */
1525:
1526: #define hp_reserved_30 0x30
1527:
1528: #define hp_host_status0 0x31
1529:
1530: #define HOST_TERM BIT(5) /*Host Terminal Count */
1531: #define HOST_TRSHLD BIT(6) /*Host Threshold */
1532: #define CONNECTED_2_HOST BIT(7) /*Connected to Host */
1533:
1534: #define hp_reserved_32 0x32
1535:
1536: #define hp_rev_num 0x33
1537:
1538: #define REV_A_CONST 0x0E
1539: #define REV_B_CONST 0x0E
1540:
1541: #define hp_stack_data 0x34
1542: #define hp_stack_addr 0x35
1543:
1544: #define hp_ext_status 0x36
1545:
1546: #define BM_FORCE_OFF BIT(0) /*Bus Master is forced to get off */
1547: #define PCI_TGT_ABORT BIT(0) /*PCI bus master transaction aborted */
1548: #define PCI_DEV_TMOUT BIT(1) /*PCI Device Time out */
1549: #define FIFO_TC_NOT_ZERO BIT(2) /*FIFO or transfer counter not zero */
1550: #define CHIP_RST_OCCUR BIT(3) /*Chip reset occurs */
1551: #define CMD_ABORTED BIT(4) /*Command aborted */
1552: #define BM_PARITY_ERR BIT(5) /*parity error on data received */
1553: #define PIO_OVERRUN BIT(6) /*Slave data overrun */
1554: #define BM_CMD_BUSY BIT(7) /*Bus master transfer command busy */
1555: #define BAD_EXT_STATUS (BM_FORCE_OFF | PCI_DEV_TMOUT | CMD_ABORTED | \
1556: BM_PARITY_ERR | PIO_OVERRUN)
1557:
1558: #define hp_int_status 0x37
1559:
1560: #define BM_CMD_CMPL BIT(0) /*Bus Master command complete */
1561: #define EXT_STATUS_ON BIT(1) /*Extended status is valid */
1562: #define SCSI_INTERRUPT BIT(2) /*Global indication of a SCSI int. */
1563: #define BM_FIFO_RDY BIT(4)
1564: #define INT_ASSERTED BIT(5) /* */
1565: #define SRAM_BUSY BIT(6) /*Scatter/Gather RAM busy */
1566: #define CMD_REG_BUSY BIT(7)
1567:
1568:
1569: #define hp_fifo_cnt 0x38
1570: #define hp_curr_host_cnt 0x39
1571: #define hp_reserved_3A 0x3A
1572: #define hp_fifo_in_addr 0x3B
1573:
1574: #define hp_fifo_out_addr 0x3C
1575: #define hp_reserved_3D 0x3D
1576: #define hp_reserved_3E 0x3E
1577: #define hp_reserved_3F 0x3F
1578:
1579:
1580:
1581: extern USHORT default_intena;
1582:
1583: #define hp_intena 0x40
1584:
1585: #define RESET BITW(7)
1586: #define PROG_HLT BITW(6)
1587: #define PARITY BITW(5)
1588: #define FIFO BITW(4)
1589: #define SEL BITW(3)
1590: #define SCAM_SEL BITW(2)
1591: #define RSEL BITW(1)
1592: #define TIMEOUT BITW(0)
1593: #define BUS_FREE BITW(15)
1594: #define XFER_CNT_0 BITW(14)
1595: #define PHASE BITW(13)
1596: #define IUNKWN BITW(12)
1597: #define ICMD_COMP BITW(11)
1598: #define ITICKLE BITW(10)
1599: #define IDO_STRT BITW(9)
1600: #define ITAR_DISC BITW(8)
1601: #define AUTO_INT (BITW(12)+BITW(11)+BITW(10)+BITW(9)+BITW(8))
1602: #define CLR_ALL_INT 0xFFFF
1603: #define CLR_ALL_INT_1 0xFF00
1604:
1605: #define hp_intstat 0x42
1606:
1607: #define hp_scsisig 0x44
1608:
1609: #define SCSI_SEL BIT(7)
1610: #define SCSI_BSY BIT(6)
1611: #define SCSI_REQ BIT(5)
1612: #define SCSI_ACK BIT(4)
1613: #define SCSI_ATN BIT(3)
1614: #define SCSI_CD BIT(2)
1615: #define SCSI_MSG BIT(1)
1616: #define SCSI_IOBIT BIT(0)
1617:
1618: #define S_SCSI_PHZ (BIT(2)+BIT(1)+BIT(0))
1619: #define S_CMD_PH (BIT(2) )
1620: #define S_MSGO_PH (BIT(2)+BIT(1) )
1621: #define S_STAT_PH (BIT(2) +BIT(0))
1622: #define S_MSGI_PH (BIT(2)+BIT(1)+BIT(0))
1623: #define S_DATAI_PH ( BIT(0))
1624: #define S_DATAO_PH 0x00
1625: #define S_ILL_PH ( BIT(1) )
1626:
1627: #define hp_scsictrl_0 0x45
1628:
1629: #define NO_ARB BIT(7)
1630: #define SEL_TAR BIT(6)
1631: #define ENA_ATN BIT(4)
1632: #define ENA_RESEL BIT(2)
1633: #define SCSI_RST BIT(1)
1634: #define ENA_SCAM_SEL BIT(0)
1635:
1636:
1637:
1638: #define hp_portctrl_0 0x46
1639:
1640: #define SCSI_PORT BIT(7)
1641: #define SCSI_INBIT BIT(6)
1642: #define DMA_PORT BIT(5)
1643: #define DMA_RD BIT(4)
1644: #define HOST_PORT BIT(3)
1645: #define HOST_WRT BIT(2)
1646: #define SCSI_BUS_EN BIT(1)
1647: #define START_TO BIT(0)
1648:
1649: #define hp_scsireset 0x47
1650:
1651: #define SCSI_TAR BIT(7)
1652: #define SCSI_INI BIT(6)
1653: #define SCAM_EN BIT(5)
1654: #define ACK_HOLD BIT(4)
1655: #define DMA_RESET BIT(3)
1656: #define HPSCSI_RESET BIT(2)
1657: #define PROG_RESET BIT(1)
1658: #define FIFO_CLR BIT(0)
1659:
1660: #define hp_xfercnt_0 0x48
1661: #define hp_xfercnt_1 0x49
1662: #define hp_xfercnt_2 0x4A
1663: #define hp_xfercnt_3 0x4B
1664:
1665: #define hp_fifodata_0 0x4C
1666: #define hp_fifodata_1 0x4D
1667: #define hp_addstat 0x4E
1668:
1669: #define SCAM_TIMER BIT(7)
1670: #define AUTO_RUNNING BIT(6)
1671: #define FAST_SYNC BIT(5)
1672: #define SCSI_MODE8 BIT(3)
1673: #define SCSI_PAR_ERR BIT(0)
1674:
1675: #define hp_prgmcnt_0 0x4F
1676:
1677: #define AUTO_PC_MASK 0x3F
1678:
1679: #define hp_selfid_0 0x50
1680: #define hp_selfid_1 0x51
1681: #define hp_arb_id 0x52
1682:
1683: #define ARB_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1684:
1685: #define hp_select_id 0x53
1686:
1687: #define RESEL_ID (BIT(7) + BIT(6) + BIT(5) + BIT(4))
1688: #define SELECT_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1689:
1690: #define hp_synctarg_base 0x54
1691: #define hp_synctarg_12 0x54
1692: #define hp_synctarg_13 0x55
1693: #define hp_synctarg_14 0x56
1694: #define hp_synctarg_15 0x57
1695:
1696: #define hp_synctarg_8 0x58
1697: #define hp_synctarg_9 0x59
1698: #define hp_synctarg_10 0x5A
1699: #define hp_synctarg_11 0x5B
1700:
1701: #define hp_synctarg_4 0x5C
1702: #define hp_synctarg_5 0x5D
1703: #define hp_synctarg_6 0x5E
1704: #define hp_synctarg_7 0x5F
1705:
1706: #define hp_synctarg_0 0x60
1707: #define hp_synctarg_1 0x61
1708: #define hp_synctarg_2 0x62
1709: #define hp_synctarg_3 0x63
1710:
1711: #define RATE_20MB 0x00
1712: #define RATE_10MB ( BIT(5))
1713: #define RATE_6_6MB ( BIT(6) )
1714: #define RATE_5MB ( BIT(6)+BIT(5))
1715: #define RATE_4MB (BIT(7) )
1716: #define RATE_3_33MB (BIT(7) +BIT(5))
1717: #define RATE_2_85MB (BIT(7)+BIT(6) )
1718: #define RATE_2_5MB (BIT(7)+BIT(5)+BIT(6))
1719: #define NEXT_CLK BIT(5)
1720: #define SLOWEST_SYNC (BIT(7)+BIT(6)+BIT(5))
1721: #define NARROW_SCSI BIT(4)
1722: #define SYNC_OFFSET (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1723: #define DEFAULT_ASYNC 0x00
1724: #define DEFAULT_OFFSET 0x0F
1725:
1726: #define hp_autostart_0 0x64
1727: #define hp_autostart_1 0x65
1728: #define hp_autostart_2 0x66
1729: #define hp_autostart_3 0x67
1730:
1731:
1732:
1733: #define DISABLE 0x00
1734: #define AUTO_IMMED BIT(5)
1735: #define SELECT BIT(6)
1736: #define RESELECT (BIT(6)+BIT(5))
1737: #define BUSFREE BIT(7)
1738: #define XFER_0 (BIT(7)+BIT(5))
1739: #define END_DATA (BIT(7)+BIT(6))
1740: #define MSG_PHZ (BIT(7)+BIT(6)+BIT(5))
1741:
1742: #define hp_gp_reg_0 0x68
1743: #define hp_gp_reg_1 0x69
1744: #define hp_gp_reg_2 0x6A
1745: #define hp_gp_reg_3 0x6B
1746:
1747: #define hp_seltimeout 0x6C
1748:
1749:
1750: #define TO_2ms 0x54 /* 2.0503ms */
1751: #define TO_4ms 0x67 /* 3.9959ms */
1752:
1753: #define TO_5ms 0x03 /* 4.9152ms */
1754: #define TO_10ms 0x07 /* 11.xxxms */
1755: #define TO_250ms 0x99 /* 250.68ms */
1756: #define TO_290ms 0xB1 /* 289.99ms */
1757: #define TO_350ms 0xD6 /* 350.62ms */
1758: #define TO_417ms 0xFF /* 417.79ms */
1759:
1760: #define hp_clkctrl_0 0x6D
1761:
1762: #define PWR_DWN BIT(6)
1763: #define ACTdeassert BIT(4)
1764: #define ATNonErr BIT(3)
1765: #define CLK_30MHZ BIT(1)
1766: #define CLK_40MHZ (BIT(1) + BIT(0))
1767: #define CLK_50MHZ BIT(2)
1768:
1769: #define CLKCTRL_DEFAULT (ACTdeassert | CLK_40MHZ)
1770:
1771: #define hp_fiforead 0x6E
1772: #define hp_fifowrite 0x6F
1773:
1774: #define hp_offsetctr 0x70
1775: #define hp_xferstat 0x71
1776:
1777: #define FIFO_FULL BIT(7)
1778: #define FIFO_EMPTY BIT(6)
1779: #define FIFO_MASK 0x3F /* Mask for the FIFO count value. */
1780: #define FIFO_LEN 0x20
1781:
1782: #define hp_portctrl_1 0x72
1783:
1784: #define EVEN_HOST_P BIT(5)
1785: #define INVT_SCSI BIT(4)
1786: #define CHK_SCSI_P BIT(3)
1787: #define HOST_MODE8 BIT(0)
1788: #define HOST_MODE16 0x00
1789:
1790: #define hp_xfer_pad 0x73
1791:
1792: #define ID_UNLOCK BIT(3)
1793: #define XFER_PAD BIT(2)
1794:
1795: #define hp_scsidata_0 0x74
1796: #define hp_scsidata_1 0x75
1797: #define hp_timer_0 0x76
1798: #define hp_timer_1 0x77
1799:
1800: #define hp_reserved_78 0x78
1801: #define hp_reserved_79 0x79
1802: #define hp_reserved_7A 0x7A
1803: #define hp_reserved_7B 0x7B
1804:
1805: #define hp_reserved_7C 0x7C
1806: #define hp_reserved_7D 0x7D
1807: #define hp_reserved_7E 0x7E
1808: #define hp_reserved_7F 0x7F
1809:
1810: #define hp_aramBase 0x80
1811: #define BIOS_DATA_OFFSET 0x60
1812: #define BIOS_RELATIVE_CARD 0x64
1813:
1814:
1815:
1816:
1817: #define AUTO_LEN 0x80
1818: #define AR0 0x00
1819: #define AR1 BITW(8)
1820: #define AR2 BITW(9)
1821: #define AR3 (BITW(9) + BITW(8))
1822: #define SDATA BITW(10)
1823:
1824: #define NOP_OP 0x00 /* Nop command */
1825:
1826: #define CRD_OP BITW(11) /* Cmp Reg. w/ Data */
1827:
1828: #define CRR_OP BITW(12) /* Cmp Reg. w. Reg. */
1829:
1830: #define CBE_OP (BITW(14)+BITW(12)+BITW(11)) /* Cmp SCSI cmd class & Branch EQ */
1831:
1832: #define CBN_OP (BITW(14)+BITW(13)) /* Cmp SCSI cmd class & Branch NOT EQ */
1833:
1834: #define CPE_OP (BITW(14)+BITW(11)) /* Cmp SCSI phs & Branch EQ */
1835:
1836: #define CPN_OP (BITW(14)+BITW(12)) /* Cmp SCSI phs & Branch NOT EQ */
1837:
1838:
1839: #define ADATA_OUT 0x00
1840: #define ADATA_IN BITW(8)
1841: #define ACOMMAND BITW(10)
1842: #define ASTATUS (BITW(10)+BITW(8))
1843: #define AMSG_OUT (BITW(10)+BITW(9))
1844: #define AMSG_IN (BITW(10)+BITW(9)+BITW(8))
1845: #define AILLEGAL (BITW(9)+BITW(8))
1846:
1847:
1848: #define BRH_OP BITW(13) /* Branch */
1849:
1850:
1851: #define ALWAYS 0x00
1852: #define EQUAL BITW(8)
1853: #define NOT_EQ BITW(9)
1854:
1855: #define TCB_OP (BITW(13)+BITW(11)) /* Test condition & branch */
1856:
1857:
1858: #define ATN_SET BITW(8)
1859: #define ATN_RESET BITW(9)
1860: #define XFER_CNT (BITW(9)+BITW(8))
1861: #define FIFO_0 BITW(10)
1862: #define FIFO_NOT0 (BITW(10)+BITW(8))
1863: #define T_USE_SYNC0 (BITW(10)+BITW(9))
1864:
1865:
1866: #define MPM_OP BITW(15) /* Match phase and move data */
1867:
1868: #define MDR_OP (BITW(12)+BITW(11)) /* Move data to Reg. */
1869:
1870: #define MRR_OP BITW(14) /* Move DReg. to Reg. */
1871:
1872:
1873: #define S_IDREG (BIT(2)+BIT(1)+BIT(0))
1874:
1875:
1876: #define D_AR0 0x00
1877: #define D_AR1 BIT(0)
1878: #define D_AR2 BIT(1)
1879: #define D_AR3 (BIT(1) + BIT(0))
1880: #define D_SDATA BIT(2)
1881: #define D_BUCKET (BIT(2) + BIT(1) + BIT(0))
1882:
1883:
1884: #define ADR_OP (BITW(13)+BITW(12)) /* Logical AND Reg. w. Data */
1885:
1886: #define ADS_OP (BITW(14)+BITW(13)+BITW(12))
1887:
1888: #define ODR_OP (BITW(13)+BITW(12)+BITW(11))
1889:
1890: #define ODS_OP (BITW(14)+BITW(13)+BITW(12)+BITW(11))
1891:
1892: #define STR_OP (BITW(15)+BITW(14)) /* Store to A_Reg. */
1893:
1894: #define AINT_ENA1 0x00
1895: #define AINT_STAT1 BITW(8)
1896: #define ASCSI_SIG BITW(9)
1897: #define ASCSI_CNTL (BITW(9)+BITW(8))
1898: #define APORT_CNTL BITW(10)
1899: #define ARST_CNTL (BITW(10)+BITW(8))
1900: #define AXFERCNT0 (BITW(10)+BITW(9))
1901: #define AXFERCNT1 (BITW(10)+BITW(9)+BITW(8))
1902: #define AXFERCNT2 BITW(11)
1903: #define AFIFO_DATA (BITW(11)+BITW(8))
1904: #define ASCSISELID (BITW(11)+BITW(9))
1905: #define ASCSISYNC0 (BITW(11)+BITW(9)+BITW(8))
1906:
1907:
1908: #define RAT_OP (BITW(14)+BITW(13)+BITW(11))
1909:
1910: #define SSI_OP (BITW(15)+BITW(11))
1911:
1912:
1913: #define SSI_ITAR_DISC (ITAR_DISC >> 8)
1914: #define SSI_IDO_STRT (IDO_STRT >> 8)
1915: #define SSI_IDI_STRT (IDO_STRT >> 8)
1916:
1917: #define SSI_ICMD_COMP (ICMD_COMP >> 8)
1918: #define SSI_ITICKLE (ITICKLE >> 8)
1919:
1920: #define SSI_IUNKWN (IUNKWN >> 8)
1921: #define SSI_INO_CC (IUNKWN >> 8)
1922: #define SSI_IRFAIL (IUNKWN >> 8)
1923:
1924:
1925: #define NP 0x10 /*Next Phase */
1926: #define NTCMD 0x02 /*Non- Tagged Command start */
1927: #define CMDPZ 0x04 /*Command phase */
1928: #define DINT 0x12 /*Data Out/In interrupt */
1929: #define DI 0x13 /*Data Out */
1930: #define MI 0x14 /*Message In */
1931: #define DC 0x19 /*Disconnect Message */
1932: #define ST 0x1D /*Status Phase */
1933: #define UNKNWN 0x24 /*Unknown bus action */
1934: #define CC 0x25 /*Command Completion failure */
1935: #define TICK 0x26 /*New target reselected us. */
1936: #define RFAIL 0x27 /*Reselection failed */
1937: #define SELCHK 0x28 /*Select & Check SCSI ID latch reg */
1938:
1939:
1940: #define ID_MSG_STRT hp_aramBase + 0x00
1941: #define NON_TAG_ID_MSG hp_aramBase + 0x06
1942: #define CMD_STRT hp_aramBase + 0x08
1943: #define SYNC_MSGS hp_aramBase + 0x08
1944:
1945:
1946:
1947:
1948:
1949: #define TAG_STRT 0x00
1950: #define SELECTION_START 0x00
1951: #define DISCONNECT_START 0x10/2
1952: #define END_DATA_START 0x14/2
1953: #define NONTAG_STRT 0x02/2
1954: #define CMD_ONLY_STRT CMDPZ/2
1955: #define TICKLE_STRT TICK/2
1956: #define SELCHK_STRT SELCHK/2
1957:
1958:
1959:
1960:
1961: #define mEEPROM_CLK_DELAY(port) (RD_HARPOON(port+hp_intstat_1))
1962:
1963: #define mWAIT_10MS(port) (RD_HARPOON(port+hp_intstat_1))
1964:
1965:
1966: #define CLR_XFER_CNT(port) (WR_HARPOON(port+hp_xfercnt_0, 0x00))
1967:
1968: #define SET_XFER_CNT(port, data) (WR_HARP32(port,hp_xfercnt_0,data))
1969:
1970: #define GET_XFER_CNT(port, xfercnt) {RD_HARP32(port,hp_xfercnt_0,xfercnt); xfercnt &= 0xFFFFFF;}
1971: /* #define GET_XFER_CNT(port, xfercnt) (xfercnt = RD_HARPOON(port+hp_xfercnt_2), \
1972: xfercnt <<= 16,\
1973: xfercnt |= RDW_HARPOON((USHORT)(port+hp_xfercnt_0)))
1974: */
1975: #if defined(DOS)
1976: #define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((USHORT)(port+hp_host_addr_lo), (USHORT)(addr & 0x0000FFFFL)),\
1977: addr >>= 16,\
1978: WRW_HARPOON((USHORT)(port+hp_host_addr_hmi), (USHORT)(addr & 0x0000FFFFL)),\
1979: WR_HARP32(port,hp_xfercnt_0,count),\
1980: WRW_HARPOON((USHORT)(port+hp_xfer_cnt_lo), (USHORT)(count & 0x0000FFFFL)),\
1981: count >>= 16,\
1982: WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF)))
1983: #else
1984: #define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((port+hp_host_addr_lo), (USHORT)(addr & 0x0000FFFFL)),\
1985: addr >>= 16,\
1986: WRW_HARPOON((port+hp_host_addr_hmi), (USHORT)(addr & 0x0000FFFFL)),\
1987: WR_HARP32(port,hp_xfercnt_0,count),\
1988: WRW_HARPOON((port+hp_xfer_cnt_lo), (USHORT)(count & 0x0000FFFFL)),\
1989: count >>= 16,\
1990: WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF)))
1991: #endif
1992:
1993: #define ACCEPT_MSG(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1994: WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
1995:
1996:
1997: #define ACCEPT_MSG_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1998: WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
1999:
2000: #define ACCEPT_STAT(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
2001: WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
2002:
2003: #define ACCEPT_STAT_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
2004: WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
2005:
2006: #define DISABLE_AUTO(port) (WR_HARPOON(port+hp_scsireset, PROG_RESET),\
2007: WR_HARPOON(port+hp_scsireset, 0x00))
2008:
2009: #define ARAM_ACCESS(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
2010: (RD_HARPOON(p_port+hp_page_ctrl) | SGRAM_ARAM)))
2011:
2012: #define SGRAM_ACCESS(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
2013: (RD_HARPOON(p_port+hp_page_ctrl) & ~SGRAM_ARAM)))
2014:
2015: #define MDISABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
2016: (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE)))
2017:
2018: #define MENABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
2019: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)))
2020:
2021:
2022:
2023: #endif
2024:
2025:
2026: #if (FW_TYPE==_UCB_MGR_)
2027: void ReadNVRam(PSCCBcard pCurrCard,PUCB p_ucb);
2028: void WriteNVRam(PSCCBcard pCurrCard,PUCB p_ucb);
2029: void UpdateCheckSum(u32bits baseport);
2030: #endif // (FW_TYPE==_UCB_MGR_)
2031:
2032: #if defined(DOS)
2033: UCHAR sfm(USHORT port, PSCCB pcurrSCCB);
2034: void scsiStartAuto(USHORT port);
2035: UCHAR sisyncn(USHORT port, UCHAR p_card, UCHAR syncFlag);
2036: void ssel(USHORT port, UCHAR p_card);
2037: void sres(USHORT port, UCHAR p_card, PSCCBcard pCurrCard);
2038: void sdecm(UCHAR message, USHORT port, UCHAR p_card);
2039: void shandem(USHORT port, UCHAR p_card,PSCCB pCurrSCCB);
2040: void stsyncn(USHORT port, UCHAR p_card);
2041: void sisyncr(USHORT port,UCHAR sync_pulse, UCHAR offset);
2042: void sssyncv(USHORT p_port, UCHAR p_id, UCHAR p_sync_value, PSCCBMgr_tar_info currTar_Info);
2043: void sresb(USHORT port, UCHAR p_card);
2044: void sxfrp(USHORT p_port, UCHAR p_card);
2045: void schkdd(USHORT port, UCHAR p_card);
2046: UCHAR RdStack(USHORT port, UCHAR index);
2047: void WrStack(USHORT portBase, UCHAR index, UCHAR data);
2048: UCHAR ChkIfChipInitialized(USHORT ioPort);
2049:
2050: #if defined(V302)
2051: UCHAR GetTarLun(USHORT port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun);
2052: #endif
2053:
2054: void SendMsg(USHORT port, UCHAR message);
2055: void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code);
2056: UCHAR scsellDOS(USHORT p_port, UCHAR targ_id);
2057: #else
2058: UCHAR sfm(ULONG port, PSCCB pcurrSCCB);
2059: void scsiStartAuto(ULONG port);
2060: UCHAR sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag);
2061: void ssel(ULONG port, UCHAR p_card);
2062: void sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard);
2063: void sdecm(UCHAR message, ULONG port, UCHAR p_card);
2064: void shandem(ULONG port, UCHAR p_card,PSCCB pCurrSCCB);
2065: void stsyncn(ULONG port, UCHAR p_card);
2066: void sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset);
2067: void sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value, PSCCBMgr_tar_info currTar_Info);
2068: void sresb(ULONG port, UCHAR p_card);
2069: void sxfrp(ULONG p_port, UCHAR p_card);
2070: void schkdd(ULONG port, UCHAR p_card);
2071: UCHAR RdStack(ULONG port, UCHAR index);
2072: void WrStack(ULONG portBase, UCHAR index, UCHAR data);
2073: UCHAR ChkIfChipInitialized(ULONG ioPort);
2074:
2075: #if defined(V302)
2076: UCHAR GetTarLun(ULONG port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tar, PUCHAR lun);
2077: #endif
2078:
2079: void SendMsg(ULONG port, UCHAR message);
2080: void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code);
2081: #endif
2082:
2083: void ssenss(PSCCBcard pCurrCard);
2084: void sinits(PSCCB p_sccb, UCHAR p_card);
2085: void RNVRamData(PNVRamInfo pNvRamInfo);
2086:
2087: #if defined(WIDE_SCSI)
2088: #if defined(DOS)
2089: UCHAR siwidn(USHORT port, UCHAR p_card);
2090: void stwidn(USHORT port, UCHAR p_card);
2091: void siwidr(USHORT port, UCHAR width);
2092: #else
2093: UCHAR siwidn(ULONG port, UCHAR p_card);
2094: void stwidn(ULONG port, UCHAR p_card);
2095: void siwidr(ULONG port, UCHAR width);
2096: #endif
2097: #endif
2098:
2099:
2100: void queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card);
2101: void queueDisconnect(PSCCB p_SCCB, UCHAR p_card);
2102: void queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_SCCB, UCHAR p_card);
2103: void queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card);
2104: void queueFlushSccb(UCHAR p_card, UCHAR error_code);
2105: void queueAddSccb(PSCCB p_SCCB, UCHAR card);
2106: UCHAR queueFindSccb(PSCCB p_SCCB, UCHAR p_card);
2107: void utilUpdateResidual(PSCCB p_SCCB);
2108: USHORT CalcCrc16(UCHAR buffer[]);
2109: UCHAR CalcLrc(UCHAR buffer[]);
2110:
2111:
2112: #if defined(DOS)
2113: void Wait1Second(USHORT p_port);
2114: void Wait(USHORT p_port, UCHAR p_delay);
2115: void utilEEWriteOnOff(USHORT p_port,UCHAR p_mode);
2116: void utilEEWrite(USHORT p_port, USHORT ee_data, USHORT ee_addr);
2117: USHORT utilEERead(USHORT p_port, USHORT ee_addr);
2118: USHORT utilEEReadOrg(USHORT p_port, USHORT ee_addr);
2119: void utilEESendCmdAddr(USHORT p_port, UCHAR ee_cmd, USHORT ee_addr);
2120: #else
2121: void Wait1Second(ULONG p_port);
2122: void Wait(ULONG p_port, UCHAR p_delay);
2123: void utilEEWriteOnOff(ULONG p_port,UCHAR p_mode);
2124: void utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr);
2125: USHORT utilEERead(ULONG p_port, USHORT ee_addr);
2126: USHORT utilEEReadOrg(ULONG p_port, USHORT ee_addr);
2127: void utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr);
2128: #endif
2129:
2130:
2131:
2132: #if defined(OS2)
2133: void far phaseDataOut(ULONG port, UCHAR p_card);
2134: void far phaseDataIn(ULONG port, UCHAR p_card);
2135: void far phaseCommand(ULONG port, UCHAR p_card);
2136: void far phaseStatus(ULONG port, UCHAR p_card);
2137: void far phaseMsgOut(ULONG port, UCHAR p_card);
2138: void far phaseMsgIn(ULONG port, UCHAR p_card);
2139: void far phaseIllegal(ULONG port, UCHAR p_card);
2140: #else
2141: #if defined(DOS)
2142: void phaseDataOut(USHORT port, UCHAR p_card);
2143: void phaseDataIn(USHORT port, UCHAR p_card);
2144: void phaseCommand(USHORT port, UCHAR p_card);
2145: void phaseStatus(USHORT port, UCHAR p_card);
2146: void phaseMsgOut(USHORT port, UCHAR p_card);
2147: void phaseMsgIn(USHORT port, UCHAR p_card);
2148: void phaseIllegal(USHORT port, UCHAR p_card);
2149: #else
2150: void phaseDataOut(ULONG port, UCHAR p_card);
2151: void phaseDataIn(ULONG port, UCHAR p_card);
2152: void phaseCommand(ULONG port, UCHAR p_card);
2153: void phaseStatus(ULONG port, UCHAR p_card);
2154: void phaseMsgOut(ULONG port, UCHAR p_card);
2155: void phaseMsgIn(ULONG port, UCHAR p_card);
2156: void phaseIllegal(ULONG port, UCHAR p_card);
2157: #endif
2158: #endif
2159:
2160: #if defined(DOS)
2161: void phaseDecode(USHORT port, UCHAR p_card);
2162: void phaseChkFifo(USHORT port, UCHAR p_card);
2163: void phaseBusFree(USHORT p_port, UCHAR p_card);
2164: #else
2165: void phaseDecode(ULONG port, UCHAR p_card);
2166: void phaseChkFifo(ULONG port, UCHAR p_card);
2167: void phaseBusFree(ULONG p_port, UCHAR p_card);
2168: #endif
2169:
2170:
2171:
2172:
2173: #if defined(DOS)
2174: void XbowInit(USHORT port, UCHAR scamFlg);
2175: void BusMasterInit(USHORT p_port);
2176: int DiagXbow(USHORT port);
2177: int DiagBusMaster(USHORT port);
2178: void DiagEEPROM(USHORT p_port);
2179: #else
2180: void XbowInit(ULONG port, UCHAR scamFlg);
2181: void BusMasterInit(ULONG p_port);
2182: int DiagXbow(ULONG port);
2183: int DiagBusMaster(ULONG port);
2184: void DiagEEPROM(ULONG p_port);
2185: #endif
2186:
2187:
2188:
2189:
2190: #if defined(DOS)
2191: void busMstrAbort(USHORT port);
2192: UCHAR busMstrTimeOut(USHORT port);
2193: void dataXferProcessor(USHORT port, PSCCBcard pCurrCard);
2194: void busMstrSGDataXferStart(USHORT port, PSCCB pCurrSCCB);
2195: void busMstrDataXferStart(USHORT port, PSCCB pCurrSCCB);
2196: void hostDataXferAbort(USHORT port, UCHAR p_card, PSCCB pCurrSCCB);
2197: #else
2198: void busMstrAbort(ULONG port);
2199: UCHAR busMstrTimeOut(ULONG port);
2200: void dataXferProcessor(ULONG port, PSCCBcard pCurrCard);
2201: void busMstrSGDataXferStart(ULONG port, PSCCB pCurrSCCB);
2202: void busMstrDataXferStart(ULONG port, PSCCB pCurrSCCB);
2203: void hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB);
2204: #endif
2205: void hostDataXferRestart(PSCCB currSCCB);
2206:
2207:
2208: #if defined (DOS)
2209: UCHAR SccbMgr_bad_isr(USHORT p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int);
2210: #else
2211: UCHAR SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int);
2212:
2213: #endif
2214:
2215: void SccbMgrTableInitAll(void);
2216: void SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card);
2217: void SccbMgrTableInitTarget(UCHAR p_card, UCHAR target);
2218:
2219:
2220:
2221: void scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up);
2222:
2223: #if defined(DOS)
2224: int scarb(USHORT p_port, UCHAR p_sel_type);
2225: void scbusf(USHORT p_port);
2226: void scsel(USHORT p_port);
2227: void scasid(UCHAR p_card, USHORT p_port);
2228: UCHAR scxferc(USHORT p_port, UCHAR p_data);
2229: UCHAR scsendi(USHORT p_port, UCHAR p_id_string[]);
2230: UCHAR sciso(USHORT p_port, UCHAR p_id_string[]);
2231: void scwirod(USHORT p_port, UCHAR p_data_bit);
2232: void scwiros(USHORT p_port, UCHAR p_data_bit);
2233: UCHAR scvalq(UCHAR p_quintet);
2234: UCHAR scsell(USHORT p_port, UCHAR targ_id);
2235: void scwtsel(USHORT p_port);
2236: void inisci(UCHAR p_card, USHORT p_port, UCHAR p_our_id);
2237: void scsavdi(UCHAR p_card, USHORT p_port);
2238: #else
2239: int scarb(ULONG p_port, UCHAR p_sel_type);
2240: void scbusf(ULONG p_port);
2241: void scsel(ULONG p_port);
2242: void scasid(UCHAR p_card, ULONG p_port);
2243: UCHAR scxferc(ULONG p_port, UCHAR p_data);
2244: UCHAR scsendi(ULONG p_port, UCHAR p_id_string[]);
2245: UCHAR sciso(ULONG p_port, UCHAR p_id_string[]);
2246: void scwirod(ULONG p_port, UCHAR p_data_bit);
2247: void scwiros(ULONG p_port, UCHAR p_data_bit);
2248: UCHAR scvalq(UCHAR p_quintet);
2249: UCHAR scsell(ULONG p_port, UCHAR targ_id);
2250: void scwtsel(ULONG p_port);
2251: void inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id);
2252: void scsavdi(UCHAR p_card, ULONG p_port);
2253: #endif
2254: UCHAR scmachid(UCHAR p_card, UCHAR p_id_string[]);
2255:
2256:
2257: #if defined(DOS)
2258: void autoCmdCmplt(USHORT p_port, UCHAR p_card);
2259: void autoLoadDefaultMap(USHORT p_port);
2260: #else
2261: void autoCmdCmplt(ULONG p_port, UCHAR p_card);
2262: void autoLoadDefaultMap(ULONG p_port);
2263: #endif
2264:
2265:
2266:
2267: #if (FW_TYPE==_SCCB_MGR_)
2268: void OS_start_timer(unsigned long ioport, unsigned long timeout);
2269: void OS_stop_timer(unsigned long ioport, unsigned long timeout);
2270: void OS_disable_int(unsigned char intvec);
2271: void OS_enable_int(unsigned char intvec);
2272: void OS_delay(unsigned long count);
2273: int OS_VirtToPhys(u32bits CardHandle, u32bits *physaddr, u32bits *virtaddr);
2274: #if !(defined(UNIX) || defined(OS2) || defined(SOLARIS_REAL_MODE))
2275: void OS_Lock(PSCCBMGR_INFO pCardInfo);
2276: void OS_UnLock(PSCCBMGR_INFO pCardInfo);
2277: #endif // if FW_TYPE == ...
2278:
2279: #endif
2280:
2281: extern SCCBCARD BL_Card[MAX_CARDS];
2282: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
2283:
2284:
2285: #if defined(OS2)
2286: extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
2287: #else
2288: #if defined(DOS)
2289: extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
2290: #else
2291: extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
2292: #endif
2293: #endif
2294:
2295: extern SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR];
2296: extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
2297: #if defined(DOS) || defined(OS2)
2298: extern UCHAR temp_id_string[ID_STRING_LENGTH];
2299: #endif
2300: extern UCHAR scamHAString[];
2301:
2302:
2303: extern UCHAR mbCards;
2304: #if defined(BUGBUG)
2305: extern UCHAR debug_int[MAX_CARDS][debug_size];
2306: extern UCHAR debug_index[MAX_CARDS];
2307: void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
2308: #endif
2309:
2310: #if (FW_TYPE==_SCCB_MGR_)
2311: #if defined(DOS)
2312: extern UCHAR first_time;
2313: #endif
2314: #endif /* (FW_TYPE==_SCCB_MGR_) */
2315:
2316: #if (FW_TYPE==_UCB_MGR_)
2317: #if defined(DOS)
2318: extern u08bits first_time;
2319: #endif
2320: #endif /* (FW_TYPE==_UCB_MGR_) */
2321:
2322: #if defined(BUGBUG)
2323: void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
2324: #endif
2325:
2326: extern unsigned int SccbGlobalFlags;
2327:
2328:
2329: /*----------------------------------------------------------------------
2330: *
2331: *
2332: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
2333: *
2334: * This file is available under both the GNU General Public License
2335: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
2336: *
2337: * $Workfile: sccb.c $
2338: *
2339: * Description: Functions relating to handling of the SCCB interface
2340: * between the device driver and the HARPOON.
2341: *
2342: * $Date: 1999/04/26 05:53:56 $
2343: *
2344: * $Revision: 1.1 $
2345: *
2346: *----------------------------------------------------------------------*/
2347:
2348: /*#include <globals.h>*/
2349:
2350: #if (FW_TYPE==_UCB_MGR_)
2351: /*#include <budi.h>*/
2352: /*#include <budioctl.h>*/
2353: #endif
2354:
2355: /*#include <sccbmgr.h>*/
2356: /*#include <blx30.h>*/
2357: /*#include <target.h>*/
2358: /*#include <eeprom.h>*/
2359: /*#include <scsi2.h>*/
2360: /*#include <harpoon.h>*/
2361:
2362:
2363:
2364: #if (FW_TYPE==_SCCB_MGR_)
2365: #define mOS_Lock(card) OS_Lock((PSCCBMGR_INFO)(((PSCCBcard)card)->cardInfo))
2366: #define mOS_UnLock(card) OS_UnLock((PSCCBMGR_INFO)(((PSCCBcard)card)->cardInfo))
2367: #else /* FW_TYPE==_UCB_MGR_ */
2368: #define mOS_Lock(card) OS_Lock((u32bits)(((PSCCBcard)card)->ioPort))
2369: #define mOS_UnLock(card) OS_UnLock((u32bits)(((PSCCBcard)card)->ioPort))
2370: #endif
2371:
2372:
2373: /*
2374: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
2375: extern SCCBCARD BL_Card[MAX_CARDS];
2376:
2377: extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
2378: extern UCHAR mbCards;
2379:
2380: #if defined (OS2)
2381: extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
2382: #else
2383: #if defined(DOS)
2384: extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
2385: #else
2386: extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
2387: #endif
2388: #endif
2389:
2390:
2391: #if defined(BUGBUG)
2392: extern UCHAR debug_int[MAX_CARDS][debug_size];
2393: extern UCHAR debug_index[MAX_CARDS];
2394: void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
2395: #endif
2396: */
2397:
2398: #if (FW_TYPE==_SCCB_MGR_)
2399:
2400: /*---------------------------------------------------------------------
2401: *
2402: * Function: SccbMgr_sense_adapter
2403: *
2404: * Description: Setup and/or Search for cards and return info to caller.
2405: *
2406: *---------------------------------------------------------------------*/
2407:
2408: int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo)
2409: {
2410: #if defined(DOS)
2411: #else
2412: static UCHAR first_time = 1;
2413: #endif
2414:
2415: UCHAR i,j,id,ScamFlg;
2416: USHORT temp,temp2,temp3,temp4,temp5,temp6;
2417: #if defined(DOS)
2418: USHORT ioport;
2419: #else
2420: ULONG ioport;
2421: #endif
2422: PNVRamInfo pCurrNvRam;
2423:
2424: #if defined(DOS)
2425: ioport = (USHORT)pCardInfo->si_baseaddr;
2426: #else
2427: ioport = pCardInfo->si_baseaddr;
2428: #endif
2429:
2430:
2431: if (RD_HARPOON(ioport+hp_vendor_id_0) != ORION_VEND_0)
2432: return((int)FAILURE);
2433:
2434: if ((RD_HARPOON(ioport+hp_vendor_id_1) != ORION_VEND_1))
2435: return((int)FAILURE);
2436:
2437: if ((RD_HARPOON(ioport+hp_device_id_0) != ORION_DEV_0))
2438: return((int)FAILURE);
2439:
2440: if ((RD_HARPOON(ioport+hp_device_id_1) != ORION_DEV_1))
2441: return((int)FAILURE);
2442:
2443:
2444: if (RD_HARPOON(ioport+hp_rev_num) != 0x0f){
2445:
2446: /* For new Harpoon then check for sub_device ID LSB
2447: the bits(0-3) must be all ZERO for compatible with
2448: current version of SCCBMgr, else skip this Harpoon
2449: device. */
2450:
2451: if (RD_HARPOON(ioport+hp_sub_device_id_0) & 0x0f)
2452: return((int)FAILURE);
2453: }
2454:
2455: if (first_time)
2456: {
2457: SccbMgrTableInitAll();
2458: first_time = 0;
2459: mbCards = 0;
2460: }
2461:
2462: if(RdStack(ioport, 0) != 0x00) {
2463: if(ChkIfChipInitialized(ioport) == FALSE)
2464: {
2465: pCurrNvRam = NULL;
2466: WR_HARPOON(ioport+hp_semaphore, 0x00);
2467: XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
2468: DiagEEPROM(ioport);
2469: }
2470: else
2471: {
2472: if(mbCards < MAX_MB_CARDS) {
2473: pCurrNvRam = &nvRamInfo[mbCards];
2474: mbCards++;
2475: pCurrNvRam->niBaseAddr = ioport;
2476: RNVRamData(pCurrNvRam);
2477: }else
2478: return((int) FAILURE);
2479: }
2480: }else
2481: pCurrNvRam = NULL;
2482: #if defined (NO_BIOS_OPTION)
2483: pCurrNvRam = NULL;
2484: XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
2485: DiagEEPROM(ioport);
2486: #endif /* No BIOS Option */
2487:
2488: WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
2489: WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
2490:
2491: if(pCurrNvRam)
2492: pCardInfo->si_id = pCurrNvRam->niAdapId;
2493: else
2494: pCardInfo->si_id = (UCHAR)(utilEERead(ioport, (ADAPTER_SCSI_ID/2)) &
2495: (UCHAR)0x0FF);
2496:
2497: pCardInfo->si_lun = 0x00;
2498: pCardInfo->si_fw_revision = ORION_FW_REV;
2499: temp2 = 0x0000;
2500: temp3 = 0x0000;
2501: temp4 = 0x0000;
2502: temp5 = 0x0000;
2503: temp6 = 0x0000;
2504:
2505: for (id = 0; id < (16/2); id++) {
2506:
2507: if(pCurrNvRam){
2508: temp = (USHORT) pCurrNvRam->niSyncTbl[id];
2509: temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
2510: (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
2511: }else
2512: temp = utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id));
2513:
2514: for (i = 0; i < 2; temp >>=8,i++) {
2515:
2516: temp2 >>= 1;
2517: temp3 >>= 1;
2518: temp4 >>= 1;
2519: temp5 >>= 1;
2520: temp6 >>= 1;
2521: switch (temp & 0x3)
2522: {
2523: case AUTO_RATE_20: /* Synchronous, 20 mega-transfers/second */
2524: temp6 |= 0x8000; /* Fall through */
2525: case AUTO_RATE_10: /* Synchronous, 10 mega-transfers/second */
2526: temp5 |= 0x8000; /* Fall through */
2527: case AUTO_RATE_05: /* Synchronous, 5 mega-transfers/second */
2528: temp2 |= 0x8000; /* Fall through */
2529: case AUTO_RATE_00: /* Asynchronous */
2530: break;
2531: }
2532:
2533: if (temp & DISC_ENABLE_BIT)
2534: temp3 |= 0x8000;
2535:
2536: if (temp & WIDE_NEGO_BIT)
2537: temp4 |= 0x8000;
2538:
2539: }
2540: }
2541:
2542: pCardInfo->si_per_targ_init_sync = temp2;
2543: pCardInfo->si_per_targ_no_disc = temp3;
2544: pCardInfo->si_per_targ_wide_nego = temp4;
2545: pCardInfo->si_per_targ_fast_nego = temp5;
2546: pCardInfo->si_per_targ_ultra_nego = temp6;
2547:
2548: if(pCurrNvRam)
2549: i = pCurrNvRam->niSysConf;
2550: else
2551: i = (UCHAR)(utilEERead(ioport, (SYSTEM_CONFIG/2)));
2552:
2553: if(pCurrNvRam)
2554: ScamFlg = pCurrNvRam->niScamConf;
2555: else
2556: ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
2557:
2558: pCardInfo->si_flags = 0x0000;
2559:
2560: if (i & 0x01)
2561: pCardInfo->si_flags |= SCSI_PARITY_ENA;
2562:
2563: if (!(i & 0x02))
2564: pCardInfo->si_flags |= SOFT_RESET;
2565:
2566: if (i & 0x10)
2567: pCardInfo->si_flags |= EXTENDED_TRANSLATION;
2568:
2569: if (ScamFlg & SCAM_ENABLED)
2570: pCardInfo->si_flags |= FLAG_SCAM_ENABLED;
2571:
2572: if (ScamFlg & SCAM_LEVEL2)
2573: pCardInfo->si_flags |= FLAG_SCAM_LEVEL2;
2574:
2575: j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
2576: if (i & 0x04) {
2577: j |= SCSI_TERM_ENA_L;
2578: }
2579: WR_HARPOON(ioport+hp_bm_ctrl, j );
2580:
2581: j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
2582: if (i & 0x08) {
2583: j |= SCSI_TERM_ENA_H;
2584: }
2585: WR_HARPOON(ioport+hp_ee_ctrl, j );
2586:
2587: if (!(RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD))
2588:
2589: pCardInfo->si_flags |= SUPPORT_16TAR_32LUN;
2590:
2591: pCardInfo->si_card_family = HARPOON_FAMILY;
2592: pCardInfo->si_bustype = BUSTYPE_PCI;
2593:
2594: if(pCurrNvRam){
2595: pCardInfo->si_card_model[0] = '9';
2596: switch(pCurrNvRam->niModel & 0x0f){
2597: case MODEL_LT:
2598: pCardInfo->si_card_model[1] = '3';
2599: pCardInfo->si_card_model[2] = '0';
2600: break;
2601: case MODEL_LW:
2602: pCardInfo->si_card_model[1] = '5';
2603: pCardInfo->si_card_model[2] = '0';
2604: break;
2605: case MODEL_DL:
2606: pCardInfo->si_card_model[1] = '3';
2607: pCardInfo->si_card_model[2] = '2';
2608: break;
2609: case MODEL_DW:
2610: pCardInfo->si_card_model[1] = '5';
2611: pCardInfo->si_card_model[2] = '2';
2612: break;
2613: }
2614: }else{
2615: temp = utilEERead(ioport, (MODEL_NUMB_0/2));
2616: pCardInfo->si_card_model[0] = (UCHAR)(temp >> 8);
2617: temp = utilEERead(ioport, (MODEL_NUMB_2/2));
2618:
2619: pCardInfo->si_card_model[1] = (UCHAR)(temp & 0x00FF);
2620: pCardInfo->si_card_model[2] = (UCHAR)(temp >> 8);
2621: }
2622:
2623: if (pCardInfo->si_card_model[1] == '3')
2624: {
2625: if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
2626: pCardInfo->si_flags |= LOW_BYTE_TERM;
2627: }
2628: else if (pCardInfo->si_card_model[2] == '0')
2629: {
2630: temp = RD_HARPOON(ioport+hp_xfer_pad);
2631: WR_HARPOON(ioport+hp_xfer_pad, (temp & ~BIT(4)));
2632: if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
2633: pCardInfo->si_flags |= LOW_BYTE_TERM;
2634: WR_HARPOON(ioport+hp_xfer_pad, (temp | BIT(4)));
2635: if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
2636: pCardInfo->si_flags |= HIGH_BYTE_TERM;
2637: WR_HARPOON(ioport+hp_xfer_pad, temp);
2638: }
2639: else
2640: {
2641: temp = RD_HARPOON(ioport+hp_ee_ctrl);
2642: temp2 = RD_HARPOON(ioport+hp_xfer_pad);
2643: WR_HARPOON(ioport+hp_ee_ctrl, (temp | SEE_CS));
2644: WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
2645: temp3 = 0;
2646: for (i = 0; i < 8; i++)
2647: {
2648: temp3 <<= 1;
2649: if (!(RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7)))
2650: temp3 |= 1;
2651: WR_HARPOON(ioport+hp_xfer_pad, (temp2 & ~BIT(4)));
2652: WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
2653: }
2654: WR_HARPOON(ioport+hp_ee_ctrl, temp);
2655: WR_HARPOON(ioport+hp_xfer_pad, temp2);
2656: if (!(temp3 & BIT(7)))
2657: pCardInfo->si_flags |= LOW_BYTE_TERM;
2658: if (!(temp3 & BIT(6)))
2659: pCardInfo->si_flags |= HIGH_BYTE_TERM;
2660: }
2661:
2662:
2663: ARAM_ACCESS(ioport);
2664:
2665: for ( i = 0; i < 4; i++ ) {
2666:
2667: pCardInfo->si_XlatInfo[i] =
2668: RD_HARPOON(ioport+hp_aramBase+BIOS_DATA_OFFSET+i);
2669: }
2670:
2671: /* return with -1 if no sort, else return with
2672: logical card number sorted by BIOS (zero-based) */
2673:
2674: pCardInfo->si_relative_cardnum =
2675: (UCHAR)(RD_HARPOON(ioport+hp_aramBase+BIOS_RELATIVE_CARD)-1);
2676:
2677: SGRAM_ACCESS(ioport);
2678:
2679: s_PhaseTbl[0] = phaseDataOut;
2680: s_PhaseTbl[1] = phaseDataIn;
2681: s_PhaseTbl[2] = phaseIllegal;
2682: s_PhaseTbl[3] = phaseIllegal;
2683: s_PhaseTbl[4] = phaseCommand;
2684: s_PhaseTbl[5] = phaseStatus;
2685: s_PhaseTbl[6] = phaseMsgOut;
2686: s_PhaseTbl[7] = phaseMsgIn;
2687:
2688: pCardInfo->si_present = 0x01;
2689:
2690: #if defined(BUGBUG)
2691:
2692:
2693: for (i = 0; i < MAX_CARDS; i++) {
2694:
2695: for (id=0; id<debug_size; id++)
2696: debug_int[i][id] = (UCHAR)0x00;
2697: debug_index[i] = 0;
2698: }
2699:
2700: #endif
2701:
2702: return(0);
2703: }
2704:
2705:
2706: /*---------------------------------------------------------------------
2707: *
2708: * Function: SccbMgr_config_adapter
2709: *
2710: * Description: Setup adapter for normal operation (hard reset).
2711: *
2712: *---------------------------------------------------------------------*/
2713:
2714: #if defined(DOS)
2715: USHORT SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo)
2716: #else
2717: ULONG SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo)
2718: #endif
2719: {
2720: PSCCBcard CurrCard = NULL;
2721: PNVRamInfo pCurrNvRam;
2722: UCHAR i,j,thisCard, ScamFlg;
2723: USHORT temp,sync_bit_map,id;
2724: #if defined(DOS)
2725: USHORT ioport;
2726: #else
2727: ULONG ioport;
2728: #endif
2729:
2730: #if defined(DOS)
2731: ioport = (USHORT)pCardInfo->si_baseaddr;
2732: #else
2733: ioport = pCardInfo->si_baseaddr;
2734: #endif
2735:
2736: for(thisCard =0; thisCard <= MAX_CARDS; thisCard++) {
2737:
2738: if (thisCard == MAX_CARDS) {
2739:
2740: return(FAILURE);
2741: }
2742:
2743: if (BL_Card[thisCard].ioPort == ioport) {
2744:
2745: CurrCard = &BL_Card[thisCard];
2746: SccbMgrTableInitCard(CurrCard,thisCard);
2747: break;
2748: }
2749:
2750: else if (BL_Card[thisCard].ioPort == 0x00) {
2751:
2752: BL_Card[thisCard].ioPort = ioport;
2753: CurrCard = &BL_Card[thisCard];
2754:
2755: if(mbCards)
2756: for(i = 0; i < mbCards; i++){
2757: if(CurrCard->ioPort == nvRamInfo[i].niBaseAddr)
2758: CurrCard->pNvRamInfo = &nvRamInfo[i];
2759: }
2760: SccbMgrTableInitCard(CurrCard,thisCard);
2761: CurrCard->cardIndex = thisCard;
2762: CurrCard->cardInfo = pCardInfo;
2763:
2764: break;
2765: }
2766: }
2767:
2768: pCurrNvRam = CurrCard->pNvRamInfo;
2769:
2770: if(pCurrNvRam){
2771: ScamFlg = pCurrNvRam->niScamConf;
2772: }
2773: else{
2774: ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
2775: }
2776:
2777:
2778: BusMasterInit(ioport);
2779: XbowInit(ioport, ScamFlg);
2780:
2781: #if defined (NO_BIOS_OPTION)
2782:
2783:
2784: if (DiagXbow(ioport)) return(FAILURE);
2785: if (DiagBusMaster(ioport)) return(FAILURE);
2786:
2787: #endif /* No BIOS Option */
2788:
2789: autoLoadDefaultMap(ioport);
2790:
2791:
2792: for (i = 0,id = 0x01; i != pCardInfo->si_id; i++,id <<= 1){}
2793:
2794: WR_HARPOON(ioport+hp_selfid_0, id);
2795: WR_HARPOON(ioport+hp_selfid_1, 0x00);
2796: WR_HARPOON(ioport+hp_arb_id, pCardInfo->si_id);
2797: CurrCard->ourId = pCardInfo->si_id;
2798:
2799: i = (UCHAR) pCardInfo->si_flags;
2800: if (i & SCSI_PARITY_ENA)
2801: WR_HARPOON(ioport+hp_portctrl_1,(HOST_MODE8 | CHK_SCSI_P));
2802:
2803: j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
2804: if (i & LOW_BYTE_TERM)
2805: j |= SCSI_TERM_ENA_L;
2806: WR_HARPOON(ioport+hp_bm_ctrl, j);
2807:
2808: j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
2809: if (i & HIGH_BYTE_TERM)
2810: j |= SCSI_TERM_ENA_H;
2811: WR_HARPOON(ioport+hp_ee_ctrl, j );
2812:
2813:
2814: if (!(pCardInfo->si_flags & SOFT_RESET)) {
2815:
2816: sresb(ioport,thisCard);
2817:
2818: scini(thisCard, pCardInfo->si_id, 0);
2819: }
2820:
2821:
2822:
2823: if (pCardInfo->si_flags & POST_ALL_UNDERRRUNS)
2824: CurrCard->globalFlags |= F_NO_FILTER;
2825:
2826: if(pCurrNvRam){
2827: if(pCurrNvRam->niSysConf & 0x10)
2828: CurrCard->globalFlags |= F_GREEN_PC;
2829: }
2830: else{
2831: if (utilEERead(ioport, (SYSTEM_CONFIG/2)) & GREEN_PC_ENA)
2832: CurrCard->globalFlags |= F_GREEN_PC;
2833: }
2834:
2835: /* Set global flag to indicate Re-Negotiation to be done on all
2836: ckeck condition */
2837: if(pCurrNvRam){
2838: if(pCurrNvRam->niScsiConf & 0x04)
2839: CurrCard->globalFlags |= F_DO_RENEGO;
2840: }
2841: else{
2842: if (utilEERead(ioport, (SCSI_CONFIG/2)) & RENEGO_ENA)
2843: CurrCard->globalFlags |= F_DO_RENEGO;
2844: }
2845:
2846: if(pCurrNvRam){
2847: if(pCurrNvRam->niScsiConf & 0x08)
2848: CurrCard->globalFlags |= F_CONLUN_IO;
2849: }
2850: else{
2851: if (utilEERead(ioport, (SCSI_CONFIG/2)) & CONNIO_ENA)
2852: CurrCard->globalFlags |= F_CONLUN_IO;
2853: }
2854:
2855:
2856: temp = pCardInfo->si_per_targ_no_disc;
2857:
2858: for (i = 0,id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) {
2859:
2860: if (temp & id)
2861: sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
2862: }
2863:
2864: sync_bit_map = 0x0001;
2865:
2866: for (id = 0; id < (MAX_SCSI_TAR/2); id++) {
2867:
2868: if(pCurrNvRam){
2869: temp = (USHORT) pCurrNvRam->niSyncTbl[id];
2870: temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
2871: (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
2872: }else
2873: temp = utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id));
2874:
2875: for (i = 0; i < 2; temp >>=8,i++) {
2876:
2877: if (pCardInfo->si_per_targ_init_sync & sync_bit_map) {
2878:
2879: sccbMgrTbl[thisCard][id*2+i].TarEEValue = (UCHAR)temp;
2880: }
2881:
2882: else {
2883: sccbMgrTbl[thisCard][id*2+i].TarStatus |= SYNC_SUPPORTED;
2884: sccbMgrTbl[thisCard][id*2+i].TarEEValue =
2885: (UCHAR)(temp & ~EE_SYNC_MASK);
2886: }
2887:
2888: #if defined(WIDE_SCSI)
2889: /* if ((pCardInfo->si_per_targ_wide_nego & sync_bit_map) ||
2890: (id*2+i >= 8)){
2891: */
2892: if (pCardInfo->si_per_targ_wide_nego & sync_bit_map){
2893:
2894: sccbMgrTbl[thisCard][id*2+i].TarEEValue |= EE_WIDE_SCSI;
2895:
2896: }
2897:
2898: else { /* NARROW SCSI */
2899: sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
2900: }
2901:
2902: #else
2903: sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
2904: #endif
2905:
2906:
2907: sync_bit_map <<= 1;
2908:
2909:
2910:
2911: }
2912: }
2913:
2914: WR_HARPOON((ioport+hp_semaphore),
2915: (UCHAR)(RD_HARPOON((ioport+hp_semaphore)) | SCCB_MGR_PRESENT));
2916:
2917: #if defined(DOS)
2918: return((USHORT)CurrCard);
2919: #else
2920: return((ULONG)CurrCard);
2921: #endif
2922: }
2923:
2924: #else /* end (FW_TYPE==_SCCB_MGR_) */
2925:
2926:
2927:
2928: STATIC s16bits FP_PresenceCheck(PMGR_INFO pMgrInfo)
2929: {
2930: PMGR_ENTRYPNTS pMgr_EntryPnts = &pMgrInfo->mi_Functions;
2931:
2932: pMgr_EntryPnts->UCBMgr_probe_adapter = probe_adapter;
2933: pMgr_EntryPnts->UCBMgr_init_adapter = init_adapter;
2934: pMgr_EntryPnts->UCBMgr_start_UCB = SccbMgr_start_sccb;
2935: pMgr_EntryPnts->UCBMgr_build_UCB = build_UCB;
2936: pMgr_EntryPnts->UCBMgr_abort_UCB = SccbMgr_abort_sccb;
2937: pMgr_EntryPnts->UCBMgr_my_int = SccbMgr_my_int;
2938: pMgr_EntryPnts->UCBMgr_isr = SccbMgr_isr;
2939: pMgr_EntryPnts->UCBMgr_scsi_reset = SccbMgr_scsi_reset;
2940: pMgr_EntryPnts->UCBMgr_timer_expired = SccbMgr_timer_expired;
2941: #ifndef NO_IOCTLS
2942: pMgr_EntryPnts->UCBMgr_unload_card = SccbMgr_unload_card;
2943: pMgr_EntryPnts->UCBMgr_save_foreign_state =
2944: SccbMgr_save_foreign_state;
2945: pMgr_EntryPnts->UCBMgr_restore_foreign_state =
2946: SccbMgr_restore_foreign_state;
2947: pMgr_EntryPnts->UCBMgr_restore_native_state =
2948: SccbMgr_restore_native_state;
2949: #endif /*NO_IOCTLS*/
2950:
2951: pMgrInfo->mi_SGListFormat=0x01;
2952: pMgrInfo->mi_DataPtrFormat=0x01;
2953: pMgrInfo->mi_MaxSGElements= (u16bits) 0xffffffff;
2954: pMgrInfo->mi_MgrPrivateLen=sizeof(SCCB);
2955: pMgrInfo->mi_PCIVendorID=BL_VENDOR_ID;
2956: pMgrInfo->mi_PCIDeviceID=FP_DEVICE_ID;
2957: pMgrInfo->mi_MgrAttributes= ATTR_IO_MAPPED +
2958: ATTR_PHYSICAL_ADDRESS +
2959: ATTR_VIRTUAL_ADDRESS +
2960: ATTR_OVERLAPPED_IO_IOCTLS_OK;
2961: pMgrInfo->mi_IoRangeLen = 256;
2962: return(0);
2963: }
2964:
2965:
2966:
2967: /*---------------------------------------------------------------------
2968: *
2969: * Function: probe_adapter
2970: *
2971: * Description: Setup and/or Search for cards and return info to caller.
2972: *
2973: *---------------------------------------------------------------------*/
2974: STATIC s32bits probe_adapter(PADAPTER_INFO pAdapterInfo)
2975: {
2976: u16bits temp,temp2,temp3,temp4;
2977: u08bits i,j,id;
2978:
2979: #if defined(DOS)
2980: #else
2981: static u08bits first_time = 1;
2982: #endif
2983: BASE_PORT ioport;
2984: PNVRamInfo pCurrNvRam;
2985:
2986: ioport = (BASE_PORT)pAdapterInfo->ai_baseaddr;
2987:
2988:
2989:
2990: if (RD_HARPOON(ioport+hp_vendor_id_0) != ORION_VEND_0)
2991: return(1);
2992:
2993: if ((RD_HARPOON(ioport+hp_vendor_id_1) != ORION_VEND_1))
2994: return(2);
2995:
2996: if ((RD_HARPOON(ioport+hp_device_id_0) != ORION_DEV_0))
2997: return(3);
2998:
2999: if ((RD_HARPOON(ioport+hp_device_id_1) != ORION_DEV_1))
3000: return(4);
3001:
3002:
3003: if (RD_HARPOON(ioport+hp_rev_num) != 0x0f){
3004:
3005:
3006: /* For new Harpoon then check for sub_device ID LSB
3007: the bits(0-3) must be all ZERO for compatible with
3008: current version of SCCBMgr, else skip this Harpoon
3009: device. */
3010:
3011: if (RD_HARPOON(ioport+hp_sub_device_id_0) & 0x0f)
3012: return(5);
3013: }
3014:
3015: if (first_time) {
3016:
3017: SccbMgrTableInitAll();
3018: first_time = 0;
3019: mbCards = 0;
3020: }
3021:
3022: if(RdStack(ioport, 0) != 0x00) {
3023: if(ChkIfChipInitialized(ioport) == FALSE)
3024: {
3025: pCurrNvRam = NULL;
3026: WR_HARPOON(ioport+hp_semaphore, 0x00);
3027: XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
3028: DiagEEPROM(ioport);
3029: }
3030: else
3031: {
3032: if(mbCards < MAX_MB_CARDS) {
3033: pCurrNvRam = &nvRamInfo[mbCards];
3034: mbCards++;
3035: pCurrNvRam->niBaseAddr = ioport;
3036: RNVRamData(pCurrNvRam);
3037: }else
3038: return((int) FAILURE);
3039: }
3040: }else
3041: pCurrNvRam = NULL;
3042:
3043: #if defined (NO_BIOS_OPTION)
3044: pCurrNvRam = NULL;
3045: XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
3046: DiagEEPROM(ioport);
3047: #endif /* No BIOS Option */
3048:
3049: WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
3050: WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
3051:
3052: if(pCurrNvRam)
3053: pAdapterInfo->ai_id = pCurrNvRam->niAdapId;
3054: else
3055: pAdapterInfo->ai_id = (u08bits)(utilEERead(ioport, (ADAPTER_SCSI_ID/2)) &
3056: (u08bits)0x0FF);
3057:
3058: pAdapterInfo->ai_lun = 0x00;
3059: pAdapterInfo->ai_fw_revision[0] = '3';
3060: pAdapterInfo->ai_fw_revision[1] = '1';
3061: pAdapterInfo->ai_fw_revision[2] = '1';
3062: pAdapterInfo->ai_fw_revision[3] = ' ';
3063: pAdapterInfo->ai_NumChannels = 1;
3064:
3065: temp2 = 0x0000;
3066: temp3 = 0x0000;
3067: temp4 = 0x0000;
3068:
3069: for (id = 0; id < (16/2); id++) {
3070:
3071: if(pCurrNvRam){
3072: temp = (USHORT) pCurrNvRam->niSyncTbl[id];
3073: temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
3074: (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
3075: }else
3076: temp = utilEERead(ioport, (u16bits)((SYNC_RATE_TBL/2)+id));
3077:
3078: for (i = 0; i < 2; temp >>=8,i++) {
3079:
3080: if ((temp & 0x03) != AUTO_RATE_00) {
3081:
3082: temp2 >>= 0x01;
3083: temp2 |= 0x8000;
3084: }
3085:
3086: else {
3087: temp2 >>= 0x01;
3088: }
3089:
3090: if (temp & DISC_ENABLE_BIT) {
3091:
3092: temp3 >>= 0x01;
3093: temp3 |= 0x8000;
3094: }
3095:
3096: else {
3097: temp3 >>= 0x01;
3098: }
3099:
3100: if (temp & WIDE_NEGO_BIT) {
3101:
3102: temp4 >>= 0x01;
3103: temp4 |= 0x8000;
3104: }
3105:
3106: else {
3107: temp4 >>= 0x01;
3108: }
3109:
3110: }
3111: }
3112:
3113: pAdapterInfo->ai_per_targ_init_sync = temp2;
3114: pAdapterInfo->ai_per_targ_no_disc = temp3;
3115: pAdapterInfo->ai_per_targ_wide_nego = temp4;
3116: if(pCurrNvRam)
3117: i = pCurrNvRam->niSysConf;
3118: else
3119: i = (u08bits)(utilEERead(ioport, (SYSTEM_CONFIG/2)));
3120:
3121: /*
3122: ** interrupts always level-triggered for FlashPoint
3123: */
3124: pAdapterInfo->ai_stateinfo |= LEVEL_TRIG;
3125:
3126: if (i & 0x01)
3127: pAdapterInfo->ai_stateinfo |= SCSI_PARITY_ENA;
3128:
3129: if (i & 0x02) /* SCSI Bus reset in AutoSCSI Set ? */
3130: {
3131: if(pCurrNvRam)
3132: {
3133: j = pCurrNvRam->niScamConf;
3134: }
3135: else
3136: {
3137: j = (u08bits) utilEERead(ioport, SCAM_CONFIG/2);
3138: }
3139: if(j & SCAM_ENABLED)
3140: {
3141: if(j & SCAM_LEVEL2)
3142: {
3143: pAdapterInfo->ai_stateinfo |= SCAM2_ENA;
3144: }
3145: else
3146: {
3147: pAdapterInfo->ai_stateinfo |= SCAM1_ENA;
3148: }
3149: }
3150: }
3151: j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
3152: if (i & 0x04) {
3153: j |= SCSI_TERM_ENA_L;
3154: pAdapterInfo->ai_stateinfo |= LOW_BYTE_TERM_ENA;
3155: }
3156: WR_HARPOON(ioport+hp_bm_ctrl, j );
3157:
3158: j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
3159: if (i & 0x08) {
3160: j |= SCSI_TERM_ENA_H;
3161: pAdapterInfo->ai_stateinfo |= HIGH_BYTE_TERM_ENA;
3162: }
3163: WR_HARPOON(ioport+hp_ee_ctrl, j );
3164:
3165: if(RD_HARPOON(ioport + hp_page_ctrl) & BIOS_SHADOW)
3166: {
3167: pAdapterInfo->ai_FlashRomSize = 64 * 1024; /* 64k ROM */
3168: }
3169: else
3170: {
3171: pAdapterInfo->ai_FlashRomSize = 32 * 1024; /* 32k ROM */
3172: }
3173:
3174: pAdapterInfo->ai_stateinfo |= (FAST20_ENA | TAG_QUEUE_ENA);
3175: if (!(RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD))
3176: {
3177: pAdapterInfo->ai_attributes |= (WIDE_CAPABLE | FAST20_CAPABLE
3178: | SCAM2_CAPABLE
3179: | TAG_QUEUE_CAPABLE
3180: | SUPRESS_UNDERRRUNS_CAPABLE
3181: | SCSI_PARITY_CAPABLE);
3182: pAdapterInfo->ai_MaxTarg = 16;
3183: pAdapterInfo->ai_MaxLun = 32;
3184: }
3185: else
3186: {
3187: pAdapterInfo->ai_attributes |= (FAST20_CAPABLE | SCAM2_CAPABLE
3188: | TAG_QUEUE_CAPABLE
3189: | SUPRESS_UNDERRRUNS_CAPABLE
3190: | SCSI_PARITY_CAPABLE);
3191: pAdapterInfo->ai_MaxTarg = 8;
3192: pAdapterInfo->ai_MaxLun = 8;
3193: }
3194:
3195: pAdapterInfo->ai_product_family = HARPOON_FAMILY;
3196: pAdapterInfo->ai_HBAbustype = BUSTYPE_PCI;
3197:
3198: for (i=0;i<CARD_MODEL_NAMELEN;i++)
3199: {
3200: pAdapterInfo->ai_card_model[i]=' '; /* initialize the ai_card_model */
3201: }
3202:
3203: if(pCurrNvRam){
3204: pAdapterInfo->ai_card_model[0] = '9';
3205: switch(pCurrNvRam->niModel & 0x0f){
3206: case MODEL_LT:
3207: pAdapterInfo->ai_card_model[1] = '3';
3208: pAdapterInfo->ai_card_model[2] = '0';
3209: break;
3210: case MODEL_LW:
3211: pAdapterInfo->ai_card_model[1] = '5';
3212: pAdapterInfo->ai_card_model[2] = '0';
3213: break;
3214: case MODEL_DL:
3215: pAdapterInfo->ai_card_model[1] = '3';
3216: pAdapterInfo->ai_card_model[2] = '2';
3217: break;
3218: case MODEL_DW:
3219: pAdapterInfo->ai_card_model[1] = '5';
3220: pAdapterInfo->ai_card_model[2] = '2';
3221: break;
3222: }
3223: }else{
3224: temp = utilEERead(ioport, (MODEL_NUMB_0/2));
3225: pAdapterInfo->ai_card_model[0] = (u08bits)(temp >> 8);
3226: temp = utilEERead(ioport, (MODEL_NUMB_2/2));
3227:
3228: pAdapterInfo->ai_card_model[1] = (u08bits)(temp & 0x00FF);
3229: pAdapterInfo->ai_card_model[2] = (u08bits)(temp >> 8);
3230: }
3231:
3232:
3233:
3234: pAdapterInfo->ai_FiberProductType = 0;
3235:
3236: pAdapterInfo->ai_secondary_range = 0;
3237:
3238: for (i=0;i<WORLD_WIDE_NAMELEN;i++)
3239: {
3240: pAdapterInfo->ai_worldwidename[i]='\0';
3241: }
3242:
3243: for (i=0;i<VENDOR_NAMELEN;i++)
3244: {
3245: pAdapterInfo->ai_vendorstring[i]='\0';
3246: }
3247: pAdapterInfo->ai_vendorstring[0]='B';
3248: pAdapterInfo->ai_vendorstring[1]='U';
3249: pAdapterInfo->ai_vendorstring[2]='S';
3250: pAdapterInfo->ai_vendorstring[3]='L';
3251: pAdapterInfo->ai_vendorstring[4]='O';
3252: pAdapterInfo->ai_vendorstring[5]='G';
3253: pAdapterInfo->ai_vendorstring[6]='I';
3254: pAdapterInfo->ai_vendorstring[7]='C';
3255:
3256: for (i=0;i<FAMILY_NAMELEN;i++)
3257: {
3258: pAdapterInfo->ai_AdapterFamilyString[i]='\0';
3259: }
3260: pAdapterInfo->ai_AdapterFamilyString[0]='F';
3261: pAdapterInfo->ai_AdapterFamilyString[1]='L';
3262: pAdapterInfo->ai_AdapterFamilyString[2]='A';
3263: pAdapterInfo->ai_AdapterFamilyString[3]='S';
3264: pAdapterInfo->ai_AdapterFamilyString[4]='H';
3265: pAdapterInfo->ai_AdapterFamilyString[5]='P';
3266: pAdapterInfo->ai_AdapterFamilyString[6]='O';
3267: pAdapterInfo->ai_AdapterFamilyString[7]='I';
3268: pAdapterInfo->ai_AdapterFamilyString[8]='N';
3269: pAdapterInfo->ai_AdapterFamilyString[9]='T';
3270:
3271: ARAM_ACCESS(ioport);
3272:
3273: for ( i = 0; i < 4; i++ ) {
3274:
3275: pAdapterInfo->ai_XlatInfo[i] =
3276: RD_HARPOON(ioport+hp_aramBase+BIOS_DATA_OFFSET+i);
3277: }
3278:
3279: /* return with -1 if no sort, else return with
3280: logical card number sorted by BIOS (zero-based) */
3281:
3282:
3283: pAdapterInfo->ai_relative_cardnum =
3284: (u08bits)(RD_HARPOON(ioport+hp_aramBase+BIOS_RELATIVE_CARD)-1);
3285:
3286: SGRAM_ACCESS(ioport);
3287:
3288: s_PhaseTbl[0] = phaseDataOut;
3289: s_PhaseTbl[1] = phaseDataIn;
3290: s_PhaseTbl[2] = phaseIllegal;
3291: s_PhaseTbl[3] = phaseIllegal;
3292: s_PhaseTbl[4] = phaseCommand;
3293: s_PhaseTbl[5] = phaseStatus;
3294: s_PhaseTbl[6] = phaseMsgOut;
3295: s_PhaseTbl[7] = phaseMsgIn;
3296:
3297: pAdapterInfo->ai_present = 0x01;
3298:
3299: #if defined(BUGBUG)
3300:
3301:
3302: for (i = 0; i < MAX_CARDS; i++) {
3303:
3304: for (id=0; id<debug_size; id++)
3305: debug_int[i][id] = (u08bits)0x00;
3306: debug_index[i] = 0;
3307: }
3308:
3309: #endif
3310:
3311: return(0);
3312: }
3313:
3314:
3315:
3316:
3317:
3318: /*---------------------------------------------------------------------
3319: *
3320: * Function: init_adapter, exported to BUDI via UCBMgr_init_adapter entry
3321: *
3322: *
3323: * Description: Setup adapter for normal operation (hard reset).
3324: *
3325: *---------------------------------------------------------------------*/
3326: STATIC CARD_HANDLE init_adapter(PADAPTER_INFO pCardInfo)
3327: {
3328: PSCCBcard CurrCard;
3329: PNVRamInfo pCurrNvRam;
3330: u08bits i,j,thisCard, ScamFlg;
3331: u16bits temp,sync_bit_map,id;
3332: BASE_PORT ioport;
3333:
3334: ioport = (BASE_PORT)pCardInfo->ai_baseaddr;
3335:
3336: for(thisCard =0; thisCard <= MAX_CARDS; thisCard++) {
3337:
3338: if (thisCard == MAX_CARDS) {
3339:
3340: return(FAILURE);
3341: }
3342:
3343: if (BL_Card[thisCard].ioPort == ioport) {
3344:
3345: CurrCard = &BL_Card[thisCard];
3346: SccbMgrTableInitCard(CurrCard,thisCard);
3347: break;
3348: }
3349:
3350: else if (BL_Card[thisCard].ioPort == 0x00) {
3351:
3352: BL_Card[thisCard].ioPort = ioport;
3353: CurrCard = &BL_Card[thisCard];
3354:
3355: if(mbCards)
3356: for(i = 0; i < mbCards; i++){
3357: if(CurrCard->ioPort == nvRamInfo[i].niBaseAddr)
3358: CurrCard->pNvRamInfo = &nvRamInfo[i];
3359: }
3360: SccbMgrTableInitCard(CurrCard,thisCard);
3361: CurrCard->cardIndex = thisCard;
3362: CurrCard->cardInfo = pCardInfo;
3363:
3364: break;
3365: }
3366: }
3367:
3368: pCurrNvRam = CurrCard->pNvRamInfo;
3369:
3370:
3371: if(pCurrNvRam){
3372: ScamFlg = pCurrNvRam->niScamConf;
3373: }
3374: else{
3375: ScamFlg = (UCHAR) utilEERead(ioport, SCAM_CONFIG/2);
3376: }
3377:
3378:
3379: BusMasterInit(ioport);
3380: XbowInit(ioport, ScamFlg);
3381:
3382: #if defined (NO_BIOS_OPTION)
3383:
3384:
3385: if (DiagXbow(ioport)) return(FAILURE);
3386: if (DiagBusMaster(ioport)) return(FAILURE);
3387:
3388: #endif /* No BIOS Option */
3389:
3390: autoLoadDefaultMap(ioport);
3391:
3392:
3393: for (i = 0,id = 0x01; i != pCardInfo->ai_id; i++,id <<= 1){}
3394:
3395: WR_HARPOON(ioport+hp_selfid_0, id);
3396: WR_HARPOON(ioport+hp_selfid_1, 0x00);
3397: WR_HARPOON(ioport+hp_arb_id, pCardInfo->ai_id);
3398: CurrCard->ourId = (unsigned char) pCardInfo->ai_id;
3399:
3400: i = (u08bits) pCardInfo->ai_stateinfo;
3401: if (i & SCSI_PARITY_ENA)
3402: WR_HARPOON(ioport+hp_portctrl_1,(HOST_MODE8 | CHK_SCSI_P));
3403:
3404: j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
3405: if (i & LOW_BYTE_TERM_ENA)
3406: j |= SCSI_TERM_ENA_L;
3407: WR_HARPOON(ioport+hp_bm_ctrl, j);
3408:
3409: j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
3410: if (i & HIGH_BYTE_TERM_ENA)
3411: j |= SCSI_TERM_ENA_H;
3412: WR_HARPOON(ioport+hp_ee_ctrl, j );
3413:
3414:
3415: if (!(pCardInfo->ai_stateinfo & NO_RESET_IN_INIT)) {
3416:
3417: sresb(ioport,thisCard);
3418:
3419: scini(thisCard, (u08bits) pCardInfo->ai_id, 0);
3420: }
3421:
3422:
3423:
3424: if (pCardInfo->ai_stateinfo & SUPRESS_UNDERRRUNS_ENA)
3425: CurrCard->globalFlags |= F_NO_FILTER;
3426:
3427: if(pCurrNvRam){
3428: if(pCurrNvRam->niSysConf & 0x10)
3429: CurrCard->globalFlags |= F_GREEN_PC;
3430: }
3431: else{
3432: if (utilEERead(ioport, (SYSTEM_CONFIG/2)) & GREEN_PC_ENA)
3433: CurrCard->globalFlags |= F_GREEN_PC;
3434: }
3435:
3436: /* Set global flag to indicate Re-Negotiation to be done on all
3437: ckeck condition */
3438: if(pCurrNvRam){
3439: if(pCurrNvRam->niScsiConf & 0x04)
3440: CurrCard->globalFlags |= F_DO_RENEGO;
3441: }
3442: else{
3443: if (utilEERead(ioport, (SCSI_CONFIG/2)) & RENEGO_ENA)
3444: CurrCard->globalFlags |= F_DO_RENEGO;
3445: }
3446:
3447: if(pCurrNvRam){
3448: if(pCurrNvRam->niScsiConf & 0x08)
3449: CurrCard->globalFlags |= F_CONLUN_IO;
3450: }
3451: else{
3452: if (utilEERead(ioport, (SCSI_CONFIG/2)) & CONNIO_ENA)
3453: CurrCard->globalFlags |= F_CONLUN_IO;
3454: }
3455:
3456: temp = pCardInfo->ai_per_targ_no_disc;
3457:
3458: for (i = 0,id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) {
3459:
3460: if (temp & id)
3461: sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
3462: }
3463:
3464: sync_bit_map = 0x0001;
3465:
3466: for (id = 0; id < (MAX_SCSI_TAR/2); id++){
3467:
3468: if(pCurrNvRam){
3469: temp = (USHORT) pCurrNvRam->niSyncTbl[id];
3470: temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
3471: (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
3472: }else
3473: temp = utilEERead(ioport, (u16bits)((SYNC_RATE_TBL/2)+id));
3474:
3475: for (i = 0; i < 2; temp >>=8,i++){
3476:
3477: if (pCardInfo->ai_per_targ_init_sync & sync_bit_map){
3478:
3479: sccbMgrTbl[thisCard][id*2+i].TarEEValue = (u08bits)temp;
3480: }
3481:
3482: else {
3483: sccbMgrTbl[thisCard][id*2+i].TarStatus |= SYNC_SUPPORTED;
3484: sccbMgrTbl[thisCard][id*2+i].TarEEValue =
3485: (u08bits)(temp & ~EE_SYNC_MASK);
3486: }
3487:
3488: #if defined(WIDE_SCSI)
3489: /* if ((pCardInfo->ai_per_targ_wide_nego & sync_bit_map) ||
3490: (id*2+i >= 8)){
3491: */
3492: if (pCardInfo->ai_per_targ_wide_nego & sync_bit_map){
3493:
3494: sccbMgrTbl[thisCard][id*2+i].TarEEValue |= EE_WIDE_SCSI;
3495:
3496: }
3497:
3498: else { /* NARROW SCSI */
3499: sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
3500: }
3501:
3502: #else
3503: sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
3504: #endif
3505:
3506:
3507: sync_bit_map <<= 1;
3508: }
3509: }
3510:
3511:
3512: pCardInfo->ai_SGListFormat=0x01;
3513: pCardInfo->ai_DataPtrFormat=0x01;
3514: pCardInfo->ai_AEN_mask &= SCSI_RESET_COMPLETE;
3515:
3516: WR_HARPOON((ioport+hp_semaphore),
3517: (u08bits)(RD_HARPOON((ioport+hp_semaphore)) | SCCB_MGR_PRESENT));
3518:
3519: return((u32bits)CurrCard);
3520:
3521: }
3522:
3523:
3524: /*---------------------------------------------------------------------
3525: *
3526: * Function: build_ucb, exported to BUDI via UCBMgr_build_ucb entry
3527: *
3528: * Description: prepare fw portion of ucb. do not start, resource not guaranteed
3529: * so don't manipulate anything that's derived from states which
3530: * may change
3531: *
3532: *---------------------------------------------------------------------*/
3533: void build_UCB(CARD_HANDLE pCurrCard, PUCB p_ucb)
3534: {
3535:
3536: u08bits thisCard;
3537: u08bits i,j;
3538:
3539: PSCCB p_sccb;
3540:
3541:
3542: thisCard = ((PSCCBcard) pCurrCard)->cardIndex;
3543:
3544:
3545: p_sccb=(PSCCB)p_ucb->UCB_MgrPrivatePtr;
3546:
3547:
3548: p_sccb->Sccb_ucb_ptr=p_ucb;
3549:
3550: switch (p_ucb->UCB_opcode & (OPC_DEVICE_RESET+OPC_XFER_SG+OPC_CHK_RESIDUAL))
3551: {
3552: case OPC_DEVICE_RESET:
3553: p_sccb->OperationCode=RESET_COMMAND;
3554: break;
3555: case OPC_XFER_SG:
3556: p_sccb->OperationCode=SCATTER_GATHER_COMMAND;
3557: break;
3558: case OPC_XFER_SG+OPC_CHK_RESIDUAL:
3559: p_sccb->OperationCode=RESIDUAL_SG_COMMAND;
3560: break;
3561: case OPC_CHK_RESIDUAL:
3562:
3563: p_sccb->OperationCode=RESIDUAL_COMMAND;
3564: break;
3565: default:
3566: p_sccb->OperationCode=SCSI_INITIATOR_COMMAND;
3567: break;
3568: }
3569:
3570: if (p_ucb->UCB_opcode & OPC_TQ_ENABLE)
3571: {
3572: p_sccb->ControlByte = (u08bits)((p_ucb->UCB_opcode & OPC_TQ_MASK)>>2) | F_USE_CMD_Q;
3573: }
3574: else
3575: {
3576: p_sccb->ControlByte = 0;
3577: }
3578:
3579:
3580: p_sccb->CdbLength = (u08bits)p_ucb->UCB_cdblen;
3581:
3582: if (p_ucb->UCB_opcode & OPC_NO_AUTO_SENSE)
3583: {
3584: p_sccb->RequestSenseLength = 0;
3585: }
3586: else
3587: {
3588: p_sccb->RequestSenseLength = (unsigned char) p_ucb->UCB_senselen;
3589: }
3590:
3591:
3592: if (p_ucb->UCB_opcode & OPC_XFER_SG)
3593: {
3594: p_sccb->DataPointer=p_ucb->UCB_virt_dataptr;
3595: p_sccb->DataLength = (((u32bits)p_ucb->UCB_NumSgElements)<<3);
3596: }
3597: else
3598: {
3599: p_sccb->DataPointer=p_ucb->UCB_phys_dataptr;
3600: p_sccb->DataLength=p_ucb->UCB_datalen;
3601: };
3602:
3603: p_sccb->HostStatus=0;
3604: p_sccb->TargetStatus=0;
3605: p_sccb->TargID=(unsigned char)p_ucb->UCB_targid;
3606: p_sccb->Lun=(unsigned char) p_ucb->UCB_lun;
3607: p_sccb->SccbIOPort=((PSCCBcard)pCurrCard)->ioPort;
3608:
3609: j=p_ucb->UCB_cdblen;
3610: for (i=0;i<j;i++)
3611: {
3612: p_sccb->Cdb[i] = p_ucb->UCB_cdb[i];
3613: }
3614:
3615: p_sccb->SensePointer=p_ucb->UCB_phys_senseptr;
3616:
3617: sinits(p_sccb,thisCard);
3618:
3619: }
3620: #ifndef NO_IOCTLS
3621:
3622: /*---------------------------------------------------------------------
3623: *
3624: * Function: GetDevSyncRate
3625: *
3626: *---------------------------------------------------------------------*/
3627: STATIC int GetDevSyncRate(PSCCBcard pCurrCard,PUCB p_ucb)
3628: {
3629: struct _SYNC_RATE_INFO * pSyncStr;
3630: PSCCBMgr_tar_info currTar_Info;
3631: BASE_PORT ioport;
3632: u08bits scsiID, j;
3633:
3634: #if (FW_TYPE != _SCCB_MGR_)
3635: if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
3636: {
3637: return(1);
3638: }
3639: #endif
3640:
3641: ioport = pCurrCard->ioPort;
3642: pSyncStr = (struct _SYNC_RATE_INFO *) p_ucb->UCB_virt_dataptr;
3643: scsiID = (u08bits) p_ucb->UCB_targid;
3644: currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
3645: j = currTar_Info->TarSyncCtrl;
3646:
3647: switch (currTar_Info->TarEEValue & EE_SYNC_MASK)
3648: {
3649: case EE_SYNC_ASYNC:
3650: pSyncStr->RequestMegaXferRate = 0x00;
3651: break;
3652: case EE_SYNC_5MB:
3653: pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 50 : 100;
3654: break;
3655: case EE_SYNC_10MB:
3656: pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 100 : 200;
3657: break;
3658: case EE_SYNC_20MB:
3659: pSyncStr->RequestMegaXferRate = (j & NARROW_SCSI) ? 200 : 400;
3660: break;
3661: }
3662:
3663: switch ((j >> 5) & 0x07)
3664: {
3665: case 0x00:
3666: if((j & 0x07) == 0x00)
3667: {
3668: pSyncStr->ActualMegaXferRate = 0x00; /* Async Mode */
3669: }
3670: else
3671: {
3672: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 200 : 400;
3673: }
3674: break;
3675: case 0x01:
3676: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 100 : 200;
3677: break;
3678: case 0x02:
3679: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 66 : 122;
3680: break;
3681: case 0x03:
3682: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 50 : 100;
3683: break;
3684: case 0x04:
3685: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 40 : 80;
3686: break;
3687: case 0x05:
3688: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 33 : 66;
3689: break;
3690: case 0x06:
3691: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 28 : 56;
3692: break;
3693: case 0x07:
3694: pSyncStr->ActualMegaXferRate = (j & NARROW_SCSI) ? 25 : 50;
3695: break;
3696: }
3697: pSyncStr->NegotiatedOffset = j & 0x0f;
3698:
3699: return(0);
3700: }
3701:
3702: /*---------------------------------------------------------------------
3703: *
3704: * Function: SetDevSyncRate
3705: *
3706: *---------------------------------------------------------------------*/
3707: STATIC int SetDevSyncRate(PSCCBcard pCurrCard, PUCB p_ucb)
3708: {
3709: struct _SYNC_RATE_INFO * pSyncStr;
3710: PSCCBMgr_tar_info currTar_Info;
3711: BASE_PORT ioPort;
3712: u08bits scsiID, i, j, syncVal;
3713: u16bits syncOffset, actualXferRate;
3714: union {
3715: u08bits tempb[2];
3716: u16bits tempw;
3717: }temp2;
3718:
3719: #if (FW_TYPE != _SCCB_MGR_)
3720: if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
3721: {
3722: return(1);
3723: }
3724: #endif
3725:
3726: ioPort = pCurrCard->ioPort;
3727: pSyncStr = (struct _SYNC_RATE_INFO *) p_ucb->UCB_virt_dataptr;
3728: scsiID = (u08bits) p_ucb->UCB_targid;
3729: currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
3730: i = RD_HARPOON(ioPort+hp_xfer_pad); /* Save current value */
3731: WR_HARPOON(ioPort+hp_xfer_pad, (i | ID_UNLOCK));
3732: WR_HARPOON(ioPort+hp_select_id, ((scsiID << 4) | scsiID));
3733: j = RD_HARPOON(ioPort+hp_synctarg_0);
3734: WR_HARPOON(ioPort+hp_xfer_pad, i); /* restore value */
3735:
3736: actualXferRate = pSyncStr->ActualMegaXferRate;
3737: if(!(j & NARROW_SCSI))
3738: {
3739: actualXferRate <<= 1;
3740: }
3741: if(actualXferRate == 0x00)
3742: {
3743: syncVal = EE_SYNC_ASYNC; /* Async Mode */
3744: }
3745: if(actualXferRate == 0x0200)
3746: {
3747: syncVal = EE_SYNC_20MB; /* 20/40 MB Mode */
3748: }
3749: if(actualXferRate > 0x0050 && actualXferRate < 0x0200 )
3750: {
3751: syncVal = EE_SYNC_10MB; /* 10/20 MB Mode */
3752: }
3753: else
3754: {
3755: syncVal = EE_SYNC_5MB; /* 5/10 MB Mode */
3756: }
3757: if(currTar_Info->TarEEValue && EE_SYNC_MASK == syncVal)
3758: return(0);
1.1.1.2 ! root 3759: currTar_Info->TarEEValue = (!(EE_SYNC_MASK & currTar_Info->TarEEValue))
1.1 root 3760: | syncVal;
3761: syncOffset = (SYNC_RATE_TBL + scsiID) / 2;
3762: temp2.tempw = utilEERead(ioPort, syncOffset);
3763: if(scsiID & 0x01)
3764: {
1.1.1.2 ! root 3765: temp2.tempb[0] = (!(EE_SYNC_MASK & temp2.tempb[0])) | syncVal;
1.1 root 3766: }
3767: else
3768: {
1.1.1.2 ! root 3769: temp2.tempb[1] = (!(EE_SYNC_MASK & temp2.tempb[1])) | syncVal;
1.1 root 3770: }
3771: utilEEWriteOnOff(ioPort, 1);
3772: utilEEWrite(ioPort, temp2.tempw, syncOffset);
3773: utilEEWriteOnOff(ioPort, 0);
3774: UpdateCheckSum(ioPort);
3775:
3776: return(0);
3777: }
3778: /*---------------------------------------------------------------------
3779: *
3780: * Function: GetDevWideMode
3781: *
3782: *---------------------------------------------------------------------*/
3783: int GetDevWideMode(PSCCBcard pCurrCard,PUCB p_ucb)
3784: {
3785: u08bits *pData;
3786:
3787: pData = (u08bits *)p_ucb->UCB_virt_dataptr;
3788: if(sccbMgrTbl[pCurrCard->cardIndex][p_ucb->UCB_targid].TarEEValue
3789: & EE_WIDE_SCSI)
3790: {
3791: *pData = 1;
3792: }
3793: else
3794: {
3795: *pData = 0;
3796: }
3797:
3798: return(0);
3799: }
3800:
3801: /*---------------------------------------------------------------------
3802: *
3803: * Function: SetDevWideMode
3804: *
3805: *---------------------------------------------------------------------*/
3806: int SetDevWideMode(PSCCBcard pCurrCard,PUCB p_ucb)
3807: {
3808: u08bits *pData;
3809: PSCCBMgr_tar_info currTar_Info;
3810: BASE_PORT ioPort;
3811: u08bits scsiID, scsiWideMode;
3812: u16bits syncOffset;
3813: union {
3814: u08bits tempb[2];
3815: u16bits tempw;
3816: }temp2;
3817:
3818: #if (FW_TYPE != _SCCB_MGR_)
3819: if( !(pCurrCard->cardInfo->ai_attributes & WIDE_CAPABLE) )
3820: {
3821: return(1);
3822: }
3823:
3824: if( p_ucb->UCB_targid >= pCurrCard->cardInfo->ai_MaxTarg )
3825: {
3826: return(1);
3827: }
3828: #endif
3829:
3830: ioPort = pCurrCard->ioPort;
3831: pData = (u08bits *)p_ucb->UCB_virt_dataptr;
3832: scsiID = (u08bits) p_ucb->UCB_targid;
3833: currTar_Info = &sccbMgrTbl[pCurrCard->cardIndex][scsiID];
3834:
3835: if(*pData)
3836: {
3837: if(currTar_Info->TarEEValue & EE_WIDE_SCSI)
3838: {
3839: return(0);
3840: }
3841: else
3842: {
3843: scsiWideMode = EE_WIDE_SCSI;
3844: }
3845: }
3846: else
3847: {
1.1.1.2 ! root 3848: if(!(currTar_Info->TarEEValue & EE_WIDE_SCSI))
1.1 root 3849: {
3850: return(0);
3851: }
3852: else
3853: {
3854: scsiWideMode = 0;
3855: }
3856: }
1.1.1.2 ! root 3857: currTar_Info->TarEEValue = (!(EE_WIDE_SCSI & currTar_Info->TarEEValue))
1.1 root 3858: | scsiWideMode;
3859:
3860: syncOffset = (SYNC_RATE_TBL + scsiID) / 2;
3861: temp2.tempw = utilEERead(ioPort, syncOffset);
3862: if(scsiID & 0x01)
3863: {
1.1.1.2 ! root 3864: temp2.tempb[0] = (!(EE_WIDE_SCSI & temp2.tempb[0])) | scsiWideMode;
1.1 root 3865: }
3866: else
3867: {
1.1.1.2 ! root 3868: temp2.tempb[1] = (!(EE_WIDE_SCSI & temp2.tempb[1])) | scsiWideMode;
1.1 root 3869: }
3870: utilEEWriteOnOff(ioPort, 1);
3871: utilEEWrite(ioPort, temp2.tempw, syncOffset);
3872: utilEEWriteOnOff(ioPort, 0);
3873: UpdateCheckSum(ioPort);
3874:
3875: return(0);
3876: }
3877:
3878: /*---------------------------------------------------------------------
3879: *
3880: * Function: ReadNVRam
3881: *
3882: *---------------------------------------------------------------------*/
3883: void ReadNVRam(PSCCBcard pCurrCard,PUCB p_ucb)
3884: {
3885: u08bits *pdata;
3886: u16bits i,numwrds,numbytes,offset,temp;
3887: u08bits OneMore = FALSE;
3888: #if defined(DOS)
3889: u16bits ioport;
3890: #else
3891: u32bits ioport;
3892: #endif
3893:
3894: numbytes = (u16bits) p_ucb->UCB_datalen;
3895: ioport = pCurrCard->ioPort;
3896: pdata = (u08bits *) p_ucb->UCB_virt_dataptr;
3897: offset = (u16bits) (p_ucb->UCB_IOCTLParams[0]);
3898:
3899:
3900:
3901: if (offset & 0x1)
3902: {
3903: *((u16bits*) pdata) = utilEERead(ioport,(u16bits)((offset - 1) / 2)); /* 16 bit read */
3904: *pdata = *(pdata + 1);
3905: ++offset;
3906: ++pdata;
3907: --numbytes;
3908: }
3909:
3910: numwrds = numbytes / 2;
3911: if (numbytes & 1)
3912: OneMore = TRUE;
3913:
3914: for (i = 0; i < numwrds; i++)
3915: {
3916: *((u16bits*) pdata) = utilEERead(ioport,(u16bits)(offset / 2));
3917: pdata += 2;
3918: offset += 2;
3919: }
3920: if (OneMore)
3921: {
3922: --pdata;
3923: -- offset;
3924: temp = utilEERead(ioport,(u16bits)(offset / 2));
3925: *pdata = (u08bits) (temp);
3926: }
3927:
3928: } /* end proc ReadNVRam */
3929:
3930:
3931: /*---------------------------------------------------------------------
3932: *
3933: * Function: WriteNVRam
3934: *
3935: *---------------------------------------------------------------------*/
3936: void WriteNVRam(PSCCBcard pCurrCard,PUCB p_ucb)
3937: {
3938: u08bits *pdata;
3939: u16bits i,numwrds,numbytes,offset, eeprom_end;
3940: u08bits OneMore = FALSE;
3941: union {
3942: u08bits tempb[2];
3943: u16bits tempw;
3944: } temp2;
3945:
3946: #if defined(DOS)
3947: u16bits ioport;
3948: #else
3949: u32bits ioport;
3950: #endif
3951:
3952: numbytes = (u16bits) p_ucb->UCB_datalen;
3953: ioport = pCurrCard->ioPort;
3954: pdata = (u08bits *) p_ucb->UCB_virt_dataptr;
3955: offset = (u16bits) (p_ucb->UCB_IOCTLParams[0]);
3956:
3957: if (RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD)
3958: eeprom_end = 512;
3959: else
3960: eeprom_end = 768;
3961:
3962: if(offset > eeprom_end)
3963: return;
3964:
3965: if((offset + numbytes) > eeprom_end)
3966: numbytes = eeprom_end - offset;
3967:
3968: utilEEWriteOnOff(ioport,1); /* Enable write access to the EEPROM */
3969:
3970:
3971:
3972: if (offset & 0x1)
3973: {
3974: temp2.tempw = utilEERead(ioport,(u16bits)((offset - 1) / 2)); /* 16 bit read */
3975: temp2.tempb[1] = *pdata;
3976: utilEEWrite(ioport, temp2.tempw, (u16bits)((offset -1) / 2));
3977: *pdata = *(pdata + 1);
3978: ++offset;
3979: ++pdata;
3980: --numbytes;
3981: }
3982:
3983: numwrds = numbytes / 2;
3984: if (numbytes & 1)
3985: OneMore = TRUE;
3986:
3987: for (i = 0; i < numwrds; i++)
3988: {
3989: utilEEWrite(ioport, *((pu16bits)pdata),(u16bits)(offset / 2));
3990: pdata += 2;
3991: offset += 2;
3992: }
3993: if (OneMore)
3994: {
3995:
3996: temp2.tempw = utilEERead(ioport,(u16bits)(offset / 2));
3997: temp2.tempb[0] = *pdata;
3998: utilEEWrite(ioport, temp2.tempw, (u16bits)(offset / 2));
3999: }
4000: utilEEWriteOnOff(ioport,0); /* Turn off write access */
4001: UpdateCheckSum((u32bits)ioport);
4002:
4003: } /* end proc WriteNVRam */
4004:
4005:
4006:
4007: /*---------------------------------------------------------------------
4008: *
4009: * Function: UpdateCheckSum
4010: *
4011: * Description: Update Check Sum in EEPROM
4012: *
4013: *---------------------------------------------------------------------*/
4014:
4015:
4016: void UpdateCheckSum(u32bits baseport)
4017: {
4018: USHORT i,sum_data, eeprom_end;
4019:
4020: sum_data = 0x0000;
4021:
4022:
4023: if (RD_HARPOON(baseport+hp_page_ctrl) & NARROW_SCSI_CARD)
4024: eeprom_end = 512;
4025: else
4026: eeprom_end = 768;
4027:
4028: for (i = 1; i < eeprom_end/2; i++)
4029: {
4030: sum_data += utilEERead(baseport, i);
4031: }
4032:
4033: utilEEWriteOnOff(baseport,1); /* Enable write access to the EEPROM */
4034:
4035: utilEEWrite(baseport, sum_data, EEPROM_CHECK_SUM/2);
4036: utilEEWriteOnOff(baseport,0); /* Turn off write access */
4037: }
4038:
4039: void SccbMgr_save_foreign_state(PADAPTER_INFO pAdapterInfo)
4040: {
4041: }
4042:
4043:
4044: void SccbMgr_restore_foreign_state(CARD_HANDLE pCurrCard)
4045: {
4046: }
4047:
4048: void SccbMgr_restore_native_state(CARD_HANDLE pCurrCard)
4049: {
4050: }
4051:
4052: #endif /* NO_IOCTLS */
4053:
4054: #endif /* (FW_TYPE==_UCB_MGR_) */
4055:
4056: #ifndef NO_IOCTLS
4057: #if (FW_TYPE==_UCB_MGR_)
4058: void SccbMgr_unload_card(CARD_HANDLE pCurrCard)
4059: #else
4060: #if defined(DOS)
4061: void SccbMgr_unload_card(USHORT pCurrCard)
4062: #else
4063: void SccbMgr_unload_card(ULONG pCurrCard)
4064: #endif
4065: #endif
4066: {
4067: UCHAR i;
4068: #if defined(DOS)
4069: USHORT portBase;
4070: USHORT regOffset;
4071: #else
4072: ULONG portBase;
4073: ULONG regOffset;
4074: #endif
4075: ULONG scamData;
4076: #if defined(OS2)
4077: ULONG far *pScamTbl;
4078: #else
4079: ULONG *pScamTbl;
4080: #endif
4081: PNVRamInfo pCurrNvRam;
4082:
4083: pCurrNvRam = ((PSCCBcard)pCurrCard)->pNvRamInfo;
4084:
4085: if(pCurrNvRam){
4086: WrStack(pCurrNvRam->niBaseAddr, 0, pCurrNvRam->niModel);
4087: WrStack(pCurrNvRam->niBaseAddr, 1, pCurrNvRam->niSysConf);
4088: WrStack(pCurrNvRam->niBaseAddr, 2, pCurrNvRam->niScsiConf);
4089: WrStack(pCurrNvRam->niBaseAddr, 3, pCurrNvRam->niScamConf);
4090: WrStack(pCurrNvRam->niBaseAddr, 4, pCurrNvRam->niAdapId);
4091:
4092: for(i = 0; i < MAX_SCSI_TAR / 2; i++)
4093: WrStack(pCurrNvRam->niBaseAddr, (UCHAR)(i+5), pCurrNvRam->niSyncTbl[i]);
4094:
4095: portBase = pCurrNvRam->niBaseAddr;
4096:
4097: for(i = 0; i < MAX_SCSI_TAR; i++){
4098: regOffset = hp_aramBase + 64 + i*4;
4099: #if defined(OS2)
4100: pScamTbl = (ULONG far *) &pCurrNvRam->niScamTbl[i];
4101: #else
4102: pScamTbl = (ULONG *) &pCurrNvRam->niScamTbl[i];
4103: #endif
4104: scamData = *pScamTbl;
4105: WR_HARP32(portBase, regOffset, scamData);
4106: }
4107:
4108: }else{
4109: WrStack(((PSCCBcard)pCurrCard)->ioPort, 0, 0);
4110: }
4111: }
4112: #endif /* NO_IOCTLS */
4113:
4114:
4115: void RNVRamData(PNVRamInfo pNvRamInfo)
4116: {
4117: UCHAR i;
4118: #if defined(DOS)
4119: USHORT portBase;
4120: USHORT regOffset;
4121: #else
4122: ULONG portBase;
4123: ULONG regOffset;
4124: #endif
4125: ULONG scamData;
4126: #if defined (OS2)
4127: ULONG far *pScamTbl;
4128: #else
4129: ULONG *pScamTbl;
4130: #endif
4131:
4132: pNvRamInfo->niModel = RdStack(pNvRamInfo->niBaseAddr, 0);
4133: pNvRamInfo->niSysConf = RdStack(pNvRamInfo->niBaseAddr, 1);
4134: pNvRamInfo->niScsiConf = RdStack(pNvRamInfo->niBaseAddr, 2);
4135: pNvRamInfo->niScamConf = RdStack(pNvRamInfo->niBaseAddr, 3);
4136: pNvRamInfo->niAdapId = RdStack(pNvRamInfo->niBaseAddr, 4);
4137:
4138: for(i = 0; i < MAX_SCSI_TAR / 2; i++)
4139: pNvRamInfo->niSyncTbl[i] = RdStack(pNvRamInfo->niBaseAddr, (UCHAR)(i+5));
4140:
4141: portBase = pNvRamInfo->niBaseAddr;
4142:
4143: for(i = 0; i < MAX_SCSI_TAR; i++){
4144: regOffset = hp_aramBase + 64 + i*4;
4145: RD_HARP32(portBase, regOffset, scamData);
4146: #if defined(OS2)
4147: pScamTbl = (ULONG far *) &pNvRamInfo->niScamTbl[i];
4148: #else
4149: pScamTbl = (ULONG *) &pNvRamInfo->niScamTbl[i];
4150: #endif
4151: *pScamTbl = scamData;
4152: }
4153:
4154: }
4155:
4156: #if defined(DOS)
4157: UCHAR RdStack(USHORT portBase, UCHAR index)
4158: #else
4159: UCHAR RdStack(ULONG portBase, UCHAR index)
4160: #endif
4161: {
4162: WR_HARPOON(portBase + hp_stack_addr, index);
4163: return(RD_HARPOON(portBase + hp_stack_data));
4164: }
4165:
4166: #if defined(DOS)
4167: void WrStack(USHORT portBase, UCHAR index, UCHAR data)
4168: #else
4169: void WrStack(ULONG portBase, UCHAR index, UCHAR data)
4170: #endif
4171: {
4172: WR_HARPOON(portBase + hp_stack_addr, index);
4173: WR_HARPOON(portBase + hp_stack_data, data);
4174: }
4175:
4176:
4177: #if (FW_TYPE==_UCB_MGR_)
4178: u08bits ChkIfChipInitialized(BASE_PORT ioPort)
4179: #else
4180: #if defined(DOS)
4181: UCHAR ChkIfChipInitialized(USHORT ioPort)
4182: #else
4183: UCHAR ChkIfChipInitialized(ULONG ioPort)
4184: #endif
4185: #endif
4186: {
4187: if((RD_HARPOON(ioPort + hp_arb_id) & 0x0f) != RdStack(ioPort, 4))
4188: return(FALSE);
4189: if((RD_HARPOON(ioPort + hp_clkctrl_0) & CLKCTRL_DEFAULT)
4190: != CLKCTRL_DEFAULT)
4191: return(FALSE);
4192: if((RD_HARPOON(ioPort + hp_seltimeout) == TO_250ms) ||
4193: (RD_HARPOON(ioPort + hp_seltimeout) == TO_290ms))
4194: return(TRUE);
4195: return(FALSE);
4196:
4197: }
4198: /*---------------------------------------------------------------------
4199: *
4200: * Function: SccbMgr_start_sccb
4201: *
4202: * Description: Start a command pointed to by p_Sccb. When the
4203: * command is completed it will be returned via the
4204: * callback function.
4205: *
4206: *---------------------------------------------------------------------*/
4207: #if (FW_TYPE==_UCB_MGR_)
4208: void SccbMgr_start_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb)
4209: #else
4210: #if defined(DOS)
4211: void SccbMgr_start_sccb(USHORT pCurrCard, PSCCB p_Sccb)
4212: #else
4213: void SccbMgr_start_sccb(ULONG pCurrCard, PSCCB p_Sccb)
4214: #endif
4215: #endif
4216: {
4217: #if defined(DOS)
4218: USHORT ioport;
4219: #else
4220: ULONG ioport;
4221: #endif
4222: UCHAR thisCard, lun;
4223: PSCCB pSaveSccb;
4224: CALL_BK_FN callback;
4225:
4226: #if (FW_TYPE==_UCB_MGR_)
4227: PSCCB p_Sccb;
4228: #endif
4229:
4230: mOS_Lock((PSCCBcard)pCurrCard);
4231: thisCard = ((PSCCBcard) pCurrCard)->cardIndex;
4232: ioport = ((PSCCBcard) pCurrCard)->ioPort;
4233:
4234: #if (FW_TYPE==_UCB_MGR_)
4235: p_Sccb = (PSCCB)p_ucb->UCB_MgrPrivatePtr;
4236: #endif
4237:
4238: if((p_Sccb->TargID > MAX_SCSI_TAR) || (p_Sccb->Lun > MAX_LUN))
4239: {
4240:
4241: #if (FW_TYPE==_UCB_MGR_)
4242: p_ucb->UCB_hbastat = SCCB_COMPLETE;
4243: p_ucb->UCB_status=SCCB_ERROR;
4244: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4245: if (callback)
4246: callback(p_ucb);
4247: #endif
4248:
4249: #if (FW_TYPE==_SCCB_MGR_)
4250: p_Sccb->HostStatus = SCCB_COMPLETE;
4251: p_Sccb->SccbStatus = SCCB_ERROR;
4252: callback = (CALL_BK_FN)p_Sccb->SccbCallback;
4253: if (callback)
4254: callback(p_Sccb);
4255: #endif
4256:
4257: mOS_UnLock((PSCCBcard)pCurrCard);
4258: return;
4259: }
4260:
4261: #if (FW_TYPE==_SCCB_MGR_)
4262: sinits(p_Sccb,thisCard);
4263: #endif
4264:
4265:
4266: #if (FW_TYPE==_UCB_MGR_)
4267: #ifndef NO_IOCTLS
4268:
4269: if (p_ucb->UCB_opcode & OPC_IOCTL)
4270: {
4271:
4272: switch (p_ucb->UCB_IOCTLCommand)
4273: {
4274: case READ_NVRAM:
4275: ReadNVRam((PSCCBcard)pCurrCard,p_ucb);
4276: p_ucb->UCB_status=UCB_SUCCESS;
4277: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4278: if (callback)
4279: callback(p_ucb);
4280: mOS_UnLock((PSCCBcard)pCurrCard);
4281: return;
4282:
4283: case WRITE_NVRAM:
4284: WriteNVRam((PSCCBcard)pCurrCard,p_ucb);
4285: p_ucb->UCB_status=UCB_SUCCESS;
4286: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4287: if (callback)
4288: callback(p_ucb);
4289: mOS_UnLock((PSCCBcard)pCurrCard);
4290: return;
4291:
4292: case SEND_SCSI_PASSTHRU:
4293: #if (FW_TYPE != _SCCB_MGR_)
4294: if( p_ucb->UCB_targid >=
4295: ((PSCCBcard)pCurrCard)->cardInfo->ai_MaxTarg )
4296: {
4297: p_ucb->UCB_status = UCB_ERROR;
4298: p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
4299: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4300: if (callback)
4301: callback(p_ucb);
4302: mOS_UnLock((PSCCBcard)pCurrCard);
4303: return;
4304: }
4305: #endif
4306: break;
4307:
4308: case HARD_RESET:
4309: p_ucb->UCB_status = UCB_INVALID;
4310: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4311: if (callback)
4312: callback(p_ucb);
4313: mOS_UnLock((PSCCBcard)pCurrCard);
4314: return;
4315: case GET_DEVICE_SYNCRATE:
4316: if( !GetDevSyncRate((PSCCBcard)pCurrCard,p_ucb) )
4317: {
4318: p_ucb->UCB_status = UCB_SUCCESS;
4319: }
4320: else
4321: {
4322: p_ucb->UCB_status = UCB_ERROR;
4323: p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
4324: }
4325: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4326: if (callback)
4327: callback(p_ucb);
4328: mOS_UnLock((PSCCBcard)pCurrCard);
4329: return;
4330: case SET_DEVICE_SYNCRATE:
4331: if( !SetDevSyncRate((PSCCBcard)pCurrCard,p_ucb) )
4332: {
4333: p_ucb->UCB_status = UCB_SUCCESS;
4334: }
4335: else
4336: {
4337: p_ucb->UCB_status = UCB_ERROR;
4338: p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
4339: }
4340: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4341: if (callback)
4342: callback(p_ucb);
4343: mOS_UnLock((PSCCBcard)pCurrCard);
4344: return;
4345: case GET_WIDE_MODE:
4346: if( !GetDevWideMode((PSCCBcard)pCurrCard,p_ucb) )
4347: {
4348: p_ucb->UCB_status = UCB_SUCCESS;
4349: }
4350: else
4351: {
4352: p_ucb->UCB_status = UCB_ERROR;
4353: p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
4354: }
4355: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4356: if (callback)
4357: callback(p_ucb);
4358: mOS_UnLock((PSCCBcard)pCurrCard);
4359: return;
4360: case SET_WIDE_MODE:
4361: if( !SetDevWideMode((PSCCBcard)pCurrCard,p_ucb) )
4362: {
4363: p_ucb->UCB_status = UCB_SUCCESS;
4364: }
4365: else
4366: {
4367: p_ucb->UCB_status = UCB_ERROR;
4368: p_ucb->UCB_hbastat = HASTAT_HW_ERROR;
4369: }
4370: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4371: if (callback)
4372: callback(p_ucb);
4373: mOS_UnLock((PSCCBcard)pCurrCard);
4374: return;
4375: default:
4376: p_ucb->UCB_status=UCB_INVALID;
4377: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4378: if (callback)
4379: callback(p_ucb);
4380: mOS_UnLock((PSCCBcard)pCurrCard);
4381: return;
4382: }
4383: }
4384: #endif /* NO_IOCTLS */
4385: #endif /* (FW_TYPE==_UCB_MGR_) */
4386:
4387:
4388: if (!((PSCCBcard) pCurrCard)->cmdCounter)
4389: {
4390: WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore)
4391: | SCCB_MGR_ACTIVE));
4392:
4393: if (((PSCCBcard) pCurrCard)->globalFlags & F_GREEN_PC)
4394: {
4395: WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
4396: WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
4397: }
4398: }
4399:
4400: ((PSCCBcard)pCurrCard)->cmdCounter++;
4401:
4402: if (RD_HARPOON(ioport+hp_semaphore) & BIOS_IN_USE) {
4403:
4404: WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore)
4405: | TICKLE_ME));
4406: if(p_Sccb->OperationCode == RESET_COMMAND)
4407: {
4408: pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
4409: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4410: queueSelectFail(&BL_Card[thisCard], thisCard);
4411: ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
4412: }
4413: else
4414: {
4415: queueAddSccb(p_Sccb,thisCard);
4416: }
4417: }
4418:
4419: else if ((RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)) {
4420:
4421: if(p_Sccb->OperationCode == RESET_COMMAND)
4422: {
4423: pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
4424: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4425: queueSelectFail(&BL_Card[thisCard], thisCard);
4426: ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
4427: }
4428: else
4429: {
4430: queueAddSccb(p_Sccb,thisCard);
4431: }
4432: }
4433:
4434: else {
4435:
4436: MDISABLE_INT(ioport);
4437:
4438: if((((PSCCBcard) pCurrCard)->globalFlags & F_CONLUN_IO) &&
4439: ((sccbMgrTbl[thisCard][p_Sccb->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
4440: lun = p_Sccb->Lun;
4441: else
4442: lun = 0;
4443: if ((((PSCCBcard) pCurrCard)->currentSCCB == NULL) &&
4444: (sccbMgrTbl[thisCard][p_Sccb->TargID].TarSelQ_Cnt == 0) &&
4445: (sccbMgrTbl[thisCard][p_Sccb->TargID].TarLUNBusy[lun]
4446: == FALSE)) {
4447:
4448: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4449: mOS_UnLock((PSCCBcard)pCurrCard);
4450: #if defined(DOS)
4451: ssel((USHORT)p_Sccb->SccbIOPort,thisCard);
4452: #else
4453: ssel(p_Sccb->SccbIOPort,thisCard);
4454: #endif
4455: mOS_Lock((PSCCBcard)pCurrCard);
4456: }
4457:
4458: else {
4459:
4460: if(p_Sccb->OperationCode == RESET_COMMAND)
4461: {
4462: pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
4463: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4464: queueSelectFail(&BL_Card[thisCard], thisCard);
4465: ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
4466: }
4467: else
4468: {
4469: queueAddSccb(p_Sccb,thisCard);
4470: }
4471: }
4472:
4473:
4474: MENABLE_INT(ioport);
4475: }
4476:
4477: mOS_UnLock((PSCCBcard)pCurrCard);
4478: }
4479:
4480:
4481: /*---------------------------------------------------------------------
4482: *
4483: * Function: SccbMgr_abort_sccb
4484: *
4485: * Description: Abort the command pointed to by p_Sccb. When the
4486: * command is completed it will be returned via the
4487: * callback function.
4488: *
4489: *---------------------------------------------------------------------*/
4490: #if (FW_TYPE==_UCB_MGR_)
4491: s32bits SccbMgr_abort_sccb(CARD_HANDLE pCurrCard, PUCB p_ucb)
4492: #else
4493: #if defined(DOS)
4494: int SccbMgr_abort_sccb(USHORT pCurrCard, PSCCB p_Sccb)
4495: #else
4496: int SccbMgr_abort_sccb(ULONG pCurrCard, PSCCB p_Sccb)
4497: #endif
4498: #endif
4499:
4500: {
4501: #if defined(DOS)
4502: USHORT ioport;
4503: #else
4504: ULONG ioport;
4505: #endif
4506:
4507: UCHAR thisCard;
4508: CALL_BK_FN callback;
4509: UCHAR TID;
4510: PSCCB pSaveSCCB;
4511: PSCCBMgr_tar_info currTar_Info;
4512:
4513:
4514: #if (FW_TYPE==_UCB_MGR_)
4515: PSCCB p_Sccb;
4516: p_Sccb=(PSCCB)p_ucb->UCB_MgrPrivatePtr;
4517: #endif
4518:
4519: ioport = ((PSCCBcard) pCurrCard)->ioPort;
4520:
4521: thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
4522:
4523: mOS_Lock((PSCCBcard)pCurrCard);
4524:
4525: if (RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)
4526: {
4527: mOS_UnLock((PSCCBcard)pCurrCard);
4528: }
4529:
4530: else
4531: {
4532:
4533: if (queueFindSccb(p_Sccb,thisCard))
4534: {
4535:
4536: mOS_UnLock((PSCCBcard)pCurrCard);
4537:
4538: ((PSCCBcard)pCurrCard)->cmdCounter--;
4539:
4540: if (!((PSCCBcard)pCurrCard)->cmdCounter)
4541: WR_HARPOON(ioport+hp_semaphore,(RD_HARPOON(ioport+hp_semaphore)
4542: & (UCHAR)(~(SCCB_MGR_ACTIVE | TICKLE_ME)) ));
4543:
4544: #if (FW_TYPE==_SCCB_MGR_)
4545: p_Sccb->SccbStatus = SCCB_ABORT;
4546: callback = p_Sccb->SccbCallback;
4547: callback(p_Sccb);
4548: #else
4549: p_ucb->UCB_status=SCCB_ABORT;
4550: callback = (CALL_BK_FN)p_ucb->UCB_callback;
4551: callback(p_ucb);
4552: #endif
4553:
4554: return(0);
4555: }
4556:
4557: else
4558: {
4559: mOS_UnLock((PSCCBcard)pCurrCard);
4560:
4561: if (((PSCCBcard)pCurrCard)->currentSCCB == p_Sccb)
4562: {
4563: p_Sccb->SccbStatus = SCCB_ABORT;
4564: return(0);
4565:
4566: }
4567:
4568: else
4569: {
4570:
4571: TID = p_Sccb->TargID;
4572:
4573:
4574: if(p_Sccb->Sccb_tag)
4575: {
4576: MDISABLE_INT(ioport);
4577: if (((PSCCBcard) pCurrCard)->discQ_Tbl[p_Sccb->Sccb_tag]==p_Sccb)
4578: {
4579: p_Sccb->SccbStatus = SCCB_ABORT;
4580: p_Sccb->Sccb_scsistat = ABORT_ST;
4581: #if (FW_TYPE==_UCB_MGR_)
4582: p_ucb->UCB_status=SCCB_ABORT;
4583: #endif
4584: p_Sccb->Sccb_scsimsg = SMABORT_TAG;
4585:
4586: if(((PSCCBcard) pCurrCard)->currentSCCB == NULL)
4587: {
4588: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4589: ssel(ioport, thisCard);
4590: }
4591: else
4592: {
4593: pSaveSCCB = ((PSCCBcard) pCurrCard)->currentSCCB;
4594: ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
4595: queueSelectFail((PSCCBcard) pCurrCard, thisCard);
4596: ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSCCB;
4597: }
4598: }
4599: MENABLE_INT(ioport);
4600: return(0);
4601: }
4602: else
4603: {
4604: currTar_Info = &sccbMgrTbl[thisCard][p_Sccb->TargID];
4605:
4606: if(BL_Card[thisCard].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_Sccb->Lun]]
4607: == p_Sccb)
4608: {
4609: p_Sccb->SccbStatus = SCCB_ABORT;
4610: return(0);
4611: }
4612: }
4613: }
4614: }
4615: }
4616: return(-1);
4617: }
4618:
4619:
4620: /*---------------------------------------------------------------------
4621: *
4622: * Function: SccbMgr_my_int
4623: *
4624: * Description: Do a quick check to determine if there is a pending
4625: * interrupt for this card and disable the IRQ Pin if so.
4626: *
4627: *---------------------------------------------------------------------*/
4628: #if (FW_TYPE==_UCB_MGR_)
4629: u08bits SccbMgr_my_int(CARD_HANDLE pCurrCard)
4630: #else
4631: #if defined(DOS)
4632: UCHAR SccbMgr_my_int(USHORT pCurrCard)
4633: #else
4634: UCHAR SccbMgr_my_int(ULONG pCurrCard)
4635: #endif
4636: #endif
4637: {
4638: #if defined(DOS)
4639: USHORT ioport;
4640: #else
4641: ULONG ioport;
4642: #endif
4643:
4644: ioport = ((PSCCBcard)pCurrCard)->ioPort;
4645:
4646: if (RD_HARPOON(ioport+hp_int_status) & INT_ASSERTED)
4647: {
4648:
4649: #if defined(DOS)
4650: MDISABLE_INT(ioport);
4651: #endif
4652:
4653: return(TRUE);
4654: }
4655:
4656: else
4657:
4658: return(FALSE);
4659: }
4660:
4661:
4662:
4663: /*---------------------------------------------------------------------
4664: *
4665: * Function: SccbMgr_isr
4666: *
4667: * Description: This is our entry point when an interrupt is generated
4668: * by the card and the upper level driver passes it on to
4669: * us.
4670: *
4671: *---------------------------------------------------------------------*/
4672: #if (FW_TYPE==_UCB_MGR_)
4673: s32bits SccbMgr_isr(CARD_HANDLE pCurrCard)
4674: #else
4675: #if defined(DOS)
4676: int SccbMgr_isr(USHORT pCurrCard)
4677: #else
4678: int SccbMgr_isr(ULONG pCurrCard)
4679: #endif
4680: #endif
4681: {
4682: PSCCB currSCCB;
4683: UCHAR thisCard,result,bm_status, bm_int_st;
4684: USHORT hp_int;
4685: UCHAR i, target;
4686: #if defined(DOS)
4687: USHORT ioport;
4688: #else
4689: ULONG ioport;
4690: #endif
4691:
4692: mOS_Lock((PSCCBcard)pCurrCard);
4693:
4694: thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
4695: ioport = ((PSCCBcard)pCurrCard)->ioPort;
4696:
4697: MDISABLE_INT(ioport);
4698:
4699: #if defined(BUGBUG)
4700: WR_HARPOON(ioport+hp_user_defined_D, RD_HARPOON(ioport+hp_int_status));
4701: #endif
4702:
4703: if ((bm_int_st=RD_HARPOON(ioport+hp_int_status)) & EXT_STATUS_ON)
4704: bm_status = RD_HARPOON(ioport+hp_ext_status) & (UCHAR)BAD_EXT_STATUS;
4705: else
4706: bm_status = 0;
4707:
4708: WR_HARPOON(ioport+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
4709:
4710: mOS_UnLock((PSCCBcard)pCurrCard);
4711:
4712: while ((hp_int = RDW_HARPOON((ioport+hp_intstat)) & default_intena) |
4713: bm_status)
4714: {
4715:
4716: currSCCB = ((PSCCBcard)pCurrCard)->currentSCCB;
4717:
4718: #if defined(BUGBUG)
4719: Debug_Load(thisCard,(UCHAR) 0XFF);
4720: Debug_Load(thisCard,bm_int_st);
4721:
4722: Debug_Load(thisCard,hp_int_0);
4723: Debug_Load(thisCard,hp_int_1);
4724: #endif
4725:
4726:
4727: if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) {
4728: result = SccbMgr_bad_isr(ioport,thisCard,((PSCCBcard)pCurrCard),hp_int);
4729: WRW_HARPOON((ioport+hp_intstat), (FIFO | TIMEOUT | RESET | SCAM_SEL));
4730: bm_status = 0;
4731:
4732: if (result) {
4733:
4734: mOS_Lock((PSCCBcard)pCurrCard);
4735: MENABLE_INT(ioport);
4736: mOS_UnLock((PSCCBcard)pCurrCard);
4737: return(result);
4738: }
4739: }
4740:
4741:
4742: else if (hp_int & ICMD_COMP) {
4743:
4744: if ( !(hp_int & BUS_FREE) ) {
4745: /* Wait for the BusFree before starting a new command. We
4746: must also check for being reselected since the BusFree
4747: may not show up if another device reselects us in 1.5us or
4748: less. SRR Wednesday, 3/8/1995.
4749: */
4750: while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL))) ;
4751: }
4752:
4753: if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT)
4754:
4755: phaseChkFifo(ioport, thisCard);
4756:
4757: /* WRW_HARPOON((ioport+hp_intstat),
4758: (BUS_FREE | ICMD_COMP | ITAR_DISC | XFER_CNT_0));
4759: */
4760:
4761: WRW_HARPOON((ioport+hp_intstat), CLR_ALL_INT_1);
4762:
4763: autoCmdCmplt(ioport,thisCard);
4764:
4765: }
4766:
4767:
4768: else if (hp_int & ITAR_DISC)
4769: {
4770:
4771: if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) {
4772:
4773: phaseChkFifo(ioport, thisCard);
4774:
4775: }
4776:
4777: if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR) {
4778:
4779: WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
4780: currSCCB->Sccb_XferState |= F_NO_DATA_YET;
4781:
4782: currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
4783: }
4784:
4785: currSCCB->Sccb_scsistat = DISCONNECT_ST;
4786: queueDisconnect(currSCCB,thisCard);
4787:
4788: /* Wait for the BusFree before starting a new command. We
4789: must also check for being reselected since the BusFree
4790: may not show up if another device reselects us in 1.5us or
4791: less. SRR Wednesday, 3/8/1995.
4792: */
4793: while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)) &&
4794: !((RDW_HARPOON((ioport+hp_intstat)) & PHASE) &&
4795: RD_HARPOON((ioport+hp_scsisig)) ==
4796: (SCSI_BSY | SCSI_REQ | SCSI_CD | SCSI_MSG | SCSI_IOBIT))) ;
4797:
4798: /*
4799: The additional loop exit condition above detects a timing problem
4800: with the revision D/E harpoon chips. The caller should reset the
4801: host adapter to recover when 0xFE is returned.
4802: */
4803: if (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)))
4804: {
4805: mOS_Lock((PSCCBcard)pCurrCard);
4806: MENABLE_INT(ioport);
4807: mOS_UnLock((PSCCBcard)pCurrCard);
4808: return 0xFE;
4809: }
4810:
4811: WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC));
4812:
4813:
4814: ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD;
4815:
4816: }
4817:
4818:
4819: else if (hp_int & RSEL) {
4820:
4821: WRW_HARPOON((ioport+hp_intstat), (PROG_HLT | RSEL | PHASE | BUS_FREE));
4822:
4823: if (RDW_HARPOON((ioport+hp_intstat)) & ITAR_DISC)
4824: {
4825: if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT)
4826: {
4827: phaseChkFifo(ioport, thisCard);
4828: }
4829:
4830: if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR)
4831: {
4832: WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
4833: currSCCB->Sccb_XferState |= F_NO_DATA_YET;
4834: currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
4835: }
4836:
4837: WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC));
4838: currSCCB->Sccb_scsistat = DISCONNECT_ST;
4839: queueDisconnect(currSCCB,thisCard);
4840: }
4841:
4842: sres(ioport,thisCard,((PSCCBcard)pCurrCard));
4843: phaseDecode(ioport,thisCard);
4844:
4845: }
4846:
4847:
4848: else if ((hp_int & IDO_STRT) && (!(hp_int & BUS_FREE)))
4849: {
4850:
4851: WRW_HARPOON((ioport+hp_intstat), (IDO_STRT | XFER_CNT_0));
4852: phaseDecode(ioport,thisCard);
4853:
4854: }
4855:
4856:
4857: else if ( (hp_int & IUNKWN) || (hp_int & PROG_HLT) )
4858: {
4859: WRW_HARPOON((ioport+hp_intstat), (PHASE | IUNKWN | PROG_HLT));
4860: if ((RD_HARPOON(ioport+hp_prgmcnt_0) & (UCHAR)0x3f)< (UCHAR)SELCHK)
4861: {
4862: phaseDecode(ioport,thisCard);
4863: }
4864: else
4865: {
4866: /* Harpoon problem some SCSI target device respond to selection
4867: with short BUSY pulse (<400ns) this will make the Harpoon is not able
4868: to latch the correct Target ID into reg. x53.
4869: The work around require to correct this reg. But when write to this
4870: reg. (0x53) also increment the FIFO write addr reg (0x6f), thus we
4871: need to read this reg first then restore it later. After update to 0x53 */
4872:
4873: i = (UCHAR)(RD_HARPOON(ioport+hp_fifowrite));
4874: target = (UCHAR)(RD_HARPOON(ioport+hp_gp_reg_3));
4875: WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) ID_UNLOCK);
4876: WR_HARPOON(ioport+hp_select_id, (UCHAR)(target | target<<4));
4877: WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) 0x00);
4878: WR_HARPOON(ioport+hp_fifowrite, i);
4879: WR_HARPOON(ioport+hp_autostart_3, (AUTO_IMMED+TAG_STRT));
4880: }
4881: }
4882:
4883: else if (hp_int & XFER_CNT_0) {
4884:
4885: WRW_HARPOON((ioport+hp_intstat), XFER_CNT_0);
4886:
4887: schkdd(ioport,thisCard);
4888:
4889: }
4890:
4891:
4892: else if (hp_int & BUS_FREE) {
4893:
4894: WRW_HARPOON((ioport+hp_intstat), BUS_FREE);
4895:
4896: if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) {
4897:
4898: hostDataXferAbort(ioport,thisCard,currSCCB);
4899: }
4900:
4901: phaseBusFree(ioport,thisCard);
4902: }
4903:
4904:
4905: else if (hp_int & ITICKLE) {
4906:
4907: WRW_HARPOON((ioport+hp_intstat), ITICKLE);
4908: ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD;
4909: }
4910:
4911:
4912:
4913: if (((PSCCBcard)pCurrCard)->globalFlags & F_NEW_SCCB_CMD) {
4914:
4915:
4916: ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD;
4917:
4918:
4919: if (((PSCCBcard)pCurrCard)->currentSCCB == NULL) {
4920:
4921: queueSearchSelect(((PSCCBcard)pCurrCard),thisCard);
4922: }
4923:
4924: if (((PSCCBcard)pCurrCard)->currentSCCB != NULL) {
4925: ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD;
4926: ssel(ioport,thisCard);
4927: }
4928:
4929: break;
4930:
4931: }
4932:
4933: } /*end while */
4934:
4935: mOS_Lock((PSCCBcard)pCurrCard);
4936: MENABLE_INT(ioport);
4937: mOS_UnLock((PSCCBcard)pCurrCard);
4938:
4939: return(0);
4940: }
4941:
4942: /*---------------------------------------------------------------------
4943: *
4944: * Function: Sccb_bad_isr
4945: *
4946: * Description: Some type of interrupt has occurred which is slightly
4947: * out of the ordinary. We will now decode it fully, in
4948: * this routine. This is broken up in an attempt to save
4949: * processing time.
4950: *
4951: *---------------------------------------------------------------------*/
4952: #if defined(DOS)
4953: UCHAR SccbMgr_bad_isr(USHORT p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int)
4954: #else
4955: UCHAR SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, PSCCBcard pCurrCard, USHORT p_int)
4956: #endif
4957: {
4958: #if defined(HARP_REVX)
4959: ULONG timer;
4960: #endif
4961: UCHAR temp, ScamFlg;
4962: PSCCBMgr_tar_info currTar_Info;
4963: PNVRamInfo pCurrNvRam;
4964:
4965:
4966: if (RD_HARPOON(p_port+hp_ext_status) &
4967: (BM_FORCE_OFF | PCI_DEV_TMOUT | BM_PARITY_ERR | PIO_OVERRUN) )
4968: {
4969:
4970: if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
4971: {
4972:
4973: hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB);
4974: }
4975:
4976: if (RD_HARPOON(p_port+hp_pci_stat_cfg) & REC_MASTER_ABORT)
4977:
4978: {
4979: WR_HARPOON(p_port+hp_pci_stat_cfg,
4980: (RD_HARPOON(p_port+hp_pci_stat_cfg) & ~REC_MASTER_ABORT));
4981:
4982: WR_HARPOON(p_port+hp_host_blk_cnt, 0x00);
4983:
4984: }
4985:
4986: if (pCurrCard->currentSCCB != NULL)
4987: {
4988:
4989: if (!pCurrCard->currentSCCB->HostStatus)
4990: pCurrCard->currentSCCB->HostStatus = SCCB_BM_ERR;
4991:
4992: sxfrp(p_port,p_card);
4993:
4994: temp = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) &
4995: (EXT_ARB_ACK | SCSI_TERM_ENA_H));
4996: WR_HARPOON(p_port+hp_ee_ctrl, ((UCHAR)temp | SEE_MS | SEE_CS));
4997: WR_HARPOON(p_port+hp_ee_ctrl, temp);
4998:
4999: if (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
5000: {
5001: phaseDecode(p_port,p_card);
5002: }
5003: }
5004: }
5005:
5006:
5007: else if (p_int & RESET)
5008: {
5009:
5010: WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT);
5011: WR_HARPOON(p_port+hp_sys_ctrl, 0x00);
5012: if (pCurrCard->currentSCCB != NULL) {
5013:
5014: if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
5015:
5016: hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB);
5017: }
5018:
5019:
5020: DISABLE_AUTO(p_port);
5021:
5022: sresb(p_port,p_card);
5023:
5024: while(RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST) {}
5025:
5026: pCurrNvRam = pCurrCard->pNvRamInfo;
5027: if(pCurrNvRam){
5028: ScamFlg = pCurrNvRam->niScamConf;
5029: }
5030: else{
5031: ScamFlg = (UCHAR) utilEERead(p_port, SCAM_CONFIG/2);
5032: }
5033:
5034: XbowInit(p_port, ScamFlg);
5035:
5036: scini(p_card, pCurrCard->ourId, 0);
5037:
5038: return(0xFF);
5039: }
5040:
5041:
5042: else if (p_int & FIFO) {
5043:
5044: WRW_HARPOON((p_port+hp_intstat), FIFO);
5045:
5046: #if defined(HARP_REVX)
5047:
5048: for (timer=0x00FFFFFFL; timer != 0x00000000L; timer--) {
5049:
5050: if (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY)
5051: break;
5052:
5053: if (RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)
5054: break;
5055: }
5056:
5057:
5058: if ( (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY) &&
5059: (RD_HARPOON(p_port+hp_fiforead) !=
5060: RD_HARPOON(p_port+hp_fifowrite)) &&
5061: (RD_HARPOON(p_port+hp_xfercnt_0))
5062: )
5063:
5064: WR_HARPOON((p_port+hp_xferstat), 0x01);
5065:
5066: /* else
5067: */
5068: /* sxfrp(p_port,p_card);
5069: */
5070: #else
5071: if (pCurrCard->currentSCCB != NULL)
5072: sxfrp(p_port,p_card);
5073: #endif
5074: }
5075:
5076: else if (p_int & TIMEOUT)
5077: {
5078:
5079: DISABLE_AUTO(p_port);
5080:
5081: WRW_HARPOON((p_port+hp_intstat),
5082: (PROG_HLT | TIMEOUT | SEL |BUS_FREE | PHASE | IUNKWN));
5083:
5084: pCurrCard->currentSCCB->HostStatus = SCCB_SELECTION_TIMEOUT;
5085:
5086:
5087: currTar_Info = &sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
5088: if((pCurrCard->globalFlags & F_CONLUN_IO) &&
5089: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
5090: currTar_Info->TarLUNBusy[pCurrCard->currentSCCB->Lun] = FALSE;
5091: else
5092: currTar_Info->TarLUNBusy[0] = FALSE;
5093:
5094:
5095: if (currTar_Info->TarEEValue & EE_SYNC_MASK)
5096: {
5097: currTar_Info->TarSyncCtrl = 0;
5098: currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
5099: }
5100:
5101: if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
5102: {
5103: currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
5104: }
5105:
5106: sssyncv(p_port, pCurrCard->currentSCCB->TargID, NARROW_SCSI,currTar_Info);
5107:
5108: queueCmdComplete(pCurrCard, pCurrCard->currentSCCB, p_card);
5109:
5110: }
5111:
5112: #if defined(SCAM_LEV_2)
5113:
5114: else if (p_int & SCAM_SEL)
5115: {
5116:
5117: scarb(p_port,LEVEL2_TAR);
5118: scsel(p_port);
5119: scasid(p_card, p_port);
5120:
5121: scbusf(p_port);
5122:
5123: WRW_HARPOON((p_port+hp_intstat), SCAM_SEL);
5124: }
5125: #endif
5126:
5127: return(0x00);
5128: }
5129:
5130:
5131: /*---------------------------------------------------------------------
5132: *
5133: * Function: SccbMgr_scsi_reset
5134: *
5135: * Description: A SCSI bus reset will be generated and all outstanding
5136: * Sccbs will be returned via the callback.
5137: *
5138: *---------------------------------------------------------------------*/
5139: #if (FW_TYPE==_UCB_MGR_)
5140: void SccbMgr_scsi_reset(CARD_HANDLE pCurrCard)
5141: #else
5142: #if defined(DOS)
5143: void SccbMgr_scsi_reset(USHORT pCurrCard)
5144: #else
5145: void SccbMgr_scsi_reset(ULONG pCurrCard)
5146: #endif
5147: #endif
5148: {
5149: UCHAR thisCard;
5150:
5151: thisCard = ((PSCCBcard)pCurrCard)->cardIndex;
5152:
5153: mOS_Lock((PSCCBcard)pCurrCard);
5154:
5155: if (((PSCCBcard) pCurrCard)->globalFlags & F_GREEN_PC)
5156: {
5157: WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_clkctrl_0, CLKCTRL_DEFAULT);
5158: WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_sys_ctrl, 0x00);
5159: }
5160:
5161: sresb(((PSCCBcard)pCurrCard)->ioPort,thisCard);
5162:
5163: if (RD_HARPOON(((PSCCBcard)pCurrCard)->ioPort+hp_ext_status) & BM_CMD_BUSY)
5164: {
5165: WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_page_ctrl,
5166: (RD_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_page_ctrl)
5167: & ~SCATTER_EN));
5168:
5169: WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_sg_addr,0x00);
5170:
5171: ((PSCCBcard) pCurrCard)->globalFlags &= ~F_HOST_XFER_ACT;
5172: busMstrTimeOut(((PSCCBcard) pCurrCard)->ioPort);
5173:
5174: WR_HARPOON(((PSCCBcard) pCurrCard)->ioPort+hp_int_mask,
5175: (INT_CMD_COMPL | SCSI_INTERRUPT));
5176: }
5177:
5178: /*
5179: if (utilEERead(((PSCCBcard)pCurrCard)->ioPort, (SCAM_CONFIG/2))
5180: & SCAM_ENABLED)
5181: */
5182: scini(thisCard, ((PSCCBcard)pCurrCard)->ourId, 0);
5183:
5184: #if (FW_TYPE==_UCB_MGR_)
5185: ((PSCCBcard)pCurrCard)->cardInfo->ai_AEN_routine(0x01,pCurrCard,0,0,0,0);
5186: #endif
5187:
5188: mOS_UnLock((PSCCBcard)pCurrCard);
5189: }
5190:
5191:
5192: /*---------------------------------------------------------------------
5193: *
5194: * Function: SccbMgr_timer_expired
5195: *
5196: * Description: This function allow me to kill my own job that has not
5197: * yet completed, and has cause a timeout to occur. This
5198: * timeout has caused the upper level driver to call this
5199: * function.
5200: *
5201: *---------------------------------------------------------------------*/
5202:
5203: #if (FW_TYPE==_UCB_MGR_)
5204: void SccbMgr_timer_expired(CARD_HANDLE pCurrCard)
5205: #else
5206: #if defined(DOS)
5207: void SccbMgr_timer_expired(USHORT pCurrCard)
5208: #else
5209: void SccbMgr_timer_expired(ULONG pCurrCard)
5210: #endif
5211: #endif
5212: {
5213: }
5214:
5215: #if defined(DOS)
5216: /*---------------------------------------------------------------------
5217: *
5218: * Function: SccbMgr_status
5219: *
5220: * Description: This function returns the number of outstanding SCCB's.
5221: * This is specific to the DOS enviroment, which needs this
5222: * to help them keep protected and real mode commands staight.
5223: *
5224: *---------------------------------------------------------------------*/
5225:
5226: USHORT SccbMgr_status(USHORT pCurrCard)
5227: {
5228: return(BL_Card[pCurrCard].cmdCounter);
5229: }
5230: #endif
5231:
5232: /*---------------------------------------------------------------------
5233: *
5234: * Function: SccbMgrTableInit
5235: *
5236: * Description: Initialize all Sccb manager data structures.
5237: *
5238: *---------------------------------------------------------------------*/
5239:
5240: void SccbMgrTableInitAll()
5241: {
5242: UCHAR thisCard;
5243:
5244: for (thisCard = 0; thisCard < MAX_CARDS; thisCard++)
5245: {
5246: SccbMgrTableInitCard(&BL_Card[thisCard],thisCard);
5247:
5248: BL_Card[thisCard].ioPort = 0x00;
5249: BL_Card[thisCard].cardInfo = NULL;
5250: BL_Card[thisCard].cardIndex = 0xFF;
5251: BL_Card[thisCard].ourId = 0x00;
5252: BL_Card[thisCard].pNvRamInfo = NULL;
5253: }
5254: }
5255:
5256:
5257: /*---------------------------------------------------------------------
5258: *
5259: * Function: SccbMgrTableInit
5260: *
5261: * Description: Initialize all Sccb manager data structures.
5262: *
5263: *---------------------------------------------------------------------*/
5264:
5265: void SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card)
5266: {
5267: UCHAR scsiID, qtag;
5268:
5269: for (qtag = 0; qtag < QUEUE_DEPTH; qtag++)
5270: {
5271: BL_Card[p_card].discQ_Tbl[qtag] = NULL;
5272: }
5273:
5274: for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++)
5275: {
5276: sccbMgrTbl[p_card][scsiID].TarStatus = 0;
5277: sccbMgrTbl[p_card][scsiID].TarEEValue = 0;
5278: SccbMgrTableInitTarget(p_card, scsiID);
5279: }
5280:
5281: pCurrCard->scanIndex = 0x00;
5282: pCurrCard->currentSCCB = NULL;
5283: pCurrCard->globalFlags = 0x00;
5284: pCurrCard->cmdCounter = 0x00;
5285: pCurrCard->tagQ_Lst = 0x01;
5286: pCurrCard->discQCount = 0;
5287:
5288:
5289: }
5290:
5291:
5292: /*---------------------------------------------------------------------
5293: *
5294: * Function: SccbMgrTableInit
5295: *
5296: * Description: Initialize all Sccb manager data structures.
5297: *
5298: *---------------------------------------------------------------------*/
5299:
5300: void SccbMgrTableInitTarget(UCHAR p_card, UCHAR target)
5301: {
5302:
5303: UCHAR lun, qtag;
5304: PSCCBMgr_tar_info currTar_Info;
5305:
5306: currTar_Info = &sccbMgrTbl[p_card][target];
5307:
5308: currTar_Info->TarSelQ_Cnt = 0;
5309: currTar_Info->TarSyncCtrl = 0;
5310:
5311: currTar_Info->TarSelQ_Head = NULL;
5312: currTar_Info->TarSelQ_Tail = NULL;
5313: currTar_Info->TarTagQ_Cnt = 0;
5314: currTar_Info->TarLUN_CA = FALSE;
5315:
5316:
5317: for (lun = 0; lun < MAX_LUN; lun++)
5318: {
5319: currTar_Info->TarLUNBusy[lun] = FALSE;
5320: currTar_Info->LunDiscQ_Idx[lun] = 0;
5321: }
5322:
5323: for (qtag = 0; qtag < QUEUE_DEPTH; qtag++)
5324: {
5325: if(BL_Card[p_card].discQ_Tbl[qtag] != NULL)
5326: {
5327: if(BL_Card[p_card].discQ_Tbl[qtag]->TargID == target)
5328: {
5329: BL_Card[p_card].discQ_Tbl[qtag] = NULL;
5330: BL_Card[p_card].discQCount--;
5331: }
5332: }
5333: }
5334: }
5335:
5336: #if defined(BUGBUG)
5337:
5338: /*****************************************************************
5339: * Save the current byte in the debug array
5340: *****************************************************************/
5341:
5342:
5343: void Debug_Load(UCHAR p_card, UCHAR p_bug_data)
5344: {
5345: debug_int[p_card][debug_index[p_card]] = p_bug_data;
5346: debug_index[p_card]++;
5347:
5348: if (debug_index[p_card] == debug_size)
5349:
5350: debug_index[p_card] = 0;
5351: }
5352:
5353: #endif
1.1.1.2 ! root 5354:
1.1 root 5355: /*----------------------------------------------------------------------
5356: *
5357: *
5358: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
5359: *
5360: * This file is available under both the GNU General Public License
5361: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
5362: *
5363: * $Workfile: sccb_dat.c $
5364: *
5365: * Description: Functions relating to handling of the SCCB interface
5366: * between the device driver and the HARPOON.
5367: *
5368: * $Date: 1999/04/26 05:53:56 $
5369: *
5370: * $Revision: 1.1 $
5371: *
5372: *----------------------------------------------------------------------*/
5373:
5374: /*#include <globals.h>*/
5375:
5376: #if (FW_TYPE==_UCB_MGR_)
5377: /*#include <budi.h>*/
5378: #endif
5379:
5380: /*#include <sccbmgr.h>*/
5381: /*#include <blx30.h>*/
5382: /*#include <target.h>*/
5383: /*#include <harpoon.h>*/
5384:
5385: /*
5386: ** IMPORTANT NOTE!!!
5387: **
5388: ** You MUST preassign all data to a valid value or zero. This is
5389: ** required due to the MS compiler bug under OS/2 and Solaris Real-Mode
5390: ** driver environment.
5391: */
5392:
5393:
5394: SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR] = { { { 0 } } };
5395: SCCBCARD BL_Card[MAX_CARDS] = { { 0 } };
5396: SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR] = { { { 0 } } };
5397: NVRAMINFO nvRamInfo[MAX_MB_CARDS] = { { 0 } };
5398:
5399:
5400: #if defined(OS2)
5401: void (far *s_PhaseTbl[8]) (ULONG, UCHAR) = { 0 };
5402: UCHAR temp_id_string[ID_STRING_LENGTH] = { 0 };
5403: #elif defined(SOLARIS_REAL_MODE) || defined(__STDC__)
5404: void (*s_PhaseTbl[8]) (ULONG, UCHAR) = { 0 };
5405: #else
5406: void (*s_PhaseTbl[8]) ();
5407: #endif
5408:
5409: #if defined(DOS)
5410: UCHAR first_time = 0;
5411: #endif
5412:
5413: UCHAR mbCards = 0;
5414: UCHAR scamHAString[] = {0x63, 0x07, 'B', 'U', 'S', 'L', 'O', 'G', 'I', 'C', \
5415: ' ', 'B', 'T', '-', '9', '3', '0', \
5416: 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, \
5417: 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20};
5418:
5419: USHORT default_intena = 0;
5420:
5421: #if defined(BUGBUG)
5422: UCHAR debug_int[MAX_CARDS][debug_size] = { 0 };
5423: UCHAR debug_index[MAX_CARDS] = { 0 };
5424: UCHAR reserved_1[3] = { 0 };
5425: #endif
1.1.1.2 ! root 5426:
1.1 root 5427: /*----------------------------------------------------------------------
5428: *
5429: *
5430: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
5431: *
5432: * This file is available under both the GNU General Public License
5433: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
5434: *
5435: * $Workfile: scsi.c $
5436: *
5437: * Description: Functions for handling SCSI bus functions such as
5438: * selection/reselection, sync negotiation, message-in
5439: * decoding.
5440: *
5441: * $Date: 1999/04/26 05:53:56 $
5442: *
5443: * $Revision: 1.1 $
5444: *
5445: *----------------------------------------------------------------------*/
5446:
5447: /*#include <globals.h>*/
5448:
5449: #if (FW_TYPE==_UCB_MGR_)
5450: /*#include <budi.h>*/
5451: #endif
5452:
5453: /*#include <sccbmgr.h>*/
5454: /*#include <blx30.h>*/
5455: /*#include <target.h>*/
5456: /*#include <scsi2.h>*/
5457: /*#include <eeprom.h>*/
5458: /*#include <harpoon.h>*/
5459:
5460:
5461: /*
5462: extern SCCBCARD BL_Card[MAX_CARDS];
5463: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
5464: #if defined(BUGBUG)
5465: void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
5466: #endif
5467: */
5468:
5469: /*---------------------------------------------------------------------
5470: *
5471: * Function: sfetm
5472: *
5473: * Description: Read in a message byte from the SCSI bus, and check
5474: * for a parity error.
5475: *
5476: *---------------------------------------------------------------------*/
5477:
5478: #if defined(DOS)
5479: UCHAR sfm(USHORT port, PSCCB pCurrSCCB)
5480: #else
5481: UCHAR sfm(ULONG port, PSCCB pCurrSCCB)
5482: #endif
5483: {
5484: UCHAR message;
5485: USHORT TimeOutLoop;
5486:
5487: TimeOutLoop = 0;
5488: while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
5489: (TimeOutLoop++ < 20000) ){}
5490:
5491:
5492: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
5493:
5494: message = RD_HARPOON(port+hp_scsidata_0);
5495:
5496: WR_HARPOON(port+hp_scsisig, SCSI_ACK + S_MSGI_PH);
5497:
5498:
5499: if (TimeOutLoop > 20000)
5500: message = 0x00; /* force message byte = 0 if Time Out on Req */
5501:
5502: if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
5503: (RD_HARPOON(port+hp_addstat) & SCSI_PAR_ERR))
5504: {
5505: WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
5506: WR_HARPOON(port+hp_xferstat, 0);
5507: WR_HARPOON(port+hp_fiforead, 0);
5508: WR_HARPOON(port+hp_fifowrite, 0);
5509: if (pCurrSCCB != NULL)
5510: {
5511: pCurrSCCB->Sccb_scsimsg = SMPARITY;
5512: }
5513: message = 0x00;
5514: do
5515: {
5516: ACCEPT_MSG_ATN(port);
5517: TimeOutLoop = 0;
5518: while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
5519: (TimeOutLoop++ < 20000) ){}
5520: if (TimeOutLoop > 20000)
5521: {
5522: WRW_HARPOON((port+hp_intstat), PARITY);
5523: return(message);
5524: }
5525: if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) != S_MSGI_PH)
5526: {
5527: WRW_HARPOON((port+hp_intstat), PARITY);
5528: return(message);
5529: }
5530: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
5531:
5532: RD_HARPOON(port+hp_scsidata_0);
5533:
5534: WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
5535:
5536: }while(1);
5537:
5538: }
5539: WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
5540: WR_HARPOON(port+hp_xferstat, 0);
5541: WR_HARPOON(port+hp_fiforead, 0);
5542: WR_HARPOON(port+hp_fifowrite, 0);
5543: return(message);
5544: }
5545:
5546:
5547: /*---------------------------------------------------------------------
5548: *
5549: * Function: ssel
5550: *
5551: * Description: Load up automation and select target device.
5552: *
5553: *---------------------------------------------------------------------*/
5554:
5555: #if defined(DOS)
5556: void ssel(USHORT port, UCHAR p_card)
5557: #else
5558: void ssel(ULONG port, UCHAR p_card)
5559: #endif
5560: {
5561:
5562: #if defined(DOS)
5563: UCHAR auto_loaded, i, target, *theCCB;
5564: #elif defined(OS2)
5565: UCHAR auto_loaded, i, target;
5566: UCHAR far *theCCB;
5567: #else
5568: UCHAR auto_loaded, i, target, *theCCB;
5569: #endif
5570:
5571: #if defined(DOS)
5572: USHORT cdb_reg;
5573: #else
5574: ULONG cdb_reg;
5575: #endif
5576: PSCCBcard CurrCard;
5577: PSCCB currSCCB;
5578: PSCCBMgr_tar_info currTar_Info;
5579: UCHAR lastTag, lun;
5580:
5581: CurrCard = &BL_Card[p_card];
5582: currSCCB = CurrCard->currentSCCB;
5583: target = currSCCB->TargID;
5584: currTar_Info = &sccbMgrTbl[p_card][target];
5585: lastTag = CurrCard->tagQ_Lst;
5586:
5587: ARAM_ACCESS(port);
5588:
5589:
5590: if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
5591: currSCCB->ControlByte &= ~F_USE_CMD_Q;
5592:
5593: if(((CurrCard->globalFlags & F_CONLUN_IO) &&
5594: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
5595:
5596: lun = currSCCB->Lun;
5597: else
5598: lun = 0;
5599:
5600:
5601: #if defined(DOS)
5602: currTar_Info->TarLUNBusy[lun] = TRUE;
5603:
5604: #else
5605:
5606: if (CurrCard->globalFlags & F_TAG_STARTED)
5607: {
5608: if (!(currSCCB->ControlByte & F_USE_CMD_Q))
5609: {
5610: if ((currTar_Info->TarLUN_CA == FALSE)
5611: && ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
5612: == TAG_Q_TRYING))
5613: {
5614:
5615: if (currTar_Info->TarTagQ_Cnt !=0)
5616: {
5617: currTar_Info->TarLUNBusy[lun] = TRUE;
5618: queueSelectFail(CurrCard,p_card);
5619: SGRAM_ACCESS(port);
5620: return;
5621: }
5622:
5623: else {
5624: currTar_Info->TarLUNBusy[lun] = TRUE;
5625: }
5626:
5627: } /*End non-tagged */
5628:
5629: else {
5630: currTar_Info->TarLUNBusy[lun] = TRUE;
5631: }
5632:
5633: } /*!Use cmd Q Tagged */
5634:
5635: else {
5636: if (currTar_Info->TarLUN_CA == TRUE)
5637: {
5638: queueSelectFail(CurrCard,p_card);
5639: SGRAM_ACCESS(port);
5640: return;
5641: }
5642:
5643: currTar_Info->TarLUNBusy[lun] = TRUE;
5644:
5645: } /*else use cmd Q tagged */
5646:
5647: } /*if glob tagged started */
5648:
5649: else {
5650: currTar_Info->TarLUNBusy[lun] = TRUE;
5651: }
5652:
5653: #endif /* DOS */
5654:
5655:
5656:
5657: if((((CurrCard->globalFlags & F_CONLUN_IO) &&
5658: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
5659: || (!(currSCCB->ControlByte & F_USE_CMD_Q))))
5660: {
5661: if(CurrCard->discQCount >= QUEUE_DEPTH)
5662: {
5663: currTar_Info->TarLUNBusy[lun] = TRUE;
5664: queueSelectFail(CurrCard,p_card);
5665: SGRAM_ACCESS(port);
5666: return;
5667: }
5668: for (i = 1; i < QUEUE_DEPTH; i++)
5669: {
5670: if (++lastTag >= QUEUE_DEPTH) lastTag = 1;
5671: if (CurrCard->discQ_Tbl[lastTag] == NULL)
5672: {
5673: CurrCard->tagQ_Lst = lastTag;
5674: currTar_Info->LunDiscQ_Idx[lun] = lastTag;
5675: CurrCard->discQ_Tbl[lastTag] = currSCCB;
5676: CurrCard->discQCount++;
5677: break;
5678: }
5679: }
5680: if(i == QUEUE_DEPTH)
5681: {
5682: currTar_Info->TarLUNBusy[lun] = TRUE;
5683: queueSelectFail(CurrCard,p_card);
5684: SGRAM_ACCESS(port);
5685: return;
5686: }
5687: }
5688:
5689:
5690:
5691: auto_loaded = FALSE;
5692:
5693: WR_HARPOON(port+hp_select_id, target);
5694: WR_HARPOON(port+hp_gp_reg_3, target); /* Use by new automation logic */
5695:
5696: if (currSCCB->OperationCode == RESET_COMMAND) {
5697: WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+
5698: (currSCCB->Sccb_idmsg & ~DISC_PRIV)));
5699:
5700: WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+NP);
5701:
5702: currSCCB->Sccb_scsimsg = SMDEV_RESET;
5703:
5704: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
5705: auto_loaded = TRUE;
5706: currSCCB->Sccb_scsistat = SELECT_BDR_ST;
5707:
5708: if (currTar_Info->TarEEValue & EE_SYNC_MASK)
5709: {
5710: currTar_Info->TarSyncCtrl = 0;
5711: currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
5712: }
5713:
5714: #if defined(WIDE_SCSI)
5715:
5716: if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
5717: {
5718: currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
5719: }
5720: #endif
5721:
5722: sssyncv(port, target, NARROW_SCSI,currTar_Info);
5723: SccbMgrTableInitTarget(p_card, target);
5724:
5725: }
5726:
5727: else if(currSCCB->Sccb_scsistat == ABORT_ST)
5728: {
5729: WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+
5730: (currSCCB->Sccb_idmsg & ~DISC_PRIV)));
5731:
5732: WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
5733:
5734: WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+
5735: (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK)
5736: >> 6) | (UCHAR)0x20)));
5737: WRW_HARPOON((port+SYNC_MSGS+2),
5738: (MPM_OP+AMSG_OUT+currSCCB->Sccb_tag));
5739: WRW_HARPOON((port+SYNC_MSGS+4), (BRH_OP+ALWAYS+NP ));
5740:
5741: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
5742: auto_loaded = TRUE;
5743:
5744: }
5745:
5746: #if defined(WIDE_SCSI)
5747:
5748:
5749: else if (!(currTar_Info->TarStatus & WIDE_NEGOCIATED)) {
5750: auto_loaded = siwidn(port,p_card);
5751: currSCCB->Sccb_scsistat = SELECT_WN_ST;
5752: }
5753:
5754: #endif
5755:
5756:
5757: else if (!((currTar_Info->TarStatus & TAR_SYNC_MASK)
5758: == SYNC_SUPPORTED)) {
5759: auto_loaded = sisyncn(port,p_card, FALSE);
5760: currSCCB->Sccb_scsistat = SELECT_SN_ST;
5761: }
5762:
5763:
5764: if (!auto_loaded)
5765: {
5766:
5767: #if !defined(DOS)
5768: if (currSCCB->ControlByte & F_USE_CMD_Q)
5769: {
5770:
5771: CurrCard->globalFlags |= F_TAG_STARTED;
5772:
5773: if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
5774: == TAG_Q_REJECT)
5775: {
5776: currSCCB->ControlByte &= ~F_USE_CMD_Q;
5777:
5778: /* Fix up the start instruction with a jump to
5779: Non-Tag-CMD handling */
5780: WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD);
5781:
5782: WRW_HARPOON((port+NON_TAG_ID_MSG),
5783: (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
5784:
5785: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
5786:
5787: /* Setup our STATE so we know what happend when
5788: the wheels fall off. */
5789: currSCCB->Sccb_scsistat = SELECT_ST;
5790:
5791: currTar_Info->TarLUNBusy[lun] = TRUE;
5792: }
5793:
5794: else
5795: {
5796: WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
5797:
5798: WRW_HARPOON((port+ID_MSG_STRT+2), (MPM_OP+AMSG_OUT+
5799: (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK)
5800: >> 6) | (UCHAR)0x20)));
5801:
5802: for (i = 1; i < QUEUE_DEPTH; i++)
5803: {
5804: if (++lastTag >= QUEUE_DEPTH) lastTag = 1;
5805: if (CurrCard->discQ_Tbl[lastTag] == NULL)
5806: {
5807: WRW_HARPOON((port+ID_MSG_STRT+6),
5808: (MPM_OP+AMSG_OUT+lastTag));
5809: CurrCard->tagQ_Lst = lastTag;
5810: currSCCB->Sccb_tag = lastTag;
5811: CurrCard->discQ_Tbl[lastTag] = currSCCB;
5812: CurrCard->discQCount++;
5813: break;
5814: }
5815: }
5816:
5817:
5818: if ( i == QUEUE_DEPTH )
5819: {
5820: currTar_Info->TarLUNBusy[lun] = TRUE;
5821: queueSelectFail(CurrCard,p_card);
5822: SGRAM_ACCESS(port);
5823: return;
5824: }
5825:
5826: currSCCB->Sccb_scsistat = SELECT_Q_ST;
5827:
5828: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
5829: }
5830: }
5831:
5832: else
5833: {
5834: #endif /* !DOS */
5835:
5836: WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD);
5837:
5838: WRW_HARPOON((port+NON_TAG_ID_MSG),
5839: (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
5840:
5841: currSCCB->Sccb_scsistat = SELECT_ST;
5842:
5843: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
5844: #if !defined(DOS)
5845: }
5846: #endif
5847:
5848:
5849: #if defined(OS2)
5850: theCCB = (UCHAR far *)&currSCCB->Cdb[0];
5851: #else
5852: theCCB = (UCHAR *)&currSCCB->Cdb[0];
5853: #endif
5854:
5855: cdb_reg = port + CMD_STRT;
5856:
5857: for (i=0; i < currSCCB->CdbLength; i++)
5858: {
5859: WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + *theCCB));
5860: cdb_reg +=2;
5861: theCCB++;
5862: }
5863:
5864: if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
5865: WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP));
5866:
5867: } /* auto_loaded */
5868:
5869: #if defined(WIDE_SCSI)
5870: WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
5871: WR_HARPOON(port+hp_xferstat, 0x00);
5872: #endif
5873:
5874: WRW_HARPOON((port+hp_intstat), (PROG_HLT | TIMEOUT | SEL | BUS_FREE));
5875:
5876: WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT));
5877:
5878:
5879: if (!(currSCCB->Sccb_MGRFlags & F_DEV_SELECTED))
5880: {
5881: WR_HARPOON(port+hp_scsictrl_0, (SEL_TAR | ENA_ATN | ENA_RESEL | ENA_SCAM_SEL));
5882: }
5883: else
5884: {
5885:
5886: /* auto_loaded = (RD_HARPOON(port+hp_autostart_3) & (UCHAR)0x1F);
5887: auto_loaded |= AUTO_IMMED; */
5888: auto_loaded = AUTO_IMMED;
5889:
5890: DISABLE_AUTO(port);
5891:
5892: WR_HARPOON(port+hp_autostart_3, auto_loaded);
5893: }
5894:
5895: SGRAM_ACCESS(port);
5896: }
5897:
5898:
5899: /*---------------------------------------------------------------------
5900: *
5901: * Function: sres
5902: *
5903: * Description: Hookup the correct CCB and handle the incoming messages.
5904: *
5905: *---------------------------------------------------------------------*/
5906:
5907: #if defined(DOS)
5908: void sres(USHORT port, UCHAR p_card, PSCCBcard pCurrCard)
5909: #else
5910: void sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard)
5911: #endif
5912: {
5913:
5914: #if defined(V302)
5915: #ifdef DOS
5916: UCHAR our_target,message, msgRetryCount;
5917: extern UCHAR lun, tag;
5918: #else
5919: UCHAR our_target,message,lun,tag, msgRetryCount;
5920: #endif
5921:
5922: #else /* V302 */
5923: UCHAR our_target, message, lun = 0, tag, msgRetryCount;
5924: #endif /* V302 */
5925:
5926:
5927: PSCCBMgr_tar_info currTar_Info;
5928: PSCCB currSCCB;
5929:
5930:
5931:
5932:
5933: if(pCurrCard->currentSCCB != NULL)
5934: {
5935: currTar_Info = &sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
5936: DISABLE_AUTO(port);
5937:
5938:
5939: WR_HARPOON((port+hp_scsictrl_0),(ENA_RESEL | ENA_SCAM_SEL));
5940:
5941:
5942: currSCCB = pCurrCard->currentSCCB;
5943: if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
5944: {
5945: currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
5946: currSCCB->Sccb_scsistat = BUS_FREE_ST;
5947: }
5948: if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
5949: {
5950: currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
5951: currSCCB->Sccb_scsistat = BUS_FREE_ST;
5952: }
5953: if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
5954: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
5955: {
5956: currTar_Info->TarLUNBusy[currSCCB->Lun] = FALSE;
5957: if(currSCCB->Sccb_scsistat != ABORT_ST)
5958: {
5959: pCurrCard->discQCount--;
5960: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[currSCCB->Lun]]
5961: = NULL;
5962: }
5963: }
5964: else
5965: {
5966: currTar_Info->TarLUNBusy[0] = FALSE;
5967: if(currSCCB->Sccb_tag)
5968: {
5969: if(currSCCB->Sccb_scsistat != ABORT_ST)
5970: {
5971: pCurrCard->discQCount--;
5972: pCurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL;
5973: }
5974: }else
5975: {
5976: if(currSCCB->Sccb_scsistat != ABORT_ST)
5977: {
5978: pCurrCard->discQCount--;
5979: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
5980: }
5981: }
5982: }
5983:
5984: queueSelectFail(&BL_Card[p_card],p_card);
5985: }
5986:
5987: #if defined(WIDE_SCSI)
5988: WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
5989: #endif
5990:
5991:
5992: our_target = (UCHAR)(RD_HARPOON(port+hp_select_id) >> 4);
5993: currTar_Info = &sccbMgrTbl[p_card][our_target];
5994:
5995:
5996: msgRetryCount = 0;
5997: do
5998: {
5999:
6000: #if defined(V302)
6001:
6002: message = GetTarLun(port, p_card, our_target, pCurrCard, &tag, &lun);
6003:
6004: #else /* V302 */
6005:
6006: currTar_Info = &sccbMgrTbl[p_card][our_target];
6007: tag = 0;
6008:
6009:
6010: while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
6011: {
6012: if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
6013: {
6014:
6015: WRW_HARPOON((port+hp_intstat), PHASE);
6016: return;
6017: }
6018: }
6019:
6020: WRW_HARPOON((port+hp_intstat), PHASE);
6021: if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH)
6022: {
6023:
6024: message = sfm(port,pCurrCard->currentSCCB);
6025: if (message)
6026: {
6027:
6028: if (message <= (0x80 | LUN_MASK))
6029: {
6030: lun = message & (UCHAR)LUN_MASK;
6031:
6032: #if !defined(DOS)
6033: if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING)
6034: {
6035: if (currTar_Info->TarTagQ_Cnt != 0)
6036: {
6037:
6038: if (!(currTar_Info->TarLUN_CA))
6039: {
6040: ACCEPT_MSG(port); /*Release the ACK for ID msg. */
6041:
6042:
6043: message = sfm(port,pCurrCard->currentSCCB);
6044: if (message)
6045: {
6046: ACCEPT_MSG(port);
6047: }
6048:
6049: else
6050: message = FALSE;
6051:
6052: if(message != FALSE)
6053: {
6054: tag = sfm(port,pCurrCard->currentSCCB);
6055:
6056: if (!(tag))
6057: message = FALSE;
6058: }
6059:
6060: } /*C.A. exists! */
6061:
6062: } /*End Q cnt != 0 */
6063:
6064: } /*End Tag cmds supported! */
6065: #endif /* !DOS */
6066:
6067: } /*End valid ID message. */
6068:
6069: else
6070: {
6071:
6072: ACCEPT_MSG_ATN(port);
6073: }
6074:
6075: } /* End good id message. */
6076:
6077: else
6078: {
6079:
6080: message = FALSE;
6081: }
6082: }
6083: else
6084: {
6085: ACCEPT_MSG_ATN(port);
6086:
6087: while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) &&
6088: !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) &&
6089: (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ;
6090:
6091: return;
6092: }
6093:
6094: #endif /* V302 */
6095:
6096: if(message == FALSE)
6097: {
6098: msgRetryCount++;
6099: if(msgRetryCount == 1)
6100: {
6101: SendMsg(port, SMPARITY);
6102: }
6103: else
6104: {
6105: SendMsg(port, SMDEV_RESET);
6106:
6107: sssyncv(port, our_target, NARROW_SCSI,currTar_Info);
6108:
6109: if (sccbMgrTbl[p_card][our_target].TarEEValue & EE_SYNC_MASK)
6110: {
6111:
6112: sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_SYNC_MASK;
6113:
6114: }
6115:
6116: if (sccbMgrTbl[p_card][our_target].TarEEValue & EE_WIDE_SCSI)
6117: {
6118:
6119: sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_WIDE_MASK;
6120: }
6121:
6122:
6123: queueFlushTargSccb(p_card, our_target, SCCB_COMPLETE);
6124: SccbMgrTableInitTarget(p_card,our_target);
6125: return;
6126: }
6127: }
6128: }while(message == FALSE);
6129:
6130:
6131:
6132: if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
6133: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
6134: {
6135: currTar_Info->TarLUNBusy[lun] = TRUE;
6136: pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[lun]];
6137: if(pCurrCard->currentSCCB != NULL)
6138: {
6139: ACCEPT_MSG(port);
6140: }
6141: else
6142: {
6143: ACCEPT_MSG_ATN(port);
6144: }
6145: }
6146: else
6147: {
6148: currTar_Info->TarLUNBusy[0] = TRUE;
6149:
6150:
6151: if (tag)
6152: {
6153: if (pCurrCard->discQ_Tbl[tag] != NULL)
6154: {
6155: pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[tag];
6156: currTar_Info->TarTagQ_Cnt--;
6157: ACCEPT_MSG(port);
6158: }
6159: else
6160: {
6161: ACCEPT_MSG_ATN(port);
6162: }
6163: }else
6164: {
6165: pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]];
6166: if(pCurrCard->currentSCCB != NULL)
6167: {
6168: ACCEPT_MSG(port);
6169: }
6170: else
6171: {
6172: ACCEPT_MSG_ATN(port);
6173: }
6174: }
6175: }
6176:
6177: if(pCurrCard->currentSCCB != NULL)
6178: {
6179: if(pCurrCard->currentSCCB->Sccb_scsistat == ABORT_ST)
6180: {
6181: /* During Abort Tag command, the target could have got re-selected
6182: and completed the command. Check the select Q and remove the CCB
6183: if it is in the Select Q */
6184: queueFindSccb(pCurrCard->currentSCCB, p_card);
6185: }
6186: }
6187:
6188:
6189: while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) &&
6190: !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) &&
6191: (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ;
6192: }
6193:
6194: #if defined(V302)
6195:
6196: #if defined(DOS)
6197: UCHAR GetTarLun(USHORT port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun)
6198: #else
6199: UCHAR GetTarLun(ULONG port, UCHAR p_card, UCHAR our_target, PSCCBcard pCurrCard, PUCHAR tag, PUCHAR lun)
6200: #endif
6201: {
6202: UCHAR message;
6203: PSCCBMgr_tar_info currTar_Info;
6204:
6205:
6206: currTar_Info = &sccbMgrTbl[p_card][our_target];
6207: *tag = 0;
6208:
6209:
6210: while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
6211: {
6212: if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
6213: {
6214:
6215: WRW_HARPOON((port+hp_intstat), PHASE);
6216: return(TRUE);
6217: }
6218: }
6219:
6220: WRW_HARPOON((port+hp_intstat), PHASE);
6221: if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH)
6222: {
6223:
6224: message = sfm(port,pCurrCard->currentSCCB);
6225: if (message)
6226: {
6227:
6228: if (message <= (0x80 | LUN_MASK))
6229: {
6230: *lun = message & (UCHAR)LUN_MASK;
6231:
6232: #if !defined(DOS)
6233: if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING)
6234: {
6235: if (currTar_Info->TarTagQ_Cnt != 0)
6236: {
6237:
6238: if (!(currTar_Info->TarLUN_CA))
6239: {
6240: ACCEPT_MSG(port); /*Release the ACK for ID msg. */
6241:
6242:
6243: message = sfm(port,pCurrCard->currentSCCB);
6244: if (message)
6245: {
6246: ACCEPT_MSG(port);
6247: }
6248:
6249: else
6250: return(FALSE);
6251:
6252: *tag = sfm(port,pCurrCard->currentSCCB);
6253:
6254: if (!(*tag)) return(FALSE);
6255:
6256: } /*C.A. exists! */
6257:
6258: } /*End Q cnt != 0 */
6259:
6260: } /*End Tag cmds supported! */
6261: #endif /* !DOS */
6262:
6263: } /*End valid ID message. */
6264:
6265: else
6266: {
6267:
6268: ACCEPT_MSG_ATN(port);
6269: }
6270:
6271: } /* End good id message. */
6272:
6273: else
6274: {
6275:
6276: return(FALSE);
6277: }
6278: }
6279: else
6280: {
6281: ACCEPT_MSG_ATN(port);
6282: return(TRUE);
6283: }
6284: return(TRUE);
6285: }
6286:
6287: #endif /* V302 */
6288:
6289: #if defined(DOS)
6290: void SendMsg(USHORT port, UCHAR message)
6291: #else
6292: void SendMsg(ULONG port, UCHAR message)
6293: #endif
6294: {
6295: while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ))
6296: {
6297: if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
6298: {
6299:
6300: WRW_HARPOON((port+hp_intstat), PHASE);
6301: return;
6302: }
6303: }
6304:
6305: WRW_HARPOON((port+hp_intstat), PHASE);
6306: if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGO_PH)
6307: {
6308: WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0));
6309:
6310:
6311: WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN);
6312:
6313: WR_HARPOON(port+hp_scsidata_0,message);
6314:
6315: WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
6316:
6317: ACCEPT_MSG(port);
6318:
6319: WR_HARPOON(port+hp_portctrl_0, 0x00);
6320:
6321: if ((message == SMABORT) || (message == SMDEV_RESET) ||
6322: (message == SMABORT_TAG) )
6323: {
6324: while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {}
6325:
6326: if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
6327: {
6328: WRW_HARPOON((port+hp_intstat), BUS_FREE);
6329: }
6330: }
6331: }
6332: }
6333:
6334: /*---------------------------------------------------------------------
6335: *
6336: * Function: sdecm
6337: *
6338: * Description: Determine the proper responce to the message from the
6339: * target device.
6340: *
6341: *---------------------------------------------------------------------*/
6342: #if defined(DOS)
6343: void sdecm(UCHAR message, USHORT port, UCHAR p_card)
6344: #else
6345: void sdecm(UCHAR message, ULONG port, UCHAR p_card)
6346: #endif
6347: {
6348: PSCCB currSCCB;
6349: PSCCBcard CurrCard;
6350: PSCCBMgr_tar_info currTar_Info;
6351:
6352: CurrCard = &BL_Card[p_card];
6353: currSCCB = CurrCard->currentSCCB;
6354:
6355: currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
6356:
6357: if (message == SMREST_DATA_PTR)
6358: {
6359: if (!(currSCCB->Sccb_XferState & F_NO_DATA_YET))
6360: {
6361: currSCCB->Sccb_ATC = currSCCB->Sccb_savedATC;
6362:
6363: hostDataXferRestart(currSCCB);
6364: }
6365:
6366: ACCEPT_MSG(port);
6367: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6368: }
6369:
6370: else if (message == SMCMD_COMP)
6371: {
6372:
6373:
6374: if (currSCCB->Sccb_scsistat == SELECT_Q_ST)
6375: {
6376: currTar_Info->TarStatus &= ~(UCHAR)TAR_TAG_Q_MASK;
6377: currTar_Info->TarStatus |= (UCHAR)TAG_Q_REJECT;
6378: }
6379:
6380: ACCEPT_MSG(port);
6381:
6382: }
6383:
6384: else if ((message == SMNO_OP) || (message >= SMIDENT)
6385: || (message == SMINIT_RECOVERY) || (message == SMREL_RECOVERY))
6386: {
6387:
6388: ACCEPT_MSG(port);
6389: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6390: }
6391:
6392: else if (message == SMREJECT)
6393: {
6394:
6395: if ((currSCCB->Sccb_scsistat == SELECT_SN_ST) ||
6396: (currSCCB->Sccb_scsistat == SELECT_WN_ST) ||
6397: ((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING ) ||
6398: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING ) )
6399:
6400: {
6401: WRW_HARPOON((port+hp_intstat), BUS_FREE);
6402:
6403: ACCEPT_MSG(port);
6404:
6405:
6406: while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
6407: (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {}
6408:
6409: if(currSCCB->Lun == 0x00)
6410: {
6411: if ((currSCCB->Sccb_scsistat == SELECT_SN_ST))
6412: {
6413:
6414: currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED;
6415:
6416: currTar_Info->TarEEValue &= ~EE_SYNC_MASK;
6417: }
6418:
6419: #if defined(WIDE_SCSI)
6420: else if ((currSCCB->Sccb_scsistat == SELECT_WN_ST))
6421: {
6422:
6423:
6424: currTar_Info->TarStatus = (currTar_Info->TarStatus &
6425: ~WIDE_ENABLED) | WIDE_NEGOCIATED;
6426:
6427: currTar_Info->TarEEValue &= ~EE_WIDE_SCSI;
6428:
6429: }
6430: #endif
6431:
6432: else if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING )
6433: {
6434: currTar_Info->TarStatus = (currTar_Info->TarStatus &
6435: ~(UCHAR)TAR_TAG_Q_MASK) | TAG_Q_REJECT;
6436:
6437:
6438: currSCCB->ControlByte &= ~F_USE_CMD_Q;
6439: CurrCard->discQCount--;
6440: CurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL;
6441: currSCCB->Sccb_tag = 0x00;
6442:
6443: }
6444: }
6445:
6446: if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
6447: {
6448:
6449:
6450: if(currSCCB->Lun == 0x00)
6451: {
6452: WRW_HARPOON((port+hp_intstat), BUS_FREE);
6453: CurrCard->globalFlags |= F_NEW_SCCB_CMD;
6454: }
6455: }
6456:
6457: else
6458: {
6459:
6460: if((CurrCard->globalFlags & F_CONLUN_IO) &&
6461: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
6462: currTar_Info->TarLUNBusy[currSCCB->Lun] = TRUE;
6463: else
6464: currTar_Info->TarLUNBusy[0] = TRUE;
6465:
6466:
6467: currSCCB->ControlByte &= ~(UCHAR)F_USE_CMD_Q;
6468:
6469: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6470:
6471: }
6472: }
6473:
6474: else
6475: {
6476: ACCEPT_MSG(port);
6477:
6478: while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) &&
6479: (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {}
6480:
6481: if (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))
6482: {
6483: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6484: }
6485: }
6486: }
6487:
6488: else if (message == SMEXT)
6489: {
6490:
6491: ACCEPT_MSG(port);
6492: shandem(port,p_card,currSCCB);
6493: }
6494:
6495: else if (message == SMIGNORWR)
6496: {
6497:
6498: ACCEPT_MSG(port); /* ACK the RESIDUE MSG */
6499:
6500: message = sfm(port,currSCCB);
6501:
6502: if(currSCCB->Sccb_scsimsg != SMPARITY)
6503: ACCEPT_MSG(port);
6504: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6505: }
6506:
6507:
6508: else
6509: {
6510:
6511: currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
6512: currSCCB->Sccb_scsimsg = SMREJECT;
6513:
6514: ACCEPT_MSG_ATN(port);
6515: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6516: }
6517: }
6518:
6519:
6520: /*---------------------------------------------------------------------
6521: *
6522: * Function: shandem
6523: *
6524: * Description: Decide what to do with the extended message.
6525: *
6526: *---------------------------------------------------------------------*/
6527: #if defined(DOS)
6528: void shandem(USHORT port, UCHAR p_card, PSCCB pCurrSCCB)
6529: #else
6530: void shandem(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
6531: #endif
6532: {
6533: UCHAR length,message;
6534:
6535: length = sfm(port,pCurrSCCB);
6536: if (length)
6537: {
6538:
6539: ACCEPT_MSG(port);
6540: message = sfm(port,pCurrSCCB);
6541: if (message)
6542: {
6543:
6544: if (message == SMSYNC)
6545: {
6546:
6547: if (length == 0x03)
6548: {
6549:
6550: ACCEPT_MSG(port);
6551: stsyncn(port,p_card);
6552: }
6553: else
6554: {
6555:
6556: pCurrSCCB->Sccb_scsimsg = SMREJECT;
6557: ACCEPT_MSG_ATN(port);
6558: }
6559: }
6560: #if defined(WIDE_SCSI)
6561: else if (message == SMWDTR)
6562: {
6563:
6564: if (length == 0x02)
6565: {
6566:
6567: ACCEPT_MSG(port);
6568: stwidn(port,p_card);
6569: }
6570: else
6571: {
6572:
6573: pCurrSCCB->Sccb_scsimsg = SMREJECT;
6574: ACCEPT_MSG_ATN(port);
6575:
6576: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6577: }
6578: }
6579: #endif
6580: else
6581: {
6582:
6583: pCurrSCCB->Sccb_scsimsg = SMREJECT;
6584: ACCEPT_MSG_ATN(port);
6585:
6586: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6587: }
6588: }
6589: else
6590: {
6591: if(pCurrSCCB->Sccb_scsimsg != SMPARITY)
6592: ACCEPT_MSG(port);
6593: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6594: }
6595: }else
6596: {
6597: if(pCurrSCCB->Sccb_scsimsg == SMPARITY)
6598: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6599: }
6600: }
6601:
6602:
6603: /*---------------------------------------------------------------------
6604: *
6605: * Function: sisyncn
6606: *
6607: * Description: Read in a message byte from the SCSI bus, and check
6608: * for a parity error.
6609: *
6610: *---------------------------------------------------------------------*/
6611:
6612: #if defined(DOS)
6613: UCHAR sisyncn(USHORT port, UCHAR p_card, UCHAR syncFlag)
6614: #else
6615: UCHAR sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag)
6616: #endif
6617: {
6618: PSCCB currSCCB;
6619: PSCCBMgr_tar_info currTar_Info;
6620:
6621: currSCCB = BL_Card[p_card].currentSCCB;
6622: currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
6623:
6624: if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING)) {
6625:
6626:
6627: WRW_HARPOON((port+ID_MSG_STRT),
6628: (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
6629:
6630: WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
6631:
6632: WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
6633: WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 ));
6634: WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC));
6635:
6636:
6637: if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
6638:
6639: WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 12));
6640:
6641: else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB)
6642:
6643: WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 25));
6644:
6645: else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB)
6646:
6647: WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 50));
6648:
6649: else
6650: WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 00));
6651:
6652:
6653: WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP ));
6654: WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+DEFAULT_OFFSET));
6655: WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP ));
6656:
6657:
6658: if(syncFlag == FALSE)
6659: {
6660: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
6661: currTar_Info->TarStatus = ((currTar_Info->TarStatus &
6662: ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_TRYING);
6663: }
6664: else
6665: {
6666: WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED + CMD_ONLY_STRT));
6667: }
6668:
6669:
6670: return(TRUE);
6671: }
6672:
6673: else {
6674:
6675: currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED;
6676: currTar_Info->TarEEValue &= ~EE_SYNC_MASK;
6677: return(FALSE);
6678: }
6679: }
6680:
6681:
6682:
6683: /*---------------------------------------------------------------------
6684: *
6685: * Function: stsyncn
6686: *
6687: * Description: The has sent us a Sync Nego message so handle it as
6688: * necessary.
6689: *
6690: *---------------------------------------------------------------------*/
6691: #if defined(DOS)
6692: void stsyncn(USHORT port, UCHAR p_card)
6693: #else
6694: void stsyncn(ULONG port, UCHAR p_card)
6695: #endif
6696: {
6697: UCHAR sync_msg,offset,sync_reg,our_sync_msg;
6698: PSCCB currSCCB;
6699: PSCCBMgr_tar_info currTar_Info;
6700:
6701: currSCCB = BL_Card[p_card].currentSCCB;
6702: currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
6703:
6704: sync_msg = sfm(port,currSCCB);
6705:
6706: if((sync_msg == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
6707: {
6708: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6709: return;
6710: }
6711:
6712: ACCEPT_MSG(port);
6713:
6714:
6715: offset = sfm(port,currSCCB);
6716:
6717: if((offset == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
6718: {
6719: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6720: return;
6721: }
6722:
6723: if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
6724:
6725: our_sync_msg = 12; /* Setup our Message to 20mb/s */
6726:
6727: else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB)
6728:
6729: our_sync_msg = 25; /* Setup our Message to 10mb/s */
6730:
6731: else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB)
6732:
6733: our_sync_msg = 50; /* Setup our Message to 5mb/s */
6734: else
6735:
6736: our_sync_msg = 0; /* Message = Async */
6737:
6738: if (sync_msg < our_sync_msg) {
6739: sync_msg = our_sync_msg; /*if faster, then set to max. */
6740: }
6741:
6742: if (offset == ASYNC)
6743: sync_msg = ASYNC;
6744:
6745: if (offset > MAX_OFFSET)
6746: offset = MAX_OFFSET;
6747:
6748: sync_reg = 0x00;
6749:
6750: if (sync_msg > 12)
6751:
6752: sync_reg = 0x20; /* Use 10MB/s */
6753:
6754: if (sync_msg > 25)
6755:
6756: sync_reg = 0x40; /* Use 6.6MB/s */
6757:
6758: if (sync_msg > 38)
6759:
6760: sync_reg = 0x60; /* Use 5MB/s */
6761:
6762: if (sync_msg > 50)
6763:
6764: sync_reg = 0x80; /* Use 4MB/s */
6765:
6766: if (sync_msg > 62)
6767:
6768: sync_reg = 0xA0; /* Use 3.33MB/s */
6769:
6770: if (sync_msg > 75)
6771:
6772: sync_reg = 0xC0; /* Use 2.85MB/s */
6773:
6774: if (sync_msg > 87)
6775:
6776: sync_reg = 0xE0; /* Use 2.5MB/s */
6777:
6778: if (sync_msg > 100) {
6779:
6780: sync_reg = 0x00; /* Use ASYNC */
6781: offset = 0x00;
6782: }
6783:
6784:
6785: #if defined(WIDE_SCSI)
6786: if (currTar_Info->TarStatus & WIDE_ENABLED)
6787:
6788: sync_reg |= offset;
6789:
6790: else
6791:
6792: sync_reg |= (offset | NARROW_SCSI);
6793:
6794: #else
6795: sync_reg |= (offset | NARROW_SCSI);
6796: #endif
6797:
6798: sssyncv(port,currSCCB->TargID,sync_reg,currTar_Info);
6799:
6800:
6801: if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
6802:
6803:
6804: ACCEPT_MSG(port);
6805:
6806: currTar_Info->TarStatus = ((currTar_Info->TarStatus &
6807: ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED);
6808:
6809: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6810: }
6811:
6812: else {
6813:
6814:
6815: ACCEPT_MSG_ATN(port);
6816:
6817: sisyncr(port,sync_msg,offset);
6818:
6819: currTar_Info->TarStatus = ((currTar_Info->TarStatus &
6820: ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED);
6821: }
6822: }
6823:
6824:
6825: /*---------------------------------------------------------------------
6826: *
6827: * Function: sisyncr
6828: *
6829: * Description: Answer the targets sync message.
6830: *
6831: *---------------------------------------------------------------------*/
6832: #if defined(DOS)
6833: void sisyncr(USHORT port,UCHAR sync_pulse, UCHAR offset)
6834: #else
6835: void sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset)
6836: #endif
6837: {
6838: ARAM_ACCESS(port);
6839: WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
6840: WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 ));
6841: WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC));
6842: WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+sync_pulse));
6843: WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP ));
6844: WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+offset));
6845: WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP ));
6846: SGRAM_ACCESS(port);
6847:
6848: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
6849: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1);
6850:
6851: WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT));
6852:
6853: while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {}
6854: }
6855:
6856:
6857:
6858: #if defined(WIDE_SCSI)
6859:
6860: /*---------------------------------------------------------------------
6861: *
6862: * Function: siwidn
6863: *
6864: * Description: Read in a message byte from the SCSI bus, and check
6865: * for a parity error.
6866: *
6867: *---------------------------------------------------------------------*/
6868:
6869: #if defined(DOS)
6870: UCHAR siwidn(USHORT port, UCHAR p_card)
6871: #else
6872: UCHAR siwidn(ULONG port, UCHAR p_card)
6873: #endif
6874: {
6875: PSCCB currSCCB;
6876: PSCCBMgr_tar_info currTar_Info;
6877:
6878: currSCCB = BL_Card[p_card].currentSCCB;
6879: currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
6880:
6881: if (!((currTar_Info->TarStatus & TAR_WIDE_MASK) == WIDE_NEGOCIATED)) {
6882:
6883:
6884: WRW_HARPOON((port+ID_MSG_STRT),
6885: (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
6886:
6887: WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
6888:
6889: WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
6890: WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 ));
6891: WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR));
6892: WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP ));
6893: WRW_HARPOON((port+SYNC_MSGS+8), (MPM_OP+AMSG_OUT+ SM16BIT));
6894: WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP ));
6895:
6896: WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
6897:
6898:
6899: currTar_Info->TarStatus = ((currTar_Info->TarStatus &
6900: ~(UCHAR)TAR_WIDE_MASK) | (UCHAR)WIDE_ENABLED);
6901:
6902: return(TRUE);
6903: }
6904:
6905: else {
6906:
6907: currTar_Info->TarStatus = ((currTar_Info->TarStatus &
6908: ~(UCHAR)TAR_WIDE_MASK) | WIDE_NEGOCIATED);
6909:
6910: currTar_Info->TarEEValue &= ~EE_WIDE_SCSI;
6911: return(FALSE);
6912: }
6913: }
6914:
6915:
6916:
6917: /*---------------------------------------------------------------------
6918: *
6919: * Function: stwidn
6920: *
6921: * Description: The has sent us a Wide Nego message so handle it as
6922: * necessary.
6923: *
6924: *---------------------------------------------------------------------*/
6925: #if defined(DOS)
6926: void stwidn(USHORT port, UCHAR p_card)
6927: #else
6928: void stwidn(ULONG port, UCHAR p_card)
6929: #endif
6930: {
6931: UCHAR width;
6932: PSCCB currSCCB;
6933: PSCCBMgr_tar_info currTar_Info;
6934:
6935: currSCCB = BL_Card[p_card].currentSCCB;
6936: currTar_Info = &sccbMgrTbl[p_card][currSCCB->TargID];
6937:
6938: width = sfm(port,currSCCB);
6939:
6940: if((width == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY))
6941: {
6942: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6943: return;
6944: }
6945:
6946:
6947: if (!(currTar_Info->TarEEValue & EE_WIDE_SCSI))
6948: width = 0;
6949:
6950: if (width) {
6951: currTar_Info->TarStatus |= WIDE_ENABLED;
6952: width = 0;
6953: }
6954: else {
6955: width = NARROW_SCSI;
6956: currTar_Info->TarStatus &= ~WIDE_ENABLED;
6957: }
6958:
6959:
6960: sssyncv(port,currSCCB->TargID,width,currTar_Info);
6961:
6962:
6963: if (currSCCB->Sccb_scsistat == SELECT_WN_ST)
6964: {
6965:
6966:
6967:
6968: currTar_Info->TarStatus |= WIDE_NEGOCIATED;
6969:
6970: if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_SUPPORTED))
6971: {
6972: ACCEPT_MSG_ATN(port);
6973: ARAM_ACCESS(port);
6974: sisyncn(port,p_card, TRUE);
6975: currSCCB->Sccb_scsistat = SELECT_SN_ST;
6976: SGRAM_ACCESS(port);
6977: }
6978: else
6979: {
6980: ACCEPT_MSG(port);
6981: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
6982: }
6983: }
6984:
6985: else {
6986:
6987:
6988: ACCEPT_MSG_ATN(port);
6989:
6990: if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
6991: width = SM16BIT;
6992: else
6993: width = SM8BIT;
6994:
6995: siwidr(port,width);
6996:
6997: currTar_Info->TarStatus |= (WIDE_NEGOCIATED | WIDE_ENABLED);
6998: }
6999: }
7000:
7001:
7002: /*---------------------------------------------------------------------
7003: *
7004: * Function: siwidr
7005: *
7006: * Description: Answer the targets Wide nego message.
7007: *
7008: *---------------------------------------------------------------------*/
7009: #if defined(DOS)
7010: void siwidr(USHORT port, UCHAR width)
7011: #else
7012: void siwidr(ULONG port, UCHAR width)
7013: #endif
7014: {
7015: ARAM_ACCESS(port);
7016: WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
7017: WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 ));
7018: WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR));
7019: WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP ));
7020: WRW_HARPOON((port+SYNC_MSGS+8),(MPM_OP+AMSG_OUT+width));
7021: WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP ));
7022: SGRAM_ACCESS(port);
7023:
7024: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
7025: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1);
7026:
7027: WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT));
7028:
7029: while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {}
7030: }
7031:
7032: #endif
7033:
7034:
7035:
7036: /*---------------------------------------------------------------------
7037: *
7038: * Function: sssyncv
7039: *
7040: * Description: Write the desired value to the Sync Register for the
7041: * ID specified.
7042: *
7043: *---------------------------------------------------------------------*/
7044: #if defined(DOS)
7045: void sssyncv(USHORT p_port, UCHAR p_id, UCHAR p_sync_value,PSCCBMgr_tar_info currTar_Info)
7046: #else
7047: void sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value,PSCCBMgr_tar_info currTar_Info)
7048: #endif
7049: {
7050: UCHAR index;
7051:
7052: index = p_id;
7053:
7054: switch (index) {
7055:
7056: case 0:
7057: index = 12; /* hp_synctarg_0 */
7058: break;
7059: case 1:
7060: index = 13; /* hp_synctarg_1 */
7061: break;
7062: case 2:
7063: index = 14; /* hp_synctarg_2 */
7064: break;
7065: case 3:
7066: index = 15; /* hp_synctarg_3 */
7067: break;
7068: case 4:
7069: index = 8; /* hp_synctarg_4 */
7070: break;
7071: case 5:
7072: index = 9; /* hp_synctarg_5 */
7073: break;
7074: case 6:
7075: index = 10; /* hp_synctarg_6 */
7076: break;
7077: case 7:
7078: index = 11; /* hp_synctarg_7 */
7079: break;
7080: case 8:
7081: index = 4; /* hp_synctarg_8 */
7082: break;
7083: case 9:
7084: index = 5; /* hp_synctarg_9 */
7085: break;
7086: case 10:
7087: index = 6; /* hp_synctarg_10 */
7088: break;
7089: case 11:
7090: index = 7; /* hp_synctarg_11 */
7091: break;
7092: case 12:
7093: index = 0; /* hp_synctarg_12 */
7094: break;
7095: case 13:
7096: index = 1; /* hp_synctarg_13 */
7097: break;
7098: case 14:
7099: index = 2; /* hp_synctarg_14 */
7100: break;
7101: case 15:
7102: index = 3; /* hp_synctarg_15 */
7103:
7104: }
7105:
7106: WR_HARPOON(p_port+hp_synctarg_base+index, p_sync_value);
7107:
7108: currTar_Info->TarSyncCtrl = p_sync_value;
7109: }
7110:
7111:
7112: /*---------------------------------------------------------------------
7113: *
7114: * Function: sresb
7115: *
7116: * Description: Reset the desired card's SCSI bus.
7117: *
7118: *---------------------------------------------------------------------*/
7119: #if defined(DOS)
7120: void sresb(USHORT port, UCHAR p_card)
7121: #else
7122: void sresb(ULONG port, UCHAR p_card)
7123: #endif
7124: {
7125: UCHAR scsiID, i;
7126:
7127: PSCCBMgr_tar_info currTar_Info;
7128:
7129: WR_HARPOON(port+hp_page_ctrl,
7130: (RD_HARPOON(port+hp_page_ctrl) | G_INT_DISABLE));
7131: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
7132:
7133: WR_HARPOON(port+hp_scsictrl_0, SCSI_RST);
7134:
7135: scsiID = RD_HARPOON(port+hp_seltimeout);
7136: WR_HARPOON(port+hp_seltimeout,TO_5ms);
7137: WRW_HARPOON((port+hp_intstat), TIMEOUT);
7138:
7139: WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT | START_TO));
7140:
7141: while (!(RDW_HARPOON((port+hp_intstat)) & TIMEOUT)) {}
7142:
7143: WR_HARPOON(port+hp_seltimeout,scsiID);
7144:
7145: WR_HARPOON(port+hp_scsictrl_0, ENA_SCAM_SEL);
7146:
7147: Wait(port, TO_5ms);
7148:
7149: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
7150:
7151: WR_HARPOON(port+hp_int_mask, (RD_HARPOON(port+hp_int_mask) | 0x00));
7152:
7153: for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++)
7154: {
7155: currTar_Info = &sccbMgrTbl[p_card][scsiID];
7156:
7157: if (currTar_Info->TarEEValue & EE_SYNC_MASK)
7158: {
7159: currTar_Info->TarSyncCtrl = 0;
7160: currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
7161: }
7162:
7163: if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
7164: {
7165: currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
7166: }
7167:
7168: sssyncv(port, scsiID, NARROW_SCSI,currTar_Info);
7169:
7170: SccbMgrTableInitTarget(p_card, scsiID);
7171: }
7172:
7173: BL_Card[p_card].scanIndex = 0x00;
7174: BL_Card[p_card].currentSCCB = NULL;
7175: BL_Card[p_card].globalFlags &= ~(F_TAG_STARTED | F_HOST_XFER_ACT
7176: | F_NEW_SCCB_CMD);
7177: BL_Card[p_card].cmdCounter = 0x00;
7178: BL_Card[p_card].discQCount = 0x00;
7179: BL_Card[p_card].tagQ_Lst = 0x01;
7180:
7181: for(i = 0; i < QUEUE_DEPTH; i++)
7182: BL_Card[p_card].discQ_Tbl[i] = NULL;
7183:
7184: WR_HARPOON(port+hp_page_ctrl,
7185: (RD_HARPOON(port+hp_page_ctrl) & ~G_INT_DISABLE));
7186:
7187: }
7188:
7189: /*---------------------------------------------------------------------
7190: *
7191: * Function: ssenss
7192: *
7193: * Description: Setup for the Auto Sense command.
7194: *
7195: *---------------------------------------------------------------------*/
7196: void ssenss(PSCCBcard pCurrCard)
7197: {
7198: UCHAR i;
7199: PSCCB currSCCB;
7200:
7201: currSCCB = pCurrCard->currentSCCB;
7202:
7203:
7204: currSCCB->Save_CdbLen = currSCCB->CdbLength;
7205:
7206: for (i = 0; i < 6; i++) {
7207:
7208: currSCCB->Save_Cdb[i] = currSCCB->Cdb[i];
7209: }
7210:
7211: currSCCB->CdbLength = SIX_BYTE_CMD;
7212: currSCCB->Cdb[0] = SCSI_REQUEST_SENSE;
7213: currSCCB->Cdb[1] = currSCCB->Cdb[1] & (UCHAR)0xE0; /*Keep LUN. */
7214: currSCCB->Cdb[2] = 0x00;
7215: currSCCB->Cdb[3] = 0x00;
7216: currSCCB->Cdb[4] = currSCCB->RequestSenseLength;
7217: currSCCB->Cdb[5] = 0x00;
7218:
7219: currSCCB->Sccb_XferCnt = (unsigned long)currSCCB->RequestSenseLength;
7220:
7221: currSCCB->Sccb_ATC = 0x00;
7222:
7223: currSCCB->Sccb_XferState |= F_AUTO_SENSE;
7224:
7225: currSCCB->Sccb_XferState &= ~F_SG_XFER;
7226:
7227: currSCCB->Sccb_idmsg = currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV;
7228:
7229: currSCCB->ControlByte = 0x00;
7230:
7231: currSCCB->Sccb_MGRFlags &= F_STATUSLOADED;
7232: }
7233:
7234:
7235:
7236: /*---------------------------------------------------------------------
7237: *
7238: * Function: sxfrp
7239: *
7240: * Description: Transfer data into the bit bucket until the device
7241: * decides to switch phase.
7242: *
7243: *---------------------------------------------------------------------*/
7244:
7245: #if defined(DOS)
7246: void sxfrp(USHORT p_port, UCHAR p_card)
7247: #else
7248: void sxfrp(ULONG p_port, UCHAR p_card)
7249: #endif
7250: {
7251: UCHAR curr_phz;
7252:
7253:
7254: DISABLE_AUTO(p_port);
7255:
7256: if (BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) {
7257:
7258: hostDataXferAbort(p_port,p_card,BL_Card[p_card].currentSCCB);
7259:
7260: }
7261:
7262: /* If the Automation handled the end of the transfer then do not
7263: match the phase or we will get out of sync with the ISR. */
7264:
7265: if (RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | XFER_CNT_0 | AUTO_INT))
7266: return;
7267:
7268: WR_HARPOON(p_port+hp_xfercnt_0, 0x00);
7269:
7270: curr_phz = RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ;
7271:
7272: WRW_HARPOON((p_port+hp_intstat), XFER_CNT_0);
7273:
7274:
7275: WR_HARPOON(p_port+hp_scsisig, curr_phz);
7276:
7277: while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)) &&
7278: (curr_phz == (RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ)) )
7279: {
7280: if (curr_phz & (UCHAR)SCSI_IOBIT)
7281: {
7282: WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT));
7283:
7284: if (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
7285: {
7286: RD_HARPOON(p_port+hp_fifodata_0);
7287: }
7288: }
7289: else
7290: {
7291: WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | HOST_WRT));
7292: if (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY)
7293: {
7294: WR_HARPOON(p_port+hp_fifodata_0,0xFA);
7295: }
7296: }
7297: } /* End of While loop for padding data I/O phase */
7298:
7299: while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
7300: {
7301: if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
7302: break;
7303: }
7304:
7305: WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT));
7306: while (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
7307: {
7308: RD_HARPOON(p_port+hp_fifodata_0);
7309: }
7310:
7311: if ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
7312: {
7313: WR_HARPOON(p_port+hp_autostart_0, (AUTO_IMMED+DISCONNECT_START));
7314: while (!(RDW_HARPOON((p_port+hp_intstat)) & AUTO_INT)) {}
7315:
7316: if (RDW_HARPOON((p_port+hp_intstat)) & (ICMD_COMP | ITAR_DISC))
7317: while (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RSEL))) ;
7318: }
7319: }
7320:
7321:
7322: /*---------------------------------------------------------------------
7323: *
7324: * Function: schkdd
7325: *
7326: * Description: Make sure data has been flushed from both FIFOs and abort
7327: * the operations if necessary.
7328: *
7329: *---------------------------------------------------------------------*/
7330:
7331: #if defined(DOS)
7332: void schkdd(USHORT port, UCHAR p_card)
7333: #else
7334: void schkdd(ULONG port, UCHAR p_card)
7335: #endif
7336: {
7337: USHORT TimeOutLoop;
7338: UCHAR sPhase;
7339:
7340: PSCCB currSCCB;
7341:
7342: currSCCB = BL_Card[p_card].currentSCCB;
7343:
7344:
7345: if ((currSCCB->Sccb_scsistat != DATA_OUT_ST) &&
7346: (currSCCB->Sccb_scsistat != DATA_IN_ST)) {
7347: return;
7348: }
7349:
7350:
7351:
7352: if (currSCCB->Sccb_XferState & F_ODD_BALL_CNT)
7353: {
7354:
7355: currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt-1);
7356:
7357: currSCCB->Sccb_XferCnt = 1;
7358:
7359: currSCCB->Sccb_XferState &= ~F_ODD_BALL_CNT;
7360: WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
7361: WR_HARPOON(port+hp_xferstat, 0x00);
7362: }
7363:
7364: else
7365: {
7366:
7367: currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
7368:
7369: currSCCB->Sccb_XferCnt = 0;
7370: }
7371:
7372: if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
7373: (currSCCB->HostStatus == SCCB_COMPLETE)) {
7374:
7375: currSCCB->HostStatus = SCCB_PARITY_ERR;
7376: WRW_HARPOON((port+hp_intstat), PARITY);
7377: }
7378:
7379:
7380: hostDataXferAbort(port,p_card,currSCCB);
7381:
7382:
7383: while (RD_HARPOON(port+hp_scsisig) & SCSI_ACK) {}
7384:
7385: TimeOutLoop = 0;
7386:
7387: while(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)
7388: {
7389: if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) {
7390: return;
7391: }
7392: if (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) {
7393: break;
7394: }
7395: if (RDW_HARPOON((port+hp_intstat)) & RESET) {
7396: return;
7397: }
7398: if ((RD_HARPOON(port+hp_scsisig) & SCSI_REQ) || (TimeOutLoop++>0x3000) )
7399: break;
7400: }
7401:
7402: sPhase = RD_HARPOON(port+hp_scsisig) & (SCSI_BSY | S_SCSI_PHZ);
7403: if ((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) ||
7404: (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) ||
7405: (sPhase == (SCSI_BSY | S_DATAO_PH)) ||
7406: (sPhase == (SCSI_BSY | S_DATAI_PH)))
7407: {
7408:
7409: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
7410:
7411: if (!(currSCCB->Sccb_XferState & F_ALL_XFERRED))
7412: {
7413: if (currSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
7414: phaseDataIn(port,p_card);
7415: }
7416:
7417: else {
7418: phaseDataOut(port,p_card);
7419: }
7420: }
7421: else
7422: {
7423: sxfrp(port,p_card);
7424: if (!(RDW_HARPOON((port+hp_intstat)) &
7425: (BUS_FREE | ICMD_COMP | ITAR_DISC | RESET)))
7426: {
7427: WRW_HARPOON((port+hp_intstat), AUTO_INT);
7428: phaseDecode(port,p_card);
7429: }
7430: }
7431:
7432: }
7433:
7434: else {
7435: WR_HARPOON(port+hp_portctrl_0, 0x00);
7436: }
7437: }
7438:
7439:
7440: /*---------------------------------------------------------------------
7441: *
7442: * Function: sinits
7443: *
7444: * Description: Setup SCCB manager fields in this SCCB.
7445: *
7446: *---------------------------------------------------------------------*/
7447:
7448: void sinits(PSCCB p_sccb, UCHAR p_card)
7449: {
7450: PSCCBMgr_tar_info currTar_Info;
7451:
7452: if((p_sccb->TargID > MAX_SCSI_TAR) || (p_sccb->Lun > MAX_LUN))
7453: {
7454: return;
7455: }
7456: currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
7457:
7458: p_sccb->Sccb_XferState = 0x00;
7459: p_sccb->Sccb_XferCnt = p_sccb->DataLength;
7460:
7461: if ((p_sccb->OperationCode == SCATTER_GATHER_COMMAND) ||
7462: (p_sccb->OperationCode == RESIDUAL_SG_COMMAND)) {
7463:
7464: p_sccb->Sccb_SGoffset = 0;
7465: p_sccb->Sccb_XferState = F_SG_XFER;
7466: p_sccb->Sccb_XferCnt = 0x00;
7467: }
7468:
7469: if (p_sccb->DataLength == 0x00)
7470:
7471: p_sccb->Sccb_XferState |= F_ALL_XFERRED;
7472:
7473: if (p_sccb->ControlByte & F_USE_CMD_Q)
7474: {
7475: if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
7476: p_sccb->ControlByte &= ~F_USE_CMD_Q;
7477:
7478: else
7479: currTar_Info->TarStatus |= TAG_Q_TRYING;
7480: }
7481:
7482: /* For !single SCSI device in system & device allow Disconnect
7483: or command is tag_q type then send Cmd with Disconnect Enable
7484: else send Cmd with Disconnect Disable */
7485:
7486: /*
7487: if (((!(BL_Card[p_card].globalFlags & F_SINGLE_DEVICE)) &&
7488: (currTar_Info->TarStatus & TAR_ALLOW_DISC)) ||
7489: (currTar_Info->TarStatus & TAG_Q_TRYING)) {
7490: */
7491: if ((currTar_Info->TarStatus & TAR_ALLOW_DISC) ||
7492: (currTar_Info->TarStatus & TAG_Q_TRYING)) {
7493: p_sccb->Sccb_idmsg = (UCHAR)(SMIDENT | DISC_PRIV) | p_sccb->Lun;
7494: }
7495:
7496: else {
7497:
7498: p_sccb->Sccb_idmsg = (UCHAR)SMIDENT | p_sccb->Lun;
7499: }
7500:
7501: p_sccb->HostStatus = 0x00;
7502: p_sccb->TargetStatus = 0x00;
7503: p_sccb->Sccb_tag = 0x00;
7504: p_sccb->Sccb_MGRFlags = 0x00;
7505: p_sccb->Sccb_sgseg = 0x00;
7506: p_sccb->Sccb_ATC = 0x00;
7507: p_sccb->Sccb_savedATC = 0x00;
7508: /*
7509: p_sccb->SccbVirtDataPtr = 0x00;
7510: p_sccb->Sccb_forwardlink = NULL;
7511: p_sccb->Sccb_backlink = NULL;
7512: */
7513: p_sccb->Sccb_scsistat = BUS_FREE_ST;
7514: p_sccb->SccbStatus = SCCB_IN_PROCESS;
7515: p_sccb->Sccb_scsimsg = SMNO_OP;
7516:
7517: }
7518:
7519:
7520: /*----------------------------------------------------------------------
7521: *
7522: *
7523: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
7524: *
7525: * This file is available under both the GNU General Public License
7526: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
7527: *
7528: * $Workfile: phase.c $
7529: *
7530: * Description: Functions to intially handle the SCSI bus phase when
7531: * the target asserts request (and the automation is not
7532: * enabled to handle the situation).
7533: *
7534: * $Date: 1999/04/26 05:53:56 $
7535: *
7536: * $Revision: 1.1 $
7537: *
7538: *----------------------------------------------------------------------*/
7539:
7540: /*#include <globals.h>*/
7541:
7542: #if (FW_TYPE==_UCB_MGR_)
7543: /*#include <budi.h>*/
7544: #endif
7545:
7546: /*#include <sccbmgr.h>*/
7547: /*#include <blx30.h>*/
7548: /*#include <target.h>*/
7549: /*#include <scsi2.h>*/
7550: /*#include <harpoon.h>*/
7551:
7552:
7553: /*
7554: extern SCCBCARD BL_Card[MAX_CARDS];
7555: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
7556:
7557: #if defined(OS2)
7558: extern void (far *s_PhaseTbl[8]) (ULONG, UCHAR);
7559: #else
7560: #if defined(DOS)
7561: extern void (*s_PhaseTbl[8]) (USHORT, UCHAR);
7562: #else
7563: extern void (*s_PhaseTbl[8]) (ULONG, UCHAR);
7564: #endif
7565: #endif
7566: */
7567:
7568: /*---------------------------------------------------------------------
7569: *
7570: * Function: Phase Decode
7571: *
7572: * Description: Determine the phase and call the appropriate function.
7573: *
7574: *---------------------------------------------------------------------*/
7575:
7576: #if defined(DOS)
7577: void phaseDecode(USHORT p_port, UCHAR p_card)
7578: #else
7579: void phaseDecode(ULONG p_port, UCHAR p_card)
7580: #endif
7581: {
7582: unsigned char phase_ref;
7583: #if defined(OS2)
7584: void (far *phase) (ULONG, UCHAR);
7585: #else
7586: #if defined(DOS)
7587: void (*phase) (USHORT, UCHAR);
7588: #else
7589: void (*phase) (ULONG, UCHAR);
7590: #endif
7591: #endif
7592:
7593:
7594: DISABLE_AUTO(p_port);
7595:
7596: phase_ref = (UCHAR) (RD_HARPOON(p_port+hp_scsisig) & S_SCSI_PHZ);
7597:
7598: phase = s_PhaseTbl[phase_ref];
7599:
7600: (*phase)(p_port, p_card); /* Call the correct phase func */
7601: }
7602:
7603:
7604:
7605: /*---------------------------------------------------------------------
7606: *
7607: * Function: Data Out Phase
7608: *
7609: * Description: Start up both the BusMaster and Xbow.
7610: *
7611: *---------------------------------------------------------------------*/
7612:
7613: #if defined(OS2)
7614: void far phaseDataOut(ULONG port, UCHAR p_card)
7615: #else
7616: #if defined(DOS)
7617: void phaseDataOut(USHORT port, UCHAR p_card)
7618: #else
7619: void phaseDataOut(ULONG port, UCHAR p_card)
7620: #endif
7621: #endif
7622: {
7623:
7624: PSCCB currSCCB;
7625:
7626: currSCCB = BL_Card[p_card].currentSCCB;
7627: if (currSCCB == NULL)
7628: {
7629: return; /* Exit if No SCCB record */
7630: }
7631:
7632: currSCCB->Sccb_scsistat = DATA_OUT_ST;
7633: currSCCB->Sccb_XferState &= ~(F_HOST_XFER_DIR | F_NO_DATA_YET);
7634:
7635: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
7636:
7637: WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
7638:
7639: WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START));
7640:
7641: dataXferProcessor(port, &BL_Card[p_card]);
7642:
7643: #if defined(NOBUGBUG)
7644: if (RDW_HARPOON((port+hp_intstat)) & XFER_CNT_0)
7645: WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
7646:
7647: #endif
7648:
7649:
7650: if (currSCCB->Sccb_XferCnt == 0) {
7651:
7652:
7653: if ((currSCCB->ControlByte & SCCB_DATA_XFER_OUT) &&
7654: (currSCCB->HostStatus == SCCB_COMPLETE))
7655: currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
7656:
7657: sxfrp(port,p_card);
7658: if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET)))
7659: phaseDecode(port,p_card);
7660: }
7661: }
7662:
7663:
7664: /*---------------------------------------------------------------------
7665: *
7666: * Function: Data In Phase
7667: *
7668: * Description: Startup the BusMaster and the XBOW.
7669: *
7670: *---------------------------------------------------------------------*/
7671:
7672: #if defined(OS2)
7673: void far phaseDataIn(ULONG port, UCHAR p_card)
7674: #else
7675: #if defined(DOS)
7676: void phaseDataIn(USHORT port, UCHAR p_card)
7677: #else
7678: void phaseDataIn(ULONG port, UCHAR p_card)
7679: #endif
7680: #endif
7681: {
7682:
7683: PSCCB currSCCB;
7684:
7685: currSCCB = BL_Card[p_card].currentSCCB;
7686:
7687: if (currSCCB == NULL)
7688: {
7689: return; /* Exit if No SCCB record */
7690: }
7691:
7692:
7693: currSCCB->Sccb_scsistat = DATA_IN_ST;
7694: currSCCB->Sccb_XferState |= F_HOST_XFER_DIR;
7695: currSCCB->Sccb_XferState &= ~F_NO_DATA_YET;
7696:
7697: WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
7698:
7699: WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
7700:
7701: WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START));
7702:
7703: dataXferProcessor(port, &BL_Card[p_card]);
7704:
7705: if (currSCCB->Sccb_XferCnt == 0) {
7706:
7707:
7708: if ((currSCCB->ControlByte & SCCB_DATA_XFER_IN) &&
7709: (currSCCB->HostStatus == SCCB_COMPLETE))
7710: currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
7711:
7712: sxfrp(port,p_card);
7713: if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET)))
7714: phaseDecode(port,p_card);
7715:
7716: }
7717: }
7718:
7719: /*---------------------------------------------------------------------
7720: *
7721: * Function: Command Phase
7722: *
7723: * Description: Load the CDB into the automation and start it up.
7724: *
7725: *---------------------------------------------------------------------*/
7726:
7727: #if defined(OS2)
7728: void far phaseCommand(ULONG p_port, UCHAR p_card)
7729: #else
7730: #if defined(DOS)
7731: void phaseCommand(USHORT p_port, UCHAR p_card)
7732: #else
7733: void phaseCommand(ULONG p_port, UCHAR p_card)
7734: #endif
7735: #endif
7736: {
7737: PSCCB currSCCB;
7738: #if defined(DOS)
7739: USHORT cdb_reg;
7740: #else
7741: ULONG cdb_reg;
7742: #endif
7743: UCHAR i;
7744:
7745: currSCCB = BL_Card[p_card].currentSCCB;
7746:
7747: if (currSCCB->OperationCode == RESET_COMMAND) {
7748:
7749: currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
7750: currSCCB->CdbLength = SIX_BYTE_CMD;
7751: }
7752:
7753: WR_HARPOON(p_port+hp_scsisig, 0x00);
7754:
7755: ARAM_ACCESS(p_port);
7756:
7757:
7758: cdb_reg = p_port + CMD_STRT;
7759:
7760: for (i=0; i < currSCCB->CdbLength; i++) {
7761:
7762: if (currSCCB->OperationCode == RESET_COMMAND)
7763:
7764: WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + 0x00));
7765:
7766: else
7767: WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + currSCCB->Cdb[i]));
7768: cdb_reg +=2;
7769: }
7770:
7771: if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
7772: WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP));
7773:
7774: WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT));
7775:
7776: currSCCB->Sccb_scsistat = COMMAND_ST;
7777:
7778: WR_HARPOON(p_port+hp_autostart_3, (AUTO_IMMED | CMD_ONLY_STRT));
7779: SGRAM_ACCESS(p_port);
7780: }
7781:
7782:
7783: /*---------------------------------------------------------------------
7784: *
7785: * Function: Status phase
7786: *
7787: * Description: Bring in the status and command complete message bytes
7788: *
7789: *---------------------------------------------------------------------*/
7790:
7791: #if defined(OS2)
7792: void far phaseStatus(ULONG port, UCHAR p_card)
7793: #else
7794: #if defined(DOS)
7795: void phaseStatus(USHORT port, UCHAR p_card)
7796: #else
7797: void phaseStatus(ULONG port, UCHAR p_card)
7798: #endif
7799: #endif
7800: {
7801: /* Start-up the automation to finish off this command and let the
7802: isr handle the interrupt for command complete when it comes in.
7803: We could wait here for the interrupt to be generated?
7804: */
7805:
7806: WR_HARPOON(port+hp_scsisig, 0x00);
7807:
7808: WR_HARPOON(port+hp_autostart_0, (AUTO_IMMED+END_DATA_START));
7809: }
7810:
7811:
7812: /*---------------------------------------------------------------------
7813: *
7814: * Function: Phase Message Out
7815: *
7816: * Description: Send out our message (if we have one) and handle whatever
7817: * else is involed.
7818: *
7819: *---------------------------------------------------------------------*/
7820:
7821: #if defined(OS2)
7822: void far phaseMsgOut(ULONG port, UCHAR p_card)
7823: #else
7824: #if defined(DOS)
7825: void phaseMsgOut(USHORT port, UCHAR p_card)
7826: #else
7827: void phaseMsgOut(ULONG port, UCHAR p_card)
7828: #endif
7829: #endif
7830: {
7831: UCHAR message,scsiID;
7832: PSCCB currSCCB;
7833: PSCCBMgr_tar_info currTar_Info;
7834:
7835: currSCCB = BL_Card[p_card].currentSCCB;
7836:
7837: if (currSCCB != NULL) {
7838:
7839: message = currSCCB->Sccb_scsimsg;
7840: scsiID = currSCCB->TargID;
7841:
7842: if (message == SMDEV_RESET)
7843: {
7844:
7845:
7846: currTar_Info = &sccbMgrTbl[p_card][scsiID];
7847: currTar_Info->TarSyncCtrl = 0;
7848: sssyncv(port, scsiID, NARROW_SCSI,currTar_Info);
7849:
7850: if (sccbMgrTbl[p_card][scsiID].TarEEValue & EE_SYNC_MASK)
7851: {
7852:
7853: sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_SYNC_MASK;
7854:
7855: }
7856:
7857: if (sccbMgrTbl[p_card][scsiID].TarEEValue & EE_WIDE_SCSI)
7858: {
7859:
7860: sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_WIDE_MASK;
7861: }
7862:
7863:
7864: queueFlushSccb(p_card,SCCB_COMPLETE);
7865: SccbMgrTableInitTarget(p_card,scsiID);
7866: }
7867: else if (currSCCB->Sccb_scsistat == ABORT_ST)
7868: {
7869: currSCCB->HostStatus = SCCB_COMPLETE;
7870: if(BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] != NULL)
7871: {
7872: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
7873: sccbMgrTbl[p_card][scsiID].TarTagQ_Cnt--;
7874: }
7875:
7876: }
7877:
7878: else if (currSCCB->Sccb_scsistat < COMMAND_ST)
7879: {
7880:
7881:
7882: if(message == SMNO_OP)
7883: {
7884: currSCCB->Sccb_MGRFlags |= F_DEV_SELECTED;
7885:
7886: ssel(port,p_card);
7887: return;
7888: }
7889: }
7890: else
7891: {
7892:
7893:
7894: if (message == SMABORT)
7895:
7896: queueFlushSccb(p_card,SCCB_COMPLETE);
7897: }
7898:
7899: }
7900: else
7901: {
7902: message = SMABORT;
7903: }
7904:
7905: WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0));
7906:
7907:
7908: WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN);
7909:
7910: WR_HARPOON(port+hp_scsidata_0,message);
7911:
7912: WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
7913:
7914: ACCEPT_MSG(port);
7915:
7916: WR_HARPOON(port+hp_portctrl_0, 0x00);
7917:
7918: if ((message == SMABORT) || (message == SMDEV_RESET) ||
7919: (message == SMABORT_TAG) )
7920: {
7921:
7922: while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {}
7923:
7924: if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE)
7925: {
7926: WRW_HARPOON((port+hp_intstat), BUS_FREE);
7927:
7928: if (currSCCB != NULL)
7929: {
7930:
7931: if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
7932: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
7933: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
7934: else
7935: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
7936:
7937: queueCmdComplete(&BL_Card[p_card],currSCCB, p_card);
7938: }
7939:
7940: else
7941: {
7942: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
7943: }
7944: }
7945:
7946: else
7947: {
7948:
7949: sxfrp(port,p_card);
7950: }
7951: }
7952:
7953: else
7954: {
7955:
7956: if(message == SMPARITY)
7957: {
7958: currSCCB->Sccb_scsimsg = SMNO_OP;
7959: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
7960: }
7961: else
7962: {
7963: sxfrp(port,p_card);
7964: }
7965: }
7966: }
7967:
7968:
7969: /*---------------------------------------------------------------------
7970: *
7971: * Function: Message In phase
7972: *
7973: * Description: Bring in the message and determine what to do with it.
7974: *
7975: *---------------------------------------------------------------------*/
7976:
7977: #if defined(OS2)
7978: void far phaseMsgIn(ULONG port, UCHAR p_card)
7979: #else
7980: #if defined(DOS)
7981: void phaseMsgIn(USHORT port, UCHAR p_card)
7982: #else
7983: void phaseMsgIn(ULONG port, UCHAR p_card)
7984: #endif
7985: #endif
7986: {
7987: UCHAR message;
7988: PSCCB currSCCB;
7989:
7990: currSCCB = BL_Card[p_card].currentSCCB;
7991:
7992: if (BL_Card[p_card].globalFlags & F_HOST_XFER_ACT)
7993: {
7994:
7995: phaseChkFifo(port, p_card);
7996: }
7997:
7998: message = RD_HARPOON(port+hp_scsidata_0);
7999: if ((message == SMDISC) || (message == SMSAVE_DATA_PTR))
8000: {
8001:
8002: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+END_DATA_START));
8003:
8004: }
8005:
8006: else
8007: {
8008:
8009: message = sfm(port,currSCCB);
8010: if (message)
8011: {
8012:
8013:
8014: sdecm(message,port,p_card);
8015:
8016: }
8017: else
8018: {
8019: if(currSCCB->Sccb_scsimsg != SMPARITY)
8020: ACCEPT_MSG(port);
8021: WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
8022: }
8023: }
8024:
8025: }
8026:
8027:
8028: /*---------------------------------------------------------------------
8029: *
8030: * Function: Illegal phase
8031: *
8032: * Description: Target switched to some illegal phase, so all we can do
8033: * is report an error back to the host (if that is possible)
8034: * and send an ABORT message to the misbehaving target.
8035: *
8036: *---------------------------------------------------------------------*/
8037:
8038: #if defined(OS2)
8039: void far phaseIllegal(ULONG port, UCHAR p_card)
8040: #else
8041: #if defined(DOS)
8042: void phaseIllegal(USHORT port, UCHAR p_card)
8043: #else
8044: void phaseIllegal(ULONG port, UCHAR p_card)
8045: #endif
8046: #endif
8047: {
8048: PSCCB currSCCB;
8049:
8050: currSCCB = BL_Card[p_card].currentSCCB;
8051:
8052: WR_HARPOON(port+hp_scsisig, RD_HARPOON(port+hp_scsisig));
8053: if (currSCCB != NULL) {
8054:
8055: currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
8056: currSCCB->Sccb_scsistat = ABORT_ST;
8057: currSCCB->Sccb_scsimsg = SMABORT;
8058: }
8059:
8060: ACCEPT_MSG_ATN(port);
8061: }
8062:
8063:
8064:
8065: /*---------------------------------------------------------------------
8066: *
8067: * Function: Phase Check FIFO
8068: *
8069: * Description: Make sure data has been flushed from both FIFOs and abort
8070: * the operations if necessary.
8071: *
8072: *---------------------------------------------------------------------*/
8073:
8074: #if defined(DOS)
8075: void phaseChkFifo(USHORT port, UCHAR p_card)
8076: #else
8077: void phaseChkFifo(ULONG port, UCHAR p_card)
8078: #endif
8079: {
8080: ULONG xfercnt;
8081: PSCCB currSCCB;
8082:
8083: currSCCB = BL_Card[p_card].currentSCCB;
8084:
8085: if (currSCCB->Sccb_scsistat == DATA_IN_ST)
8086: {
8087:
8088: while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) &&
8089: (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {}
8090:
8091:
8092: if (!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY))
8093: {
8094: currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
8095:
8096: currSCCB->Sccb_XferCnt = 0;
8097:
8098: if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
8099: (currSCCB->HostStatus == SCCB_COMPLETE))
8100: {
8101: currSCCB->HostStatus = SCCB_PARITY_ERR;
8102: WRW_HARPOON((port+hp_intstat), PARITY);
8103: }
8104:
8105: hostDataXferAbort(port,p_card,currSCCB);
8106:
8107: dataXferProcessor(port, &BL_Card[p_card]);
8108:
8109: while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) &&
8110: (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {}
8111:
8112: }
8113: } /*End Data In specific code. */
8114:
8115:
8116:
8117: #if defined(DOS)
8118: asm { mov dx,port;
8119: add dx,hp_xfercnt_2;
8120: in al,dx;
8121: dec dx;
8122: xor ah,ah;
8123: mov word ptr xfercnt+2,ax;
8124: in al,dx;
8125: dec dx;
8126: mov ah,al;
8127: in al,dx;
8128: mov word ptr xfercnt,ax;
8129: }
8130: #else
8131: GET_XFER_CNT(port,xfercnt);
8132: #endif
8133:
8134:
8135: WR_HARPOON(port+hp_xfercnt_0, 0x00);
8136:
8137:
8138: WR_HARPOON(port+hp_portctrl_0, 0x00);
8139:
8140: currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt - xfercnt);
8141:
8142: currSCCB->Sccb_XferCnt = xfercnt;
8143:
8144: if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
8145: (currSCCB->HostStatus == SCCB_COMPLETE)) {
8146:
8147: currSCCB->HostStatus = SCCB_PARITY_ERR;
8148: WRW_HARPOON((port+hp_intstat), PARITY);
8149: }
8150:
8151:
8152: hostDataXferAbort(port,p_card,currSCCB);
8153:
8154:
8155: WR_HARPOON(port+hp_fifowrite, 0x00);
8156: WR_HARPOON(port+hp_fiforead, 0x00);
8157: WR_HARPOON(port+hp_xferstat, 0x00);
8158:
8159: WRW_HARPOON((port+hp_intstat), XFER_CNT_0);
8160: }
8161:
8162:
8163: /*---------------------------------------------------------------------
8164: *
8165: * Function: Phase Bus Free
8166: *
8167: * Description: We just went bus free so figure out if it was
8168: * because of command complete or from a disconnect.
8169: *
8170: *---------------------------------------------------------------------*/
8171: #if defined(DOS)
8172: void phaseBusFree(USHORT port, UCHAR p_card)
8173: #else
8174: void phaseBusFree(ULONG port, UCHAR p_card)
8175: #endif
8176: {
8177: PSCCB currSCCB;
8178:
8179: currSCCB = BL_Card[p_card].currentSCCB;
8180:
8181: if (currSCCB != NULL)
8182: {
8183:
8184: DISABLE_AUTO(port);
8185:
8186:
8187: if (currSCCB->OperationCode == RESET_COMMAND)
8188: {
8189:
8190: if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8191: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
8192: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
8193: else
8194: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
8195:
8196: queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
8197:
8198: queueSearchSelect(&BL_Card[p_card],p_card);
8199:
8200: }
8201:
8202: else if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
8203: {
8204: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
8205: (UCHAR)SYNC_SUPPORTED;
8206: sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK;
8207: }
8208:
8209: else if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
8210: {
8211: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
8212: (sccbMgrTbl[p_card][currSCCB->TargID].
8213: TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
8214:
8215: sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI;
8216: }
8217:
8218: #if !defined(DOS)
8219: else if(currSCCB->Sccb_scsistat == SELECT_Q_ST)
8220: {
8221: /* Make sure this is not a phony BUS_FREE. If we were
8222: reselected or if BUSY is NOT on then this is a
8223: valid BUS FREE. SRR Wednesday, 5/10/1995. */
8224:
8225: if ((!(RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ||
8226: (RDW_HARPOON((port+hp_intstat)) & RSEL))
8227: {
8228: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_TAG_Q_MASK;
8229: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |= TAG_Q_REJECT;
8230: }
8231:
8232: else
8233: {
8234: return;
8235: }
8236: }
8237: #endif
8238:
8239: else
8240: {
8241:
8242: currSCCB->Sccb_scsistat = BUS_FREE_ST;
8243:
8244: if (!currSCCB->HostStatus)
8245: {
8246: currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
8247: }
8248:
8249: if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8250: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
8251: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
8252: else
8253: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
8254:
8255: queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
8256: return;
8257: }
8258:
8259:
8260: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
8261:
8262: } /*end if !=null */
8263: }
8264:
8265:
8266:
8267:
8268: /*----------------------------------------------------------------------
8269: *
8270: *
8271: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
8272: *
8273: * This file is available under both the GNU General Public License
8274: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
8275: *
8276: * $Workfile: automate.c $
8277: *
8278: * Description: Functions relating to programming the automation of
8279: * the HARPOON.
8280: *
8281: * $Date: 1999/04/26 05:53:56 $
8282: *
8283: * $Revision: 1.1 $
8284: *
8285: *----------------------------------------------------------------------*/
8286:
8287: /*#include <globals.h>*/
8288:
8289: #if (FW_TYPE==_UCB_MGR_)
8290: /*#include <budi.h>*/
8291: #endif
8292:
8293: /*#include <sccbmgr.h>*/
8294: /*#include <blx30.h>*/
8295: /*#include <target.h>*/
8296: /*#include <scsi2.h>*/
8297: /*#include <harpoon.h>*/
8298:
8299: /*
8300: extern SCCBCARD BL_Card[MAX_CARDS];
8301: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
8302: extern SCCBCARD BL_Card[MAX_CARDS];
8303: */
8304:
8305: /*---------------------------------------------------------------------
8306: *
8307: * Function: Auto Load Default Map
8308: *
8309: * Description: Load the Automation RAM with the defualt map values.
8310: *
8311: *---------------------------------------------------------------------*/
8312: #if defined(DOS)
8313: void autoLoadDefaultMap(USHORT p_port)
8314: #else
8315: void autoLoadDefaultMap(ULONG p_port)
8316: #endif
8317: {
8318: #if defined(DOS)
8319: USHORT map_addr;
8320: #else
8321: ULONG map_addr;
8322: #endif
8323:
8324: ARAM_ACCESS(p_port);
8325: map_addr = p_port + hp_aramBase;
8326:
8327: WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0xC0)); /*ID MESSAGE */
8328: map_addr +=2;
8329: WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x20)); /*SIMPLE TAG QUEUEING MSG */
8330: map_addr +=2;
8331: WRW_HARPOON(map_addr, RAT_OP); /*RESET ATTENTION */
8332: map_addr +=2;
8333: WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x00)); /*TAG ID MSG */
8334: map_addr +=2;
8335: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 0 */
8336: map_addr +=2;
8337: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 1 */
8338: map_addr +=2;
8339: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 2 */
8340: map_addr +=2;
8341: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 3 */
8342: map_addr +=2;
8343: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 4 */
8344: map_addr +=2;
8345: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 5 */
8346: map_addr +=2;
8347: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 6 */
8348: map_addr +=2;
8349: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 7 */
8350: map_addr +=2;
8351: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 8 */
8352: map_addr +=2;
8353: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 9 */
8354: map_addr +=2;
8355: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 10 */
8356: map_addr +=2;
8357: WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 11 */
8358: map_addr +=2;
8359: WRW_HARPOON(map_addr, (CPE_OP+ADATA_OUT+ DINT)); /*JUMP IF DATA OUT */
8360: map_addr +=2;
8361: WRW_HARPOON(map_addr, (TCB_OP+FIFO_0+ DI)); /*JUMP IF NO DATA IN FIFO */
8362: map_addr +=2; /*This means AYNC DATA IN */
8363: WRW_HARPOON(map_addr, (SSI_OP+ SSI_IDO_STRT)); /*STOP AND INTERRUPT */
8364: map_addr +=2;
8365: WRW_HARPOON(map_addr, (CPE_OP+ADATA_IN+DINT)); /*JUMP IF NOT DATA IN PHZ */
8366: map_addr +=2;
8367: WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK 4 DATA IN */
8368: map_addr +=2;
8369: WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x02)); /*SAVE DATA PTR MSG? */
8370: map_addr +=2;
8371: WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ DC)); /*GO CHECK FOR DISCONNECT MSG */
8372: map_addr +=2;
8373: WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR1)); /*SAVE DATA PTRS MSG */
8374: map_addr +=2;
8375: WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK DATA IN */
8376: map_addr +=2;
8377: WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x04)); /*DISCONNECT MSG? */
8378: map_addr +=2;
8379: WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ UNKNWN));/*UKNKNOWN MSG */
8380: map_addr +=2;
8381: WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*XFER DISCONNECT MSG */
8382: map_addr +=2;
8383: WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITAR_DISC));/*STOP AND INTERRUPT */
8384: map_addr +=2;
8385: WRW_HARPOON(map_addr, (CPN_OP+ASTATUS+ UNKNWN));/*JUMP IF NOT STATUS PHZ. */
8386: map_addr +=2;
8387: WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR0)); /*GET STATUS BYTE */
8388: map_addr +=2;
8389: WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ CC)); /*ERROR IF NOT MSG IN PHZ */
8390: map_addr +=2;
8391: WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x00)); /*CHECK FOR CMD COMPLETE MSG. */
8392: map_addr +=2;
8393: WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ CC)); /*ERROR IF NOT CMD COMPLETE MSG. */
8394: map_addr +=2;
8395: WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*GET CMD COMPLETE MSG */
8396: map_addr +=2;
8397: WRW_HARPOON(map_addr, (SSI_OP+ SSI_ICMD_COMP));/*END OF COMMAND */
8398: map_addr +=2;
8399:
8400: WRW_HARPOON(map_addr, (SSI_OP+ SSI_IUNKWN)); /*RECEIVED UNKNOWN MSG BYTE */
8401: map_addr +=2;
8402: WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
8403: map_addr +=2;
8404: WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITICKLE)); /*BIOS Tickled the Mgr */
8405: map_addr +=2;
8406: WRW_HARPOON(map_addr, (SSI_OP+ SSI_IRFAIL)); /*EXPECTED ID/TAG MESSAGES AND */
8407: map_addr +=2; /* DIDN'T GET ONE */
8408: WRW_HARPOON(map_addr, (CRR_OP+AR3+ S_IDREG)); /* comp SCSI SEL ID & AR3*/
8409: map_addr +=2;
8410: WRW_HARPOON(map_addr, (BRH_OP+EQUAL+ 0x00)); /*SEL ID OK then Conti. */
8411: map_addr +=2;
8412: WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
8413:
8414:
8415:
8416: SGRAM_ACCESS(p_port);
8417: }
8418:
8419: /*---------------------------------------------------------------------
8420: *
8421: * Function: Auto Command Complete
8422: *
8423: * Description: Post command back to host and find another command
8424: * to execute.
8425: *
8426: *---------------------------------------------------------------------*/
8427:
8428: #if defined(DOS)
8429: void autoCmdCmplt(USHORT p_port, UCHAR p_card)
8430: #else
8431: void autoCmdCmplt(ULONG p_port, UCHAR p_card)
8432: #endif
8433: {
8434: PSCCB currSCCB;
8435: UCHAR status_byte;
8436:
8437: currSCCB = BL_Card[p_card].currentSCCB;
8438:
8439: status_byte = RD_HARPOON(p_port+hp_gp_reg_0);
8440:
8441: sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA = FALSE;
8442:
8443: if (status_byte != SSGOOD) {
8444:
8445: if (status_byte == SSQ_FULL) {
8446:
8447:
8448: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8449: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
8450: {
8451: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
8452: if(BL_Card[p_card].discQCount != 0)
8453: BL_Card[p_card].discQCount--;
8454: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
8455: }
8456: else
8457: {
8458: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
8459: if(currSCCB->Sccb_tag)
8460: {
8461: if(BL_Card[p_card].discQCount != 0)
8462: BL_Card[p_card].discQCount--;
8463: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
8464: }else
8465: {
8466: if(BL_Card[p_card].discQCount != 0)
8467: BL_Card[p_card].discQCount--;
8468: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
8469: }
8470: }
8471:
8472: currSCCB->Sccb_MGRFlags |= F_STATUSLOADED;
8473:
8474: queueSelectFail(&BL_Card[p_card],p_card);
8475:
8476: return;
8477: }
8478:
8479: if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
8480: {
8481: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
8482: (UCHAR)SYNC_SUPPORTED;
8483:
8484: sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK;
8485: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
8486:
8487: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8488: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
8489: {
8490: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
8491: if(BL_Card[p_card].discQCount != 0)
8492: BL_Card[p_card].discQCount--;
8493: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
8494: }
8495: else
8496: {
8497: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
8498: if(currSCCB->Sccb_tag)
8499: {
8500: if(BL_Card[p_card].discQCount != 0)
8501: BL_Card[p_card].discQCount--;
8502: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
8503: }else
8504: {
8505: if(BL_Card[p_card].discQCount != 0)
8506: BL_Card[p_card].discQCount--;
8507: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
8508: }
8509: }
8510: return;
8511:
8512: }
8513:
8514: if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
8515: {
8516:
8517: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
8518: (sccbMgrTbl[p_card][currSCCB->TargID].
8519: TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
8520:
8521: sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI;
8522: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
8523:
8524: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8525: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
8526: {
8527: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
8528: if(BL_Card[p_card].discQCount != 0)
8529: BL_Card[p_card].discQCount--;
8530: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
8531: }
8532: else
8533: {
8534: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
8535: if(currSCCB->Sccb_tag)
8536: {
8537: if(BL_Card[p_card].discQCount != 0)
8538: BL_Card[p_card].discQCount--;
8539: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
8540: }else
8541: {
8542: if(BL_Card[p_card].discQCount != 0)
8543: BL_Card[p_card].discQCount--;
8544: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
8545: }
8546: }
8547: return;
8548:
8549: }
8550:
8551: if (status_byte == SSCHECK)
8552: {
8553: if(BL_Card[p_card].globalFlags & F_DO_RENEGO)
8554: {
8555: if (sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_SYNC_MASK)
8556: {
8557: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_SYNC_MASK;
8558: }
8559: if (sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_WIDE_SCSI)
8560: {
8561: sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_WIDE_MASK;
8562: }
8563: }
8564: }
8565:
8566: if (!(currSCCB->Sccb_XferState & F_AUTO_SENSE)) {
8567:
8568: currSCCB->SccbStatus = SCCB_ERROR;
8569: currSCCB->TargetStatus = status_byte;
8570:
8571: if (status_byte == SSCHECK) {
8572:
8573: sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA
8574: = TRUE;
8575:
8576:
8577: #if (FW_TYPE==_SCCB_MGR_)
8578: if (currSCCB->RequestSenseLength != NO_AUTO_REQUEST_SENSE) {
8579:
8580: if (currSCCB->RequestSenseLength == 0)
8581: currSCCB->RequestSenseLength = 14;
8582:
8583: ssenss(&BL_Card[p_card]);
8584: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
8585:
8586: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8587: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
8588: {
8589: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
8590: if(BL_Card[p_card].discQCount != 0)
8591: BL_Card[p_card].discQCount--;
8592: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
8593: }
8594: else
8595: {
8596: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
8597: if(currSCCB->Sccb_tag)
8598: {
8599: if(BL_Card[p_card].discQCount != 0)
8600: BL_Card[p_card].discQCount--;
8601: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
8602: }else
8603: {
8604: if(BL_Card[p_card].discQCount != 0)
8605: BL_Card[p_card].discQCount--;
8606: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
8607: }
8608: }
8609: return;
8610: }
8611: #else
8612: if ((!(currSCCB->Sccb_ucb_ptr->UCB_opcode & OPC_NO_AUTO_SENSE)) &&
8613: (currSCCB->RequestSenseLength))
8614: {
8615: ssenss(&BL_Card[p_card]);
8616: BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
8617:
8618: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8619: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
8620: {
8621: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = TRUE;
8622: if(BL_Card[p_card].discQCount != 0)
8623: BL_Card[p_card].discQCount--;
8624: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL;
8625: }
8626: else
8627: {
8628: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = TRUE;
8629: if(currSCCB->Sccb_tag)
8630: {
8631: if(BL_Card[p_card].discQCount != 0)
8632: BL_Card[p_card].discQCount--;
8633: BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL;
8634: }else
8635: {
8636: if(BL_Card[p_card].discQCount != 0)
8637: BL_Card[p_card].discQCount--;
8638: BL_Card[p_card].discQ_Tbl[sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL;
8639: }
8640: }
8641: return;
8642: }
8643:
8644: #endif
8645: }
8646: }
8647: }
8648:
8649:
8650: if((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
8651: ((sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
8652: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = FALSE;
8653: else
8654: sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = FALSE;
8655:
8656:
8657: queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
8658: }
1.1.1.2 ! root 8659:
1.1 root 8660: /*----------------------------------------------------------------------
8661: *
8662: *
8663: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
8664: *
8665: * This file is available under both the GNU General Public License
8666: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
8667: *
8668: * $Workfile: busmstr.c $
8669: *
8670: * Description: Functions to start, stop, and abort BusMaster operations.
8671: *
8672: * $Date: 1999/04/26 05:53:56 $
8673: *
8674: * $Revision: 1.1 $
8675: *
8676: *----------------------------------------------------------------------*/
8677:
8678: /*#include <globals.h>*/
8679:
8680: #if (FW_TYPE==_UCB_MGR_)
8681: /*#include <budi.h>*/
8682: #endif
8683:
8684: /*#include <sccbmgr.h>*/
8685: /*#include <blx30.h>*/
8686: /*#include <target.h>*/
8687: /*#include <scsi2.h>*/
8688: /*#include <harpoon.h>*/
8689:
8690:
8691: /*
8692: extern SCCBCARD BL_Card[MAX_CARDS];
8693: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
8694: */
8695:
8696: #define SHORT_WAIT 0x0000000F
8697: #define LONG_WAIT 0x0000FFFFL
8698:
8699: #if defined(BUGBUG)
8700: void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
8701: #endif
8702:
8703: /*---------------------------------------------------------------------
8704: *
8705: * Function: Data Transfer Processor
8706: *
8707: * Description: This routine performs two tasks.
8708: * (1) Start data transfer by calling HOST_DATA_XFER_START
8709: * function. Once data transfer is started, (2) Depends
8710: * on the type of data transfer mode Scatter/Gather mode
8711: * or NON Scatter/Gather mode. In NON Scatter/Gather mode,
8712: * this routine checks Sccb_MGRFlag (F_HOST_XFER_ACT bit) for
8713: * data transfer done. In Scatter/Gather mode, this routine
8714: * checks bus master command complete and dual rank busy
8715: * bit to keep chaining SC transfer command. Similarly,
8716: * in Scatter/Gather mode, it checks Sccb_MGRFlag
8717: * (F_HOST_XFER_ACT bit) for data transfer done.
8718: *
8719: *---------------------------------------------------------------------*/
8720:
8721: #if defined(DOS)
8722: void dataXferProcessor(USHORT port, PSCCBcard pCurrCard)
8723: #else
8724: void dataXferProcessor(ULONG port, PSCCBcard pCurrCard)
8725: #endif
8726: {
8727: PSCCB currSCCB;
8728:
8729: currSCCB = pCurrCard->currentSCCB;
8730:
8731: if (currSCCB->Sccb_XferState & F_SG_XFER)
8732: {
8733: if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
8734:
8735: {
8736: currSCCB->Sccb_sgseg += (UCHAR)SG_BUF_CNT;
8737: currSCCB->Sccb_SGoffset = 0x00;
8738: }
8739: pCurrCard->globalFlags |= F_HOST_XFER_ACT;
8740:
8741: busMstrSGDataXferStart(port, currSCCB);
8742: }
8743:
8744: else
8745: {
8746: if (!(pCurrCard->globalFlags & F_HOST_XFER_ACT))
8747: {
8748: pCurrCard->globalFlags |= F_HOST_XFER_ACT;
8749:
8750: busMstrDataXferStart(port, currSCCB);
8751: }
8752: }
8753: }
8754:
8755:
8756: /*---------------------------------------------------------------------
8757: *
8758: * Function: BusMaster Scatter Gather Data Transfer Start
8759: *
8760: * Description:
8761: *
8762: *---------------------------------------------------------------------*/
8763: #if defined(DOS)
8764: void busMstrSGDataXferStart(USHORT p_port, PSCCB pcurrSCCB)
8765: #else
8766: void busMstrSGDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
8767: #endif
8768: {
8769: ULONG count,addr,tmpSGCnt;
8770: UINT sg_index;
8771: UCHAR sg_count, i;
8772: #if defined(DOS)
8773: USHORT reg_offset;
8774: #else
8775: ULONG reg_offset;
8776: #endif
8777:
8778:
8779: if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
8780:
8781: count = ((ULONG) HOST_RD_CMD)<<24;
8782: }
8783:
8784: else {
8785: count = ((ULONG) HOST_WRT_CMD)<<24;
8786: }
8787:
8788: sg_count = 0;
8789: tmpSGCnt = 0;
8790: sg_index = pcurrSCCB->Sccb_sgseg;
8791: reg_offset = hp_aramBase;
8792:
8793:
8794: i = (UCHAR) (RD_HARPOON(p_port+hp_page_ctrl) & ~(SGRAM_ARAM|SCATTER_EN));
8795:
8796:
8797: WR_HARPOON(p_port+hp_page_ctrl, i);
8798:
8799: while ((sg_count < (UCHAR)SG_BUF_CNT) &&
8800: ((ULONG)(sg_index * (UINT)SG_ELEMENT_SIZE) < pcurrSCCB->DataLength) ) {
8801:
8802: #if defined(COMPILER_16_BIT) && !defined(DOS)
8803: tmpSGCnt += *(((ULONG far *)pcurrSCCB->DataPointer)+
8804: (sg_index * 2));
8805:
8806: count |= *(((ULONG far *)pcurrSCCB->DataPointer)+
8807: (sg_index * 2));
8808:
8809: addr = *(((ULONG far *)pcurrSCCB->DataPointer)+
8810: ((sg_index * 2) + 1));
8811:
8812: #else
8813: tmpSGCnt += *(((ULONG *)pcurrSCCB->DataPointer)+
8814: (sg_index * 2));
8815:
8816: count |= *(((ULONG *)pcurrSCCB->DataPointer)+
8817: (sg_index * 2));
8818:
8819: addr = *(((ULONG *)pcurrSCCB->DataPointer)+
8820: ((sg_index * 2) + 1));
8821: #endif
8822:
8823:
8824: if ((!sg_count) && (pcurrSCCB->Sccb_SGoffset)) {
8825:
8826: addr += ((count & 0x00FFFFFFL) - pcurrSCCB->Sccb_SGoffset);
8827: count = (count & 0xFF000000L) | pcurrSCCB->Sccb_SGoffset;
8828:
8829: tmpSGCnt = count & 0x00FFFFFFL;
8830: }
8831:
8832: WR_HARP32(p_port,reg_offset,addr);
8833: reg_offset +=4;
8834:
8835: WR_HARP32(p_port,reg_offset,count);
8836: reg_offset +=4;
8837:
8838: count &= 0xFF000000L;
8839: sg_index++;
8840: sg_count++;
8841:
8842: } /*End While */
8843:
8844: pcurrSCCB->Sccb_XferCnt = tmpSGCnt;
8845:
8846: WR_HARPOON(p_port+hp_sg_addr,(sg_count<<4));
8847:
8848: if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
8849:
8850: WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt);
8851:
8852:
8853: WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT));
8854: WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH);
8855: }
8856:
8857: else {
8858:
8859:
8860: if ((!(RD_HARPOON(p_port+hp_synctarg_0) & NARROW_SCSI)) &&
8861: (tmpSGCnt & 0x000000001))
8862: {
8863:
8864: pcurrSCCB->Sccb_XferState |= F_ODD_BALL_CNT;
8865: tmpSGCnt--;
8866: }
8867:
8868:
8869: WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt);
8870:
8871: WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD));
8872: WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH);
8873: }
8874:
8875:
8876: WR_HARPOON(p_port+hp_page_ctrl, (UCHAR) (i | SCATTER_EN));
8877:
8878: }
8879:
8880:
8881: /*---------------------------------------------------------------------
8882: *
8883: * Function: BusMaster Data Transfer Start
8884: *
8885: * Description:
8886: *
8887: *---------------------------------------------------------------------*/
8888: #if defined(DOS)
8889: void busMstrDataXferStart(USHORT p_port, PSCCB pcurrSCCB)
8890: #else
8891: void busMstrDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
8892: #endif
8893: {
8894: ULONG addr,count;
8895:
8896: if (!(pcurrSCCB->Sccb_XferState & F_AUTO_SENSE)) {
8897:
8898: count = pcurrSCCB->Sccb_XferCnt;
8899:
8900: addr = (ULONG) pcurrSCCB->DataPointer + pcurrSCCB->Sccb_ATC;
8901: }
8902:
8903: else {
8904: addr = pcurrSCCB->SensePointer;
8905: count = pcurrSCCB->RequestSenseLength;
8906:
8907: }
8908:
8909: #if defined(DOS)
8910: asm { mov dx,p_port;
8911: mov ax,word ptr count;
8912: add dx,hp_xfer_cnt_lo;
8913: out dx,al;
8914: inc dx;
8915: xchg ah,al
8916: out dx,al;
8917: inc dx;
8918: mov ax,word ptr count+2;
8919: out dx,al;
8920: inc dx;
8921: inc dx;
8922: mov ax,word ptr addr;
8923: out dx,al;
8924: inc dx;
8925: xchg ah,al
8926: out dx,al;
8927: inc dx;
8928: mov ax,word ptr addr+2;
8929: out dx,al;
8930: inc dx;
8931: xchg ah,al
8932: out dx,al;
8933: }
8934:
8935: WR_HARP32(p_port,hp_xfercnt_0,count);
8936:
8937: #else
8938: HP_SETUP_ADDR_CNT(p_port,addr,count);
8939: #endif
8940:
8941:
8942: if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
8943:
8944: WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT));
8945: WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH);
8946:
8947: WR_HARPOON(p_port+hp_xfer_cmd,
8948: (XFER_DMA_HOST | XFER_HOST_AUTO | XFER_DMA_8BIT));
8949: }
8950:
8951: else {
8952:
8953: WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD));
8954: WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH);
8955:
8956: WR_HARPOON(p_port+hp_xfer_cmd,
8957: (XFER_HOST_DMA | XFER_HOST_AUTO | XFER_DMA_8BIT));
8958:
8959: }
8960: }
8961:
8962:
8963: /*---------------------------------------------------------------------
8964: *
8965: * Function: BusMaster Timeout Handler
8966: *
8967: * Description: This function is called after a bus master command busy time
8968: * out is detected. This routines issue halt state machine
8969: * with a software time out for command busy. If command busy
8970: * is still asserted at the end of the time out, it issues
8971: * hard abort with another software time out. It hard abort
8972: * command busy is also time out, it'll just give up.
8973: *
8974: *---------------------------------------------------------------------*/
8975: #if defined(DOS)
8976: UCHAR busMstrTimeOut(USHORT p_port)
8977: #else
8978: UCHAR busMstrTimeOut(ULONG p_port)
8979: #endif
8980: {
8981: ULONG timeout;
8982:
8983: timeout = LONG_WAIT;
8984:
8985: WR_HARPOON(p_port+hp_sys_ctrl, HALT_MACH);
8986:
8987: while ((!(RD_HARPOON(p_port+hp_ext_status) & CMD_ABORTED)) && timeout--) {}
8988:
8989:
8990:
8991: if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) {
8992: WR_HARPOON(p_port+hp_sys_ctrl, HARD_ABORT);
8993:
8994: timeout = LONG_WAIT;
8995: while ((RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
8996: }
8997:
8998: RD_HARPOON(p_port+hp_int_status); /*Clear command complete */
8999:
9000: if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) {
9001: return(TRUE);
9002: }
9003:
9004: else {
9005: return(FALSE);
9006: }
9007: }
9008:
9009:
9010: /*---------------------------------------------------------------------
9011: *
9012: * Function: Host Data Transfer Abort
9013: *
9014: * Description: Abort any in progress transfer.
9015: *
9016: *---------------------------------------------------------------------*/
9017: #if defined(DOS)
9018: void hostDataXferAbort(USHORT port, UCHAR p_card, PSCCB pCurrSCCB)
9019: #else
9020: void hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
9021: #endif
9022: {
9023:
9024: ULONG timeout;
9025: ULONG remain_cnt;
9026: UINT sg_ptr;
9027:
9028: BL_Card[p_card].globalFlags &= ~F_HOST_XFER_ACT;
9029:
9030: if (pCurrSCCB->Sccb_XferState & F_AUTO_SENSE) {
9031:
9032:
9033: if (!(RD_HARPOON(port+hp_int_status) & INT_CMD_COMPL)) {
9034:
9035: WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) | FLUSH_XFER_CNTR));
9036: timeout = LONG_WAIT;
9037:
9038: while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
9039:
9040: WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) & ~FLUSH_XFER_CNTR));
9041:
9042: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9043:
9044: if (busMstrTimeOut(port)) {
9045:
9046: if (pCurrSCCB->HostStatus == 0x00)
9047:
9048: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9049:
9050: }
9051:
9052: if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS)
9053:
9054: if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS)
9055:
9056: if (pCurrSCCB->HostStatus == 0x00)
9057:
9058: {
9059: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9060: #if defined(BUGBUG)
9061: WR_HARPOON(port+hp_dual_addr_lo,
9062: RD_HARPOON(port+hp_ext_status));
9063: #endif
9064: }
9065: }
9066: }
9067: }
9068:
9069: else if (pCurrSCCB->Sccb_XferCnt) {
9070:
9071: if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
9072:
9073:
9074: WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) &
9075: ~SCATTER_EN));
9076:
9077: WR_HARPOON(port+hp_sg_addr,0x00);
9078:
9079: sg_ptr = pCurrSCCB->Sccb_sgseg + SG_BUF_CNT;
9080:
9081: if (sg_ptr > (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE)) {
9082:
9083: sg_ptr = (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE);
9084: }
9085:
9086: remain_cnt = pCurrSCCB->Sccb_XferCnt;
9087:
9088: while (remain_cnt < 0x01000000L) {
9089:
9090: sg_ptr--;
9091:
9092: #if defined(COMPILER_16_BIT) && !defined(DOS)
9093: if (remain_cnt > (ULONG)(*(((ULONG far *)pCurrSCCB->
9094: DataPointer) + (sg_ptr * 2)))) {
9095:
9096: remain_cnt -= (ULONG)(*(((ULONG far *)pCurrSCCB->
9097: DataPointer) + (sg_ptr * 2)));
9098: }
9099:
9100: #else
9101: if (remain_cnt > (ULONG)(*(((ULONG *)pCurrSCCB->
9102: DataPointer) + (sg_ptr * 2)))) {
9103:
9104: remain_cnt -= (ULONG)(*(((ULONG *)pCurrSCCB->
9105: DataPointer) + (sg_ptr * 2)));
9106: }
9107: #endif
9108:
9109: else {
9110:
9111: break;
9112: }
9113: }
9114:
9115:
9116:
9117: if (remain_cnt < 0x01000000L) {
9118:
9119:
9120: pCurrSCCB->Sccb_SGoffset = remain_cnt;
9121:
9122: pCurrSCCB->Sccb_sgseg = (USHORT)sg_ptr;
9123:
9124:
9125: if ((ULONG)(sg_ptr * SG_ELEMENT_SIZE) == pCurrSCCB->DataLength
9126: && (remain_cnt == 0))
9127:
9128: pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
9129: }
9130:
9131: else {
9132:
9133:
9134: if (pCurrSCCB->HostStatus == 0x00) {
9135:
9136: pCurrSCCB->HostStatus = SCCB_GROSS_FW_ERR;
9137: }
9138: }
9139: }
9140:
9141:
9142: if (!(pCurrSCCB->Sccb_XferState & F_HOST_XFER_DIR)) {
9143:
9144:
9145: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9146:
9147: busMstrTimeOut(port);
9148: }
9149:
9150: else {
9151:
9152: if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
9153:
9154: if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
9155:
9156: if (pCurrSCCB->HostStatus == 0x00) {
9157:
9158: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9159: #if defined(BUGBUG)
9160: WR_HARPOON(port+hp_dual_addr_lo,
9161: RD_HARPOON(port+hp_ext_status));
9162: #endif
9163: }
9164: }
9165: }
9166:
9167: }
9168: }
9169:
9170: else {
9171:
9172:
9173: if ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) {
9174:
9175: timeout = SHORT_WAIT;
9176:
9177: while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) &&
9178: ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) &&
9179: timeout--) {}
9180: }
9181:
9182: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9183:
9184: WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) |
9185: FLUSH_XFER_CNTR));
9186:
9187: timeout = LONG_WAIT;
9188:
9189: while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) &&
9190: timeout--) {}
9191:
9192: WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) &
9193: ~FLUSH_XFER_CNTR));
9194:
9195:
9196: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9197:
9198: if (pCurrSCCB->HostStatus == 0x00) {
9199:
9200: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9201: }
9202:
9203: busMstrTimeOut(port);
9204: }
9205: }
9206:
9207: if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
9208:
9209: if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
9210:
9211: if (pCurrSCCB->HostStatus == 0x00) {
9212:
9213: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9214: #if defined(BUGBUG)
9215: WR_HARPOON(port+hp_dual_addr_lo,
9216: RD_HARPOON(port+hp_ext_status));
9217: #endif
9218: }
9219: }
9220: }
9221: }
9222:
9223: }
9224:
9225: else {
9226:
9227:
9228: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9229:
9230: timeout = LONG_WAIT;
9231:
9232: while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
9233:
9234: if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
9235:
9236: if (pCurrSCCB->HostStatus == 0x00) {
9237:
9238: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9239: }
9240:
9241: busMstrTimeOut(port);
9242: }
9243: }
9244:
9245:
9246: if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) {
9247:
9248: if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) {
9249:
9250: if (pCurrSCCB->HostStatus == 0x00) {
9251:
9252: pCurrSCCB->HostStatus = SCCB_BM_ERR;
9253: #if defined(BUGBUG)
9254: WR_HARPOON(port+hp_dual_addr_lo,
9255: RD_HARPOON(port+hp_ext_status));
9256: #endif
9257: }
9258: }
9259:
9260: }
9261:
9262: if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
9263:
9264: WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) &
9265: ~SCATTER_EN));
9266:
9267: WR_HARPOON(port+hp_sg_addr,0x00);
9268:
9269: pCurrSCCB->Sccb_sgseg += SG_BUF_CNT;
9270:
9271: pCurrSCCB->Sccb_SGoffset = 0x00;
9272:
9273:
9274: if ((ULONG)(pCurrSCCB->Sccb_sgseg * SG_ELEMENT_SIZE) >=
9275: pCurrSCCB->DataLength) {
9276:
9277: pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
9278:
9279: pCurrSCCB->Sccb_sgseg = (USHORT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE);
9280:
9281: }
9282: }
9283:
9284: else {
9285:
9286: if (!(pCurrSCCB->Sccb_XferState & F_AUTO_SENSE))
9287:
9288: pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
9289: }
9290: }
9291:
9292: WR_HARPOON(port+hp_int_mask,(INT_CMD_COMPL | SCSI_INTERRUPT));
9293: }
9294:
9295:
9296:
9297: /*---------------------------------------------------------------------
9298: *
9299: * Function: Host Data Transfer Restart
9300: *
9301: * Description: Reset the available count due to a restore data
9302: * pointers message.
9303: *
9304: *---------------------------------------------------------------------*/
9305: void hostDataXferRestart(PSCCB currSCCB)
9306: {
9307: ULONG data_count;
9308: UINT sg_index;
9309: #if defined(COMPILER_16_BIT) && !defined(DOS)
9310: ULONG far *sg_ptr;
9311: #else
9312: ULONG *sg_ptr;
9313: #endif
9314:
9315: if (currSCCB->Sccb_XferState & F_SG_XFER) {
9316:
9317: currSCCB->Sccb_XferCnt = 0;
9318:
9319: sg_index = 0xffff; /*Index by long words into sg list. */
9320: data_count = 0; /*Running count of SG xfer counts. */
9321:
9322: #if defined(COMPILER_16_BIT) && !defined(DOS)
9323: sg_ptr = (ULONG far *)currSCCB->DataPointer;
9324: #else
9325: sg_ptr = (ULONG *)currSCCB->DataPointer;
9326: #endif
9327:
9328: while (data_count < currSCCB->Sccb_ATC) {
9329:
9330: sg_index++;
9331: data_count += *(sg_ptr+(sg_index * 2));
9332: }
9333:
9334: if (data_count == currSCCB->Sccb_ATC) {
9335:
9336: currSCCB->Sccb_SGoffset = 0;
9337: sg_index++;
9338: }
9339:
9340: else {
9341: currSCCB->Sccb_SGoffset = data_count - currSCCB->Sccb_ATC;
9342: }
9343:
9344: currSCCB->Sccb_sgseg = (USHORT)sg_index;
9345: }
9346:
9347: else {
9348: currSCCB->Sccb_XferCnt = currSCCB->DataLength - currSCCB->Sccb_ATC;
9349: }
9350: }
1.1.1.2 ! root 9351:
1.1 root 9352: /*----------------------------------------------------------------------
9353: *
9354: *
9355: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
9356: *
9357: * This file is available under both the GNU General Public License
9358: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
9359: *
9360: * $Workfile: scam.c $
9361: *
9362: * Description: Functions relating to handling of the SCAM selection
9363: * and the determination of the SCSI IDs to be assigned
9364: * to all perspective SCSI targets.
9365: *
9366: * $Date: 1999/04/26 05:53:56 $
9367: *
9368: * $Revision: 1.1 $
9369: *
9370: *----------------------------------------------------------------------*/
9371:
9372: /*#include <globals.h>*/
9373:
9374: #if (FW_TYPE==_UCB_MGR_)
9375: /*#include <budi.h>*/
9376: #endif
9377:
9378: /*#include <sccbmgr.h>*/
9379: /*#include <blx30.h>*/
9380: /*#include <target.h>*/
9381: /*#include <scsi2.h>*/
9382: /*#include <eeprom.h>*/
9383: /*#include <harpoon.h>*/
9384:
9385:
9386:
9387: /*
9388: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
9389: extern SCCBCARD BL_Card[MAX_CARDS];
9390: extern SCCBSCAM_INFO scamInfo[MAX_SCSI_TAR];
9391: extern NVRAMINFO nvRamInfo[MAX_MB_CARDS];
9392: #if defined(DOS) || defined(OS2)
9393: extern UCHAR temp_id_string[ID_STRING_LENGTH];
9394: #endif
9395: extern UCHAR scamHAString[];
9396: */
9397: /*---------------------------------------------------------------------
9398: *
9399: * Function: scini
9400: *
9401: * Description: Setup all data structures necessary for SCAM selection.
9402: *
9403: *---------------------------------------------------------------------*/
9404:
9405: void scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up)
9406: {
9407:
9408: #if defined(SCAM_LEV_2)
9409: UCHAR loser,assigned_id;
9410: #endif
9411: #if defined(DOS)
9412:
9413: USHORT p_port;
9414: #else
9415: ULONG p_port;
9416: #endif
9417:
9418: UCHAR i,k,ScamFlg ;
9419: PSCCBcard currCard;
9420: PNVRamInfo pCurrNvRam;
9421:
9422: currCard = &BL_Card[p_card];
9423: p_port = currCard->ioPort;
9424: pCurrNvRam = currCard->pNvRamInfo;
9425:
9426:
9427: if(pCurrNvRam){
9428: ScamFlg = pCurrNvRam->niScamConf;
9429: i = pCurrNvRam->niSysConf;
9430: }
9431: else{
9432: ScamFlg = (UCHAR) utilEERead(p_port, SCAM_CONFIG/2);
9433: i = (UCHAR)(utilEERead(p_port, (SYSTEM_CONFIG/2)));
9434: }
9435: if(!(i & 0x02)) /* check if reset bus in AutoSCSI parameter set */
9436: return;
9437:
9438: inisci(p_card,p_port, p_our_id);
9439:
9440: /* Force to wait 1 sec after SCSI bus reset. Some SCAM device FW
9441: too slow to return to SCAM selection */
9442:
9443: /* if (p_power_up)
9444: Wait1Second(p_port);
9445: else
9446: Wait(p_port, TO_250ms); */
9447:
9448: Wait1Second(p_port);
9449:
9450: #if defined(SCAM_LEV_2)
9451:
9452: if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2))
9453: {
9454: while (!(scarb(p_port,INIT_SELTD))) {}
9455:
9456: scsel(p_port);
9457:
9458: do {
9459: scxferc(p_port,SYNC_PTRN);
9460: scxferc(p_port,DOM_MSTR);
9461: loser = scsendi(p_port,&scamInfo[p_our_id].id_string[0]);
9462: } while ( loser == 0xFF );
9463:
9464: scbusf(p_port);
9465:
9466: if ((p_power_up) && (!loser))
9467: {
9468: sresb(p_port,p_card);
9469: Wait(p_port, TO_250ms);
9470:
9471: while (!(scarb(p_port,INIT_SELTD))) {}
9472:
9473: scsel(p_port);
9474:
9475: do {
9476: scxferc(p_port, SYNC_PTRN);
9477: scxferc(p_port, DOM_MSTR);
9478: loser = scsendi(p_port,&scamInfo[p_our_id].
9479: id_string[0]);
9480: } while ( loser == 0xFF );
9481:
9482: scbusf(p_port);
9483: }
9484: }
9485:
9486: else
9487: {
9488: loser = FALSE;
9489: }
9490:
9491:
9492: if (!loser)
9493: {
9494:
9495: #endif /* SCAM_LEV_2 */
9496:
9497: scamInfo[p_our_id].state = ID_ASSIGNED;
9498:
9499:
9500: if (ScamFlg & SCAM_ENABLED)
9501: {
9502:
9503: for (i=0; i < MAX_SCSI_TAR; i++)
9504: {
9505: if ((scamInfo[i].state == ID_UNASSIGNED) ||
9506: (scamInfo[i].state == ID_UNUSED))
9507: {
9508: if (scsell(p_port,i))
9509: {
9510: scamInfo[i].state = LEGACY;
9511: if ((scamInfo[i].id_string[0] != 0xFF) ||
9512: (scamInfo[i].id_string[1] != 0xFA))
9513: {
9514:
9515: scamInfo[i].id_string[0] = 0xFF;
9516: scamInfo[i].id_string[1] = 0xFA;
9517: if(pCurrNvRam == NULL)
9518: currCard->globalFlags |= F_UPDATE_EEPROM;
9519: }
9520: }
9521: }
9522: }
9523:
9524: sresb(p_port,p_card);
9525: Wait1Second(p_port);
9526: while (!(scarb(p_port,INIT_SELTD))) {}
9527: scsel(p_port);
9528: scasid(p_card, p_port);
9529: }
9530:
9531: #if defined(SCAM_LEV_2)
9532:
9533: }
9534:
9535: else if ((loser) && (ScamFlg & SCAM_ENABLED))
9536: {
9537: scamInfo[p_our_id].id_string[0] = SLV_TYPE_CODE0;
9538: assigned_id = FALSE;
9539: scwtsel(p_port);
9540:
9541: do {
9542: while (scxferc(p_port,0x00) != SYNC_PTRN) {}
9543:
9544: i = scxferc(p_port,0x00);
9545: if (i == ASSIGN_ID)
9546: {
9547: if (!(scsendi(p_port,&scamInfo[p_our_id].id_string[0])))
9548: {
9549: i = scxferc(p_port,0x00);
9550: if (scvalq(i))
9551: {
9552: k = scxferc(p_port,0x00);
9553:
9554: if (scvalq(k))
9555: {
9556: currCard->ourId =
9557: ((UCHAR)(i<<3)+(k & (UCHAR)7)) & (UCHAR) 0x3F;
9558: inisci(p_card, p_port, p_our_id);
9559: scamInfo[currCard->ourId].state = ID_ASSIGNED;
9560: scamInfo[currCard->ourId].id_string[0]
9561: = SLV_TYPE_CODE0;
9562: assigned_id = TRUE;
9563: }
9564: }
9565: }
9566: }
9567:
9568: else if (i == SET_P_FLAG)
9569: {
9570: if (!(scsendi(p_port,
9571: &scamInfo[p_our_id].id_string[0])))
9572: scamInfo[p_our_id].id_string[0] |= 0x80;
9573: }
9574: }while (!assigned_id);
9575:
9576: while (scxferc(p_port,0x00) != CFG_CMPLT) {}
9577: }
9578:
9579: #endif /* SCAM_LEV_2 */
9580: if (ScamFlg & SCAM_ENABLED)
9581: {
9582: scbusf(p_port);
9583: if (currCard->globalFlags & F_UPDATE_EEPROM)
9584: {
9585: scsavdi(p_card, p_port);
9586: currCard->globalFlags &= ~F_UPDATE_EEPROM;
9587: }
9588: }
9589:
9590:
9591: #if defined(DOS)
9592: for (i=0; i < MAX_SCSI_TAR; i++)
9593: {
9594: if (((ScamFlg & SCAM_ENABLED) && (scamInfo[i].state == LEGACY))
9595: || (i != p_our_id))
9596: {
9597: scsellDOS(p_port,i);
9598: }
9599: }
9600: #endif
9601:
9602: /*
9603: for (i=0,k=0; i < MAX_SCSI_TAR; i++)
9604: {
9605: if ((scamInfo[i].state == ID_ASSIGNED) ||
9606: (scamInfo[i].state == LEGACY))
9607: k++;
9608: }
9609:
9610: if (k==2)
9611: currCard->globalFlags |= F_SINGLE_DEVICE;
9612: else
9613: currCard->globalFlags &= ~F_SINGLE_DEVICE;
9614: */
9615: }
9616:
9617:
9618: /*---------------------------------------------------------------------
9619: *
9620: * Function: scarb
9621: *
9622: * Description: Gain control of the bus and wait SCAM select time (250ms)
9623: *
9624: *---------------------------------------------------------------------*/
9625:
9626: #if defined(DOS)
9627: int scarb(USHORT p_port, UCHAR p_sel_type)
9628: #else
9629: int scarb(ULONG p_port, UCHAR p_sel_type)
9630: #endif
9631: {
9632: if (p_sel_type == INIT_SELTD)
9633: {
9634:
9635: while (RD_HARPOON(p_port+hp_scsisig) & (SCSI_SEL | SCSI_BSY)) {}
9636:
9637:
9638: if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL)
9639: return(FALSE);
9640:
9641: if (RD_HARPOON(p_port+hp_scsidata_0) != 00)
9642: return(FALSE);
9643:
9644: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_BSY));
9645:
9646: if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL) {
9647:
9648: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) &
9649: ~SCSI_BSY));
9650: return(FALSE);
9651: }
9652:
9653:
9654: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_SEL));
9655:
9656: if (RD_HARPOON(p_port+hp_scsidata_0) != 00) {
9657:
9658: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) &
9659: ~(SCSI_BSY | SCSI_SEL)));
9660: return(FALSE);
9661: }
9662: }
9663:
9664:
9665: WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0)
9666: & ~ACTdeassert));
9667: WR_HARPOON(p_port+hp_scsireset, SCAM_EN);
9668: WR_HARPOON(p_port+hp_scsidata_0, 0x00);
9669: #if defined(WIDE_SCSI)
9670: WR_HARPOON(p_port+hp_scsidata_1, 0x00);
9671: #endif
9672: WR_HARPOON(p_port+hp_portctrl_0, SCSI_BUS_EN);
9673:
9674: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_MSG));
9675:
9676: WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig)
9677: & ~SCSI_BSY));
9678:
9679: Wait(p_port,TO_250ms);
9680:
9681: return(TRUE);
9682: }
9683:
9684:
9685: /*---------------------------------------------------------------------
9686: *
9687: * Function: scbusf
9688: *
9689: * Description: Release the SCSI bus and disable SCAM selection.
9690: *
9691: *---------------------------------------------------------------------*/
9692:
9693: #if defined(DOS)
9694: void scbusf(USHORT p_port)
9695: #else
9696: void scbusf(ULONG p_port)
9697: #endif
9698: {
9699: WR_HARPOON(p_port+hp_page_ctrl,
9700: (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
9701:
9702:
9703: WR_HARPOON(p_port+hp_scsidata_0, 0x00);
9704:
9705: WR_HARPOON(p_port+hp_portctrl_0, (RD_HARPOON(p_port+hp_portctrl_0)
9706: & ~SCSI_BUS_EN));
9707:
9708: WR_HARPOON(p_port+hp_scsisig, 0x00);
9709:
9710:
9711: WR_HARPOON(p_port+hp_scsireset, (RD_HARPOON(p_port+hp_scsireset)
9712: & ~SCAM_EN));
9713:
9714: WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0)
9715: | ACTdeassert));
9716:
9717: #if defined(SCAM_LEV_2)
9718: WRW_HARPOON((p_port+hp_intstat), (BUS_FREE | AUTO_INT | SCAM_SEL));
9719: #else
9720: WRW_HARPOON((p_port+hp_intstat), (BUS_FREE | AUTO_INT));
9721: #endif
9722:
9723: WR_HARPOON(p_port+hp_page_ctrl,
9724: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
9725: }
9726:
9727:
9728:
9729: /*---------------------------------------------------------------------
9730: *
9731: * Function: scasid
9732: *
9733: * Description: Assign an ID to all the SCAM devices.
9734: *
9735: *---------------------------------------------------------------------*/
9736:
9737: #if defined(DOS)
9738: void scasid(UCHAR p_card, USHORT p_port)
9739: #else
9740: void scasid(UCHAR p_card, ULONG p_port)
9741: #endif
9742: {
9743: #if defined(DOS) || defined(OS2)
9744: /* Use external defined in global space area, instead of Stack
9745: space. WIN/95 DOS doesnot work TINY mode. The OS doesnot intialize
9746: SS equal to DS. Thus the array allocated on stack doesnot get
9747: access correctly */
9748: #else
9749: UCHAR temp_id_string[ID_STRING_LENGTH];
9750: #endif
9751:
9752: UCHAR i,k,scam_id;
9753: UCHAR crcBytes[3];
9754: PNVRamInfo pCurrNvRam;
9755: ushort_ptr pCrcBytes;
9756:
9757: pCurrNvRam = BL_Card[p_card].pNvRamInfo;
9758:
9759: i=FALSE;
9760:
9761: while (!i)
9762: {
9763:
9764: for (k=0; k < ID_STRING_LENGTH; k++)
9765: {
9766: temp_id_string[k] = (UCHAR) 0x00;
9767: }
9768:
9769: scxferc(p_port,SYNC_PTRN);
9770: scxferc(p_port,ASSIGN_ID);
9771:
9772: if (!(sciso(p_port,&temp_id_string[0])))
9773: {
9774: if(pCurrNvRam){
9775: pCrcBytes = (ushort_ptr)&crcBytes[0];
9776: *pCrcBytes = CalcCrc16(&temp_id_string[0]);
9777: crcBytes[2] = CalcLrc(&temp_id_string[0]);
9778: temp_id_string[1] = crcBytes[2];
9779: temp_id_string[2] = crcBytes[0];
9780: temp_id_string[3] = crcBytes[1];
9781: for(k = 4; k < ID_STRING_LENGTH; k++)
9782: temp_id_string[k] = (UCHAR) 0x00;
9783: }
9784: i = scmachid(p_card,temp_id_string);
9785:
9786: if (i == CLR_PRIORITY)
9787: {
9788: scxferc(p_port,MISC_CODE);
9789: scxferc(p_port,CLR_P_FLAG);
9790: i = FALSE; /*Not the last ID yet. */
9791: }
9792:
9793: else if (i != NO_ID_AVAIL)
9794: {
9795: if (i < 8 )
9796: scxferc(p_port,ID_0_7);
9797: else
9798: scxferc(p_port,ID_8_F);
9799:
9800: scam_id = (i & (UCHAR) 0x07);
9801:
9802:
9803: for (k=1; k < 0x08; k <<= 1)
9804: if (!( k & i ))
9805: scam_id += 0x08; /*Count number of zeros in DB0-3. */
9806:
9807: scxferc(p_port,scam_id);
9808:
9809: i = FALSE; /*Not the last ID yet. */
9810: }
9811: }
9812:
9813: else
9814: {
9815: i = TRUE;
9816: }
9817:
9818: } /*End while */
9819:
9820: scxferc(p_port,SYNC_PTRN);
9821: scxferc(p_port,CFG_CMPLT);
9822: }
9823:
9824:
9825:
9826:
9827:
9828: /*---------------------------------------------------------------------
9829: *
9830: * Function: scsel
9831: *
9832: * Description: Select all the SCAM devices.
9833: *
9834: *---------------------------------------------------------------------*/
9835:
9836: #if defined(DOS)
9837: void scsel(USHORT p_port)
9838: #else
9839: void scsel(ULONG p_port)
9840: #endif
9841: {
9842:
9843: WR_HARPOON(p_port+hp_scsisig, SCSI_SEL);
9844: scwiros(p_port, SCSI_MSG);
9845:
9846: WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY));
9847:
9848:
9849: WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
9850: WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) |
9851: (UCHAR)(BIT(7)+BIT(6))));
9852:
9853:
9854: WR_HARPOON(p_port+hp_scsisig, (SCSI_BSY | SCSI_IOBIT | SCSI_CD));
9855: scwiros(p_port, SCSI_SEL);
9856:
9857: WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) &
9858: ~(UCHAR)BIT(6)));
9859: scwirod(p_port, BIT(6));
9860:
9861: WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
9862: }
9863:
9864:
9865:
9866: /*---------------------------------------------------------------------
9867: *
9868: * Function: scxferc
9869: *
9870: * Description: Handshake the p_data (DB4-0) across the bus.
9871: *
9872: *---------------------------------------------------------------------*/
9873:
9874: #if defined(DOS)
9875: UCHAR scxferc(USHORT p_port, UCHAR p_data)
9876: #else
9877: UCHAR scxferc(ULONG p_port, UCHAR p_data)
9878: #endif
9879: {
9880: UCHAR curr_data, ret_data;
9881:
9882: curr_data = p_data | BIT(7) | BIT(5); /*Start with DB7 & DB5 asserted. */
9883:
9884: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9885:
9886: curr_data &= ~BIT(7);
9887:
9888: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9889:
9890: scwirod(p_port,BIT(7)); /*Wait for DB7 to be released. */
9891: while (!(RD_HARPOON(p_port+hp_scsidata_0) & BIT(5)));
9892:
9893: ret_data = (RD_HARPOON(p_port+hp_scsidata_0) & (UCHAR) 0x1F);
9894:
9895: curr_data |= BIT(6);
9896:
9897: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9898:
9899: curr_data &= ~BIT(5);
9900:
9901: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9902:
9903: scwirod(p_port,BIT(5)); /*Wait for DB5 to be released. */
9904:
9905: curr_data &= ~(BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0)); /*Release data bits */
9906: curr_data |= BIT(7);
9907:
9908: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9909:
9910: curr_data &= ~BIT(6);
9911:
9912: WR_HARPOON(p_port+hp_scsidata_0, curr_data);
9913:
9914: scwirod(p_port,BIT(6)); /*Wait for DB6 to be released. */
9915:
9916: return(ret_data);
9917: }
9918:
9919:
9920: /*---------------------------------------------------------------------
9921: *
9922: * Function: scsendi
9923: *
9924: * Description: Transfer our Identification string to determine if we
9925: * will be the dominant master.
9926: *
9927: *---------------------------------------------------------------------*/
9928:
9929: #if defined(DOS)
9930: UCHAR scsendi(USHORT p_port, UCHAR p_id_string[])
9931: #else
9932: UCHAR scsendi(ULONG p_port, UCHAR p_id_string[])
9933: #endif
9934: {
9935: UCHAR ret_data,byte_cnt,bit_cnt,defer;
9936:
9937: defer = FALSE;
9938:
9939: for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
9940:
9941: for (bit_cnt = 0x80; bit_cnt != 0 ; bit_cnt >>= 1) {
9942:
9943: if (defer)
9944: ret_data = scxferc(p_port,00);
9945:
9946: else if (p_id_string[byte_cnt] & bit_cnt)
9947:
9948: ret_data = scxferc(p_port,02);
9949:
9950: else {
9951:
9952: ret_data = scxferc(p_port,01);
9953: if (ret_data & 02)
9954: defer = TRUE;
9955: }
9956:
9957: if ((ret_data & 0x1C) == 0x10)
9958: return(0x00); /*End of isolation stage, we won! */
9959:
9960: if (ret_data & 0x1C)
9961: return(0xFF);
9962:
9963: if ((defer) && (!(ret_data & 0x1F)))
9964: return(0x01); /*End of isolation stage, we lost. */
9965:
9966: } /*bit loop */
9967:
9968: } /*byte loop */
9969:
9970: if (defer)
9971: return(0x01); /*We lost */
9972: else
9973: return(0); /*We WON! Yeeessss! */
9974: }
9975:
9976:
9977:
9978: /*---------------------------------------------------------------------
9979: *
9980: * Function: sciso
9981: *
9982: * Description: Transfer the Identification string.
9983: *
9984: *---------------------------------------------------------------------*/
9985:
9986: #if defined(DOS)
9987: UCHAR sciso(USHORT p_port, UCHAR p_id_string[])
9988: #else
9989: UCHAR sciso(ULONG p_port, UCHAR p_id_string[])
9990: #endif
9991: {
9992: UCHAR ret_data,the_data,byte_cnt,bit_cnt;
9993:
9994: the_data = 0;
9995:
9996: for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
9997:
9998: for (bit_cnt = 0; bit_cnt < 8; bit_cnt++) {
9999:
10000: ret_data = scxferc(p_port,0);
10001:
10002: if (ret_data & 0xFC)
10003: return(0xFF);
10004:
10005: else {
10006:
10007: the_data <<= 1;
10008: if (ret_data & BIT(1)) {
10009: the_data |= 1;
10010: }
10011: }
10012:
10013: if ((ret_data & 0x1F) == 0)
10014: {
10015: /*
10016: if(bit_cnt != 0 || bit_cnt != 8)
10017: {
10018: byte_cnt = 0;
10019: bit_cnt = 0;
10020: scxferc(p_port, SYNC_PTRN);
10021: scxferc(p_port, ASSIGN_ID);
10022: continue;
10023: }
10024: */
10025: if (byte_cnt)
10026: return(0x00);
10027: else
10028: return(0xFF);
10029: }
10030:
10031: } /*bit loop */
10032:
10033: p_id_string[byte_cnt] = the_data;
10034:
10035: } /*byte loop */
10036:
10037: return(0);
10038: }
10039:
10040:
10041:
10042: /*---------------------------------------------------------------------
10043: *
10044: * Function: scwirod
10045: *
10046: * Description: Sample the SCSI data bus making sure the signal has been
10047: * deasserted for the correct number of consecutive samples.
10048: *
10049: *---------------------------------------------------------------------*/
10050:
10051: #if defined(DOS)
10052: void scwirod(USHORT p_port, UCHAR p_data_bit)
10053: #else
10054: void scwirod(ULONG p_port, UCHAR p_data_bit)
10055: #endif
10056: {
10057: UCHAR i;
10058:
10059: i = 0;
10060: while ( i < MAX_SCSI_TAR ) {
10061:
10062: if (RD_HARPOON(p_port+hp_scsidata_0) & p_data_bit)
10063:
10064: i = 0;
10065:
10066: else
10067:
10068: i++;
10069:
10070: }
10071: }
10072:
10073:
10074:
10075: /*---------------------------------------------------------------------
10076: *
10077: * Function: scwiros
10078: *
10079: * Description: Sample the SCSI Signal lines making sure the signal has been
10080: * deasserted for the correct number of consecutive samples.
10081: *
10082: *---------------------------------------------------------------------*/
10083:
10084: #if defined(DOS)
10085: void scwiros(USHORT p_port, UCHAR p_data_bit)
10086: #else
10087: void scwiros(ULONG p_port, UCHAR p_data_bit)
10088: #endif
10089: {
10090: UCHAR i;
10091:
10092: i = 0;
10093: while ( i < MAX_SCSI_TAR ) {
10094:
10095: if (RD_HARPOON(p_port+hp_scsisig) & p_data_bit)
10096:
10097: i = 0;
10098:
10099: else
10100:
10101: i++;
10102:
10103: }
10104: }
10105:
10106:
10107: /*---------------------------------------------------------------------
10108: *
10109: * Function: scvalq
10110: *
10111: * Description: Make sure we received a valid data byte.
10112: *
10113: *---------------------------------------------------------------------*/
10114:
10115: UCHAR scvalq(UCHAR p_quintet)
10116: {
10117: UCHAR count;
10118:
10119: for (count=1; count < 0x08; count<<=1) {
10120: if (!(p_quintet & count))
10121: p_quintet -= 0x80;
10122: }
10123:
10124: if (p_quintet & 0x18)
10125: return(FALSE);
10126:
10127: else
10128: return(TRUE);
10129: }
10130:
10131:
10132: /*---------------------------------------------------------------------
10133: *
10134: * Function: scsell
10135: *
10136: * Description: Select the specified device ID using a selection timeout
10137: * less than 4ms. If somebody responds then it is a legacy
10138: * drive and this ID must be marked as such.
10139: *
10140: *---------------------------------------------------------------------*/
10141:
10142: #if defined(DOS)
10143: UCHAR scsell(USHORT p_port, UCHAR targ_id)
10144: #else
10145: UCHAR scsell(ULONG p_port, UCHAR targ_id)
10146: #endif
10147: {
10148: #if defined(DOS)
10149: USHORT i;
10150: #else
10151: ULONG i;
10152: #endif
10153:
10154: WR_HARPOON(p_port+hp_page_ctrl,
10155: (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
10156:
10157: ARAM_ACCESS(p_port);
10158:
10159: WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) | SCAM_TIMER));
10160: WR_HARPOON(p_port+hp_seltimeout,TO_4ms);
10161:
10162:
10163: for (i = p_port+CMD_STRT; i < p_port+CMD_STRT+12; i+=2) {
10164: WRW_HARPOON(i, (MPM_OP+ACOMMAND));
10165: }
10166: WRW_HARPOON(i, (BRH_OP+ALWAYS+ NP));
10167:
10168: WRW_HARPOON((p_port+hp_intstat),
10169: (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
10170:
10171: WR_HARPOON(p_port+hp_select_id, targ_id);
10172:
10173: WR_HARPOON(p_port+hp_portctrl_0, SCSI_PORT);
10174: WR_HARPOON(p_port+hp_autostart_3, (SELECT | CMD_ONLY_STRT));
10175: WR_HARPOON(p_port+hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
10176:
10177:
10178: while (!(RDW_HARPOON((p_port+hp_intstat)) &
10179: (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {}
10180:
10181: if (RDW_HARPOON((p_port+hp_intstat)) & RESET)
10182: Wait(p_port, TO_250ms);
10183:
10184: DISABLE_AUTO(p_port);
10185:
10186: WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) & ~SCAM_TIMER));
10187: WR_HARPOON(p_port+hp_seltimeout,TO_290ms);
10188:
10189: SGRAM_ACCESS(p_port);
10190:
10191: if (RDW_HARPOON((p_port+hp_intstat)) & (RESET | TIMEOUT) ) {
10192:
10193: WRW_HARPOON((p_port+hp_intstat),
10194: (RESET | TIMEOUT | SEL | BUS_FREE | PHASE));
10195:
10196: WR_HARPOON(p_port+hp_page_ctrl,
10197: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
10198:
10199: return(FALSE); /*No legacy device */
10200: }
10201:
10202: else {
10203:
10204: while(!(RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)) {
10205: if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
10206: {
10207: WR_HARPOON(p_port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
10208: ACCEPT_MSG(p_port);
10209: }
10210: }
10211:
10212: WRW_HARPOON((p_port+hp_intstat), CLR_ALL_INT_1);
10213:
10214: WR_HARPOON(p_port+hp_page_ctrl,
10215: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
10216:
10217: return(TRUE); /*Found one of them oldies! */
10218: }
10219: }
10220:
10221: #if defined(DOS)
10222: /*---------------------------------------------------------------------
10223: *
10224: * Function: scsell for DOS
10225: *
10226: * Description: Select the specified device ID using a selection timeout
10227: * less than 2ms. This was specially required to solve
10228: * the problem with Plextor 12X CD-ROM drive. This drive
10229: * was responding the Selection at the end of 4ms and
10230: * hanging the system.
10231: *
10232: *---------------------------------------------------------------------*/
10233:
10234: UCHAR scsellDOS(USHORT p_port, UCHAR targ_id)
10235: {
10236: USHORT i;
10237:
10238: WR_HARPOON(p_port+hp_page_ctrl,
10239: (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
10240:
10241: ARAM_ACCESS(p_port);
10242:
10243: WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) | SCAM_TIMER));
10244: WR_HARPOON(p_port+hp_seltimeout,TO_2ms);
10245:
10246:
10247: for (i = p_port+CMD_STRT; i < p_port+CMD_STRT+12; i+=2) {
10248: WRW_HARPOON(i, (MPM_OP+ACOMMAND));
10249: }
10250: WRW_HARPOON(i, (BRH_OP+ALWAYS+ NP));
10251:
10252: WRW_HARPOON((p_port+hp_intstat),
10253: (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
10254:
10255: WR_HARPOON(p_port+hp_select_id, targ_id);
10256:
10257: WR_HARPOON(p_port+hp_portctrl_0, SCSI_PORT);
10258: WR_HARPOON(p_port+hp_autostart_3, (SELECT | CMD_ONLY_STRT));
10259: WR_HARPOON(p_port+hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
10260:
10261:
10262: while (!(RDW_HARPOON((p_port+hp_intstat)) &
10263: (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {}
10264:
10265: if (RDW_HARPOON((p_port+hp_intstat)) & RESET)
10266: Wait(p_port, TO_250ms);
10267:
10268: DISABLE_AUTO(p_port);
10269:
10270: WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) & ~SCAM_TIMER));
10271: WR_HARPOON(p_port+hp_seltimeout,TO_290ms);
10272:
10273: SGRAM_ACCESS(p_port);
10274:
10275: if (RDW_HARPOON((p_port+hp_intstat)) & (RESET | TIMEOUT) ) {
10276:
10277: WRW_HARPOON((p_port+hp_intstat),
10278: (RESET | TIMEOUT | SEL | BUS_FREE | PHASE));
10279:
10280: WR_HARPOON(p_port+hp_page_ctrl,
10281: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
10282:
10283: return(FALSE); /*No legacy device */
10284: }
10285:
10286: else {
10287:
10288: while(!(RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)) {
10289: if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
10290: {
10291: WR_HARPOON(p_port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
10292: ACCEPT_MSG(p_port);
10293: }
10294: }
10295:
10296: WRW_HARPOON((p_port+hp_intstat), CLR_ALL_INT_1);
10297:
10298: WR_HARPOON(p_port+hp_page_ctrl,
10299: (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE));
10300:
10301: return(TRUE); /*Found one of them oldies! */
10302: }
10303: }
10304: #endif /* DOS */
10305:
10306: /*---------------------------------------------------------------------
10307: *
10308: * Function: scwtsel
10309: *
10310: * Description: Wait to be selected by another SCAM initiator.
10311: *
10312: *---------------------------------------------------------------------*/
10313:
10314: #if defined(DOS)
10315: void scwtsel(USHORT p_port)
10316: #else
10317: void scwtsel(ULONG p_port)
10318: #endif
10319: {
10320: while(!(RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL)) {}
10321: }
10322:
10323:
10324: /*---------------------------------------------------------------------
10325: *
10326: * Function: inisci
10327: *
10328: * Description: Setup the data Structure with the info from the EEPROM.
10329: *
10330: *---------------------------------------------------------------------*/
10331:
10332: #if defined(DOS)
10333: void inisci(UCHAR p_card, USHORT p_port, UCHAR p_our_id)
10334: #else
10335: void inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id)
10336: #endif
10337: {
10338: UCHAR i,k,max_id;
10339: USHORT ee_data;
10340: PNVRamInfo pCurrNvRam;
10341:
10342: pCurrNvRam = BL_Card[p_card].pNvRamInfo;
10343:
10344: if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
10345: max_id = 0x08;
10346:
10347: else
10348: max_id = 0x10;
10349:
10350: if(pCurrNvRam){
10351: for(i = 0; i < max_id; i++){
10352:
10353: for(k = 0; k < 4; k++)
10354: scamInfo[i].id_string[k] = pCurrNvRam->niScamTbl[i][k];
10355: for(k = 4; k < ID_STRING_LENGTH; k++)
10356: scamInfo[i].id_string[k] = (UCHAR) 0x00;
10357:
10358: if(scamInfo[i].id_string[0] == 0x00)
10359: scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
10360: else
10361: scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
10362:
10363: }
10364: }else {
10365: for (i=0; i < max_id; i++)
10366: {
10367: for (k=0; k < ID_STRING_LENGTH; k+=2)
10368: {
10369: ee_data = utilEERead(p_port, (USHORT)((EE_SCAMBASE/2) +
10370: (USHORT) (i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2)));
10371: scamInfo[i].id_string[k] = (UCHAR) ee_data;
10372: ee_data >>= 8;
10373: scamInfo[i].id_string[k+1] = (UCHAR) ee_data;
10374: }
10375:
10376: if ((scamInfo[i].id_string[0] == 0x00) ||
10377: (scamInfo[i].id_string[0] == 0xFF))
10378:
10379: scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
10380:
10381: else
10382: scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
10383:
10384: }
10385: }
10386: for(k = 0; k < ID_STRING_LENGTH; k++)
10387: scamInfo[p_our_id].id_string[k] = scamHAString[k];
10388:
10389: }
10390:
10391: /*---------------------------------------------------------------------
10392: *
10393: * Function: scmachid
10394: *
10395: * Description: Match the Device ID string with our values stored in
10396: * the EEPROM.
10397: *
10398: *---------------------------------------------------------------------*/
10399:
10400: UCHAR scmachid(UCHAR p_card, UCHAR p_id_string[])
10401: {
10402:
10403: UCHAR i,k,match;
10404:
10405:
10406: for (i=0; i < MAX_SCSI_TAR; i++) {
10407:
10408: #if !defined(SCAM_LEV_2)
10409: if (scamInfo[i].state == ID_UNASSIGNED)
10410: {
10411: #endif
10412: match = TRUE;
10413:
10414: for (k=0; k < ID_STRING_LENGTH; k++)
10415: {
10416: if (p_id_string[k] != scamInfo[i].id_string[k])
10417: match = FALSE;
10418: }
10419:
10420: if (match)
10421: {
10422: scamInfo[i].state = ID_ASSIGNED;
10423: return(i);
10424: }
10425:
10426: #if !defined(SCAM_LEV_2)
10427: }
10428: #endif
10429:
10430: }
10431:
10432:
10433:
10434: if (p_id_string[0] & BIT(5))
10435: i = 8;
10436: else
10437: i = MAX_SCSI_TAR;
10438:
10439: if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04))
10440: match = p_id_string[1] & (UCHAR) 0x1F;
10441: else
10442: match = 7;
10443:
10444: while (i > 0)
10445: {
10446: i--;
10447:
10448: if (scamInfo[match].state == ID_UNUSED)
10449: {
10450: for (k=0; k < ID_STRING_LENGTH; k++)
10451: {
10452: scamInfo[match].id_string[k] = p_id_string[k];
10453: }
10454:
10455: scamInfo[match].state = ID_ASSIGNED;
10456:
10457: if(BL_Card[p_card].pNvRamInfo == NULL)
10458: BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM;
10459: return(match);
10460:
10461: }
10462:
10463:
10464: match--;
10465:
10466: if (match == 0xFF)
10467: {
10468: if (p_id_string[0] & BIT(5))
10469: match = 7;
10470: else
10471: match = MAX_SCSI_TAR-1;
10472: }
10473: }
10474:
10475:
10476:
10477: if (p_id_string[0] & BIT(7))
10478: {
10479: return(CLR_PRIORITY);
10480: }
10481:
10482:
10483: if (p_id_string[0] & BIT(5))
10484: i = 8;
10485: else
10486: i = MAX_SCSI_TAR;
10487:
10488: if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04))
10489: match = p_id_string[1] & (UCHAR) 0x1F;
10490: else
10491: match = 7;
10492:
10493: while (i > 0)
10494: {
10495:
10496: i--;
10497:
10498: if (scamInfo[match].state == ID_UNASSIGNED)
10499: {
10500: for (k=0; k < ID_STRING_LENGTH; k++)
10501: {
10502: scamInfo[match].id_string[k] = p_id_string[k];
10503: }
10504:
10505: scamInfo[match].id_string[0] |= BIT(7);
10506: scamInfo[match].state = ID_ASSIGNED;
10507: if(BL_Card[p_card].pNvRamInfo == NULL)
10508: BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM;
10509: return(match);
10510:
10511: }
10512:
10513:
10514: match--;
10515:
10516: if (match == 0xFF)
10517: {
10518: if (p_id_string[0] & BIT(5))
10519: match = 7;
10520: else
10521: match = MAX_SCSI_TAR-1;
10522: }
10523: }
10524:
10525: return(NO_ID_AVAIL);
10526: }
10527:
10528:
10529: /*---------------------------------------------------------------------
10530: *
10531: * Function: scsavdi
10532: *
10533: * Description: Save off the device SCAM ID strings.
10534: *
10535: *---------------------------------------------------------------------*/
10536:
10537: #if defined(DOS)
10538: void scsavdi(UCHAR p_card, USHORT p_port)
10539: #else
10540: void scsavdi(UCHAR p_card, ULONG p_port)
10541: #endif
10542: {
10543: UCHAR i,k,max_id;
10544: USHORT ee_data,sum_data;
10545:
10546:
10547: sum_data = 0x0000;
10548:
10549: for (i = 1; i < EE_SCAMBASE/2; i++)
10550: {
10551: sum_data += utilEERead(p_port, i);
10552: }
10553:
10554:
10555: utilEEWriteOnOff(p_port,1); /* Enable write access to the EEPROM */
10556:
10557: if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
10558: max_id = 0x08;
10559:
10560: else
10561: max_id = 0x10;
10562:
10563: for (i=0; i < max_id; i++)
10564: {
10565:
10566: for (k=0; k < ID_STRING_LENGTH; k+=2)
10567: {
10568: ee_data = scamInfo[i].id_string[k+1];
10569: ee_data <<= 8;
10570: ee_data |= scamInfo[i].id_string[k];
10571: sum_data += ee_data;
10572: utilEEWrite(p_port, ee_data, (USHORT)((EE_SCAMBASE/2) +
10573: (USHORT)(i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2)));
10574: }
10575: }
10576:
10577:
10578: utilEEWrite(p_port, sum_data, EEPROM_CHECK_SUM/2);
10579: utilEEWriteOnOff(p_port,0); /* Turn off write access */
10580: }
1.1.1.2 ! root 10581:
1.1 root 10582: /*----------------------------------------------------------------------
10583: *
10584: *
10585: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
10586: *
10587: * This file is available under both the GNU General Public License
10588: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
10589: *
10590: * $Workfile: diagnose.c $
10591: *
10592: * Description: Diagnostic funtions for testing the integrity of
10593: * the HARPOON.
10594: *
10595: * $Date: 1999/04/26 05:53:56 $
10596: *
10597: * $Revision: 1.1 $
10598: *
10599: *----------------------------------------------------------------------*/
10600:
10601: /*#include <globals.h>*/
10602:
10603: #if (FW_TYPE==_UCB_MGR_)
10604: /*#include <budi.h>*/
10605: #endif
10606:
10607: /*#include <sccbmgr.h>*/
10608: /*#include <blx30.h>*/
10609: /*#include <target.h>*/
10610: /*#include <eeprom.h>*/
10611: /*#include <harpoon.h>*/
10612:
10613: /*---------------------------------------------------------------------
10614: *
10615: * Function: XbowInit
10616: *
10617: * Description: Setup the Xbow for normal operation.
10618: *
10619: *---------------------------------------------------------------------*/
10620:
10621: #if defined(DOS)
10622: void XbowInit(USHORT port, UCHAR ScamFlg)
10623: #else
10624: void XbowInit(ULONG port, UCHAR ScamFlg)
10625: #endif
10626: {
10627: UCHAR i;
10628:
10629: i = RD_HARPOON(port+hp_page_ctrl);
10630: WR_HARPOON(port+hp_page_ctrl, (UCHAR) (i | G_INT_DISABLE));
10631:
10632: WR_HARPOON(port+hp_scsireset,0x00);
10633: WR_HARPOON(port+hp_portctrl_1,HOST_MODE8);
10634:
10635: WR_HARPOON(port+hp_scsireset,(DMA_RESET | HPSCSI_RESET | PROG_RESET | \
10636: FIFO_CLR));
10637:
10638: WR_HARPOON(port+hp_scsireset,SCSI_INI);
10639:
10640: WR_HARPOON(port+hp_clkctrl_0,CLKCTRL_DEFAULT);
10641:
10642: WR_HARPOON(port+hp_scsisig,0x00); /* Clear any signals we might */
10643: WR_HARPOON(port+hp_scsictrl_0,ENA_SCAM_SEL);
10644:
10645: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
10646:
10647: #if defined(SCAM_LEV_2)
10648: default_intena = RESET | RSEL | PROG_HLT | TIMEOUT |
10649: BUS_FREE | XFER_CNT_0 | AUTO_INT;
10650:
10651: if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2))
10652: default_intena |= SCAM_SEL;
10653:
10654: #else
10655: default_intena = RESET | RSEL | PROG_HLT | TIMEOUT |
10656: BUS_FREE | XFER_CNT_0 | AUTO_INT;
10657: #endif
10658: WRW_HARPOON((port+hp_intena), default_intena);
10659:
10660: WR_HARPOON(port+hp_seltimeout,TO_290ms);
10661:
10662: /* Turn on SCSI_MODE8 for narrow cards to fix the
10663: strapping issue with the DUAL CHANNEL card */
10664: if (RD_HARPOON(port+hp_page_ctrl) & NARROW_SCSI_CARD)
10665: WR_HARPOON(port+hp_addstat,SCSI_MODE8);
10666:
10667: #if defined(NO_BIOS_OPTION)
10668:
10669: WR_HARPOON(port+hp_synctarg_0,NARROW_SCSI);
10670: WR_HARPOON(port+hp_synctarg_1,NARROW_SCSI);
10671: WR_HARPOON(port+hp_synctarg_2,NARROW_SCSI);
10672: WR_HARPOON(port+hp_synctarg_3,NARROW_SCSI);
10673: WR_HARPOON(port+hp_synctarg_4,NARROW_SCSI);
10674: WR_HARPOON(port+hp_synctarg_5,NARROW_SCSI);
10675: WR_HARPOON(port+hp_synctarg_6,NARROW_SCSI);
10676: WR_HARPOON(port+hp_synctarg_7,NARROW_SCSI);
10677: WR_HARPOON(port+hp_synctarg_8,NARROW_SCSI);
10678: WR_HARPOON(port+hp_synctarg_9,NARROW_SCSI);
10679: WR_HARPOON(port+hp_synctarg_10,NARROW_SCSI);
10680: WR_HARPOON(port+hp_synctarg_11,NARROW_SCSI);
10681: WR_HARPOON(port+hp_synctarg_12,NARROW_SCSI);
10682: WR_HARPOON(port+hp_synctarg_13,NARROW_SCSI);
10683: WR_HARPOON(port+hp_synctarg_14,NARROW_SCSI);
10684: WR_HARPOON(port+hp_synctarg_15,NARROW_SCSI);
10685:
10686: #endif
10687: WR_HARPOON(port+hp_page_ctrl, i);
10688:
10689: }
10690:
10691:
10692: /*---------------------------------------------------------------------
10693: *
10694: * Function: BusMasterInit
10695: *
10696: * Description: Initialize the BusMaster for normal operations.
10697: *
10698: *---------------------------------------------------------------------*/
10699:
10700: #if defined(DOS)
10701: void BusMasterInit(USHORT p_port)
10702: #else
10703: void BusMasterInit(ULONG p_port)
10704: #endif
10705: {
10706:
10707:
10708: WR_HARPOON(p_port+hp_sys_ctrl, DRVR_RST);
10709: WR_HARPOON(p_port+hp_sys_ctrl, 0x00);
10710:
10711: WR_HARPOON(p_port+hp_host_blk_cnt, XFER_BLK64);
10712:
10713:
10714: WR_HARPOON(p_port+hp_bm_ctrl, (BMCTRL_DEFAULT));
10715:
10716: WR_HARPOON(p_port+hp_ee_ctrl, (SCSI_TERM_ENA_H));
10717:
10718:
10719: #if defined(NT)
10720:
10721: WR_HARPOON(p_port+hp_pci_cmd_cfg, (RD_HARPOON(p_port+hp_pci_cmd_cfg)
10722: & ~MEM_SPACE_ENA));
10723:
10724: #endif
10725:
10726: RD_HARPOON(p_port+hp_int_status); /*Clear interrupts. */
10727: WR_HARPOON(p_port+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
10728: WR_HARPOON(p_port+hp_page_ctrl, (RD_HARPOON(p_port+hp_page_ctrl) &
10729: ~SCATTER_EN));
10730: }
10731:
10732:
10733: /*---------------------------------------------------------------------
10734: *
10735: * Function: DiagXbow
10736: *
10737: * Description: Test Xbow integrity. Non-zero return indicates an error.
10738: *
10739: *---------------------------------------------------------------------*/
10740:
10741: #if defined(DOS)
10742: int DiagXbow(USHORT port)
10743: #else
10744: int DiagXbow(ULONG port)
10745: #endif
10746: {
10747: unsigned char fifo_cnt,loop_cnt;
10748:
10749: unsigned char fifodata[5];
10750: fifodata[0] = 0x00;
10751: fifodata[1] = 0xFF;
10752: fifodata[2] = 0x55;
10753: fifodata[3] = 0xAA;
10754: fifodata[4] = 0x00;
10755:
10756:
10757: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
10758: WRW_HARPOON((port+hp_intena), 0x0000);
10759:
10760: WR_HARPOON(port+hp_seltimeout,TO_5ms);
10761:
10762: WR_HARPOON(port+hp_portctrl_0,START_TO);
10763:
10764:
10765: for(fifodata[4] = 0x01; fifodata[4] != (UCHAR) 0; fifodata[4] = fifodata[4] << 1) {
10766:
10767: WR_HARPOON(port+hp_selfid_0,fifodata[4]);
10768: WR_HARPOON(port+hp_selfid_1,fifodata[4]);
10769:
10770: if ((RD_HARPOON(port+hp_selfid_0) != fifodata[4]) ||
10771: (RD_HARPOON(port+hp_selfid_1) != fifodata[4]))
10772: return(1);
10773: }
10774:
10775:
10776: for(loop_cnt = 0; loop_cnt < 4; loop_cnt++) {
10777:
10778: WR_HARPOON(port+hp_portctrl_0,(HOST_PORT | HOST_WRT | START_TO));
10779:
10780:
10781: for (fifo_cnt = 0; fifo_cnt < FIFO_LEN; fifo_cnt++) {
10782:
10783: WR_HARPOON(port+hp_fifodata_0, fifodata[loop_cnt]);
10784: }
10785:
10786:
10787: if (!(RD_HARPOON(port+hp_xferstat) & FIFO_FULL))
10788: return(1);
10789:
10790:
10791: WR_HARPOON(port+hp_portctrl_0,(HOST_PORT | START_TO));
10792:
10793: for (fifo_cnt = 0; fifo_cnt < FIFO_LEN; fifo_cnt++) {
10794:
10795: if (RD_HARPOON(port+hp_fifodata_0) != fifodata[loop_cnt])
10796: return(1);
10797: }
10798:
10799:
10800: if (!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY))
10801: return(1);
10802: }
10803:
10804:
10805: while(!(RDW_HARPOON((port+hp_intstat)) & TIMEOUT)) {}
10806:
10807:
10808: WR_HARPOON(port+hp_seltimeout,TO_290ms);
10809:
10810: WRW_HARPOON((port+hp_intstat), CLR_ALL_INT);
10811:
10812: WRW_HARPOON((port+hp_intena), default_intena);
10813:
10814: return(0);
10815: }
10816:
10817:
10818: /*---------------------------------------------------------------------
10819: *
10820: * Function: DiagBusMaster
10821: *
10822: * Description: Test BusMaster integrity. Non-zero return indicates an
10823: * error.
10824: *
10825: *---------------------------------------------------------------------*/
10826:
10827: #if defined(DOS)
10828: int DiagBusMaster(USHORT port)
10829: #else
10830: int DiagBusMaster(ULONG port)
10831: #endif
10832: {
10833: UCHAR testdata;
10834:
10835: for(testdata = (UCHAR) 1; testdata != (UCHAR)0; testdata = testdata << 1) {
10836:
10837: WR_HARPOON(port+hp_xfer_cnt_lo,testdata);
10838: WR_HARPOON(port+hp_xfer_cnt_mi,testdata);
10839: WR_HARPOON(port+hp_xfer_cnt_hi,testdata);
10840: WR_HARPOON(port+hp_host_addr_lo,testdata);
10841: WR_HARPOON(port+hp_host_addr_lmi,testdata);
10842: WR_HARPOON(port+hp_host_addr_hmi,testdata);
10843: WR_HARPOON(port+hp_host_addr_hi,testdata);
10844:
10845: if ((RD_HARPOON(port+hp_xfer_cnt_lo) != testdata) ||
10846: (RD_HARPOON(port+hp_xfer_cnt_mi) != testdata) ||
10847: (RD_HARPOON(port+hp_xfer_cnt_hi) != testdata) ||
10848: (RD_HARPOON(port+hp_host_addr_lo) != testdata) ||
10849: (RD_HARPOON(port+hp_host_addr_lmi) != testdata) ||
10850: (RD_HARPOON(port+hp_host_addr_hmi) != testdata) ||
10851: (RD_HARPOON(port+hp_host_addr_hi) != testdata))
10852:
10853: return(1);
10854: }
10855: RD_HARPOON(port+hp_int_status); /*Clear interrupts. */
10856: return(0);
10857: }
10858:
10859:
10860:
10861: /*---------------------------------------------------------------------
10862: *
10863: * Function: DiagEEPROM
10864: *
10865: * Description: Verfiy checksum and 'Key' and initialize the EEPROM if
10866: * neccessary.
10867: *
10868: *---------------------------------------------------------------------*/
10869:
10870: #if defined(DOS)
10871: void DiagEEPROM(USHORT p_port)
10872: #else
10873: void DiagEEPROM(ULONG p_port)
10874: #endif
10875:
10876: {
10877: USHORT index,temp,max_wd_cnt;
10878:
10879: if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
10880: max_wd_cnt = EEPROM_WD_CNT;
10881: else
10882: max_wd_cnt = EEPROM_WD_CNT * 2;
10883:
10884: temp = utilEERead(p_port, FW_SIGNATURE/2);
10885:
10886: if (temp == 0x4641) {
10887:
10888: for (index = 2; index < max_wd_cnt; index++) {
10889:
10890: temp += utilEERead(p_port, index);
10891:
10892: }
10893:
10894: if (temp == utilEERead(p_port, EEPROM_CHECK_SUM/2)) {
10895:
10896: return; /*EEPROM is Okay so return now! */
10897: }
10898: }
10899:
10900:
10901: utilEEWriteOnOff(p_port,(UCHAR)1);
10902:
10903: for (index = 0; index < max_wd_cnt; index++) {
10904:
10905: utilEEWrite(p_port, 0x0000, index);
10906: }
10907:
10908: temp = 0;
10909:
10910: utilEEWrite(p_port, 0x4641, FW_SIGNATURE/2);
10911: temp += 0x4641;
10912: utilEEWrite(p_port, 0x3920, MODEL_NUMB_0/2);
10913: temp += 0x3920;
10914: utilEEWrite(p_port, 0x3033, MODEL_NUMB_2/2);
10915: temp += 0x3033;
10916: utilEEWrite(p_port, 0x2020, MODEL_NUMB_4/2);
10917: temp += 0x2020;
10918: utilEEWrite(p_port, 0x70D3, SYSTEM_CONFIG/2);
10919: temp += 0x70D3;
10920: utilEEWrite(p_port, 0x0010, BIOS_CONFIG/2);
10921: temp += 0x0010;
10922: utilEEWrite(p_port, 0x0003, SCAM_CONFIG/2);
10923: temp += 0x0003;
10924: utilEEWrite(p_port, 0x0007, ADAPTER_SCSI_ID/2);
10925: temp += 0x0007;
10926:
10927: utilEEWrite(p_port, 0x0000, IGNORE_B_SCAN/2);
10928: temp += 0x0000;
10929: utilEEWrite(p_port, 0x0000, SEND_START_ENA/2);
10930: temp += 0x0000;
10931: utilEEWrite(p_port, 0x0000, DEVICE_ENABLE/2);
10932: temp += 0x0000;
10933:
10934: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL01/2);
10935: temp += 0x4242;
10936: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL23/2);
10937: temp += 0x4242;
10938: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL45/2);
10939: temp += 0x4242;
10940: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL67/2);
10941: temp += 0x4242;
10942: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL89/2);
10943: temp += 0x4242;
10944: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLab/2);
10945: temp += 0x4242;
10946: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLcd/2);
10947: temp += 0x4242;
10948: utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLef/2);
10949: temp += 0x4242;
10950:
10951:
10952: utilEEWrite(p_port, 0x6C46, 64/2); /*PRODUCT ID */
10953: temp += 0x6C46;
10954: utilEEWrite(p_port, 0x7361, 66/2); /* FlashPoint LT */
10955: temp += 0x7361;
10956: utilEEWrite(p_port, 0x5068, 68/2);
10957: temp += 0x5068;
10958: utilEEWrite(p_port, 0x696F, 70/2);
10959: temp += 0x696F;
10960: utilEEWrite(p_port, 0x746E, 72/2);
10961: temp += 0x746E;
10962: utilEEWrite(p_port, 0x4C20, 74/2);
10963: temp += 0x4C20;
10964: utilEEWrite(p_port, 0x2054, 76/2);
10965: temp += 0x2054;
10966: utilEEWrite(p_port, 0x2020, 78/2);
10967: temp += 0x2020;
10968:
10969: index = ((EE_SCAMBASE/2)+(7*16));
10970: utilEEWrite(p_port, (0x0700+TYPE_CODE0), index);
10971: temp += (0x0700+TYPE_CODE0);
10972: index++;
10973: utilEEWrite(p_port, 0x5542, index); /*Vendor ID code */
10974: temp += 0x5542; /* BUSLOGIC */
10975: index++;
10976: utilEEWrite(p_port, 0x4C53, index);
10977: temp += 0x4C53;
10978: index++;
10979: utilEEWrite(p_port, 0x474F, index);
10980: temp += 0x474F;
10981: index++;
10982: utilEEWrite(p_port, 0x4349, index);
10983: temp += 0x4349;
10984: index++;
10985: utilEEWrite(p_port, 0x5442, index); /*Vendor unique code */
10986: temp += 0x5442; /* BT- 930 */
10987: index++;
10988: utilEEWrite(p_port, 0x202D, index);
10989: temp += 0x202D;
10990: index++;
10991: utilEEWrite(p_port, 0x3339, index);
10992: temp += 0x3339;
10993: index++; /*Serial # */
10994: utilEEWrite(p_port, 0x2030, index); /* 01234567 */
10995: temp += 0x2030;
10996: index++;
10997: utilEEWrite(p_port, 0x5453, index);
10998: temp += 0x5453;
10999: index++;
11000: utilEEWrite(p_port, 0x5645, index);
11001: temp += 0x5645;
11002: index++;
11003: utilEEWrite(p_port, 0x2045, index);
11004: temp += 0x2045;
11005: index++;
11006: utilEEWrite(p_port, 0x202F, index);
11007: temp += 0x202F;
11008: index++;
11009: utilEEWrite(p_port, 0x4F4A, index);
11010: temp += 0x4F4A;
11011: index++;
11012: utilEEWrite(p_port, 0x204E, index);
11013: temp += 0x204E;
11014: index++;
11015: utilEEWrite(p_port, 0x3539, index);
11016: temp += 0x3539;
11017:
11018:
11019:
11020: utilEEWrite(p_port, temp, EEPROM_CHECK_SUM/2);
11021:
11022: utilEEWriteOnOff(p_port,(UCHAR)0);
11023:
11024: }
11025:
1.1.1.2 ! root 11026:
1.1 root 11027: /*----------------------------------------------------------------------
11028: *
11029: *
11030: * Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
11031: *
11032: * This file is available under both the GNU General Public License
11033: * and a BSD-style copyright; see LICENSE.FlashPoint for details.
11034: *
11035: * $Workfile: utility.c $
11036: *
11037: * Description: Utility functions relating to queueing and EEPROM
11038: * manipulation and any other garbage functions.
11039: *
11040: * $Date: 1999/04/26 05:53:56 $
11041: *
11042: * $Revision: 1.1 $
11043: *
11044: *----------------------------------------------------------------------*/
11045: /*#include <globals.h>*/
11046:
11047: #if (FW_TYPE==_UCB_MGR_)
11048: /*#include <budi.h>*/
11049: #endif
11050:
11051: /*#include <sccbmgr.h>*/
11052: /*#include <blx30.h>*/
11053: /*#include <target.h>*/
11054: /*#include <scsi2.h>*/
11055: /*#include <harpoon.h>*/
11056:
11057:
11058: /*
11059: extern SCCBCARD BL_Card[MAX_CARDS];
11060: extern SCCBMGR_TAR_INFO sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR];
11061: extern unsigned int SccbGlobalFlags;
11062: */
11063:
11064: /*---------------------------------------------------------------------
11065: *
11066: * Function: Queue Search Select
11067: *
11068: * Description: Try to find a new command to execute.
11069: *
11070: *---------------------------------------------------------------------*/
11071:
11072: void queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card)
11073: {
11074: UCHAR scan_ptr, lun;
11075: PSCCBMgr_tar_info currTar_Info;
11076: PSCCB pOldSccb;
11077:
11078: scan_ptr = pCurrCard->scanIndex;
11079: do
11080: {
11081: currTar_Info = &sccbMgrTbl[p_card][scan_ptr];
11082: if((pCurrCard->globalFlags & F_CONLUN_IO) &&
11083: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
11084: {
11085: if (currTar_Info->TarSelQ_Cnt != 0)
11086: {
11087:
11088: scan_ptr++;
11089: if (scan_ptr == MAX_SCSI_TAR)
11090: scan_ptr = 0;
11091:
11092: for(lun=0; lun < MAX_LUN; lun++)
11093: {
11094: if(currTar_Info->TarLUNBusy[lun] == FALSE)
11095: {
11096:
11097: pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head;
11098: pOldSccb = NULL;
11099:
11100: while((pCurrCard->currentSCCB != NULL) &&
11101: (lun != pCurrCard->currentSCCB->Lun))
11102: {
11103: pOldSccb = pCurrCard->currentSCCB;
11104: pCurrCard->currentSCCB = (PSCCB)(pCurrCard->currentSCCB)->
11105: Sccb_forwardlink;
11106: }
11107: if(pCurrCard->currentSCCB == NULL)
11108: continue;
11109: if(pOldSccb != NULL)
11110: {
11111: pOldSccb->Sccb_forwardlink = (PSCCB)(pCurrCard->currentSCCB)->
11112: Sccb_forwardlink;
11113: pOldSccb->Sccb_backlink = (PSCCB)(pCurrCard->currentSCCB)->
11114: Sccb_backlink;
11115: currTar_Info->TarSelQ_Cnt--;
11116: }
11117: else
11118: {
11119: currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink;
11120:
11121: if (currTar_Info->TarSelQ_Head == NULL)
11122: {
11123: currTar_Info->TarSelQ_Tail = NULL;
11124: currTar_Info->TarSelQ_Cnt = 0;
11125: }
11126: else
11127: {
11128: currTar_Info->TarSelQ_Cnt--;
11129: currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL;
11130: }
11131: }
11132: pCurrCard->scanIndex = scan_ptr;
11133:
11134: pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
11135:
11136: break;
11137: }
11138: }
11139: }
11140:
11141: else
11142: {
11143: scan_ptr++;
11144: if (scan_ptr == MAX_SCSI_TAR) {
11145: scan_ptr = 0;
11146: }
11147: }
11148:
11149: }
11150: else
11151: {
11152: if ((currTar_Info->TarSelQ_Cnt != 0) &&
11153: (currTar_Info->TarLUNBusy[0] == FALSE))
11154: {
11155:
11156: pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head;
11157:
11158: currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink;
11159:
11160: if (currTar_Info->TarSelQ_Head == NULL)
11161: {
11162: currTar_Info->TarSelQ_Tail = NULL;
11163: currTar_Info->TarSelQ_Cnt = 0;
11164: }
11165: else
11166: {
11167: currTar_Info->TarSelQ_Cnt--;
11168: currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL;
11169: }
11170:
11171: scan_ptr++;
11172: if (scan_ptr == MAX_SCSI_TAR)
11173: scan_ptr = 0;
11174:
11175: pCurrCard->scanIndex = scan_ptr;
11176:
11177: pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
11178:
11179: break;
11180: }
11181:
11182: else
11183: {
11184: scan_ptr++;
11185: if (scan_ptr == MAX_SCSI_TAR)
11186: {
11187: scan_ptr = 0;
11188: }
11189: }
11190: }
11191: } while (scan_ptr != pCurrCard->scanIndex);
11192: }
11193:
11194:
11195: /*---------------------------------------------------------------------
11196: *
11197: * Function: Queue Select Fail
11198: *
11199: * Description: Add the current SCCB to the head of the Queue.
11200: *
11201: *---------------------------------------------------------------------*/
11202:
11203: void queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card)
11204: {
11205: UCHAR thisTarg;
11206: PSCCBMgr_tar_info currTar_Info;
11207:
11208: if (pCurrCard->currentSCCB != NULL)
11209: {
11210: thisTarg = (UCHAR)(((PSCCB)(pCurrCard->currentSCCB))->TargID);
11211: currTar_Info = &sccbMgrTbl[p_card][thisTarg];
11212:
11213: pCurrCard->currentSCCB->Sccb_backlink = (PSCCB)NULL;
11214:
11215: pCurrCard->currentSCCB->Sccb_forwardlink = currTar_Info->TarSelQ_Head;
11216:
11217: if (currTar_Info->TarSelQ_Cnt == 0)
11218: {
11219: currTar_Info->TarSelQ_Tail = pCurrCard->currentSCCB;
11220: }
11221:
11222: else
11223: {
11224: currTar_Info->TarSelQ_Head->Sccb_backlink = pCurrCard->currentSCCB;
11225: }
11226:
11227:
11228: currTar_Info->TarSelQ_Head = pCurrCard->currentSCCB;
11229:
11230: pCurrCard->currentSCCB = NULL;
11231: currTar_Info->TarSelQ_Cnt++;
11232: }
11233: }
11234: /*---------------------------------------------------------------------
11235: *
11236: * Function: Queue Command Complete
11237: *
11238: * Description: Call the callback function with the current SCCB.
11239: *
11240: *---------------------------------------------------------------------*/
11241:
11242: void queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_sccb, UCHAR p_card)
11243: {
11244:
11245: #if (FW_TYPE==_UCB_MGR_)
11246:
11247: u08bits SCSIcmd;
11248: CALL_BK_FN callback;
11249: PSCCBMgr_tar_info currTar_Info;
11250:
11251: PUCB p_ucb;
11252: p_ucb=p_sccb->Sccb_ucb_ptr;
11253:
11254: SCSIcmd = p_sccb->Cdb[0];
11255:
11256:
11257: if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED))
11258: {
11259:
11260: if ((p_ucb->UCB_opcode & OPC_CHK_UNDER_OVER_RUN) &&
11261: (p_sccb->HostStatus == SCCB_COMPLETE) &&
11262: (p_sccb->TargetStatus != SSCHECK))
11263:
11264: if ((SCSIcmd == SCSI_READ) ||
11265: (SCSIcmd == SCSI_WRITE) ||
11266: (SCSIcmd == SCSI_READ_EXTENDED) ||
11267: (SCSIcmd == SCSI_WRITE_EXTENDED) ||
11268: (SCSIcmd == SCSI_WRITE_AND_VERIFY) ||
11269: (SCSIcmd == SCSI_START_STOP_UNIT) ||
11270: (pCurrCard->globalFlags & F_NO_FILTER)
11271: )
11272: p_sccb->HostStatus = SCCB_DATA_UNDER_RUN;
11273: }
11274:
11275: p_ucb->UCB_status=SCCB_SUCCESS;
11276:
11277: if ((p_ucb->UCB_hbastat=p_sccb->HostStatus) || (p_ucb->UCB_scsistat=p_sccb->TargetStatus))
11278: {
11279: p_ucb->UCB_status=SCCB_ERROR;
11280: }
11281:
11282: if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) ||
11283: (p_sccb->OperationCode == RESIDUAL_COMMAND))
11284: {
11285:
11286: utilUpdateResidual(p_sccb);
11287:
11288: p_ucb->UCB_datalen=p_sccb->DataLength;
11289: }
11290:
11291: pCurrCard->cmdCounter--;
11292: if (!pCurrCard->cmdCounter)
11293: {
11294:
11295: if (pCurrCard->globalFlags & F_GREEN_PC)
11296: {
11297: WR_HARPOON(pCurrCard->ioPort+hp_clkctrl_0,(PWR_DWN | CLKCTRL_DEFAULT));
11298: WR_HARPOON(pCurrCard->ioPort+hp_sys_ctrl, STOP_CLK);
11299: }
11300:
11301: WR_HARPOON(pCurrCard->ioPort+hp_semaphore,
11302: (RD_HARPOON(pCurrCard->ioPort+hp_semaphore) & ~SCCB_MGR_ACTIVE));
11303: }
11304:
11305: if(pCurrCard->discQCount != 0)
11306: {
11307: currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
11308: if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
11309: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
11310: {
11311: pCurrCard->discQCount--;
11312: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = NULL;
11313: }
11314: else
11315: {
11316: if(p_sccb->Sccb_tag)
11317: {
11318: pCurrCard->discQCount--;
11319: pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL;
11320: }else
11321: {
11322: pCurrCard->discQCount--;
11323: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
11324: }
11325: }
11326:
11327: }
11328: callback = (CALL_BK_FN)p_ucb->UCB_callback;
11329: callback(p_ucb);
11330: pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
11331: pCurrCard->currentSCCB = NULL;
11332: }
11333:
11334:
11335:
11336:
11337: #else
11338:
11339: UCHAR i, SCSIcmd;
11340: CALL_BK_FN callback;
11341: PSCCBMgr_tar_info currTar_Info;
11342:
11343: SCSIcmd = p_sccb->Cdb[0];
11344:
11345:
11346: if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED)) {
11347:
11348: if ((p_sccb->ControlByte & (SCCB_DATA_XFER_OUT | SCCB_DATA_XFER_IN)) &&
11349: (p_sccb->HostStatus == SCCB_COMPLETE) &&
11350: (p_sccb->TargetStatus != SSCHECK))
11351:
11352: if ((SCSIcmd == SCSI_READ) ||
11353: (SCSIcmd == SCSI_WRITE) ||
11354: (SCSIcmd == SCSI_READ_EXTENDED) ||
11355: (SCSIcmd == SCSI_WRITE_EXTENDED) ||
11356: (SCSIcmd == SCSI_WRITE_AND_VERIFY) ||
11357: (SCSIcmd == SCSI_START_STOP_UNIT) ||
11358: (pCurrCard->globalFlags & F_NO_FILTER)
11359: )
11360: p_sccb->HostStatus = SCCB_DATA_UNDER_RUN;
11361: }
11362:
11363:
11364: if(p_sccb->SccbStatus == SCCB_IN_PROCESS)
11365: {
11366: if (p_sccb->HostStatus || p_sccb->TargetStatus)
11367: p_sccb->SccbStatus = SCCB_ERROR;
11368: else
11369: p_sccb->SccbStatus = SCCB_SUCCESS;
11370: }
11371:
11372: if (p_sccb->Sccb_XferState & F_AUTO_SENSE) {
11373:
11374: p_sccb->CdbLength = p_sccb->Save_CdbLen;
11375: for (i=0; i < 6; i++) {
11376: p_sccb->Cdb[i] = p_sccb->Save_Cdb[i];
11377: }
11378: }
11379:
11380: if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) ||
11381: (p_sccb->OperationCode == RESIDUAL_COMMAND)) {
11382:
11383: utilUpdateResidual(p_sccb);
11384: }
11385:
11386: pCurrCard->cmdCounter--;
11387: if (!pCurrCard->cmdCounter) {
11388:
11389: if (pCurrCard->globalFlags & F_GREEN_PC) {
11390: WR_HARPOON(pCurrCard->ioPort+hp_clkctrl_0,(PWR_DWN | CLKCTRL_DEFAULT));
11391: WR_HARPOON(pCurrCard->ioPort+hp_sys_ctrl, STOP_CLK);
11392: }
11393:
11394: WR_HARPOON(pCurrCard->ioPort+hp_semaphore,
11395: (RD_HARPOON(pCurrCard->ioPort+hp_semaphore) & ~SCCB_MGR_ACTIVE));
11396:
11397: }
11398:
11399: if(pCurrCard->discQCount != 0)
11400: {
11401: currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
11402: if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
11403: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
11404: {
11405: pCurrCard->discQCount--;
11406: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = NULL;
11407: }
11408: else
11409: {
11410: if(p_sccb->Sccb_tag)
11411: {
11412: pCurrCard->discQCount--;
11413: pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL;
11414: }else
11415: {
11416: pCurrCard->discQCount--;
11417: pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL;
11418: }
11419: }
11420:
11421: }
11422:
11423: callback = (CALL_BK_FN)p_sccb->SccbCallback;
11424: callback(p_sccb);
11425: pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
11426: pCurrCard->currentSCCB = NULL;
11427: }
11428: #endif /* ( if FW_TYPE==...) */
11429:
11430:
11431: /*---------------------------------------------------------------------
11432: *
11433: * Function: Queue Disconnect
11434: *
11435: * Description: Add SCCB to our disconnect array.
11436: *
11437: *---------------------------------------------------------------------*/
11438: void queueDisconnect(PSCCB p_sccb, UCHAR p_card)
11439: {
11440: PSCCBMgr_tar_info currTar_Info;
11441:
11442: currTar_Info = &sccbMgrTbl[p_card][p_sccb->TargID];
11443:
11444: if(((BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
11445: ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
11446: {
11447: BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = p_sccb;
11448: }
11449: else
11450: {
11451: if (p_sccb->Sccb_tag)
11452: {
11453: BL_Card[p_card].discQ_Tbl[p_sccb->Sccb_tag] = p_sccb;
11454: sccbMgrTbl[p_card][p_sccb->TargID].TarLUNBusy[0] = FALSE;
11455: sccbMgrTbl[p_card][p_sccb->TargID].TarTagQ_Cnt++;
11456: }else
11457: {
11458: BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = p_sccb;
11459: }
11460: }
11461: BL_Card[p_card].currentSCCB = NULL;
11462: }
11463:
11464:
11465: /*---------------------------------------------------------------------
11466: *
11467: * Function: Queue Flush SCCB
11468: *
11469: * Description: Flush all SCCB's back to the host driver for this target.
11470: *
11471: *---------------------------------------------------------------------*/
11472:
11473: void queueFlushSccb(UCHAR p_card, UCHAR error_code)
11474: {
11475: UCHAR qtag,thisTarg;
11476: PSCCB currSCCB;
11477: PSCCBMgr_tar_info currTar_Info;
11478:
11479: currSCCB = BL_Card[p_card].currentSCCB;
11480: if(currSCCB != NULL)
11481: {
11482: thisTarg = (UCHAR)currSCCB->TargID;
11483: currTar_Info = &sccbMgrTbl[p_card][thisTarg];
11484:
11485: for (qtag=0; qtag<QUEUE_DEPTH; qtag++) {
11486:
11487: if (BL_Card[p_card].discQ_Tbl[qtag] &&
11488: (BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg))
11489: {
11490:
11491: BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code;
11492:
11493: queueCmdComplete(&BL_Card[p_card],BL_Card[p_card].discQ_Tbl[qtag], p_card);
11494:
11495: BL_Card[p_card].discQ_Tbl[qtag] = NULL;
11496: currTar_Info->TarTagQ_Cnt--;
11497:
11498: }
11499: }
11500: }
11501:
11502: }
11503:
11504: /*---------------------------------------------------------------------
11505: *
11506: * Function: Queue Flush Target SCCB
11507: *
11508: * Description: Flush all SCCB's back to the host driver for this target.
11509: *
11510: *---------------------------------------------------------------------*/
11511:
11512: void queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, UCHAR error_code)
11513: {
11514: UCHAR qtag;
11515: PSCCBMgr_tar_info currTar_Info;
11516:
11517: currTar_Info = &sccbMgrTbl[p_card][thisTarg];
11518:
11519: for (qtag=0; qtag<QUEUE_DEPTH; qtag++) {
11520:
11521: if (BL_Card[p_card].discQ_Tbl[qtag] &&
11522: (BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg))
11523: {
11524:
11525: BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code;
11526:
11527: queueCmdComplete(&BL_Card[p_card],BL_Card[p_card].discQ_Tbl[qtag], p_card);
11528:
11529: BL_Card[p_card].discQ_Tbl[qtag] = NULL;
11530: currTar_Info->TarTagQ_Cnt--;
11531:
11532: }
11533: }
11534:
11535: }
11536:
11537:
11538:
11539:
11540:
11541: void queueAddSccb(PSCCB p_SCCB, UCHAR p_card)
11542: {
11543: PSCCBMgr_tar_info currTar_Info;
11544: currTar_Info = &sccbMgrTbl[p_card][p_SCCB->TargID];
11545:
11546: p_SCCB->Sccb_forwardlink = NULL;
11547:
11548: p_SCCB->Sccb_backlink = currTar_Info->TarSelQ_Tail;
11549:
11550: if (currTar_Info->TarSelQ_Cnt == 0) {
11551:
11552: currTar_Info->TarSelQ_Head = p_SCCB;
11553: }
11554:
11555: else {
11556:
11557: currTar_Info->TarSelQ_Tail->Sccb_forwardlink = p_SCCB;
11558: }
11559:
11560:
11561: currTar_Info->TarSelQ_Tail = p_SCCB;
11562: currTar_Info->TarSelQ_Cnt++;
11563: }
11564:
11565:
11566: /*---------------------------------------------------------------------
11567: *
11568: * Function: Queue Find SCCB
11569: *
11570: * Description: Search the target select Queue for this SCCB, and
11571: * remove it if found.
11572: *
11573: *---------------------------------------------------------------------*/
11574:
11575: UCHAR queueFindSccb(PSCCB p_SCCB, UCHAR p_card)
11576: {
11577: PSCCB q_ptr;
11578: PSCCBMgr_tar_info currTar_Info;
11579:
11580: currTar_Info = &sccbMgrTbl[p_card][p_SCCB->TargID];
11581:
11582: q_ptr = currTar_Info->TarSelQ_Head;
11583:
11584: while(q_ptr != NULL) {
11585:
11586: if (q_ptr == p_SCCB) {
11587:
11588:
11589: if (currTar_Info->TarSelQ_Head == q_ptr) {
11590:
11591: currTar_Info->TarSelQ_Head = q_ptr->Sccb_forwardlink;
11592: }
11593:
11594: if (currTar_Info->TarSelQ_Tail == q_ptr) {
11595:
11596: currTar_Info->TarSelQ_Tail = q_ptr->Sccb_backlink;
11597: }
11598:
11599: if (q_ptr->Sccb_forwardlink != NULL) {
11600: q_ptr->Sccb_forwardlink->Sccb_backlink = q_ptr->Sccb_backlink;
11601: }
11602:
11603: if (q_ptr->Sccb_backlink != NULL) {
11604: q_ptr->Sccb_backlink->Sccb_forwardlink = q_ptr->Sccb_forwardlink;
11605: }
11606:
11607: currTar_Info->TarSelQ_Cnt--;
11608:
11609: return(TRUE);
11610: }
11611:
11612: else {
11613: q_ptr = q_ptr->Sccb_forwardlink;
11614: }
11615: }
11616:
11617:
11618: return(FALSE);
11619:
11620: }
11621:
11622:
11623: /*---------------------------------------------------------------------
11624: *
11625: * Function: Utility Update Residual Count
11626: *
11627: * Description: Update the XferCnt to the remaining byte count.
11628: * If we transferred all the data then just write zero.
11629: * If Non-SG transfer then report Total Cnt - Actual Transfer
11630: * Cnt. For SG transfers add the count fields of all
11631: * remaining SG elements, as well as any partial remaining
11632: * element.
11633: *
11634: *---------------------------------------------------------------------*/
11635:
11636: void utilUpdateResidual(PSCCB p_SCCB)
11637: {
11638: ULONG partial_cnt;
11639: UINT sg_index;
11640: #if defined(COMPILER_16_BIT) && !defined(DOS)
11641: ULONG far *sg_ptr;
11642: #else
11643: ULONG *sg_ptr;
11644: #endif
11645:
11646: if (p_SCCB->Sccb_XferState & F_ALL_XFERRED) {
11647:
11648: p_SCCB->DataLength = 0x0000;
11649: }
11650:
11651: else if (p_SCCB->Sccb_XferState & F_SG_XFER) {
11652:
11653: partial_cnt = 0x0000;
11654:
11655: sg_index = p_SCCB->Sccb_sgseg;
11656:
11657: #if defined(COMPILER_16_BIT) && !defined(DOS)
11658: sg_ptr = (ULONG far *)p_SCCB->DataPointer;
11659: #else
11660: sg_ptr = (ULONG *)p_SCCB->DataPointer;
11661: #endif
11662:
11663: if (p_SCCB->Sccb_SGoffset) {
11664:
11665: partial_cnt = p_SCCB->Sccb_SGoffset;
11666: sg_index++;
11667: }
11668:
11669: while ( ((ULONG)sg_index * (ULONG)SG_ELEMENT_SIZE) <
11670: p_SCCB->DataLength ) {
11671:
11672: partial_cnt += *(sg_ptr+(sg_index * 2));
11673: sg_index++;
11674: }
11675:
11676: p_SCCB->DataLength = partial_cnt;
11677: }
11678:
11679: else {
11680:
11681: p_SCCB->DataLength -= p_SCCB->Sccb_ATC;
11682: }
11683: }
11684:
11685:
11686: /*---------------------------------------------------------------------
11687: *
11688: * Function: Wait 1 Second
11689: *
11690: * Description: Wait for 1 second.
11691: *
11692: *---------------------------------------------------------------------*/
11693:
11694: #if defined(DOS)
11695: void Wait1Second(USHORT p_port)
11696: #else
11697: void Wait1Second(ULONG p_port)
11698: #endif
11699: {
11700: UCHAR i;
11701:
11702: for(i=0; i < 4; i++) {
11703:
11704: Wait(p_port, TO_250ms);
11705:
11706: if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST))
11707: break;
11708:
11709: if((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL))
11710: break;
11711: }
11712: }
11713:
11714:
11715: /*---------------------------------------------------------------------
11716: *
11717: * Function: Wait
11718: *
11719: * Description: Wait the desired delay.
11720: *
11721: *---------------------------------------------------------------------*/
11722:
11723: #if defined(DOS)
11724: void Wait(USHORT p_port, UCHAR p_delay)
11725: #else
11726: void Wait(ULONG p_port, UCHAR p_delay)
11727: #endif
11728: {
11729: UCHAR old_timer;
11730: UCHAR green_flag;
11731:
11732: old_timer = RD_HARPOON(p_port+hp_seltimeout);
11733:
11734: green_flag=RD_HARPOON(p_port+hp_clkctrl_0);
11735: WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT);
11736:
11737: WR_HARPOON(p_port+hp_seltimeout,p_delay);
11738: WRW_HARPOON((p_port+hp_intstat), TIMEOUT);
11739: WRW_HARPOON((p_port+hp_intena), (default_intena & ~TIMEOUT));
11740:
11741:
11742: WR_HARPOON(p_port+hp_portctrl_0,
11743: (RD_HARPOON(p_port+hp_portctrl_0) | START_TO));
11744:
11745: while (!(RDW_HARPOON((p_port+hp_intstat)) & TIMEOUT)) {
11746:
11747: if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST))
11748: break;
11749:
11750: if ((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL))
11751: break;
11752: }
11753:
11754: WR_HARPOON(p_port+hp_portctrl_0,
11755: (RD_HARPOON(p_port+hp_portctrl_0) & ~START_TO));
11756:
11757: WRW_HARPOON((p_port+hp_intstat), TIMEOUT);
11758: WRW_HARPOON((p_port+hp_intena), default_intena);
11759:
11760: WR_HARPOON(p_port+hp_clkctrl_0,green_flag);
11761:
11762: WR_HARPOON(p_port+hp_seltimeout,old_timer);
11763: }
11764:
11765:
11766: /*---------------------------------------------------------------------
11767: *
11768: * Function: Enable/Disable Write to EEPROM
11769: *
11770: * Description: The EEPROM must first be enabled for writes
11771: * A total of 9 clocks are needed.
11772: *
11773: *---------------------------------------------------------------------*/
11774:
11775: #if defined(DOS)
11776: void utilEEWriteOnOff(USHORT p_port,UCHAR p_mode)
11777: #else
11778: void utilEEWriteOnOff(ULONG p_port,UCHAR p_mode)
11779: #endif
11780: {
11781: UCHAR ee_value;
11782:
11783: ee_value = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H));
11784:
11785: if (p_mode)
11786:
11787: utilEESendCmdAddr(p_port, EWEN, EWEN_ADDR);
11788:
11789: else
11790:
11791:
11792: utilEESendCmdAddr(p_port, EWDS, EWDS_ADDR);
11793:
11794: WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
11795: WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */
11796: }
11797:
11798:
11799: /*---------------------------------------------------------------------
11800: *
11801: * Function: Write EEPROM
11802: *
11803: * Description: Write a word to the EEPROM at the specified
11804: * address.
11805: *
11806: *---------------------------------------------------------------------*/
11807:
11808: #if defined(DOS)
11809: void utilEEWrite(USHORT p_port, USHORT ee_data, USHORT ee_addr)
11810: #else
11811: void utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr)
11812: #endif
11813: {
11814:
11815: UCHAR ee_value;
11816: USHORT i;
11817:
11818: ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
11819: (SEE_MS | SEE_CS));
11820:
11821:
11822:
11823: utilEESendCmdAddr(p_port, EE_WRITE, ee_addr);
11824:
11825:
11826: ee_value |= (SEE_MS + SEE_CS);
11827:
11828: for(i = 0x8000; i != 0; i>>=1) {
11829:
11830: if (i & ee_data)
11831: ee_value |= SEE_DO;
11832: else
11833: ee_value &= ~SEE_DO;
11834:
11835: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11836: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11837: ee_value |= SEE_CLK; /* Clock data! */
11838: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11839: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11840: ee_value &= ~SEE_CLK;
11841: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11842: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11843: }
11844: ee_value &= (EXT_ARB_ACK | SCSI_TERM_ENA_H);
11845: WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS));
11846:
11847: Wait(p_port, TO_10ms);
11848:
11849: WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS | SEE_CS)); /* Set CS to EEPROM */
11850: WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /* Turn off CS */
11851: WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /* Turn off Master Select */
11852: }
11853:
11854: /*---------------------------------------------------------------------
11855: *
11856: * Function: Read EEPROM
11857: *
11858: * Description: Read a word from the EEPROM at the desired
11859: * address.
11860: *
11861: *---------------------------------------------------------------------*/
11862:
11863: #if defined(DOS)
11864: USHORT utilEERead(USHORT p_port, USHORT ee_addr)
11865: #else
11866: USHORT utilEERead(ULONG p_port, USHORT ee_addr)
11867: #endif
11868: {
11869: USHORT i, ee_data1, ee_data2;
11870:
11871: i = 0;
11872: ee_data1 = utilEEReadOrg(p_port, ee_addr);
11873: do
11874: {
11875: ee_data2 = utilEEReadOrg(p_port, ee_addr);
11876:
11877: if(ee_data1 == ee_data2)
11878: return(ee_data1);
11879:
11880: ee_data1 = ee_data2;
11881: i++;
11882:
11883: }while(i < 4);
11884:
11885: return(ee_data1);
11886: }
11887:
11888: /*---------------------------------------------------------------------
11889: *
11890: * Function: Read EEPROM Original
11891: *
11892: * Description: Read a word from the EEPROM at the desired
11893: * address.
11894: *
11895: *---------------------------------------------------------------------*/
11896:
11897: #if defined(DOS)
11898: USHORT utilEEReadOrg(USHORT p_port, USHORT ee_addr)
11899: #else
11900: USHORT utilEEReadOrg(ULONG p_port, USHORT ee_addr)
11901: #endif
11902: {
11903:
11904: UCHAR ee_value;
11905: USHORT i, ee_data;
11906:
11907: ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
11908: (SEE_MS | SEE_CS));
11909:
11910:
11911: utilEESendCmdAddr(p_port, EE_READ, ee_addr);
11912:
11913:
11914: ee_value |= (SEE_MS + SEE_CS);
11915: ee_data = 0;
11916:
11917: for(i = 1; i <= 16; i++) {
11918:
11919: ee_value |= SEE_CLK; /* Clock data! */
11920: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11921: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11922: ee_value &= ~SEE_CLK;
11923: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11924: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11925:
11926: ee_data <<= 1;
11927:
11928: if (RD_HARPOON(p_port+hp_ee_ctrl) & SEE_DI)
11929: ee_data |= 1;
11930: }
11931:
11932: ee_value &= ~(SEE_MS + SEE_CS);
11933: WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
11934: WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */
11935:
11936: return(ee_data);
11937: }
11938:
11939:
11940: /*---------------------------------------------------------------------
11941: *
11942: * Function: Send EE command and Address to the EEPROM
11943: *
11944: * Description: Transfers the correct command and sends the address
11945: * to the eeprom.
11946: *
11947: *---------------------------------------------------------------------*/
11948:
11949: #if defined(DOS)
11950: void utilEESendCmdAddr(USHORT p_port, UCHAR ee_cmd, USHORT ee_addr)
11951: #else
11952: void utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr)
11953: #endif
11954: {
11955: UCHAR ee_value;
11956: UCHAR narrow_flg;
11957:
11958: USHORT i;
11959:
11960:
11961: narrow_flg= (UCHAR)(RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD);
11962:
11963:
11964: ee_value = SEE_MS;
11965: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11966:
11967: ee_value |= SEE_CS; /* Set CS to EEPROM */
11968: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11969:
11970:
11971: for(i = 0x04; i != 0; i>>=1) {
11972:
11973: if (i & ee_cmd)
11974: ee_value |= SEE_DO;
11975: else
11976: ee_value &= ~SEE_DO;
11977:
11978: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11979: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11980: ee_value |= SEE_CLK; /* Clock data! */
11981: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11982: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11983: ee_value &= ~SEE_CLK;
11984: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11985: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
11986: }
11987:
11988:
11989: if (narrow_flg)
11990: i = 0x0080;
11991:
11992: else
11993: i = 0x0200;
11994:
11995:
11996: while (i != 0) {
11997:
11998: if (i & ee_addr)
11999: ee_value |= SEE_DO;
12000: else
12001: ee_value &= ~SEE_DO;
12002:
12003: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12004: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12005: ee_value |= SEE_CLK; /* Clock data! */
12006: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12007: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12008: ee_value &= ~SEE_CLK;
12009: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12010: WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
12011:
12012: i >>= 1;
12013: }
12014: }
12015:
12016: USHORT CalcCrc16(UCHAR buffer[])
12017: {
12018: USHORT crc=0;
12019: int i,j;
12020: USHORT ch;
12021: for (i=0; i < ID_STRING_LENGTH; i++)
12022: {
12023: ch = (USHORT) buffer[i];
12024: for(j=0; j < 8; j++)
12025: {
12026: if ((crc ^ ch) & 1)
12027: crc = (crc >> 1) ^ CRCMASK;
12028: else
12029: crc >>= 1;
12030: ch >>= 1;
12031: }
12032: }
12033: return(crc);
12034: }
12035:
12036: UCHAR CalcLrc(UCHAR buffer[])
12037: {
12038: int i;
12039: UCHAR lrc;
12040: lrc = 0;
12041: for(i = 0; i < ID_STRING_LENGTH; i++)
12042: lrc ^= buffer[i];
12043: return(lrc);
12044: }
12045:
12046:
12047:
12048: /*
12049: The following inline definitions avoid type conflicts.
12050: */
12051:
12052: static inline unsigned char
12053: FlashPoint__ProbeHostAdapter(FlashPoint_Info_T *FlashPointInfo)
12054: {
12055: return FlashPoint_ProbeHostAdapter((PSCCBMGR_INFO) FlashPointInfo);
12056: }
12057:
12058:
12059: static inline FlashPoint_CardHandle_T
12060: FlashPoint__HardwareResetHostAdapter(FlashPoint_Info_T *FlashPointInfo)
12061: {
12062: return FlashPoint_HardwareResetHostAdapter((PSCCBMGR_INFO) FlashPointInfo);
12063: }
12064:
12065: static inline void
12066: FlashPoint__ReleaseHostAdapter(FlashPoint_CardHandle_T CardHandle)
12067: {
12068: FlashPoint_ReleaseHostAdapter(CardHandle);
12069: }
12070:
12071:
12072: static inline void
12073: FlashPoint__StartCCB(FlashPoint_CardHandle_T CardHandle, BusLogic_CCB_T *CCB)
12074: {
12075: FlashPoint_StartCCB(CardHandle, (PSCCB) CCB);
12076: }
12077:
12078:
12079: static inline void
12080: FlashPoint__AbortCCB(FlashPoint_CardHandle_T CardHandle, BusLogic_CCB_T *CCB)
12081: {
12082: FlashPoint_AbortCCB(CardHandle, (PSCCB) CCB);
12083: }
12084:
12085:
12086: static inline boolean
12087: FlashPoint__InterruptPending(FlashPoint_CardHandle_T CardHandle)
12088: {
12089: return FlashPoint_InterruptPending(CardHandle);
12090: }
12091:
12092:
12093: static inline int
12094: FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle)
12095: {
12096: return FlashPoint_HandleInterrupt(CardHandle);
12097: }
12098:
12099:
12100: #define FlashPoint_ProbeHostAdapter FlashPoint__ProbeHostAdapter
12101: #define FlashPoint_HardwareResetHostAdapter FlashPoint__HardwareResetHostAdapter
12102: #define FlashPoint_ReleaseHostAdapter FlashPoint__ReleaseHostAdapter
12103: #define FlashPoint_StartCCB FlashPoint__StartCCB
12104: #define FlashPoint_AbortCCB FlashPoint__AbortCCB
12105: #define FlashPoint_InterruptPending FlashPoint__InterruptPending
12106: #define FlashPoint_HandleInterrupt FlashPoint__HandleInterrupt
12107:
12108:
12109: /*
12110: FlashPoint_InquireTargetInfo returns the Synchronous Period, Synchronous
12111: Offset, and Wide Transfers Active information for TargetID on CardHandle.
12112: */
12113:
12114: void FlashPoint_InquireTargetInfo(FlashPoint_CardHandle_T CardHandle,
12115: int TargetID,
12116: unsigned char *SynchronousPeriod,
12117: unsigned char *SynchronousOffset,
12118: unsigned char *WideTransfersActive)
12119: {
12120: SCCBMGR_TAR_INFO *TargetInfo =
12121: &sccbMgrTbl[((SCCBCARD *)CardHandle)->cardIndex][TargetID];
12122: if ((TargetInfo->TarSyncCtrl & SYNC_OFFSET) > 0)
12123: {
12124: *SynchronousPeriod = 5 * ((TargetInfo->TarSyncCtrl >> 5) + 1);
12125: *SynchronousOffset = TargetInfo->TarSyncCtrl & SYNC_OFFSET;
12126: }
12127: else
12128: {
12129: *SynchronousPeriod = 0;
12130: *SynchronousOffset = 0;
12131: }
12132: *WideTransfersActive = (TargetInfo->TarSyncCtrl & NARROW_SCSI ? 0 : 1);
12133: }
12134:
12135:
12136: #else /* CONFIG_SCSI_OMIT_FLASHPOINT */
12137:
12138:
12139: /*
12140: Define prototypes for the FlashPoint SCCB Manager Functions.
12141: */
12142:
12143: extern unsigned char FlashPoint_ProbeHostAdapter(FlashPoint_Info_T *);
12144: extern FlashPoint_CardHandle_T
12145: FlashPoint_HardwareResetHostAdapter(FlashPoint_Info_T *);
12146: extern void FlashPoint_StartCCB(FlashPoint_CardHandle_T, BusLogic_CCB_T *);
12147: extern int FlashPoint_AbortCCB(FlashPoint_CardHandle_T, BusLogic_CCB_T *);
12148: extern boolean FlashPoint_InterruptPending(FlashPoint_CardHandle_T);
12149: extern int FlashPoint_HandleInterrupt(FlashPoint_CardHandle_T);
12150: extern void FlashPoint_ReleaseHostAdapter(FlashPoint_CardHandle_T);
12151: extern void FlashPoint_InquireTargetInfo(FlashPoint_CardHandle_T,
12152: int, unsigned char *,
12153: unsigned char *, unsigned char *);
12154:
12155:
12156: #endif /* CONFIG_SCSI_OMIT_FLASHPOINT */
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