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1.1 root 1: #ifndef _AHA152X_H
2: #define _AHA152X_H
3:
4: /*
5: * $Id: aha152x.h,v 1.1 1999/04/26 05:54:10 tb Exp $
6: */
7:
8: #if defined(__KERNEL__)
9:
10: #include <linux/blk.h>
11: #include "scsi.h"
12: #include <asm/io.h>
13:
14: int aha152x_detect(Scsi_Host_Template *);
15: int aha152x_command(Scsi_Cmnd *);
16: int aha152x_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
17: int aha152x_abort(Scsi_Cmnd *);
18: int aha152x_reset(Scsi_Cmnd *, unsigned int);
19: int aha152x_biosparam(Disk *, kdev_t, int*);
20: int aha152x_proc_info(char *buffer, char **start, off_t offset, int length, int hostno, int inout);
21:
22: /* number of queueable commands
23: (unless we support more than 1 cmd_per_lun this should do) */
24: #define AHA152X_MAXQUEUE 7
25:
26: #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 1.1 $"
27:
28: extern struct proc_dir_entry proc_scsi_aha152x;
29:
30: /* Initial value of Scsi_Host entry */
31: #define AHA152X { /* next */ 0, \
32: /* usage_count */ 0, \
33: /* proc_dir */ &proc_scsi_aha152x, \
34: /* proc_info */ aha152x_proc_info, \
35: /* name */ AHA152X_REVID, \
36: /* detect */ aha152x_detect, \
37: /* release */ 0, \
38: /* info */ 0, \
39: /* command */ aha152x_command, \
40: /* queuecommand */ aha152x_queue, \
41: /* abort */ aha152x_abort, \
42: /* reset */ aha152x_reset, \
43: /* slave_attach */ 0, \
44: /* bios_param */ aha152x_biosparam, \
45: /* can_queue */ 1, \
46: /* this_id */ 7, \
47: /* sg_tablesize */ SG_ALL, \
48: /* cmd_per_lun */ 1, \
49: /* present */ 0, \
50: /* unchecked_isa_dma */ 0, \
51: /* use_clustering */ DISABLE_CLUSTERING }
52: #endif
53:
54:
55: /* port addresses */
56: #define SCSISEQ (shpnt->io_port+0x00) /* SCSI sequence control */
57: #define SXFRCTL0 (shpnt->io_port+0x01) /* SCSI transfer control 0 */
58: #define SXFRCTL1 (shpnt->io_port+0x02) /* SCSI transfer control 1 */
59: #define SCSISIG (shpnt->io_port+0x03) /* SCSI signal in/out */
60: #define SCSIRATE (shpnt->io_port+0x04) /* SCSI rate control */
61: #define SELID (shpnt->io_port+0x05) /* selection/reselection ID */
62: #define SCSIID SELID /* SCSI ID */
63: #define SCSIDAT (shpnt->io_port+0x06) /* SCSI latched data */
64: #define SCSIBUS (shpnt->io_port+0x07) /* SCSI data bus */
65: #define STCNT0 (shpnt->io_port+0x08) /* SCSI transfer count 0 */
66: #define STCNT1 (shpnt->io_port+0x09) /* SCSI transfer count 1 */
67: #define STCNT2 (shpnt->io_port+0x0a) /* SCSI transfer count 2 */
68: #define SSTAT0 (shpnt->io_port+0x0b) /* SCSI interrupt status 0 */
69: #define SSTAT1 (shpnt->io_port+0x0c) /* SCSI interrupt status 1 */
70: #define SSTAT2 (shpnt->io_port+0x0d) /* SCSI interrupt status 2 */
71: #define SCSITEST (shpnt->io_port+0x0e) /* SCSI test control */
72: #define SSTAT3 SCSITEST /* SCSI interrupt status 3 */
73: #define SSTAT4 (shpnt->io_port+0x0f) /* SCSI status 4 */
74: #define SIMODE0 (shpnt->io_port+0x10) /* SCSI interrupt mode 0 */
75: #define SIMODE1 (shpnt->io_port+0x11) /* SCSI interrupt mode 1 */
76: #define DMACNTRL0 (shpnt->io_port+0x12) /* DMA control 0 */
77: #define DMACNTRL1 (shpnt->io_port+0x13) /* DMA control 1 */
78: #define DMASTAT (shpnt->io_port+0x14) /* DMA status */
79: #define FIFOSTAT (shpnt->io_port+0x15) /* FIFO status */
80: #define DATAPORT (shpnt->io_port+0x16) /* DATA port */
81: #define BRSTCNTRL (shpnt->io_port+0x18) /* burst control */
82: #define PORTA (shpnt->io_port+0x1a) /* PORT A */
83: #define PORTB (shpnt->io_port+0x1b) /* PORT B */
84: #define REV (shpnt->io_port+0x1c) /* revision */
85: #define STACK (shpnt->io_port+0x1d) /* stack */
86: #define TEST (shpnt->io_port+0x1e) /* test register */
87:
88: /* used in aha152x_porttest */
89: #define O_PORTA 0x1a /* PORT A */
90: #define O_PORTB 0x1b /* PORT B */
91: #define O_DMACNTRL1 0x13 /* DMA control 1 */
92: #define O_STACK 0x1d /* stack */
93: #define IO_RANGE 0x20
94:
95: /* bits and bitmasks to ports */
96:
97: /* SCSI sequence control */
98: #define TEMODEO 0x80
99: #define ENSELO 0x40
100: #define ENSELI 0x20
101: #define ENRESELI 0x10
102: #define ENAUTOATNO 0x08
103: #define ENAUTOATNI 0x04
104: #define ENAUTOATNP 0x02
105: #define SCSIRSTO 0x01
106:
107: /* SCSI transfer control 0 */
108: #define SCSIEN 0x80
109: #define DMAEN 0x40
110: #define CH1 0x20
111: #define CLRSTCNT 0x10
112: #define SPIOEN 0x08
113: #define CLRCH1 0x02
114:
115: /* SCSI transfer control 1 */
116: #define BITBUCKET 0x80
117: #define SWRAPEN 0x40
118: #define ENSPCHK 0x20
119: #define STIMESEL 0x18 /* mask */
120: #define STIMESEL_ 3
121: #define ENSTIMER 0x04
122: #define BYTEALIGN 0x02
123:
124: /* SCSI signal IN */
125: #define CDI 0x80
126: #define IOI 0x40
127: #define MSGI 0x20
128: #define ATNI 0x10
129: #define SELI 0x08
130: #define BSYI 0x04
131: #define REQI 0x02
132: #define ACKI 0x01
133:
134: /* SCSI Phases */
135: #define P_MASK (MSGI|CDI|IOI)
136: #define P_DATAO (0)
137: #define P_DATAI (IOI)
138: #define P_CMD (CDI)
139: #define P_STATUS (CDI|IOI)
140: #define P_MSGO (MSGI|CDI)
141: #define P_MSGI (MSGI|CDI|IOI)
142:
143: /* SCSI signal OUT */
144: #define CDO 0x80
145: #define IOO 0x40
146: #define MSGO 0x20
147: #define ATNO 0x10
148: #define SELO 0x08
149: #define BSYO 0x04
150: #define REQO 0x02
151: #define ACKO 0x01
152:
153: /* SCSI rate control */
154: #define SXFR 0x70 /* mask */
155: #define SXFR_ 4
156: #define SOFS 0x0f /* mask */
157:
158: /* SCSI ID */
159: #define OID 0x70
160: #define OID_ 4
161: #define TID 0x07
162:
163: /* SCSI transfer count */
164: #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
165: + (GETPORT(STCNT1)<< 8) \
166: + GETPORT(STCNT0) )
167:
168: #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
169: SETPORT(STCNT1, ((X) & 0x00FF00) >> 8); \
170: SETPORT(STCNT0, ((X) & 0x0000FF) ); }
171:
172: /* SCSI interrupt status */
173: #define TARGET 0x80
174: #define SELDO 0x40
175: #define SELDI 0x20
176: #define SELINGO 0x10
177: #define SWRAP 0x08
178: #define SDONE 0x04
179: #define SPIORDY 0x02
180: #define DMADONE 0x01
181:
182: #define SETSDONE 0x80
183: #define CLRSELDO 0x40
184: #define CLRSELDI 0x20
185: #define CLRSELINGO 0x10
186: #define CLRSWRAP 0x08
187: #define CLRSDONE 0x04
188: #define CLRSPIORDY 0x02
189: #define CLRDMADONE 0x01
190:
191: /* SCSI status 1 */
192: #define SELTO 0x80
193: #define ATNTARG 0x40
194: #define SCSIRSTI 0x20
195: #define PHASEMIS 0x10
196: #define BUSFREE 0x08
197: #define SCSIPERR 0x04
198: #define PHASECHG 0x02
199: #define REQINIT 0x01
200:
201: #define CLRSELTIMO 0x80
202: #define CLRATNO 0x40
203: #define CLRSCSIRSTI 0x20
204: #define CLRBUSFREE 0x08
205: #define CLRSCSIPERR 0x04
206: #define CLRPHASECHG 0x02
207: #define CLRREQINIT 0x01
208:
209: /* SCSI status 2 */
210: #define SOFFSET 0x20
211: #define SEMPTY 0x10
212: #define SFULL 0x08
213: #define SFCNT 0x07 /* mask */
214:
215: /* SCSI status 3 */
216: #define SCSICNT 0xf0 /* mask */
217: #define SCSICNT_ 4
218: #define OFFCNT 0x0f /* mask */
219:
220: /* SCSI TEST control */
221: #define SCTESTU 0x08
222: #define SCTESTD 0x04
223: #define STCTEST 0x01
224:
225: /* SCSI status 4 */
226: #define SYNCERR 0x04
227: #define FWERR 0x02
228: #define FRERR 0x01
229:
230: #define CLRSYNCERR 0x04
231: #define CLRFWERR 0x02
232: #define CLRFRERR 0x01
233:
234: /* SCSI interrupt mode 0 */
235: #define ENSELDO 0x40
236: #define ENSELDI 0x20
237: #define ENSELINGO 0x10
238: #define ENSWRAP 0x08
239: #define ENSDONE 0x04
240: #define ENSPIORDY 0x02
241: #define ENDMADONE 0x01
242:
243: /* SCSI interrupt mode 1 */
244: #define ENSELTIMO 0x80
245: #define ENATNTARG 0x40
246: #define ENSCSIRST 0x20
247: #define ENPHASEMIS 0x10
248: #define ENBUSFREE 0x08
249: #define ENSCSIPERR 0x04
250: #define ENPHASECHG 0x02
251: #define ENREQINIT 0x01
252:
253: /* DMA control 0 */
254: #define ENDMA 0x80
255: #define _8BIT 0x40
256: #define DMA 0x20
257: #define WRITE_READ 0x08
258: #define INTEN 0x04
259: #define RSTFIFO 0x02
260: #define SWINT 0x01
261:
262: /* DMA control 1 */
263: #define PWRDWN 0x80
264: #define STK 0x07 /* mask */
265:
266: /* DMA status */
267: #define ATDONE 0x80
268: #define WORDRDY 0x40
269: #define INTSTAT 0x20
270: #define DFIFOFULL 0x10
271: #define DFIFOEMP 0x08
272:
273: /* BURST control */
274: #define BON 0xf0
275: #define BOFF 0x0f
276:
277: /* TEST REGISTER */
278: #define BOFFTMR 0x40
279: #define BONTMR 0x20
280: #define STCNTH 0x10
281: #define STCNTM 0x08
282: #define STCNTL 0x04
283: #define SCSIBLK 0x02
284: #define DMABLK 0x01
285:
286: /* On the AHA-152x board PORTA and PORTB contain
287: some information about the board's configuration. */
288: typedef union {
289: struct {
290: unsigned reserved:2; /* reserved */
291: unsigned tardisc:1; /* Target disconnect: 0=disabled, 1=enabled */
292: unsigned syncneg:1; /* Initial sync neg: 0=disabled, 1=enabled */
293: unsigned msgclasses:2; /* Message classes
294: 0=#4
295: 1=#0, #1, #2, #3, #4
296: 2=#0, #3, #4
297: 3=#0, #4
298: */
299: unsigned boot:1; /* boot: 0=disabled, 1=enabled */
300: unsigned dma:1; /* Transfer mode: 0=PIO; 1=DMA */
301: unsigned id:3; /* SCSI-id */
302: unsigned irq:2; /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
303: unsigned dmachan:2; /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
304: unsigned parity:1; /* SCSI-parity: 1=enabled 0=disabled */
305: } fields;
306: unsigned short port;
307: } aha152x_config ;
308:
309: #define cf_parity fields.parity
310: #define cf_dmachan fields.dmachan
311: #define cf_irq fields.irq
312: #define cf_id fields.id
313: #define cf_dma fields.dma
314: #define cf_boot fields.boot
315: #define cf_msgclasses fields.msgclasses
316: #define cf_syncneg fields.syncneg
317: #define cf_tardisc fields.tardisc
318: #define cf_port port
319:
320: /* Some macros to manipulate ports and their bits */
321:
322: #define SETPORT(PORT, VAL) outb( (VAL), (PORT) )
323: #define SETPORTP(PORT, VAL) outb_p( (VAL), (PORT) )
324: #define SETPORTW(PORT, VAL) outw( (VAL), (PORT) )
325:
326: #define GETPORT(PORT) inb( PORT )
327: #define GETPORTW(PORT) inw( PORT )
328:
329: #define SETBITS(PORT, BITS) outb( (inb(PORT) | (BITS)), (PORT) )
330: #define CLRBITS(PORT, BITS) outb( (inb(PORT) & ~(BITS)), (PORT) )
331: #define CLRSETBITS(PORT, CLR, SET) outb( (inb(PORT) & ~(CLR)) | (SET) , (PORT) )
332:
333: #define TESTHI(PORT, BITS) ((inb(PORT) & (BITS)) == BITS)
334: #define TESTLO(PORT, BITS) ((inb(PORT) & (BITS)) == 0)
335:
336: #ifdef DEBUG_AHA152X
337: enum {
338: debug_skipports = 0x0001,
339: debug_queue = 0x0002,
340: debug_intr = 0x0004,
341: debug_selection = 0x0008,
342: debug_msgo = 0x0010,
343: debug_msgi = 0x0020,
344: debug_status = 0x0040,
345: debug_cmd = 0x0080,
346: debug_datai = 0x0100,
347: debug_datao = 0x0200,
348: debug_abort = 0x0400,
349: debug_done = 0x0800,
350: debug_biosparam = 0x1000,
351: debug_phases = 0x2000,
352: debug_queues = 0x4000,
353: debug_reset = 0x8000,
354: };
355: #endif
356:
357: #endif /* _AHA152X_H */
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