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1.1 root 1: /********************************************************
2: * Header file for eata_dma.c and eata_pio.c *
3: * Linux EATA SCSI drivers *
4: * (c) 1993-96 Michael Neuffer *
5: * [email protected] *
6: * [email protected] *
7: *********************************************************
8: * last change: 96/08/14 *
9: ********************************************************/
10:
11:
12: #ifndef _EATA_GENERIC_H
13: #define _EATA_GENERIC_H
14:
15:
16:
17: /*********************************************
18: * Misc. definitions *
19: *********************************************/
20:
21: #ifndef TRUE
22: #define TRUE 1
23: #endif
24: #ifndef FALSE
25: #define FALSE 0
26: #endif
27:
28: #define min(a,b) ((a<b)?(a):(b))
29:
30: #define R_LIMIT 0x20000
31:
32: #define MAXISA 4
33: #define MAXEISA 16
34: #define MAXPCI 16
35: #define MAXIRQ 16
36: #define MAXTARGET 16
37: #define MAXCHANNEL 3
38:
39: #define IS_ISA 'I'
40: #define IS_EISA 'E'
41: #define IS_PCI 'P'
42:
43: #define BROKEN_INQUIRY 1
44:
45: #define BUSMASTER 0xff
46: #define PIO 0xfe
47:
48: #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */
49:
50: #define DPT_ID1 0x12
51: #define DPT_ID2 0x14
52:
53: #define ATT_ID1 0x06
54: #define ATT_ID2 0x94
55: #define ATT_ID3 0x0
56:
57: #define NEC_ID1 0x38
58: #define NEC_ID2 0xa3
59: #define NEC_ID3 0x82
60:
61:
62: #define EATA_CP_SIZE 44
63:
64: #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
65: #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
66: #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
67:
68: #define SG_SIZE 64
69: #define SG_SIZE_BIG 252 /* max. 8096 elements, 64k */
70:
71: #define UPPER_DEVICE_QUEUE_LIMIT 64 /* The limit we have to set for the
72: * device queue to keep the broken
73: * midlevel SCSI code from producing
74: * bogus timeouts
75: */
76:
77: #define TYPE_DISK_QUEUE 16
78: #define TYPE_TAPE_QUEUE 4
79: #define TYPE_ROM_QUEUE 4
80: #define TYPE_OTHER_QUEUE 2
81:
82: #define FREE 0
83: #define OK 0
84: #define NO_TIMEOUT 0
85: #define USED 1
86: #define TIMEOUT 2
87: #define RESET 4
88: #define LOCKED 8
89: #define ABORTED 16
90:
91: #define READ 0
92: #define WRITE 1
93: #define OTHER 2
94:
95: #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
96: #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
97: #define SD(host) ((hostdata *)&(host->hostdata))
98:
99: #define DELAY(x) { ulong flags, i; \
100: save_flags(flags); sti(); \
101: i = jiffies + (x * HZ); \
102: while (jiffies < i); \
103: restore_flags(flags); }
104:
105: /***********************************************
106: * EATA Command & Register definitions *
107: ***********************************************/
108: #define PCI_REG_DPTconfig 0x40
109: #define PCI_REG_PumpModeAddress 0x44
110: #define PCI_REG_PumpModeData 0x48
111: #define PCI_REG_ConfigParam1 0x50
112: #define PCI_REG_ConfigParam2 0x54
113:
114:
115: #define EATA_CMD_PIO_SETUPTEST 0xc6
116: #define EATA_CMD_PIO_READ_CONFIG 0xf0
117: #define EATA_CMD_PIO_SET_CONFIG 0xf1
118: #define EATA_CMD_PIO_SEND_CP 0xf2
119: #define EATA_CMD_PIO_RECEIVE_SP 0xf3
120: #define EATA_CMD_PIO_TRUNC 0xf4
121:
122: #define EATA_CMD_RESET 0xf9
123: #define EATA_CMD_IMMEDIATE 0xfa
124:
125: #define EATA_CMD_DMA_READ_CONFIG 0xfd
126: #define EATA_CMD_DMA_SET_CONFIG 0xfe
127: #define EATA_CMD_DMA_SEND_CP 0xff
128:
129: #define ECS_EMULATE_SENSE 0xd4
130:
131: #define EATA_GENERIC_ABORT 0x00
132: #define EATA_SPECIFIC_RESET 0x01
133: #define EATA_BUS_RESET 0x02
134: #define EATA_SPECIFIC_ABORT 0x03
135: #define EATA_QUIET_INTR 0x04
136: #define EATA_COLD_BOOT_HBA 0x06 /* Only as a last resort */
137: #define EATA_FORCE_IO 0x07
138:
139: #define HA_CTRLREG 0x206 /* control register for HBA */
140: #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */
141: #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processor */
142: #define HA_CTRL_8HEADS 0x08 /* CTRLREG: set for drives with*
143: * >=8 heads (WD1003 rudimentary :-) */
144:
145: #define HA_WCOMMAND 0x07 /* command register offset */
146: #define HA_WIFC 0x06 /* immediate command offset */
147: #define HA_WCODE 0x05
148: #define HA_WCODE2 0x04
149: #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
150: #define HA_RAUXSTAT 0x08 /* aux status register offset*/
151: #define HA_RSTATUS 0x07 /* status register offset */
152: #define HA_RDATA 0x00 /* data register (16bit) */
153: #define HA_WDATA 0x00 /* data register (16bit) */
154:
155: #define HA_ABUSY 0x01 /* aux busy bit */
156: #define HA_AIRQ 0x02 /* aux IRQ pending bit */
157: #define HA_SERROR 0x01 /* pr. command ended in error*/
158: #define HA_SMORE 0x02 /* more data soon to come */
159: #define HA_SCORR 0x04 /* data corrected */
160: #define HA_SDRQ 0x08 /* data request active */
161: #define HA_SSC 0x10 /* seek complete */
162: #define HA_SFAULT 0x20 /* write fault */
163: #define HA_SREADY 0x40 /* drive ready */
164: #define HA_SBUSY 0x80 /* drive busy */
165: #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
166:
167: /**********************************************
168: * Message definitions *
169: **********************************************/
170:
171: #define HA_NO_ERROR 0x00 /* No Error */
172: #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */
173: #define HA_ERR_CMD_TO 0x02 /* Command Timeout */
174: #define HA_BUS_RESET 0x03 /* SCSI Bus Reset Received */
175: #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */
176: #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */
177: #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */
178: #define HA_BUS_PARITY 0x07 /* Bus Parity Error */
179: #define HA_SCSI_HUNG 0x08 /* SCSI Hung */
180: #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */
181: #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */
182: #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */
183: #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */
184: #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */
185: #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */
186: #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */
187: #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */
188: #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */
189: #define HA_PCI_PARITY 0x12 /* PCI Parity Error */
190: #define HA_PCI_MABORT 0x13 /* PCI Master Abort */
191: #define HA_PCI_TABORT 0x14 /* PCI Target Abort */
192: #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */
193:
194: /**********************************************
195: * Other definitions *
196: **********************************************/
197:
198: struct reg_bit { /* reading this one will clear the interrupt */
199: __u8 error:1; /* previous command ended in an error */
200: __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */
201: __u8 corr:1; /* data read was successfully corrected with ECC*/
202: __u8 drq:1; /* data request active */
203: __u8 sc:1; /* seek complete */
204: __u8 fault:1; /* write fault */
205: __u8 ready:1; /* drive ready */
206: __u8 busy:1; /* controller busy */
207: };
208:
209: struct reg_abit { /* reading this won't clear the interrupt */
210: __u8 abusy:1; /* auxiliary busy */
211: __u8 irq:1; /* set when drive interrupt is asserted */
212: __u8 dummy:6;
213: };
214:
215: struct eata_register { /* EATA register set */
216: __u8 data_reg[2]; /* R, couldn't figure this one out */
217: __u8 cp_addr[4]; /* W, CP address register */
218: union {
219: __u8 command; /* W, command code: [read|set] conf, send CP*/
220: struct reg_bit status; /* R, see register_bit1 */
221: __u8 statusbyte;
222: } ovr;
223: struct reg_abit aux_stat; /* R, see register_bit2 */
224: };
225:
226: struct get_conf { /* Read Configuration Array */
227: __u32 len; /* Should return 0x22, 0x24, etc */
228: __u32 signature; /* Signature MUST be "EATA" */
229: __u8 version2:4,
230: version:4; /* EATA Version level */
231: __u8 OCS_enabled:1, /* Overlap Command Support enabled */
232: TAR_support:1, /* SCSI Target Mode supported */
233: TRNXFR:1, /* Truncate Transfer Cmd not necessary *
234: * Only used in PIO Mode */
235: MORE_support:1, /* MORE supported (only PIO Mode) */
236: DMA_support:1, /* DMA supported Driver uses only *
237: * this mode */
238: DMA_valid:1, /* DRQ value in Byte 30 is valid */
239: ATA:1, /* ATA device connected (not supported) */
240: HAA_valid:1; /* Hostadapter Address is valid */
241:
242: __u16 cppadlen; /* Number of pad bytes send after CD data *
243: * set to zero for DMA commands */
244: __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. *
245: * if not, zero is returned */
246: __u32 cplen; /* CP length: number of valid cp bytes */
247: __u32 splen; /* Number of bytes returned after *
248: * Receive SP command */
249: __u16 queuesiz; /* max number of queueable CPs */
250: __u16 dummy;
251: __u16 SGsiz; /* max number of SG table entries */
252: __u8 IRQ:4, /* IRQ used this HA */
253: IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */
254: SECOND:1, /* This is a secondary controller */
255: DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */
256: __u8 sync; /* device at ID 7 tru 0 is running in *
257: * synchronous mode, this will disappear */
258: __u8 DSBLE:1, /* ISA i/o addressing is disabled */
259: FORCADR:1, /* i/o address has been forced */
260: SG_64K:1,
261: SG_UAE:1,
262: :4;
263: __u8 MAX_ID:5, /* Max number of SCSI target IDs */
264: MAX_CHAN:3; /* Number of SCSI busses on HBA */
265: __u8 MAX_LUN; /* Max number of LUNs */
266: __u8 :3,
267: AUTOTRM:1,
268: M1_inst:1,
269: ID_qest:1, /* Raidnum ID is questionable */
270: is_PCI:1, /* HBA is PCI */
271: is_EISA:1; /* HBA is EISA */
272: __u8 RAIDNUM; /* unique HBA identifier */
273: __u8 unused[474];
274: };
275:
276: struct eata_sg_list
277: {
278: __u32 data;
279: __u32 len;
280: };
281:
282: struct eata_ccb { /* Send Command Packet structure */
283:
284: __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */
285: HBA_Init:1, /* Cause Controller to reinitialize */
286: Auto_Req_Sen:1, /* Do Auto Request Sense on errors */
287: scatter:1, /* Data Ptr points to a SG Packet */
288: Resrvd:1, /* RFU */
289: Interpret:1, /* Interpret the SCSI cdb of own use */
290: DataOut:1, /* Data Out phase with command */
291: DataIn:1; /* Data In phase with command */
292: __u8 reqlen; /* Request Sense Length *
293: * Valid if Auto_Req_Sen=1 */
294: __u8 unused[3];
295: __u8 FWNEST:1, /* send cmd to phys RAID component */
296: unused2:7;
297: __u8 Phsunit:1, /* physical unit on mirrored pair */
298: I_AT:1, /* inhibit address translation */
299: I_HBA_C:1, /* HBA inhibit caching */
300: unused3:5;
301:
302: __u8 cp_id:5, /* SCSI Device ID of target */
303: cp_channel:3; /* SCSI Channel # of HBA */
304: __u8 cp_lun:3,
305: :2,
306: cp_luntar:1, /* CP is for target ROUTINE */
307: cp_dispri:1, /* Grant disconnect privilege */
308: cp_identify:1; /* Always TRUE */
309: __u8 cp_msg1; /* Message bytes 0-3 */
310: __u8 cp_msg2;
311: __u8 cp_msg3;
312: __u8 cp_cdb[12]; /* Command Descriptor Block */
313: __u32 cp_datalen; /* Data Transfer Length *
314: * If scatter=1 len of sg package */
315: void *cp_viraddr; /* address of this ccb */
316: __u32 cp_dataDMA; /* Data Address, if scatter=1 *
317: * address of scatter packet */
318: __u32 cp_statDMA; /* address for Status Packet */
319: __u32 cp_reqDMA; /* Request Sense Address, used if *
320: * CP command ends with error */
321: /* Additional CP info begins here */
322: __u32 timestamp; /* Needed to measure command latency */
323: __u32 timeout;
324: __u8 sizeindex;
325: __u8 rw_latency;
326: __u8 retries;
327: __u8 status; /* status of this queueslot */
328: Scsi_Cmnd *cmd; /* address of cmd */
329: struct eata_sg_list *sg_list;
330: };
331:
332:
333: struct eata_sp {
334: __u8 hba_stat:7, /* HBA status */
335: EOC:1; /* True if command finished */
336: __u8 scsi_stat; /* Target SCSI status */
337: __u8 reserved[2];
338: __u32 residue_len; /* Number of bytes not transferred */
339: struct eata_ccb *ccb; /* Address set in COMMAND PACKET */
340: __u8 msg[12];
341: };
342:
343: typedef struct hstd {
344: __u8 vendor[9];
345: __u8 name[18];
346: __u8 revision[6];
347: __u8 EATA_revision;
348: __u32 firmware_revision;
349: __u8 HBA_number;
350: __u8 bustype; /* bustype of HBA */
351: __u8 channel; /* # of avail. scsi channels */
352: __u8 state; /* state of HBA */
353: __u8 primary; /* true if primary */
354: __u8 more_support:1, /* HBA supports MORE flag */
355: immediate_support:1, /* HBA supports IMMEDIATE CMDs*/
356: broken_INQUIRY:1; /* This is an EISA HBA with *
357: * broken INQUIRY */
358: __u8 do_latency; /* Latency measurement flag */
359: __u32 reads[13];
360: __u32 writes[13];
361: __u32 reads_lat[12][4];
362: __u32 writes_lat[12][4];
363: __u32 all_lat[4];
364: __u8 resetlevel[MAXCHANNEL];
365: __u32 last_ccb; /* Last used ccb */
366: __u32 cplen; /* size of CP in words */
367: __u16 cppadlen; /* pad length of cp in words */
368: __u16 queuesize;
369: __u16 sgsize; /* # of entries in the SG list*/
370: __u16 devflags; /* bits set for detected devices */
371: __u8 hostid; /* SCSI ID of HBA */
372: __u8 moresupport; /* HBA supports MORE flag */
373: struct Scsi_Host *next;
374: struct Scsi_Host *prev;
375: struct eata_sp sp; /* status packet */
376: struct eata_ccb ccb[0]; /* ccb array begins here */
377: }hostdata;
378:
379: /* structure for max. 2 emulated drives */
380: struct drive_geom_emul {
381: __u8 trans; /* translation flag 1=transl */
382: __u8 channel; /* SCSI channel number */
383: __u8 HBA; /* HBA number (prim/sec) */
384: __u8 id; /* drive id */
385: __u8 lun; /* drive lun */
386: __u32 heads; /* number of heads */
387: __u32 sectors; /* number of sectors */
388: __u32 cylinder; /* number of cylinders */
389: };
390:
391: struct geom_emul {
392: __u8 bios_drives; /* number of emulated drives */
393: struct drive_geom_emul drv[2]; /* drive structures */
394: };
395:
396: #endif /* _EATA_GENERIC_H */
397:
398: /*
399: * Overrides for Emacs so that we almost follow Linus's tabbing style.
400: * Emacs will notice this stuff at the end of the file and automatically
401: * adjust the settings for this buffer only. This must remain at the end
402: * of the file.
403: * ---------------------------------------------------------------------------
404: * Local variables:
405: * c-indent-level: 4
406: * c-brace-imaginary-offset: 0
407: * c-brace-offset: -4
408: * c-argdecl-indent: 4
409: * c-label-offset: -4
410: * c-continued-statement-offset: 4
411: * c-continued-brace-offset: 0
412: * tab-width: 8
413: * End:
414: */
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