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1.1 root 1: #ifndef __ASM_HARDIRQ_H
2: #define __ASM_HARDIRQ_H
3:
4: #include <linux/tasks.h>
5:
6: extern unsigned int local_irq_count[NR_CPUS];
7:
8: /*
9: * Are we in an interrupt context? Either doing bottom half
10: * or hardware interrupt processing?
11: */
12: #define in_interrupt() ({ int __cpu = smp_processor_id(); \
13: (local_irq_count[__cpu] + local_bh_count[__cpu] != 0); })
14:
15: #ifndef __SMP__
16:
17: #define hardirq_trylock(cpu) (local_irq_count[cpu] == 0)
18: #define hardirq_endlock(cpu) do { } while (0)
19:
20: #define hardirq_enter(cpu) (local_irq_count[cpu]++)
21: #define hardirq_exit(cpu) (local_irq_count[cpu]--)
22:
23: #define synchronize_irq() barrier()
24:
25: #else
26:
27: #include <asm/atomic.h>
28:
29: extern unsigned char global_irq_holder;
30: extern unsigned volatile int global_irq_lock;
31: extern atomic_t global_irq_count;
32:
33: static inline void release_irqlock(int cpu)
34: {
35: /* if we didn't own the irq lock, just ignore.. */
36: if (global_irq_holder == (unsigned char) cpu) {
37: global_irq_holder = NO_PROC_ID;
38: clear_bit(0,&global_irq_lock);
39: }
40: }
41:
42: static inline void hardirq_enter(int cpu)
43: {
44: ++local_irq_count[cpu];
45: atomic_inc(&global_irq_count);
46: }
47:
48: static inline void hardirq_exit(int cpu)
49: {
50: atomic_dec(&global_irq_count);
51: --local_irq_count[cpu];
52: }
53:
54: static inline int hardirq_trylock(int cpu)
55: {
56: return !atomic_read(&global_irq_count) && !test_bit(0,&global_irq_lock);
57: }
58:
59: #define hardirq_endlock(cpu) do { } while (0)
60:
61: extern void synchronize_irq(void);
62:
63: #endif /* __SMP__ */
64:
65: #endif /* __ASM_HARDIRQ_H */
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