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1.1 root 1: #ifndef __ASM_HARDIRQ_H
2: #define __ASM_HARDIRQ_H
3:
4: #include <linux/tasks.h>
5:
6: extern unsigned int local_irq_count[NR_CPUS];
1.1.1.2 ! root 7: extern unsigned int local_bh_count[NR_CPUS];
1.1 root 8:
9: /*
10: * Are we in an interrupt context? Either doing bottom half
11: * or hardware interrupt processing?
12: */
13: #define in_interrupt() ({ int __cpu = smp_processor_id(); \
14: (local_irq_count[__cpu] + local_bh_count[__cpu] != 0); })
15:
16: #ifndef __SMP__
17:
18: #define hardirq_trylock(cpu) (local_irq_count[cpu] == 0)
19: #define hardirq_endlock(cpu) do { } while (0)
20:
21: #define hardirq_enter(cpu) (local_irq_count[cpu]++)
22: #define hardirq_exit(cpu) (local_irq_count[cpu]--)
23:
24: #define synchronize_irq() barrier()
25:
26: #else
27:
28: #include <asm/atomic.h>
29:
30: extern unsigned char global_irq_holder;
31: extern unsigned volatile int global_irq_lock;
32: extern atomic_t global_irq_count;
33:
34: static inline void release_irqlock(int cpu)
35: {
36: /* if we didn't own the irq lock, just ignore.. */
37: if (global_irq_holder == (unsigned char) cpu) {
38: global_irq_holder = NO_PROC_ID;
39: clear_bit(0,&global_irq_lock);
40: }
41: }
42:
43: static inline void hardirq_enter(int cpu)
44: {
45: ++local_irq_count[cpu];
46: atomic_inc(&global_irq_count);
47: }
48:
49: static inline void hardirq_exit(int cpu)
50: {
51: atomic_dec(&global_irq_count);
52: --local_irq_count[cpu];
53: }
54:
55: static inline int hardirq_trylock(int cpu)
56: {
57: return !atomic_read(&global_irq_count) && !test_bit(0,&global_irq_lock);
58: }
59:
60: #define hardirq_endlock(cpu) do { } while (0)
61:
62: extern void synchronize_irq(void);
63:
64: #endif /* __SMP__ */
65:
66: #endif /* __ASM_HARDIRQ_H */
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