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1.1 ! root 1: /* ! 2: * Copyright (c) 1990 The Regents of the University of California. ! 3: * All rights reserved. ! 4: * ! 5: * This code is derived from software contributed to Berkeley by ! 6: * Van Jacobson of Lawrence Berkeley Laboratory. ! 7: * ! 8: * Redistribution and use in source and binary forms, with or without ! 9: * modification, are permitted provided that the following conditions ! 10: * are met: ! 11: * 1. Redistributions of source code must retain the above copyright ! 12: * notice, this list of conditions and the following disclaimer. ! 13: * 2. Redistributions in binary form must reproduce the above copyright ! 14: * notice, this list of conditions and the following disclaimer in the ! 15: * documentation and/or other materials provided with the distribution. ! 16: * 3. All advertising materials mentioning features or use of this software ! 17: * must display the following acknowledgement: ! 18: * This product includes software developed by the University of ! 19: * California, Berkeley and its contributors. ! 20: * 4. Neither the name of the University nor the names of its contributors ! 21: * may be used to endorse or promote products derived from this software ! 22: * without specific prior written permission. ! 23: * ! 24: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ! 25: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ! 26: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ! 27: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ! 28: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ! 29: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ! 30: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ! 31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ! 32: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ! 33: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ! 34: * SUCH DAMAGE. ! 35: * ! 36: * @(#)scsireg.h 7.3 (Berkeley) 2/5/91 ! 37: */ ! 38: ! 39: /* ! 40: * AMD AM33C93A SCSI interface hardware description. ! 41: * ! 42: * Using parts of the Mach scsi driver for the 33C93 ! 43: */ ! 44: ! 45: #define SBIC_myid 0 ! 46: #define SBIC_cdbsize 0 ! 47: #define SBIC_control 1 ! 48: #define SBIC_timeo 2 ! 49: #define SBIC_cdb1 3 ! 50: #define SBIC_tsecs 3 ! 51: #define SBIC_cdb2 4 ! 52: #define SBIC_theads 4 ! 53: #define SBIC_cdb3 5 ! 54: #define SBIC_tcyl_hi 5 ! 55: #define SBIC_cdb4 6 ! 56: #define SBIC_tcyl_lo 6 ! 57: #define SBIC_cdb5 7 ! 58: #define SBIC_addr_hi 7 ! 59: #define SBIC_cdb6 8 ! 60: #define SBIC_addr_2 8 ! 61: #define SBIC_cdb7 9 ! 62: #define SBIC_addr_3 9 ! 63: #define SBIC_cdb8 10 ! 64: #define SBIC_addr_lo 10 ! 65: #define SBIC_cdb9 11 ! 66: #define SBIC_secno 11 ! 67: #define SBIC_cdb10 12 ! 68: #define SBIC_headno 12 ! 69: #define SBIC_cdb11 13 ! 70: #define SBIC_cylno_hi 13 ! 71: #define SBIC_cdb12 14 ! 72: #define SBIC_cylno_lo 14 ! 73: #define SBIC_tlun 15 ! 74: #define SBIC_cmd_phase 16 ! 75: #define SBIC_syn 17 ! 76: #define SBIC_count_hi 18 ! 77: #define SBIC_count_med 19 ! 78: #define SBIC_count_lo 20 ! 79: #define SBIC_selid 21 ! 80: #define SBIC_rselid 22 ! 81: #define SBIC_csr 23 ! 82: #define SBIC_cmd 24 ! 83: #define SBIC_data 25 ! 84: /* sbic_asr is addressed directly */ ! 85: ! 86: /* ! 87: * Register defines ! 88: */ ! 89: ! 90: /* ! 91: * Auxiliary Status Register ! 92: */ ! 93: ! 94: #define SBIC_ASR_INT 0x80 /* Interrupt pending */ ! 95: #define SBIC_ASR_LCI 0x40 /* Last command ignored */ ! 96: #define SBIC_ASR_BSY 0x20 /* Busy, only cmd/data/asr readable */ ! 97: #define SBIC_ASR_CIP 0x10 /* Busy, cmd unavail also */ ! 98: #define SBIC_ASR_xxx 0x0c ! 99: #define SBIC_ASR_PE 0x02 /* Parity error (even) */ ! 100: #define SBIC_ASR_DBR 0x01 /* Data Buffer Ready */ ! 101: ! 102: /* ! 103: * My ID register, and/or CDB Size ! 104: */ ! 105: ! 106: #define SBIC_ID_FS_8_10 0x00 /* Input clock is 8-10 Mhz */ ! 107: /* 11 Mhz is invalid */ ! 108: #define SBIC_ID_FS_12_15 0x40 /* Input clock is 12-15 Mhz */ ! 109: #define SBIC_ID_FS_16_20 0x80 /* Input clock is 16-20 Mhz */ ! 110: #define SBIC_ID_EHP 0x10 /* Enable host parity */ ! 111: #define SBIC_ID_EAF 0x08 /* Enable Advanced Features */ ! 112: #define SBIC_ID_MASK 0x07 ! 113: #define SBIC_ID_CBDSIZE_MASK 0x0f /* if unk SCSI cmd group */ ! 114: ! 115: /* ! 116: * Control register ! 117: */ ! 118: ! 119: #define SBIC_CTL_DMA 0x80 /* Single byte dma */ ! 120: #define SBIC_CTL_DBA_DMA 0x40 /* direct buffer acces (bus master)*/ ! 121: #define SBIC_CTL_BURST_DMA 0x20 /* continuous mode (8237) */ ! 122: #define SBIC_CTL_NO_DMA 0x00 /* Programmed I/O */ ! 123: #define SBIC_CTL_HHP 0x10 /* Halt on host parity error */ ! 124: #define SBIC_CTL_EDI 0x08 /* Ending disconnect interrupt */ ! 125: #define SBIC_CTL_IDI 0x04 /* Intermediate disconnect interrupt*/ ! 126: #define SBIC_CTL_HA 0x02 /* Halt on ATN */ ! 127: #define SBIC_CTL_HSP 0x01 /* Halt on SCSI parity error */ ! 128: ! 129: /* ! 130: * Timeout period register ! 131: * [val in msecs, input clk in 0.1 Mhz] ! 132: */ ! 133: ! 134: #define SBIC_TIMEOUT(val,clk) ((((val)*(clk))/800)+1) ! 135: ! 136: /* ! 137: * CDBn registers, note that ! 138: * cdb11 is used for status byte in target mode (send-status-and-cc) ! 139: * cdb12 sez if linked command complete, and w/flag if so ! 140: */ ! 141: ! 142: /* ! 143: * Target LUN register ! 144: * [holds target status when select-and-xfer] ! 145: */ ! 146: ! 147: #define SBIC_TLUN_VALID 0x80 /* did we receive an Identify msg */ ! 148: #define SBIC_TLUN_DOK 0x40 /* Disconnect OK */ ! 149: #define SBIC_TLUN_xxx 0x38 ! 150: #define SBIC_TLUN_MASK 0x07 ! 151: ! 152: /* ! 153: * Command Phase register ! 154: */ ! 155: ! 156: #define SBIC_CPH_MASK 0x7f /* values/restarts are cmd specific */ ! 157: #define SBIC_CPH(p) ((p)&SBIC_CPH_MASK) ! 158: ! 159: /* ! 160: * FIFO register ! 161: */ ! 162: ! 163: #define SBIC_FIFO_DEEP 12 ! 164: ! 165: /* ! 166: * maximum possible size in TC registers. Since this is 24 bit, it's easy ! 167: */ ! 168: #define SBIC_TC_MAX ((1<<24) - 1) ! 169: ! 170: /* ! 171: * Synchronous xfer register ! 172: */ ! 173: ! 174: #define SBIC_SYN_OFF_MASK 0x0f ! 175: #define SBIC_SYN_MAX_OFFSET SBIC_FIFO_DEEP ! 176: #define SBIC_SYN_PER_MASK 0x70 ! 177: #define SBIC_SYN_MIN_PERIOD 2 /* upto 8, encoded as 0 */ ! 178: ! 179: #define SBIC_SYN(o,p) (((o)&SBIC_SYN_OFF_MASK)|(((p)<<4)&SBIC_SYN_PER_MASK)) ! 180: ! 181: /* ! 182: * Transfer count register ! 183: * optimal access macros depend on addressing ! 184: */ ! 185: ! 186: /* ! 187: * Destination ID (selid) register ! 188: */ ! 189: ! 190: #define SBIC_SID_SCC 0x80 /* Select command chaining (tgt) */ ! 191: #define SBIC_SID_DPD 0x40 /* Data phase direction (inittor) */ ! 192: # define SBIC_SID_FROM_SCSI 0x40 ! 193: # define SBIC_SID_TO_SCSI 0x00 ! 194: #define SBIC_SID_xxx 0x38 ! 195: #define SBIC_SID_IDMASK 0x07 ! 196: ! 197: /* ! 198: * Source ID (rselid) register ! 199: */ ! 200: ! 201: #define SBIC_RID_ER 0x80 /* Enable reselection */ ! 202: #define SBIC_RID_ES 0x40 /* Enable selection */ ! 203: #define SBIC_RID_DSP 0x20 /* Disable select parity */ ! 204: #define SBIC_RID_SIV 0x08 /* Source ID valid */ ! 205: #define SBIC_RID_MASK 0x07 ! 206: ! 207: /* ! 208: * Status register ! 209: */ ! 210: ! 211: #define SBIC_CSR_CAUSE 0xf0 ! 212: # define SBIC_CSR_RESET 0x00 /* chip was reset */ ! 213: # define SBIC_CSR_CMD_DONE 0x10 /* cmd completed */ ! 214: # define SBIC_CSR_CMD_STOPPED 0x20 /* interrupted or abrted*/ ! 215: # define SBIC_CSR_CMD_ERR 0x40 /* end with error */ ! 216: # define SBIC_CSR_BUS_SERVICE 0x80 /* REQ pending on the bus */ ! 217: ! 218: #define SBIC_CSR_QUALIFIER 0x0f ! 219: ! 220: /* Reset State Interrupts */ ! 221: # define SBIC_CSR_RESET 0x00 /* reset w/advanced features*/ ! 222: # define SBIC_CSR_RESET_AM 0x01 /* reset w/advanced features*/ ! 223: ! 224: /* Successful Completion Interrupts */ ! 225: # define SBIC_CSR_TARGET 0x10 /* reselect complete */ ! 226: # define SBIC_CSR_INITIATOR 0x11 /* select complete */ ! 227: # define SBIC_CSR_WO_ATN 0x13 /* tgt mode completion */ ! 228: # define SBIC_CSR_W_ATN 0x14 /* ditto */ ! 229: # define SBIC_CSR_XLATED 0x15 /* translate address cmd */ ! 230: # define SBIC_CSR_S_XFERRED 0x16 /* initiator mode completion*/ ! 231: # define SBIC_CSR_XFERRED 0x18 /* phase in low bits */ ! 232: ! 233: /* Paused or Aborted Interrupts */ ! 234: # define SBIC_CSR_MSGIN_W_ACK 0x20 /* (I) msgin, ACK asserted*/ ! 235: # define SBIC_CSR_SDP 0x21 /* (I) SDP msg received */ ! 236: # define SBIC_CSR_SEL_ABRT 0x22 /* sel/resel aborted */ ! 237: # define SBIC_CSR_XFR_PAUSED 0x23 /* (T) no ATN */ ! 238: # define SBIC_CSR_XFR_PAUSED_ATN 0x24 /* (T) ATN is asserted */ ! 239: # define SBIC_CSR_RSLT_AM 0x27 /* (I) lost selection (AM) */ ! 240: # define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */ ! 241: ! 242: /* Terminated Interrupts */ ! 243: # define SBIC_CSR_CMD_INVALID 0x40 ! 244: # define SBIC_CSR_DISC 0x41 /* (I) tgt disconnected */ ! 245: # define SBIC_CSR_SEL_TIMEO 0x42 ! 246: # define SBIC_CSR_PE 0x43 /* parity error */ ! 247: # define SBIC_CSR_PE_ATN 0x44 /* ditto, ATN is asserted */ ! 248: # define SBIC_CSR_XLATE_TOOBIG 0x45 ! 249: # define SBIC_CSR_RSLT_NOAM 0x46 /* (I) lost sel, no AM mode */ ! 250: # define SBIC_CSR_BAD_STATUS 0x47 /* status byte was nok */ ! 251: # define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */ ! 252: ! 253: /* Service Required Interrupts */ ! 254: # define SBIC_CSR_RSLT_NI 0x80 /* reselected, no ify msg */ ! 255: # define SBIC_CSR_RSLT_IFY 0x81 /* ditto, AM mode, got ify */ ! 256: # define SBIC_CSR_SLT 0x82 /* selected, no ATN */ ! 257: # define SBIC_CSR_SLT_ATN 0x83 /* selected with ATN */ ! 258: # define SBIC_CSR_ATN 0x84 /* (T) ATN asserted */ ! 259: # define SBIC_CSR_DISC_1 0x85 /* (I) bus is free */ ! 260: # define SBIC_CSR_UNK_GROUP 0x87 /* strange CDB1 */ ! 261: # define SBIC_CSR_MIS_2 0x88 /* (I) ph mis, see low bits */ ! 262: ! 263: #define SBIC_PHASE(csr) SCSI_PHASE(csr) ! 264: ! 265: /* ! 266: * Command register (command codes) ! 267: */ ! 268: ! 269: #define SBIC_CMD_SBT 0x80 /* Single byte xfer qualifier */ ! 270: #define SBIC_CMD_MASK 0x7f ! 271: ! 272: /* Miscellaneous */ ! 273: #define SBIC_CMD_RESET 0x00 /* (DTI) lev I */ ! 274: #define SBIC_CMD_ABORT 0x01 /* (DTI) lev I */ ! 275: #define SBIC_CMD_DISC 0x04 /* ( TI) lev I */ ! 276: #define SBIC_CMD_SSCC 0x0d /* ( TI) lev I */ ! 277: #define SBIC_CMD_SET_IDI 0x0f /* (DTI) lev I */ ! 278: #define SBIC_CMD_XLATE 0x18 /* (DT ) lev II */ ! 279: ! 280: /* Initiator state */ ! 281: #define SBIC_CMD_SET_ATN 0x02 /* ( I) lev I */ ! 282: #define SBIC_CMD_CLR_ACK 0x03 /* ( I) lev I */ ! 283: #define SBIC_CMD_XFER_PAD 0x19 /* ( I) lev II */ ! 284: #define SBIC_CMD_XFER_INFO 0x20 /* ( I) lev II */ ! 285: ! 286: /* Target state */ ! 287: #define SBIC_CMD_SND_DISC 0x0e /* ( T ) lev II */ ! 288: #define SBIC_CMD_RCV_CMD 0x10 /* ( T ) lev II */ ! 289: #define SBIC_CMD_RCV_DATA 0x11 /* ( T ) lev II */ ! 290: #define SBIC_CMD_RCV_MSG_OUT 0x12 /* ( T ) lev II */ ! 291: #define SBIC_CMD_RCV 0x13 /* ( T ) lev II */ ! 292: #define SBIC_CMD_SND_STATUS 0x14 /* ( T ) lev II */ ! 293: #define SBIC_CMD_SND_DATA 0x15 /* ( T ) lev II */ ! 294: #define SBIC_CMD_SND_MSG_IN 0x16 /* ( T ) lev II */ ! 295: #define SBIC_CMD_SND 0x17 /* ( T ) lev II */ ! 296: ! 297: /* Disconnected state */ ! 298: #define SBIC_CMD_RESELECT 0x05 /* (D ) lev II */ ! 299: #define SBIC_CMD_SEL_ATN 0x06 /* (D ) lev II */ ! 300: #define SBIC_CMD_SEL 0x07 /* (D ) lev II */ ! 301: #define SBIC_CMD_SEL_ATN_XFER 0x08 /* (D I) lev II */ ! 302: #define SBIC_CMD_SEL_XFER 0x09 /* (D I) lev II */ ! 303: #define SBIC_CMD_RESELECT_RECV 0x0a /* (DT ) lev II */ ! 304: #define SBIC_CMD_RESELECT_SEND 0x0b /* (DT ) lev II */ ! 305: #define SBIC_CMD_WAIT_SEL_RECV 0x0c /* (DT ) lev II */ ! 306: ! 307: /* approximate, but we won't do SBT on selects */ ! 308: #define sbic_isa_select(cmd) (((cmd)>0x5)&&((cmd)<0xa)) ! 309: ! 310: #define PAD(n) char n; ! 311: #ifdef A3000 ! 312: #define SBIC_CLOCK_FREQUENCY 143 /* according to A3000T service manual */ ! 313: #endif ! 314: #ifdef A2091 ! 315: #define SBIC_CLOCK_FREQUENCY 77 ! 316: #endif ! 317: #define SBIC_MACHINE_DMA_MODE SBIC_CTL_DMA ! 318: ! 319: typedef struct { ! 320: volatile unsigned char sbic_asr; /* r : Aux Status Register */ ! 321: #define sbic_address sbic_asr /* w : desired register no */ ! 322: PAD(pad1); ! 323: volatile unsigned char sbic_value; /* rw: register value */ ! 324: } sbic_padded_ind_regmap_t; ! 325: ! 326: ! 327: typedef sbic_padded_ind_regmap_t sbic_padded_regmap_t; ! 328: ! 329: #define sbic_read_reg(regs,regno,val) do { \ ! 330: (regs)->sbic_address = (regno); \ ! 331: (val) = (regs)->sbic_value; \ ! 332: } while (0) ! 333: ! 334: #define sbic_write_reg(regs,regno,val) do { \ ! 335: (regs)->sbic_address = (regno); \ ! 336: (regs)->sbic_value = (val); \ ! 337: } while (0) ! 338: ! 339: #define SET_SBIC_myid(regs,val) sbic_write_reg(regs,SBIC_myid,val) ! 340: #define GET_SBIC_myid(regs,val) sbic_read_reg(regs,SBIC_myid,val) ! 341: #define SET_SBIC_cdbsize(regs,val) sbic_write_reg(regs,SBIC_cdbsize,val) ! 342: #define GET_SBIC_cdbsize(regs,val) sbic_read_reg(regs,SBIC_cdbsize,val) ! 343: #define SET_SBIC_control(regs,val) sbic_write_reg(regs,SBIC_control,val) ! 344: #define GET_SBIC_control(regs,val) sbic_read_reg(regs,SBIC_control,val) ! 345: #define SET_SBIC_timeo(regs,val) sbic_write_reg(regs,SBIC_timeo,val) ! 346: #define GET_SBIC_timeo(regs,val) sbic_read_reg(regs,SBIC_timeo,val) ! 347: #define SET_SBIC_cdb1(regs,val) sbic_write_reg(regs,SBIC_cdb1,val) ! 348: #define GET_SBIC_cdb1(regs,val) sbic_read_reg(regs,SBIC_cdb1,val) ! 349: #define SET_SBIC_cdb2(regs,val) sbic_write_reg(regs,SBIC_cdb2,val) ! 350: #define GET_SBIC_cdb2(regs,val) sbic_read_reg(regs,SBIC_cdb2,val) ! 351: #define SET_SBIC_cdb3(regs,val) sbic_write_reg(regs,SBIC_cdb3,val) ! 352: #define GET_SBIC_cdb3(regs,val) sbic_read_reg(regs,SBIC_cdb3,val) ! 353: #define SET_SBIC_cdb4(regs,val) sbic_write_reg(regs,SBIC_cdb4,val) ! 354: #define GET_SBIC_cdb4(regs,val) sbic_read_reg(regs,SBIC_cdb4,val) ! 355: #define SET_SBIC_cdb5(regs,val) sbic_write_reg(regs,SBIC_cdb5,val) ! 356: #define GET_SBIC_cdb5(regs,val) sbic_read_reg(regs,SBIC_cdb5,val) ! 357: #define SET_SBIC_cdb6(regs,val) sbic_write_reg(regs,SBIC_cdb6,val) ! 358: #define GET_SBIC_cdb6(regs,val) sbic_read_reg(regs,SBIC_cdb6,val) ! 359: #define SET_SBIC_cdb7(regs,val) sbic_write_reg(regs,SBIC_cdb7,val) ! 360: #define GET_SBIC_cdb7(regs,val) sbic_read_reg(regs,SBIC_cdb7,val) ! 361: #define SET_SBIC_cdb8(regs,val) sbic_write_reg(regs,SBIC_cdb8,val) ! 362: #define GET_SBIC_cdb8(regs,val) sbic_read_reg(regs,SBIC_cdb8,val) ! 363: #define SET_SBIC_cdb9(regs,val) sbic_write_reg(regs,SBIC_cdb9,val) ! 364: #define GET_SBIC_cdb9(regs,val) sbic_read_reg(regs,SBIC_cdb9,val) ! 365: #define SET_SBIC_cdb10(regs,val) sbic_write_reg(regs,SBIC_cdb10,val) ! 366: #define GET_SBIC_cdb10(regs,val) sbic_read_reg(regs,SBIC_cdb10,val) ! 367: #define SET_SBIC_cdb11(regs,val) sbic_write_reg(regs,SBIC_cdb11,val) ! 368: #define GET_SBIC_cdb11(regs,val) sbic_read_reg(regs,SBIC_cdb11,val) ! 369: #define SET_SBIC_cdb12(regs,val) sbic_write_reg(regs,SBIC_cdb12,val) ! 370: #define GET_SBIC_cdb12(regs,val) sbic_read_reg(regs,SBIC_cdb12,val) ! 371: #define SET_SBIC_tlun(regs,val) sbic_write_reg(regs,SBIC_tlun,val) ! 372: #define GET_SBIC_tlun(regs,val) sbic_read_reg(regs,SBIC_tlun,val) ! 373: #define SET_SBIC_cmd_phase(regs,val) sbic_write_reg(regs,SBIC_cmd_phase,val) ! 374: #define GET_SBIC_cmd_phase(regs,val) sbic_read_reg(regs,SBIC_cmd_phase,val) ! 375: #define SET_SBIC_syn(regs,val) sbic_write_reg(regs,SBIC_syn,val) ! 376: #define GET_SBIC_syn(regs,val) sbic_read_reg(regs,SBIC_syn,val) ! 377: #define SET_SBIC_count_hi(regs,val) sbic_write_reg(regs,SBIC_count_hi,val) ! 378: #define GET_SBIC_count_hi(regs,val) sbic_read_reg(regs,SBIC_count_hi,val) ! 379: #define SET_SBIC_count_med(regs,val) sbic_write_reg(regs,SBIC_count_med,val) ! 380: #define GET_SBIC_count_med(regs,val) sbic_read_reg(regs,SBIC_count_med,val) ! 381: #define SET_SBIC_count_lo(regs,val) sbic_write_reg(regs,SBIC_count_lo,val) ! 382: #define GET_SBIC_count_lo(regs,val) sbic_read_reg(regs,SBIC_count_lo,val) ! 383: #define SET_SBIC_selid(regs,val) sbic_write_reg(regs,SBIC_selid,val) ! 384: #define GET_SBIC_selid(regs,val) sbic_read_reg(regs,SBIC_selid,val) ! 385: #define SET_SBIC_rselid(regs,val) sbic_write_reg(regs,SBIC_rselid,val) ! 386: #define GET_SBIC_rselid(regs,val) sbic_read_reg(regs,SBIC_rselid,val) ! 387: #define SET_SBIC_csr(regs,val) sbic_write_reg(regs,SBIC_csr,val) ! 388: #define GET_SBIC_csr(regs,val) sbic_read_reg(regs,SBIC_csr,val) ! 389: #define SET_SBIC_cmd(regs,val) sbic_write_reg(regs,SBIC_cmd,val) ! 390: #define GET_SBIC_cmd(regs,val) sbic_read_reg(regs,SBIC_cmd,val) ! 391: #define SET_SBIC_data(regs,val) sbic_write_reg(regs,SBIC_data,val) ! 392: #define GET_SBIC_data(regs,val) sbic_read_reg(regs,SBIC_data,val) ! 393: ! 394: #define SBIC_TC_PUT(regs,val) { \ ! 395: sbic_write_reg(regs,SBIC_count_hi,((val)>>16)); \ ! 396: (regs)->sbic_value = (val)>>8; \ ! 397: (regs)->sbic_value = (val); \ ! 398: } ! 399: #define SBIC_TC_GET(regs,val) { \ ! 400: sbic_read_reg(regs,SBIC_count_hi,(val)); \ ! 401: (val) = ((val)<<8) | (regs)->sbic_value; \ ! 402: (val) = ((val)<<8) | (regs)->sbic_value; \ ! 403: } ! 404: ! 405: #define SBIC_LOAD_COMMAND(regs,cmd,cmdsize) { \ ! 406: register int n=cmdsize-1; \ ! 407: register char *ptr = (char*)(cmd); \ ! 408: sbic_write_reg(regs,SBIC_cdb1,*ptr++); \ ! 409: while (n-- > 0) (regs)->sbic_value = *ptr++; \ ! 410: } ! 411: ! 412: #define GET_SBIC_asr(regs,val) (val) = (regs)->sbic_asr ! 413: ! 414: #define WAIT_CIP(regs) do ; while ((regs)->sbic_asr & SBIC_ASR_CIP) ! 415: ! 416: /* transmit a byte in programmed I/O mode */ ! 417: #define SEND_BYTE(regs, ch) \ ! 418: WAIT_CIP (regs); \ ! 419: SET_SBIC_cmd (regs, SBIC_CMD_SBT | SBIC_CMD_XFER_INFO); \ ! 420: SBIC_WAIT (regs, SBIC_ASR_DBR, 0); \ ! 421: SET_SBIC_data (regs, ch); ! 422: ! 423: /* receive a byte in programmed I/O mode */ ! 424: #define RECV_BYTE(regs, ch) \ ! 425: WAIT_CIP (regs); \ ! 426: SET_SBIC_cmd (regs, SBIC_CMD_SBT | SBIC_CMD_XFER_INFO); \ ! 427: SBIC_WAIT (regs, SBIC_ASR_DBR, 0); \ ! 428: GET_SBIC_data (regs, ch); ! 429: ! 430: ! 431: ! 432: ! 433: ! 434: /* psns/pctl phase lines as bits */ ! 435: #define PHASE_MSG 0x04 ! 436: #define PHASE_CD 0x02 /* =1 if 'command' */ ! 437: #define PHASE_IO 0x01 /* =1 if data inbound */ ! 438: /* Phase lines as values */ ! 439: #define PHASE 0x07 /* mask for psns/pctl phase */ ! 440: #define DATA_OUT_PHASE 0x00 ! 441: #define DATA_IN_PHASE 0x01 ! 442: #define CMD_PHASE 0x02 ! 443: #define STATUS_PHASE 0x03 ! 444: #define BUS_FREE_PHASE 0x04 ! 445: #define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */ ! 446: #define MESG_OUT_PHASE 0x06 ! 447: #define MESG_IN_PHASE 0x07 ! 448: ! 449: /* SCSI Messages */ ! 450: ! 451: #define MSG_CMD_COMPLETE 0x00 ! 452: #define MSG_EXT_MESSAGE 0x01 ! 453: #define MSG_SAVE_DATA_PTR 0x02 ! 454: #define MSG_RESTORE_PTR 0x03 ! 455: #define MSG_DISCONNECT 0x04 ! 456: #define MSG_INIT_DETECT_ERROR 0x05 ! 457: #define MSG_ABORT 0x06 ! 458: #define MSG_REJECT 0x07 ! 459: #define MSG_NOOP 0x08 ! 460: #define MSG_PARITY_ERROR 0x09 ! 461: #define MSG_BUS_DEVICE_RESET 0x0C ! 462: #define MSG_IDENTIFY 0x80 ! 463: #define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */ ! 464: #define MSG_SYNC_REQ 0x01 ! 465: ! 466: /* SCSI Commands */ ! 467: ! 468: #define CMD_TEST_UNIT_READY 0x00 ! 469: #define CMD_REQUEST_SENSE 0x03 ! 470: #define CMD_INQUIRY 0x12 ! 471: #define CMD_SEND_DIAGNOSTIC 0x1D ! 472: ! 473: #define CMD_REWIND 0x01 ! 474: #define CMD_FORMAT_UNIT 0x04 ! 475: #define CMD_READ_BLOCK_LIMITS 0x05 ! 476: #define CMD_REASSIGN_BLOCKS 0x07 ! 477: #define CMD_READ 0x08 ! 478: #define CMD_WRITE 0x0A ! 479: #define CMD_WRITE_FILEMARK 0x10 ! 480: #define CMD_SPACE 0x11 ! 481: #define CMD_MODE_SELECT 0x15 ! 482: #define CMD_RELEASE_UNIT 0x17 ! 483: #define CMD_ERASE 0x19 ! 484: #define CMD_MODE_SENSE 0x1A ! 485: #define CMD_LOADUNLOAD 0x1B ! 486: #define CMD_RECEIVE_DIAG 0x1C ! 487: #define CMD_SEND_DIAG 0x1D ! 488: #define CMD_P_A_MEDIA_REMOVAL 0x1E ! 489: #define CMD_READ_CAPACITY 0x25 ! 490: #define CMD_READ_EXT 0x28 ! 491: #define CMD_WRITE_EXT 0x2A ! 492: #define CMD_READ_DEFECT_DATA 0x37 ! 493: #define SD_MANUFAC_DEFECTS 0x14000000 ! 494: #define SD_GROWN_DEFECTS 0x0c000000 ! 495: #define CMD_READ_BUFFER 0x3B ! 496: #define CMD_WRITE_BUFFER 0x3C ! 497: #define CMD_READ_FULL 0xF0 ! 498: #define CMD_MEDIA_TEST 0xF1 ! 499: #define CMD_ACCESS_LOG 0xF2 ! 500: #define CMD_WRITE_FULL 0xFC ! 501: #define CMD_MANAGE_PRIMARY 0xFD ! 502: #define CMD_EXECUTE_DATA 0xFE ! 503: ! 504: /* SCSI status bits */ ! 505: ! 506: #define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */ ! 507: #define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */ ! 508: #define STS_BUSY 0x08 ! 509: #define STS_INTERMED 0x10 /* Intermediate status sent */ ! 510: #define STS_EXT 0x80 /* Extended status valid */ ! 511: ! 512: /* command descriptor blocks */ ! 513: ! 514: struct scsi_cdb6 { ! 515: u_char cmd; /* command code */ ! 516: u_char lun: 3, /* logical unit on ctlr */ ! 517: lbah: 5; /* msb of read/write logical block addr */ ! 518: u_char lbam; /* middle byte of l.b.a. */ ! 519: u_char lbal; /* lsb of l.b.a. */ ! 520: u_char len; /* transfer length */ ! 521: u_char xtra; ! 522: }; ! 523: ! 524: struct scsi_cdb10 { ! 525: u_char cmd; /* command code */ ! 526: u_char lun: 3, /* logical unit on ctlr */ ! 527: : 4, ! 528: rel: 1; /* l.b.a. is relative addr if =1 */ ! 529: u_char lbah; /* msb of read/write logical block addr */ ! 530: u_char lbahm; /* high middle byte of l.b.a. */ ! 531: u_char lbalm; /* low middle byte of l.b.a. */ ! 532: u_char lbal; /* lsb of l.b.a. */ ! 533: u_char reserved; ! 534: u_char lenh; /* msb transfer length */ ! 535: u_char lenl; /* lsb transfer length */ ! 536: u_char xtra; ! 537: }; ! 538: ! 539: /* basic sense data */ ! 540: ! 541: struct scsi_sense { ! 542: u_char valid: 1, /* l.b.a. is valid */ ! 543: class: 3, ! 544: code: 4; ! 545: u_char vu: 4, /* vendor unique */ ! 546: lbah: 4; ! 547: u_char lbam; ! 548: u_char lbal; ! 549: }; ! 550: ! 551: struct scsi_xsense { ! 552: u_char valid: 1, /* l.b.a. is valid */ ! 553: class: 3, ! 554: code: 4; ! 555: u_char segment; ! 556: u_char filemark: 1, ! 557: eom: 1, ! 558: ili: 1, /* illegal length indicator */ ! 559: rsvd: 1, ! 560: key: 4; ! 561: u_char info1; ! 562: u_char info2; ! 563: u_char info3; ! 564: u_char info4; ! 565: u_char len; /* additional sense length */ ! 566: }; ! 567: ! 568: /* inquiry data */ ! 569: struct scsi_inquiry { ! 570: u_char type; ! 571: u_char qual; ! 572: u_char version; ! 573: u_char rsvd; ! 574: u_char len; ! 575: char class[3]; ! 576: char vendor_id[8]; ! 577: char product_id[16]; ! 578: char rev[4]; ! 579: }; ! 580: ! 581: struct scsi_format_parms { /* physical BFI format */ ! 582: u_short reserved; ! 583: u_short list_len; ! 584: struct defect { ! 585: unsigned cyl : 24; ! 586: unsigned head : 8; ! 587: long bytes_from_index; ! 588: } defect[127]; ! 589: } format_parms; ! 590: ! 591: struct scsi_reassign_parms { ! 592: u_short reserved; ! 593: u_short list_len; /* length in bytes of defects only */ ! 594: struct new_defect { ! 595: unsigned lba; /* logical block address */ ! 596: } new_defect[2]; ! 597: } reassign_parms; ! 598: ! 599: struct scsi_modesel_hdr { ! 600: u_char rsvd1; ! 601: u_char media_type; ! 602: u_char rsvd2; ! 603: u_char block_desc_len; ! 604: u_int density : 8; ! 605: u_int number_blocks :24; ! 606: u_int rsvd3 : 8; ! 607: u_int block_length :24; ! 608: }; ! 609: ! 610: struct scsi_modesense_hdr { ! 611: u_char len; ! 612: u_char media_type; ! 613: u_char wp : 1; ! 614: u_char rsvd1 : 7; ! 615: u_char block_desc_len; ! 616: u_int density : 8; ! 617: u_int number_blocks :24; ! 618: u_int rsvd2 : 8; ! 619: u_int block_length :24; ! 620: }; ! 621: ! 622: /* ! 623: * Mode Select / Mode sense "pages" ! 624: */ ! 625: ! 626: /* ! 627: * Page One - Error Recovery Parameters ! 628: */ ! 629: struct scsi_err_recovery { ! 630: u_char page_savable : 1; /* save parameters */ ! 631: u_char reserved : 1; ! 632: u_char page_code : 6; /* = 0x01 */ ! 633: u_char page_length; /* = 6 */ ! 634: u_char awre : 1; /* auto write realloc enabled */ ! 635: u_char arre : 1; /* auto read realloc enabled */ ! 636: u_char tb : 1; /* transfer block */ ! 637: u_char rc : 1; /* read continuous */ ! 638: u_char eec : 1; /* enable early correction */ ! 639: u_char per : 1; /* post error */ ! 640: u_char dte : 1; /* disable transfer on error */ ! 641: u_char dcr : 1; /* disable correction */ ! 642: u_char retry_count; ! 643: u_char correction_span; ! 644: u_char head_offset_count; ! 645: u_char strobe_offset_count; ! 646: u_char recovery_time_limit; ! 647: }; ! 648: ! 649: /* ! 650: * Page Two - Disconnect / Reconnect Control Parameters ! 651: */ ! 652: struct scsi_disco_reco { ! 653: u_char page_savable : 1; /* save parameters */ ! 654: u_char rsvd : 1; ! 655: u_char page_code : 6; /* = 0x02 */ ! 656: u_char page_length; /* = 10 */ ! 657: u_char buffer_full_ratio; /* write, how full before reconnect? */ ! 658: u_char buffer_empty_ratio; /* read, how full before reconnect? */ ! 659: ! 660: u_short bus_inactivity_limit; /* how much bus time for busy */ ! 661: u_short disconnect_time_limit; /* min to remain disconnected */ ! 662: u_short connect_time_limit; /* min to remain connected */ ! 663: u_short reserved_1; ! 664: }; ! 665: ! 666: /* ! 667: * Page Three - Direct Access Device Format Parameters ! 668: */ ! 669: struct scsi_format { ! 670: u_char page_savable : 1; /* save parameters */ ! 671: u_char rsvd : 1; ! 672: u_char page_code : 6; /* = 0x03 */ ! 673: u_char page_length; /* = 22 */ ! 674: u_short tracks_per_zone; /* Handling of Defects Fields */ ! 675: u_short alt_sect_zone; ! 676: u_short alt_tracks_zone; ! 677: u_short alt_tracks_vol; ! 678: u_short sect_track; /* Track Format Field */ ! 679: u_short data_sect; /* Sector Format Fields */ ! 680: u_short interleave; ! 681: u_short track_skew_factor; ! 682: u_short cyl_skew_factor; ! 683: u_char ssec : 1; /* Drive Type Field */ ! 684: u_char hsec : 1; ! 685: u_char rmb : 1; ! 686: u_char surf : 1; ! 687: u_char ins : 1; ! 688: u_char reserved_1 : 3; ! 689: u_char reserved_2; ! 690: u_char reserved_3; ! 691: u_char reserved_4; ! 692: }; ! 693: ! 694: /* ! 695: * Page Four - Rigid Disk Drive Geometry Parameters ! 696: */ ! 697: struct scsi_geometry { ! 698: u_char page_savable : 1; /* save parameters */ ! 699: u_char rsvd : 1; ! 700: u_char page_code : 6; /* = 0x04 */ ! 701: u_char page_length; /* = 18 */ ! 702: u_char cyl_ub; /* number of cylinders */ ! 703: u_char cyl_mb; ! 704: u_char cyl_lb; ! 705: u_char heads; /* number of heads */ ! 706: u_char precomp_cyl_ub; /* cylinder to start precomp */ ! 707: u_char precomp_cyl_mb; ! 708: u_char precomp_cyl_lb; ! 709: u_char current_cyl_ub; /* cyl to start reduced current */ ! 710: u_char current_cyl_mb; ! 711: u_char current_cyl_lb; ! 712: u_short step_rate; /* drive step rate */ ! 713: u_char landing_cyl_ub; /* landing zone cylinder */ ! 714: u_char landing_cyl_mb; ! 715: u_char landing_cyl_lb; ! 716: u_char reserved_1; ! 717: u_char reserved_2; ! 718: u_char reserved_3; ! 719: }; ! 720: ! 721: /* ! 722: * Page 0x38 - Cache Control Parameters ! 723: */ ! 724: struct scsi_cache { ! 725: u_char page_savable : 1; /* save parameters */ ! 726: u_char rsvd : 1; ! 727: u_char page_code : 6; /* = 0x38 */ ! 728: u_char page_length; /* = 14 */ ! 729: u_char rsvd_1 : 1; ! 730: u_char wie : 1; /* write index enable */ ! 731: u_char rsvd_2 : 1; ! 732: u_char ce : 1; /* cache enable */ ! 733: u_char table_size : 4; ! 734: u_char prefetch_threshold; ! 735: u_char maximum_threshold; ! 736: u_char maximumprefetch_multiplier; ! 737: u_char minimum_threshold; ! 738: u_char minimum_prefetch_multiplier; ! 739: u_char reserved[8]; ! 740: }; ! 741: ! 742: /* ! 743: * Driver ioctl's for various scsi operations. ! 744: */ ! 745: #ifndef _IOCTL_ ! 746: #include "ioctl.h" ! 747: #endif ! 748: ! 749: /* ! 750: * Control for SCSI "format" mode. ! 751: * ! 752: * "Format" mode allows a privileged process to issue direct SCSI ! 753: * commands to a drive (it is intended primarily to allow on-line ! 754: * formatting). SDIOCSFORMAT with a non-zero arg will put the drive ! 755: * into format mode; a zero arg will take it out. When in format ! 756: * mode, only the process that issued the SDIOCFORMAT can read or ! 757: * write the drive. ! 758: * ! 759: * In format mode, process is expected to ! 760: * - do SDIOCSCSICOMMAND to supply cdb for next SCSI op ! 761: * - do read or write as appropriate for cdb ! 762: * - if i/o error, optionally do SDIOCSENSE to get completion ! 763: * status and sense data from last scsi operation. ! 764: */ ! 765: ! 766: struct scsi_fmt_cdb { ! 767: int len; /* cdb length (in bytes) */ ! 768: u_char cdb[28]; /* cdb to use on next read/write */ ! 769: }; ! 770: ! 771: struct scsi_fmt_sense { ! 772: u_int status; /* completion status of last op */ ! 773: u_char sense[28]; /* sense data (if any) from last op */ ! 774: }; ! 775: ! 776: #define SDIOCSFORMAT _IOW('S', 0x1, int) ! 777: #define SDIOCGFORMAT _IOR('S', 0x2, int) ! 778: #define SDIOCSCSICOMMAND _IOW('S', 0x3, struct scsi_fmt_cdb) ! 779: #define SDIOCSENSE _IOR('S', 0x4, struct scsi_fmt_sense) ! 780: ! 781: extern void scsi_delay (int delay); ! 782: extern int scsiinit (register struct amiga_ctlr *ac); ! 783: extern void scsireset (void); ! 784: extern int scsi_test_unit_rdy (int slave); ! 785: extern int scsi_request_sense (int slave, u_char *buf, unsigned int len); ! 786: extern int scsi_immed_command (int slave, struct scsi_fmt_cdb *cdb, u_char *buf, unsigned int len, int rd); ! 787: extern int scsi_tt_read (int slave, u_char *buf, u_int len, daddr_t blk, int bshift); ! 788: extern int scsi_tt_write (int slave, u_char *buf, u_int len, daddr_t blk, int bshift); ! 789: extern int scsireq (register struct devqueue *dq); ! 790: extern int scsiustart (int unit); ! 791: extern void scsistart (int unit); ! 792: extern int scsigo (int unit, int slave, struct buf *bp, struct scsi_fmt_cdb *cdb, int pad); ! 793: extern void scsidone (int unit); ! 794: extern int scsiintr (int unit); ! 795: extern void scsifree (register struct devqueue *dq); ! 796: extern int scsi_tt_oddio (int slave, u_char *buf, u_int len, int b_flags, int freedma);
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