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1.1 root 1: /*
2: * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by the University of
16: * California, Berkeley and its contributors.
17: * 4. Neither the name of the University nor the names of its contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
1.1.1.2 ! root 33: * from: @(#)dca.c 7.12 (Berkeley) 6/27/91
! 34: * dca.c,v 1.8 1993/07/12 11:38:03 mycroft Exp
1.1 root 35: */
36:
37: #include "dca.h"
38: #if NDCA > 0
39: /*
40: * 98626/98644/internal serial interface
41: * uses National Semiconductor INS8250/NS16550AF UART
42: */
43: #include "sys/param.h"
44: #include "sys/systm.h"
45: #include "sys/ioctl.h"
46: #include "sys/tty.h"
47: #include "sys/proc.h"
48: #include "sys/conf.h"
49: #include "sys/file.h"
50: #include "sys/uio.h"
51: #include "sys/kernel.h"
52: #include "sys/syslog.h"
53:
54: #include "device.h"
55: #include "dcareg.h"
56: #include "machine/cpu.h"
57: #include "../hp300/isr.h"
58:
59: int dcaprobe();
60: struct driver dcadriver = {
61: dcaprobe, "dca",
62: };
63:
64: int dcastart(), dcaparam(), dcaintr();
65: int dcasoftCAR;
66: int dca_active;
67: int dca_hasfifo;
68: int ndca = NDCA;
69: #ifdef DCACONSOLE
70: int dcaconsole = DCACONSOLE;
71: #else
72: int dcaconsole = -1;
73: #endif
74: int dcaconsinit;
75: int dcadefaultrate = TTYDEF_SPEED;
76: int dcamajor;
77: struct dcadevice *dca_addr[NDCA];
1.1.1.2 ! root 78: struct tty *dca_tty[NDCA];
1.1 root 79: struct isr dcaisr[NDCA];
80:
81: struct speedtab dcaspeedtab[] = {
82: 0, 0,
83: 50, DCABRD(50),
84: 75, DCABRD(75),
85: 110, DCABRD(110),
86: 134, DCABRD(134),
87: 150, DCABRD(150),
88: 200, DCABRD(200),
89: 300, DCABRD(300),
90: 600, DCABRD(600),
91: 1200, DCABRD(1200),
92: 1800, DCABRD(1800),
93: 2400, DCABRD(2400),
94: 4800, DCABRD(4800),
95: 9600, DCABRD(9600),
96: 19200, DCABRD(19200),
97: 38400, DCABRD(38400),
98: -1, -1
99: };
100:
101: extern struct tty *constty;
102: #ifdef KGDB
103: #include "machine/remote-sl.h"
104:
105: extern dev_t kgdb_dev;
106: extern int kgdb_rate;
107: extern int kgdb_debug_init;
108: #endif
109:
110: #define UNIT(x) minor(x)
111:
112: #ifdef DEBUG
113: long fifoin[17];
114: long fifoout[17];
115: long dcaintrcount[16];
116: long dcamintcount[16];
117: #endif
118:
119: dcaprobe(hd)
120: register struct hp_device *hd;
121: {
122: register struct dcadevice *dca;
123: register int unit;
124:
125: dca = (struct dcadevice *)hd->hp_addr;
126: if (dca->dca_irid != DCAID0 &&
127: dca->dca_irid != DCAREMID0 &&
128: dca->dca_irid != DCAID1 &&
129: dca->dca_irid != DCAREMID1)
130: return (0);
131: unit = hd->hp_unit;
132: if (unit == dcaconsole)
133: DELAY(100000);
134: dca->dca_irid = 0xFF;
135: DELAY(100);
136:
137: /* look for a NS 16550AF UART with FIFOs */
138: dca->dca_fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14;
139: DELAY(100);
140: if ((dca->dca_iir & IIR_FIFO_MASK) == IIR_FIFO_MASK)
141: dca_hasfifo |= 1 << unit;
142:
143: hd->hp_ipl = DCAIPL(dca->dca_ic);
144: dcaisr[unit].isr_ipl = hd->hp_ipl;
145: dcaisr[unit].isr_arg = unit;
146: dcaisr[unit].isr_intr = dcaintr;
147: dca_addr[unit] = dca;
148: dca_active |= 1 << unit;
149: dcasoftCAR = hd->hp_flags;
150: isrlink(&dcaisr[unit]);
151: #ifdef KGDB
152: if (kgdb_dev == makedev(dcamajor, unit)) {
153: if (dcaconsole == unit)
154: kgdb_dev = NODEV; /* can't debug over console port */
155: else {
156: (void) dcainit(unit, kgdb_rate);
157: dcaconsinit = 1; /* don't re-init in dcaputc */
158: if (kgdb_debug_init) {
159: /*
160: * Print prefix of device name,
161: * let kgdb_connect print the rest.
162: */
163: printf("dca%d: ", unit);
164: kgdb_connect(1);
165: } else
166: printf("dca%d: kgdb enabled\n", unit);
167: }
168: }
169: #endif
170: dca->dca_ic = IC_IE;
171: /*
172: * Need to reset baud rate, etc. of next print so reset dcaconsinit.
173: * Also make sure console is always "hardwired."
174: */
175: if (unit == dcaconsole) {
176: dcaconsinit = 0;
177: dcasoftCAR |= (1 << unit);
178: }
179: return (1);
180: }
181:
182: /* ARGSUSED */
183: #ifdef __STDC__
184: dcaopen(dev_t dev, int flag, int mode, struct proc *p)
185: #else
186: dcaopen(dev, flag, mode, p)
187: dev_t dev;
188: int flag, mode;
189: struct proc *p;
190: #endif
191: {
192: register struct tty *tp;
193: register int unit;
194: int error = 0;
195:
196: unit = UNIT(dev);
197: if (unit >= NDCA || (dca_active & (1 << unit)) == 0)
198: return (ENXIO);
1.1.1.2 ! root 199: if(!dca_tty[unit])
! 200: tp = dca_tty[unit] = ttymalloc();
! 201: else
! 202: tp = dca_tty[unit];
1.1 root 203: tp->t_oproc = dcastart;
204: tp->t_param = dcaparam;
205: tp->t_dev = dev;
206: if ((tp->t_state & TS_ISOPEN) == 0) {
207: tp->t_state |= TS_WOPEN;
208: ttychars(tp);
209: if (tp->t_ispeed == 0) {
210: tp->t_iflag = TTYDEF_IFLAG;
211: tp->t_oflag = TTYDEF_OFLAG;
212: tp->t_cflag = TTYDEF_CFLAG;
213: tp->t_lflag = TTYDEF_LFLAG;
214: tp->t_ispeed = tp->t_ospeed = dcadefaultrate;
215: }
216: dcaparam(tp, &tp->t_termios);
217: ttsetwater(tp);
218: } else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
219: return (EBUSY);
220: (void) dcamctl(dev, MCR_DTR | MCR_RTS, DMSET);
221: if ((dcasoftCAR & (1 << unit)) || (dcamctl(dev, 0, DMGET) & MSR_DCD))
222: tp->t_state |= TS_CARR_ON;
223: (void) spltty();
224: while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
225: (tp->t_state & TS_CARR_ON) == 0) {
226: tp->t_state |= TS_WOPEN;
227: if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
228: ttopen, 0))
229: break;
230: }
231: (void) spl0();
232: if (error == 0)
233: error = (*linesw[tp->t_line].l_open)(dev, tp);
234: return (error);
235: }
236:
237: /*ARGSUSED*/
238: dcaclose(dev, flag, mode, p)
239: dev_t dev;
240: int flag, mode;
241: struct proc *p;
242: {
243: register struct tty *tp;
244: register struct dcadevice *dca;
245: register int unit;
246:
247: unit = UNIT(dev);
248: dca = dca_addr[unit];
1.1.1.2 ! root 249: tp = dca_tty[unit];
1.1 root 250: (*linesw[tp->t_line].l_close)(tp, flag);
251: dca->dca_cfcr &= ~CFCR_SBREAK;
252: #ifdef KGDB
253: /* do not disable interrupts if debugging */
254: if (dev != kgdb_dev)
255: #endif
256: dca->dca_ier = 0;
257: if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
258: (tp->t_state&TS_ISOPEN) == 0)
259: (void) dcamctl(dev, 0, DMSET);
260: ttyclose(tp);
1.1.1.2 ! root 261: ttyfree(tp);
! 262: dca_tty[unit] = (struct tty *)NULL;
1.1 root 263: return (0);
264: }
265:
266: dcaread(dev, uio, flag)
267: dev_t dev;
268: struct uio *uio;
269: {
1.1.1.2 ! root 270: register struct tty *tp = dca_tty[UNIT(dev)];
1.1 root 271:
272: return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
273: }
274:
275: dcawrite(dev, uio, flag)
276: dev_t dev;
277: struct uio *uio;
278: {
279: int unit = UNIT(dev);
1.1.1.2 ! root 280: register struct tty *tp = dca_tty[unit];
1.1 root 281:
282: /*
283: * (XXX) We disallow virtual consoles if the physical console is
284: * a serial port. This is in case there is a display attached that
285: * is not the console. In that situation we don't need/want the X
286: * server taking over the console.
287: */
288: if (constty && unit == dcaconsole)
289: constty = NULL;
290: return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
291: }
292:
293: dcaintr(unit)
294: register int unit;
295: {
296: register struct dcadevice *dca;
297: register u_char code;
298: register struct tty *tp;
299:
300: dca = dca_addr[unit];
301: if ((dca->dca_ic & IC_IR) == 0)
302: return (0);
303: while (1) {
304: code = dca->dca_iir;
305: #ifdef DEBUG
306: dcaintrcount[code & IIR_IMASK]++;
307: #endif
308: switch (code & IIR_IMASK) {
309: case IIR_NOPEND:
310: return (1);
311: case IIR_RXTOUT:
312: case IIR_RXRDY:
313: /* do time-critical read in-line */
1.1.1.2 ! root 314: tp = dca_tty[unit];
1.1 root 315: /*
316: * Process a received byte. Inline for speed...
317: */
318: #ifdef KGDB
319: #define RCVBYTE() \
320: code = dca->dca_data; \
321: if ((tp->t_state & TS_ISOPEN) == 0) { \
322: if (code == FRAME_END && \
323: kgdb_dev == makedev(dcamajor, unit)) \
324: kgdb_connect(0); /* trap into kgdb */ \
325: } else \
326: (*linesw[tp->t_line].l_rint)(code, tp)
327: #else
328: #define RCVBYTE() \
329: code = dca->dca_data; \
330: if ((tp->t_state & TS_ISOPEN) != 0) \
331: (*linesw[tp->t_line].l_rint)(code, tp)
332: #endif
333: RCVBYTE();
334: if (dca_hasfifo & (1 << unit)) {
335: #ifdef DEBUG
336: register int fifocnt = 1;
337: #endif
338: while ((code = dca->dca_lsr) & LSR_RCV_MASK) {
339: if (code == LSR_RXRDY) {
340: RCVBYTE();
341: } else
342: dcaeint(unit, code, dca);
343: #ifdef DEBUG
344: fifocnt++;
345: #endif
346: }
347: #ifdef DEBUG
348: if (fifocnt > 16)
349: fifoin[0]++;
350: else
351: fifoin[fifocnt]++;
352: #endif
353: }
354: break;
355: case IIR_TXRDY:
1.1.1.2 ! root 356: tp = dca_tty[unit];
1.1 root 357: tp->t_state &=~ (TS_BUSY|TS_FLUSH);
358: if (tp->t_line)
359: (*linesw[tp->t_line].l_start)(tp);
360: else
361: dcastart(tp);
362: break;
363: case IIR_RLS:
364: dcaeint(unit, dca->dca_lsr, dca);
365: break;
366: default:
367: if (code & IIR_NOPEND)
368: return (1);
369: log(LOG_WARNING, "dca%d: weird interrupt: 0x%x\n",
370: unit, code);
371: /* fall through */
372: case IIR_MLSC:
373: dcamint(unit, dca);
374: break;
375: }
376: }
377: }
378:
379: dcaeint(unit, stat, dca)
380: register int unit, stat;
381: register struct dcadevice *dca;
382: {
383: register struct tty *tp;
384: register int c;
385:
1.1.1.2 ! root 386: tp = dca_tty[unit];
1.1 root 387: c = dca->dca_data;
388: if ((tp->t_state & TS_ISOPEN) == 0) {
389: #ifdef KGDB
390: /* we don't care about parity errors */
391: if (((stat & (LSR_BI|LSR_FE|LSR_PE)) == LSR_PE) &&
392: kgdb_dev == makedev(dcamajor, unit) && c == FRAME_END)
393: kgdb_connect(0); /* trap into kgdb */
394: #endif
395: return;
396: }
397: if (stat & (LSR_BI | LSR_FE))
398: c |= TTY_FE;
399: else if (stat & LSR_PE)
400: c |= TTY_PE;
401: else if (stat & LSR_OE)
402: log(LOG_WARNING, "dca%d: silo overflow\n", unit);
403: (*linesw[tp->t_line].l_rint)(c, tp);
404: }
405:
406: dcamint(unit, dca)
407: register int unit;
408: register struct dcadevice *dca;
409: {
410: register struct tty *tp;
411: register int stat;
412:
1.1.1.2 ! root 413: tp = dca_tty[unit];
1.1 root 414: stat = dca->dca_msr;
415: #ifdef DEBUG
416: dcamintcount[stat & 0xf]++;
417: #endif
418: if ((stat & MSR_DDCD) && (dcasoftCAR & (1 << unit)) == 0) {
419: if (stat & MSR_DCD)
420: (void)(*linesw[tp->t_line].l_modem)(tp, 1);
421: else if ((*linesw[tp->t_line].l_modem)(tp, 0) == 0)
422: dca->dca_mcr &= ~(MCR_DTR | MCR_RTS);
423: } else if ((stat & MSR_DCTS) && (tp->t_state & TS_ISOPEN) &&
424: (tp->t_flags & CRTSCTS)) {
425: /* the line is up and we want to do rts/cts flow control */
426: if (stat & MSR_CTS) {
427: tp->t_state &=~ TS_TTSTOP;
428: ttstart(tp);
429: } else
430: tp->t_state |= TS_TTSTOP;
431: }
432: }
433:
434: dcaioctl(dev, cmd, data, flag)
435: dev_t dev;
436: caddr_t data;
437: {
438: register struct tty *tp;
439: register int unit = UNIT(dev);
440: register struct dcadevice *dca;
441: register int error;
442:
1.1.1.2 ! root 443: tp = dca_tty[unit];
1.1 root 444: error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag);
445: if (error >= 0)
446: return (error);
447: error = ttioctl(tp, cmd, data, flag);
448: if (error >= 0)
449: return (error);
450:
451: dca = dca_addr[unit];
452: switch (cmd) {
453:
454: case TIOCSBRK:
455: dca->dca_cfcr |= CFCR_SBREAK;
456: break;
457:
458: case TIOCCBRK:
459: dca->dca_cfcr &= ~CFCR_SBREAK;
460: break;
461:
462: case TIOCSDTR:
463: (void) dcamctl(dev, MCR_DTR | MCR_RTS, DMBIS);
464: break;
465:
466: case TIOCCDTR:
467: (void) dcamctl(dev, MCR_DTR | MCR_RTS, DMBIC);
468: break;
469:
470: case TIOCMSET:
471: (void) dcamctl(dev, *(int *)data, DMSET);
472: break;
473:
474: case TIOCMBIS:
475: (void) dcamctl(dev, *(int *)data, DMBIS);
476: break;
477:
478: case TIOCMBIC:
479: (void) dcamctl(dev, *(int *)data, DMBIC);
480: break;
481:
482: case TIOCMGET:
483: *(int *)data = dcamctl(dev, 0, DMGET);
484: break;
485:
486: default:
487: return (ENOTTY);
488: }
489: return (0);
490: }
491:
492: dcaparam(tp, t)
493: register struct tty *tp;
494: register struct termios *t;
495: {
496: register struct dcadevice *dca;
497: register int cfcr, cflag = t->c_cflag;
498: int unit = UNIT(tp->t_dev);
499: int ospeed = ttspeedtab(t->c_ospeed, dcaspeedtab);
500:
501: /* check requested parameters */
502: if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
503: return (EINVAL);
504: /* and copy to tty */
505: tp->t_ispeed = t->c_ispeed;
506: tp->t_ospeed = t->c_ospeed;
507: tp->t_cflag = cflag;
508:
509: dca = dca_addr[unit];
510: dca->dca_ier = IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC;
511: if (ospeed == 0) {
512: (void) dcamctl(unit, 0, DMSET); /* hang up line */
513: return (0);
514: }
515: dca->dca_cfcr |= CFCR_DLAB;
516: dca->dca_data = ospeed & 0xFF;
517: dca->dca_ier = ospeed >> 8;
518: switch (cflag&CSIZE) {
519: case CS5:
520: cfcr = CFCR_5BITS; break;
521: case CS6:
522: cfcr = CFCR_6BITS; break;
523: case CS7:
524: cfcr = CFCR_7BITS; break;
525: case CS8:
526: cfcr = CFCR_8BITS; break;
527: }
528: if (cflag&PARENB) {
529: cfcr |= CFCR_PENAB;
530: if ((cflag&PARODD) == 0)
531: cfcr |= CFCR_PEVEN;
532: }
533: if (cflag&CSTOPB)
534: cfcr |= CFCR_STOPB;
535: dca->dca_cfcr = cfcr;
536: if (dca_hasfifo & (1 << unit))
537: dca->dca_fifo = FIFO_ENABLE | FIFO_TRIGGER_14;
538: return (0);
539: }
540:
541: dcastart(tp)
542: register struct tty *tp;
543: {
544: register struct dcadevice *dca;
545: int s, unit, c;
546:
547: unit = UNIT(tp->t_dev);
548: dca = dca_addr[unit];
549: s = spltty();
550: if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
551: goto out;
552: if (tp->t_outq.c_cc <= tp->t_lowat) {
553: if (tp->t_state&TS_ASLEEP) {
554: tp->t_state &= ~TS_ASLEEP;
555: wakeup((caddr_t)&tp->t_outq);
556: }
1.1.1.2 ! root 557: selwakeup(&tp->t_wsel);
1.1 root 558: }
559: if (tp->t_outq.c_cc == 0)
560: goto out;
561: if (dca->dca_lsr & LSR_TXRDY) {
562: c = getc(&tp->t_outq);
563: tp->t_state |= TS_BUSY;
564: dca->dca_data = c;
565: if (dca_hasfifo & (1 << unit)) {
566: for (c = 1; c < 16 && tp->t_outq.c_cc; ++c)
567: dca->dca_data = getc(&tp->t_outq);
568: #ifdef DEBUG
569: if (c > 16)
570: fifoout[0]++;
571: else
572: fifoout[c]++;
573: #endif
574: }
575: }
576: out:
577: splx(s);
578: }
579:
580: /*
581: * Stop output on a line.
582: */
583: /*ARGSUSED*/
584: dcastop(tp, flag)
585: register struct tty *tp;
586: {
587: register int s;
588:
589: s = spltty();
590: if (tp->t_state & TS_BUSY) {
591: if ((tp->t_state&TS_TTSTOP)==0)
592: tp->t_state |= TS_FLUSH;
593: }
594: splx(s);
595: }
596:
597: dcamctl(dev, bits, how)
598: dev_t dev;
599: int bits, how;
600: {
601: register struct dcadevice *dca;
602: register int unit;
603: int s;
604:
605: unit = UNIT(dev);
606: dca = dca_addr[unit];
607: s = spltty();
608: switch (how) {
609:
610: case DMSET:
611: dca->dca_mcr = bits;
612: break;
613:
614: case DMBIS:
615: dca->dca_mcr |= bits;
616: break;
617:
618: case DMBIC:
619: dca->dca_mcr &= ~bits;
620: break;
621:
622: case DMGET:
623: bits = dca->dca_msr;
624: break;
625: }
626: (void) splx(s);
627: return (bits);
628: }
629:
630: /*
631: * Following are all routines needed for DCA to act as console
632: */
633: #include "../hp300/cons.h"
634:
635: dcacnprobe(cp)
636: struct consdev *cp;
637: {
638: int unit;
639:
640: /* locate the major number */
641: for (dcamajor = 0; dcamajor < nchrdev; dcamajor++)
642: if (cdevsw[dcamajor].d_open == dcaopen)
643: break;
644:
645: /* XXX: ick */
646: unit = CONUNIT;
647: dca_addr[CONUNIT] = (struct dcadevice *) sctova(CONSCODE);
648:
649: /* make sure hardware exists */
650: if (badaddr((short *)dca_addr[unit])) {
651: cp->cn_pri = CN_DEAD;
652: return;
653: }
654:
655: /* initialize required fields */
656: cp->cn_dev = makedev(dcamajor, unit);
657: switch (dca_addr[unit]->dca_irid) {
658: case DCAID0:
659: case DCAID1:
660: cp->cn_pri = CN_NORMAL;
661: break;
662: case DCAREMID0:
663: case DCAREMID1:
664: cp->cn_pri = CN_REMOTE;
665: break;
666: default:
667: cp->cn_pri = CN_DEAD;
668: break;
669: }
670: /*
671: * If dcaconsole is initialized, raise our priority.
672: */
673: if (dcaconsole == unit)
674: cp->cn_pri = CN_REMOTE;
675: #ifdef KGDB
676: if (major(kgdb_dev) == 1) /* XXX */
677: kgdb_dev = makedev(dcamajor, minor(kgdb_dev));
678: #endif
679: }
680:
681: dcacninit(cp)
682: struct consdev *cp;
683: {
684: int unit = UNIT(cp->cn_dev);
685:
686: dcainit(unit, dcadefaultrate);
687: dcaconsole = unit;
688: dcaconsinit = 1;
689: }
690:
691: dcainit(unit, rate)
692: int unit, rate;
693: {
694: register struct dcadevice *dca;
695: int s;
696: short stat;
697:
698: #ifdef lint
699: stat = unit; if (stat) return;
700: #endif
701: dca = dca_addr[unit];
702: s = splhigh();
703: dca->dca_irid = 0xFF;
704: DELAY(100);
705: dca->dca_ic = IC_IE;
706: dca->dca_cfcr = CFCR_DLAB;
707: rate = ttspeedtab(rate, dcaspeedtab);
708: dca->dca_data = rate & 0xFF;
709: dca->dca_ier = rate >> 8;
710: dca->dca_cfcr = CFCR_8BITS;
711: dca->dca_ier = IER_ERXRDY | IER_ETXRDY;
712: dca->dca_fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14;
713: stat = dca->dca_iir;
714: splx(s);
715: }
716:
717: dcacngetc(dev)
718: {
719: register struct dcadevice *dca = dca_addr[UNIT(dev)];
720: short stat;
721: int c, s;
722:
723: #ifdef lint
724: stat = dev; if (stat) return (0);
725: #endif
726: s = splhigh();
727: while (((stat = dca->dca_lsr) & LSR_RXRDY) == 0)
728: ;
729: c = dca->dca_data;
730: stat = dca->dca_iir;
731: splx(s);
732: return (c);
733: }
734:
735: /*
736: * Console kernel output character routine.
737: */
738: dcacnputc(dev, c)
739: dev_t dev;
740: register int c;
741: {
742: register struct dcadevice *dca = dca_addr[UNIT(dev)];
743: register int timo;
744: short stat;
745: int s = splhigh();
746:
747: #ifdef lint
748: stat = dev; if (stat) return;
749: #endif
750: if (dcaconsinit == 0) {
751: (void) dcainit(UNIT(dev), dcadefaultrate);
752: dcaconsinit = 1;
753: }
754: /* wait for any pending transmission to finish */
755: timo = 50000;
756: while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo)
757: ;
758: dca->dca_data = c;
759: /* wait for this transmission to complete */
760: timo = 1500000;
761: while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo)
762: ;
763: /* clear any interrupts generated by this transmission */
764: stat = dca->dca_iir;
765: splx(s);
766: }
767: #endif
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