Annotation of Net2/arch/hp300/dev/grf_rbreg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1988 University of Utah.
                      3:  * Copyright (c) 1990 The Regents of the University of California.
                      4:  * All rights reserved.
                      5:  *
                      6:  * This code is derived from software contributed to Berkeley by
                      7:  * the Systems Programming Group of the University of Utah Computer
                      8:  * Science Department.
                      9:  *
                     10:  * Redistribution and use in source and binary forms, with or without
                     11:  * modification, are permitted provided that the following conditions
                     12:  * are met:
                     13:  * 1. Redistributions of source code must retain the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer.
                     15:  * 2. Redistributions in binary form must reproduce the above copyright
                     16:  *    notice, this list of conditions and the following disclaimer in the
                     17:  *    documentation and/or other materials provided with the distribution.
                     18:  * 3. All advertising materials mentioning features or use of this software
                     19:  *    must display the following acknowledgement:
                     20:  *     This product includes software developed by the University of
                     21:  *     California, Berkeley and its contributors.
                     22:  * 4. Neither the name of the University nor the names of its contributors
                     23:  *    may be used to endorse or promote products derived from this software
                     24:  *    without specific prior written permission.
                     25:  *
                     26:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
                     27:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     28:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     29:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
                     30:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     31:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     32:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     33:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     34:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     35:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     36:  * SUCH DAMAGE.
                     37:  *
                     38:  * from: Utah $Hdr: grf_rbreg.h 1.1 90/07/09$
                     39:  *
                     40:  *     @(#)grf_rbreg.h 7.2 (Berkeley) 11/4/90
                     41:  */
                     42: 
                     43: /*
                     44:  * Map of the Renaissance frame buffer controller chip in memory ...
                     45:  */
                     46: 
                     47: #define rb_waitbusy(regaddr) \
                     48:        while (((struct rboxfb *)(regaddr))->wbusy & 0x01) DELAY(100)
                     49: 
                     50: #define        CM1RED  ((struct rencm  *)(ip->regbase + 0x6400))
                     51: #define        CM1GRN  ((struct rencm  *)(ip->regbase + 0x6800))
                     52: #define        CM1BLU  ((struct rencm  *)(ip->regbase + 0x6C00))
                     53: #define        CM2RED  ((struct rencm  *)(ip->regbase + 0x7400))
                     54: #define        CM2GRN  ((struct rencm  *)(ip->regbase + 0x7800))
                     55: #define        CM2BLU  ((struct rencm  *)(ip->regbase + 0x7C00))
                     56: 
                     57: #define        vu_char         volatile u_char
                     58: #define        vu_short        volatile u_short
                     59: #define        vu_int          volatile u_int
                     60: 
                     61: struct rencm {
                     62:        u_char  :8, :8, :8;
                     63:        vu_char value;
                     64: };
                     65: 
                     66: struct rboxfb {
                     67:     u_char     filler1[1];
                     68:     vu_char    reset;                  /* reset register               0x01 */
                     69:     vu_char    fb_address;             /* frame buffer address         0x02 */
                     70:     vu_char    interrupt;              /* interrupt register           0x03 */
                     71:     u_char     filler1a;
                     72:     vu_char    fbwmsb;                 /* frame buffer width MSB       0x05 */
                     73:     u_char     filler1b;
                     74:     vu_char    fbwlsb;                 /* frame buffer width MSB       0x07 */
                     75:     u_char     filler1c;
                     76:     vu_char    fbhmsb;                 /* frame buffer height MSB      0x09 */
                     77:     u_char     filler1d;
                     78:     vu_char    fbhlsb;                 /* frame buffer height MSB      0x0b */
                     79:     u_char     filler1e;
                     80:     vu_char    dwmsb;                  /* display width MSB            0x0d */
                     81:     u_char     filler1f;
                     82:     vu_char    dwlsb;                  /* display width MSB            0x0f */
                     83:     u_char     filler1g;
                     84:     vu_char    dhmsb;                  /* display height MSB           0x11 */
                     85:     u_char     filler1h;
                     86:     vu_char    dhlsb;                  /* display height MSB           0x13 */
                     87:     u_char     filler1i;
                     88:     vu_char    fbid;                   /* frame buffer id              0x15 */
                     89:     u_char     filler1j[0x47];
                     90:     vu_char    fbomsb;                 /* frame buffer offset MSB      0x5d */
                     91:     u_char     filler1k;
                     92:     vu_char    fbolsb;                 /* frame buffer offset LSB      0x5f */
                     93:     u_char     filler2[16359];
                     94:     vu_char    wbusy;                  /* window mover is active     0x4047 */
                     95:     u_char      filler3[0x405b - 0x4048];
                     96:     vu_char    scanbusy;               /* scan converteris active    0x405B */
                     97:     u_char      filler3b[0x4083 - 0x405c];
                     98:     vu_char    video_enable;           /* drive vid. refresh bus     0x4083 */
                     99:     u_char     filler4[3];
                    100:     vu_char    display_enable;         /* enable the display         0x4087 */
                    101:     u_char     filler5[8];
                    102:     vu_int     write_enable;           /* write enable register      0x4090 */
                    103:     u_char     filler6[11];
                    104:     vu_char    wmove;                  /* start window mover         0x409f */
                    105:     u_char     filler7[3];
                    106:     vu_char    blink;                  /* blink register             0x40a3 */
                    107:     u_char     filler8[15];
                    108:     vu_char    fold;                   /* fold  register             0x40b3 */
                    109:     vu_int     opwen;                  /* overlay plane write enable 0x40b4 */
                    110:     u_char     filler9[3];
                    111:     vu_char    tmode;                  /* Tile mode size             0x40bb */
                    112:     u_char     filler9a[3];            
                    113:     vu_char    drive;                  /* drive register             0x40bf */
                    114:     u_char     filler10[3];
                    115:     vu_char    vdrive;                 /* vdrive register            0x40c3 */
                    116:     u_char     filler10a[0x40cb-0x40c4];
                    117:     vu_char    zconfig;                /* Z-buffer mode              0x40cb */
                    118:     u_char     filler11a[2];
                    119:     vu_short   tpatt;                  /* Transparency pattern       0x40ce */
                    120:     u_char     filler11b[3];
                    121:     vu_char    dmode;                  /* dither mode                0x40d3 */
                    122:     u_char     filler11c[3];
                    123:     vu_char    en_scan;                /* enable scan board to DTACK 0x40d7 */
                    124:     u_char     filler11d[0x40ef-0x40d8];
                    125:     vu_char    rep_rule;               /* replacement rule           0x40ef */
                    126:     u_char     filler12[2];
                    127:     vu_short   source_x;               /* source x                   0x40f2 */
                    128:     u_char     filler13[2];
                    129:     vu_short   source_y;               /* source y                   0x40f6 */
                    130:     u_char     filler14[2];
                    131:     vu_short   dest_x;                 /* dest x                     0x40fa */
                    132:     u_char     filler15[2];
                    133:     vu_short   dest_y;                 /* dest y                     0x40fe */
                    134:     u_char     filler16[2];
                    135:     vu_short   wwidth;                 /* window width               0x4102 */
                    136:     u_char     filler17[2];
                    137:     vu_short   wheight;                /* window height              0x4106 */
                    138:     u_char     filler18[18];
                    139:     vu_short   patt_x;                 /* pattern x                  0x411a */
                    140:     u_char     filler19[2];
                    141:     vu_short   patt_y;                 /* pattern y                  0x411e */
                    142:     u_char     filler20[0x8012 - 0x4120];
                    143:     vu_short   te_status;              /* transform engine status    0x8012 */
                    144:     u_char     filler21[0x1ffff-0x8014];
                    145: };

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