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1.1 root 1: /*
2: * Copyright (c) 1988 University of Utah.
3: * Copyright (c) 1990 The Regents of the University of California.
4: * All rights reserved.
5: *
6: * This code is derived from software contributed to Berkeley by
7: * the Systems Programming Group of the University of Utah Computer
8: * Science Department.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the University of
21: * California, Berkeley and its contributors.
22: * 4. Neither the name of the University nor the names of its contributors
23: * may be used to endorse or promote products derived from this software
24: * without specific prior written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36: * SUCH DAMAGE.
37: *
38: * from: Utah $Hdr: hilreg.h 1.9 91/01/21$
39: *
40: * @(#)hilreg.h 7.3 (Berkeley) 5/7/91
41: */
42:
43: struct hil_dev {
44: char hil_pad0;
45: volatile char hil_data;
46: char hil_pad1;
47: volatile char hil_cmd;
48: #define hil_stat hil_cmd
49: };
50:
51: #define HILADDR ((struct hil_dev *)IIOV(0x428000))
52: #define BBCADDR ((struct hil_dev *)IIOV(0x420000))
53:
54: #define splhil spl1
55:
56: #define HIL_BUSY 0x02
57: #define HIL_DATA_RDY 0x01
58:
59: #define HILWAIT(hil_dev) while ((hil_dev->hil_stat & HIL_BUSY))
60: #define HILDATAWAIT(hil_dev) while ((hil_dev->hil_stat & HIL_DATA_RDY) == 0)
61:
62: /* HIL status bits */
63: #define HIL_POLLDATA 0x10 /* HIL poll data follows */
64: #define HIL_COMMAND 0x08 /* Start of original command */
65: #define HIL_ERROR 0x080 /* HIL error */
66: #define HIL_RECONFIG 0x080 /* HIL has reconfigured */
67: #define HIL_STATMASK (HIL_DATA | HIL_COMMAND)
68:
69: #define HIL_SSHIFT 4 /* Bits to shift status over */
70: #define HIL_SMASK 0xF /* Service request status mask */
71: #define HIL_DEVMASK 0x07
72:
73: /* HIL status types */
74: #define HIL_STATUS 0x5 /* HIL status in data register */
75: #define HIL_DATA 0x6 /* HIL data in data register */
76: #define HIL_CTRLSHIFT 0x8 /* key + CTRL + SHIFT */
77: #define HIL_CTRL 0x9 /* key + CTRL */
78: #define HIL_SHIFT 0xA /* key + SHIFT */
79: #define HIL_KEY 0xB /* key only */
80: #define HIL_68K 0x4 /* Data from the 68k is ready */
81:
82: /* HIL commands */
83: #define HIL_SETARD 0xA0 /* set auto-repeat delay */
84: #define HIL_SETARR 0xA2 /* set auto-repeat rate */
85: #define HIL_SETTONE 0xA3 /* set tone generator */
86: #define HIL_CNMT 0xB2 /* clear nmi */
87: #define HIL_INTON 0x5C /* Turn on interrupts. */
88: #define HIL_INTOFF 0x5D /* Turn off interrupts. */
89: #define HIL_TRIGGER 0xC5 /* trigger command */
90: #define HIL_STARTCMD 0xE0 /* start loop command */
91: #define HIL_TIMEOUT 0xFE /* timeout */
92: #define HIL_READTIME 0x13 /* Read real time register */
93:
94: /* Read/write various registers on the 8042. */
95: #define HIL_READBUSY 0x02 /* internal "busy" register */
96: #define HIL_READKBDLANG 0x12 /* read keyboard language code */
97: #define HIL_READKBDSADR 0xF9
98: #define HIL_WRITEKBDSADR 0xE9
99: #define HIL_READLPSTAT 0xFA
100: #define HIL_WRITELPSTAT 0xEA
101: #define HIL_READLPCTRL 0xFB
102: #define HIL_WRITELPCTRL 0xEB
103:
104: /* BUSY bits */
105: #define BSY_LOOPBUSY 0x04
106:
107: /* LPCTRL bits */
108: #define LPC_AUTOPOLL 0x01 /* enable auto-polling */
109: #define LPC_NOERROR 0x02 /* don't report errors */
110: #define LPC_NORECONF 0x04 /* don't report reconfigure */
111: #define LPC_KBDCOOK 0x10 /* cook all keyboards */
112: #define LPC_RECONF 0x80 /* reconfigure the loop */
113:
114: /* LPSTAT bits */
115: #define LPS_DEVMASK 0x07 /* number of loop devices */
116: #define LPS_CONFGOOD 0x08 /* reconfiguration worked */
117: #define LPS_CONFFAIL 0x80 /* reconfiguration failed */
118:
119: /* HIL packet headers */
120: #define HIL_MOUSEDATA 0x2
121: #define HIL_KBDDATA 0x40
122:
123: #define HIL_MOUSEMOTION 0x02 /* mouse movement event */
124: #define HIL_KBDBUTTON 0x40 /* keyboard button event */
125: #define HIL_MOUSEBUTTON 0x40 /* mouse button event */
126: #define HIL_BUTTONBOX 0x60 /* button box event */
127: #define HIL_TABLET 0x02 /* tablet motion event */
128: #define HIL_KNOBBOX 0x03 /* knob box motion data */
129:
130: /* Magic */
131: #define KBDNMISTAT ((volatile char *)IIOV(0x478005))
132: #define KBDNMI 0x04
133:
134: /* For setting auto repeat on the keyboard */
135: #define ar_format(x) ~((x - 10) / 10)
136: #define KBD_ARD 400 /* initial delay in msec (10 - 2560) */
137: #define KBD_ARR 60 /* rate (10 - 2550 msec, 2551 == off)*/
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