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1.1 root 1: /*
2: * Copyright (c) 1982, 1990 The Regents of the University of California.
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by the University of
16: * California, Berkeley and its contributors.
17: * 4. Neither the name of the University nor the names of its contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
1.1.1.2 ! root 33: * from: @(#)if_lereg.h 7.1 (Berkeley) 5/8/90
! 34: * if_lereg.h,v 1.2 1993/05/22 07:56:25 cgd Exp
1.1 root 35: */
36:
37: #define LEID 21
38:
39: #define LEMTU 1518
40: #define LEMINSIZE 60 /* should be 64 if mode DTCR is set */
41: #define LERBUF 8
42: #define LERBUFLOG2 3
43: #define LE_RLEN (LERBUFLOG2 << 13)
44: #define LETBUF 1
45: #define LETBUFLOG2 0
46: #define LE_TLEN (LETBUFLOG2 << 13)
47:
48: #define vu_char volatile u_char
49:
50: /*
51: * LANCE registers.
52: */
53: struct lereg0 {
54: u_char ler0_pad0;
55: vu_char ler0_id; /* ID */
56: u_char ler0_pad1;
57: vu_char ler0_status; /* interrupt enable/status */
58: };
59:
60: struct lereg1 {
61: u_short ler1_rdp; /* data port */
62: u_short ler1_rap; /* register select port */
63: };
64:
65: /*
66: * Overlayed on 16K dual-port RAM.
67: * Current size is 13,758 bytes with 8 x 1518 receive buffers and
68: * 1 x 1518 transmit buffer.
69: */
70: struct lereg2 {
71: /* init block */
72: u_short ler2_mode; /* +0x0000 */
73: u_char ler2_padr[6]; /* +0x0002 */
74: u_long ler2_ladrf0; /* +0x0008 */
75: u_long ler2_ladrf1; /* +0x000C */
76: u_short ler2_rdra; /* +0x0010 */
77: u_short ler2_rlen; /* +0x0012 */
78: u_short ler2_tdra; /* +0x0014 */
79: u_short ler2_tlen; /* +0x0016 */
80: /* receive message descriptors */
81: struct lermd { /* +0x0018 */
82: u_short rmd0;
83: u_short rmd1;
84: short rmd2;
85: u_short rmd3;
86: } ler2_rmd[LERBUF];
87: /* transmit message descriptors */
88: struct letmd { /* +0x0058 */
89: u_short tmd0;
90: u_short tmd1;
91: short tmd2;
92: u_short tmd3;
93: } ler2_tmd[LETBUF];
94: char ler2_rbuf[LERBUF][LEMTU]; /* +0x0060 */
95: char ler2_tbuf[LETBUF][LEMTU]; /* +0x2FD0 */
96: };
97:
98: /*
99: * Control and status bits -- lereg0
100: */
101: #define LE_IE 0x80 /* interrupt enable */
102: #define LE_IR 0x40 /* interrupt requested */
103: #define LE_LOCK 0x08 /* lock status register */
104: #define LE_ACK 0x04 /* ack of lock */
105: #define LE_JAB 0x02 /* loss of tx clock (???) */
106: #define LE_IPL(x) ((((x) >> 4) & 0x3) + 3)
107:
108: /*
109: * Control and status bits -- lereg1
110: */
111: #define LE_CSR0 0
112: #define LE_CSR1 1
113: #define LE_CSR2 2
114: #define LE_CSR3 3
115:
116: #define LE_SERR 0x8000
117: #define LE_BABL 0x4000
118: #define LE_CERR 0x2000
119: #define LE_MISS 0x1000
120: #define LE_MERR 0x0800
121: #define LE_RINT 0x0400
122: #define LE_TINT 0x0200
123: #define LE_IDON 0x0100
124: #define LE_INTR 0x0080
125: #define LE_INEA 0x0040
126: #define LE_RXON 0x0020
127: #define LE_TXON 0x0010
128: #define LE_TDMD 0x0008
129: #define LE_STOP 0x0004
130: #define LE_STRT 0x0002
131: #define LE_INIT 0x0001
132:
133: #define LE_BSWP 0x4
134: #define LE_MODE 0x0
135:
136: /*
137: * Control and status bits -- lereg2
138: */
139: #define LE_OWN 0x8000
140: #define LE_ERR 0x4000
141: #define LE_STP 0x0200
142: #define LE_ENP 0x0100
143:
144: #define LE_FRAM 0x2000
145: #define LE_OFLO 0x1000
146: #define LE_CRC 0x0800
147: #define LE_RBUFF 0x0400
148: #define LE_MORE 0x1000
149: #define LE_ONE 0x0800
150: #define LE_DEF 0x0400
151: #define LE_TBUFF 0x8000
152: #define LE_UFLO 0x4000
153: #define LE_LCOL 0x1000
154: #define LE_LCAR 0x0800
155: #define LE_RTRY 0x0400
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