--- Net2/arch/i386/isa/if_wereg.h	2018/04/24 18:04:01	1.1.1.1
+++ Net2/arch/i386/isa/if_wereg.h	2018/04/24 18:12:07	1.1.1.3
@@ -56,6 +56,23 @@ union we_mem_sel {
 };
 
 /*
+ * LA Address Register (LAAR)
+ */
+union we_laar {
+    struct lan_addr_reg {
+        u_char addr_l19_b:1,	/* Address Line 19 for enabling    */
+				/* 16 bit NIC access to shared RAM */
+	unused_b:5,		/* unused (or unknown) bits 	   */
+	lan_16_en_b:1,		/* Enables 16bit shrd RAM for LAN  */
+	mem_16_en_b:1;		/* Enables 16bit shrd RAM for host */
+    } laar_decode;
+#define addr_l19	laar_decode.addr_l19_b
+#define lan_16_en	laar_decode.lan_16_en_b
+#define mem_16_en	laar_decode.mem_16_en_b
+    u_char laar_byte;		/* entire byte			*/
+};
+
+/*
  * receive ring discriptor
  *
  * The National Semiconductor DS8390 Network interface controller uses
@@ -153,9 +170,14 @@ union wet_status {
 /*
  * General constant definitions
  */
-#define	WD_STARLAN	0x02		/* WD8003S Identification	*/
-#define	WD_ETHER	0x03		/* WD8003E Identification	*/
-#define	WD_ETHER2	0x05		/* WD8003EBT Identification	*/
+
+/* Bits in the REGE register */
+#define	WD_MICROCHANEL	0x80	/* Microchannel bus (vs. isa) */
+#define	WD_LARGERAM	0x40    /* Large RAM */
+#define	WD_SOFTCONFIG   0x20	/* Soft config */
+#define	WD_REVMASK	0x1e	/* Revision mask */
+#define WD_ETHERNET	0x01	/* Ethernet (vs. Starlan) */
+
 #define WD_CHECKSUM	0xFF		/* Checksum byte		*/
 #define WD_PAGE_SIZE	256		/* Size of RAM pages in bytes	*/
 #define WD_TXBUF_SIZE	6		/* Size of TX buffer in pages	*/
@@ -230,6 +252,7 @@ union wet_status {
 #define WD_D_FT1	0x40		/* Fifo Threshold Select	*/
 #define WD_D_RES	0x80		/* reserved...			*/
 #define	WD_D_CONFIG	(WD_D_FT1|WD_D_BMS)
+#define	WD_D_CONFIG16	(WD_D_FT1|WD_D_BMS|WD_D_LAS|WD_D_WTS)
 
 /*
  * Configuration constants (interrupt mask register)