--- Net2/arch/i386/isa/isa.h	2018/04/24 18:04:01	1.1
+++ Net2/arch/i386/isa/isa.h	2018/04/24 18:20:05	1.1.1.4
@@ -33,7 +33,8 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	@(#)isa.h	5.7 (Berkeley) 5/9/91
+ *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
+ *	isa.h,v 1.9 1993/06/30 04:06:41 andrew Exp
  */
 
 /*
@@ -41,8 +42,14 @@
  */
 
 #ifndef LOCORE
-unsigned char inb(), rtcin();
-void outb();
+#include <sys/cdefs.h>
+
+unsigned char rtcin __P((int));
+extern unsigned int atdevbase;	/* offset in virtual memory of ISA io mem */
+void sysbeep __P((int, int));
+unsigned kbd_8042cmd __P((int));
+struct isa_device;
+int isa_irq_pending __P((struct isa_device *dvp));
 #endif
 
 
@@ -57,7 +64,7 @@ void outb();
 #define IO_DMA1		0x000		/* 8237A DMA Controller #1 */
 #define IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
 #define IO_TIMER1	0x040		/* 8252 Timer #1 */
-#define IO_TIMER2	0x048		/* 8252 Timer #2 */
+#define IO_TIMER2	0x048		/* 8252 Timer #2 (EISA only) */
 #define IO_KBD		0x060		/* 8042 Keyboard */
 #define IO_RTC		0x070		/* RTC */
 #define IO_NMI		IO_RTC		/* NMI Control */
@@ -76,15 +83,36 @@ void outb();
 #define IO_WD1		0x1f0		/* Primary Fixed Disk Controller */
 #define IO_GAME		0x200		/* Game Controller */
 
-					/* 0x208 - 0x277 Open */
+					/* 0x208 - 0x237 Open */
+
+#define IO_BMS2		0x238		/* secondary InPort Bus Mouse */
+#define IO_BMS1		0x23c		/* primary InPort Bus Mouse */
+
+					/* 0x240 - 0x277 Open */
 
 #define IO_LPT2		0x278		/* Parallel Port #2 */
 
-					/* 0x280 - 0x2F7 Open */
+					/* 0x280 - 0x2E7 Open */
+
+#define	IO_COM4		0x2e8		/* COM4 i/o address */
+
+					/* 0x2F0 - 0x2F7 Open */
 
 #define IO_COM2		0x2f8		/* COM2 i/o address */
 
-					/* 0x300 - 0x36F Open */
+					/* 0x300 - 0x32F Open */
+
+#define	IO_BT0		0x330		/* bustek 742a default addr. */
+#define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
+#define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
+#define	IO_BT1          0x334		/* bustek 742a default addr. */
+#define IO_AHA1         0x334		/* adaptec 1542 default addr. */
+
+					/* 0x338 - 0x34F Open */
+
+#define IO_WDS		0x350		/* WD7000 scsi */
+
+					/* 0x354 - 0x36F Open */
 
 #define IO_FD2		0x370		/* secondary base i/o address */
 #define IO_LPT1		0x378		/* Parallel Port #1 */
@@ -96,8 +124,9 @@ void outb();
 #define IO_VGA		0x3C0		/* E/VGA Ports */
 #define IO_CGA		0x3D0		/* CGA Ports */
 
-					/* 0x3E0 - 0x3EF Open */
+					/* 0x3E0 - 0x3E7 Open */
 
+#define	IO_COM3		0x3e8		/* COM3 i/o address */
 #define IO_FD1		0x3f0		/* primary base i/o address */
 #define IO_COM1		0x3f8		/* COM1 i/o address */
 
@@ -105,6 +134,33 @@ void outb();
 #endif	IO_ISABEGIN
 
 /*
+ * Input / Output Port Sizes - these are from several sources, and tend
+ * to be the larger of what was found, ie COM ports can be 4, but some
+ * boards do not fully decode the address, thus 8 ports are used.
+ */
+
+#ifndef	IO_ISASIZES
+#define	IO_ISASIZES
+
+#define	IO_COMSIZE	8	/* 8250, 16X50 com controllers (
+#define	IO_CGASIZE	16	/* CGA controllers */
+#define	IO_DMASIZE	16	/* 8237 DMA controllers */
+#define	IO_DPGSIZE	32	/* 74LS612 DMA page reisters */
+#define	IO_FDCSIZE	8	/* Nec765 floppy controllers */
+#define	IO_WDCSIZE	8	/* WD compatible disk controller
+#define	IO_GAMSIZE	16	/* AT compatible game controller
+#define	IO_ICUSIZE	16	/* 8259A interrupt controllers *
+#define	IO_KBDSIZE	16	/* 8042 Keyboard controllers */
+#define	IO_LPTSIZE	8	/* LPT controllers, some use onl
+#define	IO_MDASIZE	16	/* Monochrome display controller
+#define	IO_RTCSIZE	16	/* CMOS real time clock, NMI con
+#define	IO_TMRSIZE	16	/* 8253 programmable timers */
+#define	IO_NPXSIZE	16	/* 80387/80487 NPX registers */
+#define	IO_VGASIZE	16	/* VGA controllers */
+
+#endif	/* IO_ISASIZES */
+
+/*
  * Input / Output Memory Physical Addresses
  */
 
@@ -133,3 +189,10 @@ void outb();
 #define	WEITEK_FPU	0xC0000000	/* WTL 2167 */
 #define	CYRIX_EMC	0xC0000000	/* Cyrix EMC */
 #endif	COMPAQ_RAMRELOC
+
+/* stuff that used to be in pccons.c */
+#define MONO_BASE	0x3B4
+#define MONO_BUF	0xfe0B0000
+#define CGA_BASE	0x3D4
+#define CGA_BUF		0xfe0B8000
+#define IOPHYSMEM	0xA0000