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1.1 ! root 1: /*- ! 2: * Copyright (c) 1990 The Regents of the University of California. ! 3: * All rights reserved. ! 4: * ! 5: * This code is derived from software contributed to Berkeley by ! 6: * William Jolitz. ! 7: * ! 8: * Redistribution and use in source and binary forms, with or without ! 9: * modification, are permitted provided that the following conditions ! 10: * are met: ! 11: * 1. Redistributions of source code must retain the above copyright ! 12: * notice, this list of conditions and the following disclaimer. ! 13: * 2. Redistributions in binary form must reproduce the above copyright ! 14: * notice, this list of conditions and the following disclaimer in the ! 15: * documentation and/or other materials provided with the distribution. ! 16: * 3. All advertising materials mentioning features or use of this software ! 17: * must display the following acknowledgement: ! 18: * This product includes software developed by the University of ! 19: * California, Berkeley and its contributors. ! 20: * 4. Neither the name of the University nor the names of its contributors ! 21: * may be used to endorse or promote products derived from this software ! 22: * without specific prior written permission. ! 23: * ! 24: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ! 25: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ! 26: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ! 27: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ! 28: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ! 29: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ! 30: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ! 31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ! 32: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ! 33: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ! 34: * SUCH DAMAGE. ! 35: * ! 36: * @(#)isa.h 5.7 (Berkeley) 5/9/91 ! 37: */ ! 38: ! 39: /* ! 40: * ISA Bus conventions ! 41: */ ! 42: ! 43: #ifndef LOCORE ! 44: unsigned char inb(), rtcin(); ! 45: void outb(); ! 46: #endif ! 47: ! 48: ! 49: /* ! 50: * Input / Output Port Assignments ! 51: */ ! 52: ! 53: #ifndef IO_BEGIN ! 54: #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ ! 55: ! 56: /* CPU Board */ ! 57: #define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ ! 58: #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ ! 59: #define IO_TIMER1 0x040 /* 8252 Timer #1 */ ! 60: #define IO_TIMER2 0x048 /* 8252 Timer #2 */ ! 61: #define IO_KBD 0x060 /* 8042 Keyboard */ ! 62: #define IO_RTC 0x070 /* RTC */ ! 63: #define IO_NMI IO_RTC /* NMI Control */ ! 64: #define IO_DMAPG 0x080 /* DMA Page Registers */ ! 65: #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ ! 66: #define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ ! 67: #define IO_NPX 0x0F0 /* Numeric Coprocessor */ ! 68: ! 69: /* Cards */ ! 70: /* 0x100 - 0x16F Open */ ! 71: ! 72: #define IO_WD2 0x170 /* Secondary Fixed Disk Controller */ ! 73: ! 74: /* 0x178 - 0x1EF Open */ ! 75: ! 76: #define IO_WD1 0x1f0 /* Primary Fixed Disk Controller */ ! 77: #define IO_GAME 0x200 /* Game Controller */ ! 78: ! 79: /* 0x208 - 0x277 Open */ ! 80: ! 81: #define IO_LPT2 0x278 /* Parallel Port #2 */ ! 82: ! 83: /* 0x280 - 0x2F7 Open */ ! 84: ! 85: #define IO_COM2 0x2f8 /* COM2 i/o address */ ! 86: ! 87: /* 0x300 - 0x36F Open */ ! 88: ! 89: #define IO_FD2 0x370 /* secondary base i/o address */ ! 90: #define IO_LPT1 0x378 /* Parallel Port #1 */ ! 91: ! 92: /* 0x380 - 0x3AF Open */ ! 93: ! 94: #define IO_MDA 0x3B0 /* Monochome Adapter */ ! 95: #define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ ! 96: #define IO_VGA 0x3C0 /* E/VGA Ports */ ! 97: #define IO_CGA 0x3D0 /* CGA Ports */ ! 98: ! 99: /* 0x3E0 - 0x3EF Open */ ! 100: ! 101: #define IO_FD1 0x3f0 /* primary base i/o address */ ! 102: #define IO_COM1 0x3f8 /* COM1 i/o address */ ! 103: ! 104: #define IO_ISAEND 0x3FF /* - 0x3FF End of I/O Registers */ ! 105: #endif IO_ISABEGIN ! 106: ! 107: /* ! 108: * Input / Output Memory Physical Addresses ! 109: */ ! 110: ! 111: #ifndef IOM_BEGIN ! 112: #define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */ ! 113: #define IOM_END 0x100000 /* End of I/O Memory "hole" */ ! 114: #define IOM_SIZE (IOM_END - IOM_BEGIN) ! 115: #endif IOM_BEGIN ! 116: ! 117: /* ! 118: * RAM Physical Address Space (ignoring the above mentioned "hole") ! 119: */ ! 120: ! 121: #ifndef RAM_BEGIN ! 122: #define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ ! 123: #define RAM_END 0x1000000 /* End of RAM Memory */ ! 124: #define RAM_SIZE (RAM_END - RAM_BEGIN) ! 125: #endif RAM_BEGIN ! 126: ! 127: /* ! 128: * Oddball Physical Memory Addresses ! 129: */ ! 130: #ifndef COMPAQ_RAMRELOC ! 131: #define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */ ! 132: #define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */ ! 133: #define WEITEK_FPU 0xC0000000 /* WTL 2167 */ ! 134: #define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ ! 135: #endif COMPAQ_RAMRELOC
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