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1.1 root 1: /*-
2: * Copyright (c) 1990 The Regents of the University of California.
3: * All rights reserved.
4: *
5: * This code is derived from software contributed to Berkeley by
6: * William Jolitz.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. All advertising materials mentioning features or use of this software
17: * must display the following acknowledgement:
18: * This product includes software developed by the University of
19: * California, Berkeley and its contributors.
20: * 4. Neither the name of the University nor the names of its contributors
21: * may be used to endorse or promote products derived from this software
22: * without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34: * SUCH DAMAGE.
35: *
1.1.1.4 ! root 36: * from: @(#)isa.h 5.7 (Berkeley) 5/9/91
! 37: * isa.h,v 1.9 1993/06/30 04:06:41 andrew Exp
1.1 root 38: */
39:
40: /*
41: * ISA Bus conventions
42: */
43:
44: #ifndef LOCORE
1.1.1.4 ! root 45: #include <sys/cdefs.h>
! 46:
! 47: unsigned char rtcin __P((int));
1.1.1.2 root 48: extern unsigned int atdevbase; /* offset in virtual memory of ISA io mem */
1.1.1.4 ! root 49: void sysbeep __P((int, int));
! 50: unsigned kbd_8042cmd __P((int));
! 51: struct isa_device;
! 52: int isa_irq_pending __P((struct isa_device *dvp));
1.1 root 53: #endif
54:
55:
56: /*
57: * Input / Output Port Assignments
58: */
59:
60: #ifndef IO_BEGIN
61: #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */
62:
63: /* CPU Board */
64: #define IO_DMA1 0x000 /* 8237A DMA Controller #1 */
65: #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */
66: #define IO_TIMER1 0x040 /* 8252 Timer #1 */
1.1.1.4 ! root 67: #define IO_TIMER2 0x048 /* 8252 Timer #2 (EISA only) */
1.1 root 68: #define IO_KBD 0x060 /* 8042 Keyboard */
69: #define IO_RTC 0x070 /* RTC */
70: #define IO_NMI IO_RTC /* NMI Control */
71: #define IO_DMAPG 0x080 /* DMA Page Registers */
72: #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */
73: #define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */
74: #define IO_NPX 0x0F0 /* Numeric Coprocessor */
75:
76: /* Cards */
77: /* 0x100 - 0x16F Open */
78:
79: #define IO_WD2 0x170 /* Secondary Fixed Disk Controller */
80:
81: /* 0x178 - 0x1EF Open */
82:
83: #define IO_WD1 0x1f0 /* Primary Fixed Disk Controller */
84: #define IO_GAME 0x200 /* Game Controller */
85:
1.1.1.4 ! root 86: /* 0x208 - 0x237 Open */
! 87:
! 88: #define IO_BMS2 0x238 /* secondary InPort Bus Mouse */
! 89: #define IO_BMS1 0x23c /* primary InPort Bus Mouse */
! 90:
! 91: /* 0x240 - 0x277 Open */
1.1 root 92:
93: #define IO_LPT2 0x278 /* Parallel Port #2 */
94:
1.1.1.4 ! root 95: /* 0x280 - 0x2E7 Open */
! 96:
! 97: #define IO_COM4 0x2e8 /* COM4 i/o address */
! 98:
! 99: /* 0x2F0 - 0x2F7 Open */
1.1 root 100:
101: #define IO_COM2 0x2f8 /* COM2 i/o address */
102:
1.1.1.3 root 103: /* 0x300 - 0x32F Open */
104:
105: #define IO_BT0 0x330 /* bustek 742a default addr. */
106: #define IO_AHA0 0x330 /* adaptec 1542 default addr. */
107: #define IO_UHA0 0x330 /* ultrastore 14f default addr. */
108: #define IO_BT1 0x334 /* bustek 742a default addr. */
109: #define IO_AHA1 0x334 /* adaptec 1542 default addr. */
110:
111: /* 0x338 - 0x34F Open */
112:
113: #define IO_WDS 0x350 /* WD7000 scsi */
114:
115: /* 0x354 - 0x36F Open */
1.1 root 116:
117: #define IO_FD2 0x370 /* secondary base i/o address */
118: #define IO_LPT1 0x378 /* Parallel Port #1 */
119:
120: /* 0x380 - 0x3AF Open */
121:
122: #define IO_MDA 0x3B0 /* Monochome Adapter */
123: #define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */
124: #define IO_VGA 0x3C0 /* E/VGA Ports */
125: #define IO_CGA 0x3D0 /* CGA Ports */
126:
1.1.1.4 ! root 127: /* 0x3E0 - 0x3E7 Open */
1.1 root 128:
1.1.1.4 ! root 129: #define IO_COM3 0x3e8 /* COM3 i/o address */
1.1 root 130: #define IO_FD1 0x3f0 /* primary base i/o address */
131: #define IO_COM1 0x3f8 /* COM1 i/o address */
132:
133: #define IO_ISAEND 0x3FF /* - 0x3FF End of I/O Registers */
134: #endif IO_ISABEGIN
135:
136: /*
1.1.1.4 ! root 137: * Input / Output Port Sizes - these are from several sources, and tend
! 138: * to be the larger of what was found, ie COM ports can be 4, but some
! 139: * boards do not fully decode the address, thus 8 ports are used.
! 140: */
! 141:
! 142: #ifndef IO_ISASIZES
! 143: #define IO_ISASIZES
! 144:
! 145: #define IO_COMSIZE 8 /* 8250, 16X50 com controllers (
! 146: #define IO_CGASIZE 16 /* CGA controllers */
! 147: #define IO_DMASIZE 16 /* 8237 DMA controllers */
! 148: #define IO_DPGSIZE 32 /* 74LS612 DMA page reisters */
! 149: #define IO_FDCSIZE 8 /* Nec765 floppy controllers */
! 150: #define IO_WDCSIZE 8 /* WD compatible disk controller
! 151: #define IO_GAMSIZE 16 /* AT compatible game controller
! 152: #define IO_ICUSIZE 16 /* 8259A interrupt controllers *
! 153: #define IO_KBDSIZE 16 /* 8042 Keyboard controllers */
! 154: #define IO_LPTSIZE 8 /* LPT controllers, some use onl
! 155: #define IO_MDASIZE 16 /* Monochrome display controller
! 156: #define IO_RTCSIZE 16 /* CMOS real time clock, NMI con
! 157: #define IO_TMRSIZE 16 /* 8253 programmable timers */
! 158: #define IO_NPXSIZE 16 /* 80387/80487 NPX registers */
! 159: #define IO_VGASIZE 16 /* VGA controllers */
! 160:
! 161: #endif /* IO_ISASIZES */
! 162:
! 163: /*
1.1 root 164: * Input / Output Memory Physical Addresses
165: */
166:
167: #ifndef IOM_BEGIN
168: #define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */
169: #define IOM_END 0x100000 /* End of I/O Memory "hole" */
170: #define IOM_SIZE (IOM_END - IOM_BEGIN)
171: #endif IOM_BEGIN
172:
173: /*
174: * RAM Physical Address Space (ignoring the above mentioned "hole")
175: */
176:
177: #ifndef RAM_BEGIN
178: #define RAM_BEGIN 0x0000000 /* Start of RAM Memory */
179: #define RAM_END 0x1000000 /* End of RAM Memory */
180: #define RAM_SIZE (RAM_END - RAM_BEGIN)
181: #endif RAM_BEGIN
182:
183: /*
184: * Oddball Physical Memory Addresses
185: */
186: #ifndef COMPAQ_RAMRELOC
187: #define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */
188: #define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */
189: #define WEITEK_FPU 0xC0000000 /* WTL 2167 */
190: #define CYRIX_EMC 0xC0000000 /* Cyrix EMC */
191: #endif COMPAQ_RAMRELOC
1.1.1.4 ! root 192:
! 193: /* stuff that used to be in pccons.c */
! 194: #define MONO_BASE 0x3B4
! 195: #define MONO_BUF 0xfe0B0000
! 196: #define CGA_BASE 0x3D4
! 197: #define CGA_BUF 0xfe0B8000
! 198: #define IOPHYSMEM 0xA0000
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