--- Net2/arch/i386/isa/timerreg.h	2018/04/24 18:11:52	1.1
+++ Net2/arch/i386/isa/timerreg.h	2018/04/24 18:19:51	1.1.1.2
@@ -30,8 +30,10 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $Header: /var/lib/cvsd/net2/Net2/arch/i386/isa/timerreg.h,v 1.1 2018/04/24 18:11:52 root Exp $
- *
+ *	timerreg.h,v 1.3 1993/06/15 21:37:19 mycroft Exp
+ */
+
+/*
  * Register definitions for the Intel 8253 Programmable Interval Timer.
  *
  * This chip has three independent 16-bit down counters that can be
@@ -66,6 +68,15 @@
  */
 
 /*
+ * Frequency of all three count-down timers; (TIMER_FREQ/freq) is the
+ * appropriate count to generate a frequency of freq hz.
+ */
+#ifndef TIMER_FREQ
+#define	TIMER_FREQ	1193182
+#endif
+#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x))
+
+/*
  * Macros for specifying values to be written into a mode register.
  */
 #define	TIMER_CNTR0	(IO_TIMER1 + 0)	/* timer 0 counter port */