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1.1 root 1: /* netboot
2: *
3: * lance.h,v
4: * Revision 1.1 1993/07/08 16:04:01 brezak
5: * Diskless boot prom code from Jim McKim ([email protected])
6: *
7: * Revision 1.1.1.1 1993/05/28 11:41:08 mckim
8: * Initial version.
9: *
10: *
11: * source in this file came from
12: * the Mach ethernet boot written by Leendert van Doorn.
13: */
14:
15: /* RAP functions as a select for RDP */
16: #define RDP_CSR0 0
17: #define RDP_CSR1 1
18: #define RDP_CSR2 2
19: #define RDP_CSR3 3
20:
21: /* contents of csr0 */
22: #define CSR_ERR 0x8000
23: #define CSR_BABL 0x4000
24: #define CSR_CERR 0x2000
25: #define CSR_MISS 0x1000
26: #define CSR_MERR 0x0800
27: #define CSR_RINT 0x0400
28: #define CSR_TINT 0x0200
29: #define CSR_IDON 0x0100
30: #define CSR_INTR 0x0080
31: #define CSR_INEA 0x0040
32: #define CSR_RXON 0x0020
33: #define CSR_TXON 0x0010
34: #define CSR_TDMD 0x0008
35: #define CSR_STOP 0x0004
36: #define CSR_STRT 0x0002
37: #define CSR_INIT 0x0001
38:
39: /* csr1 contains low 16 bits of address of Initialization Block */
40:
41: /* csr2 contains in low byte high 8 bits of address of InitBlock */
42:
43: /* contents of csr3 */
44: #define CSR3_BSWP 0x04 /* byte swap (for big endian) */
45: #define CSR3_ACON 0x02 /* ALE control */
46: #define CSR3_BCON 0x01 /* byte control */
47:
48: /*
49: * The initialization block
50: */
51: typedef struct {
52: u_short ib_mode; /* modebits, see below */
53: char ib_padr[6]; /* physical 48bit Ether-address */
54: u_short ib_ladrf[4]; /* 64bit hashtable for "logical" addresses */
55: u_short ib_rdralow; /* low 16 bits of Receiver Descr. Ring addr */
56: u_char ib_rdrahigh; /* high 8 bits of Receiver Descr. Ring addr */
57: u_char ib_rlen; /* upper 3 bits are 2log Rec. Ring Length */
58: u_short ib_tdralow; /* low 16 bits of Transm. Descr. Ring addr */
59: u_char ib_tdrahigh; /* high 8 bits of Transm. Descr. Ring addr */
60: u_char ib_tlen; /* upper 3 bits are 2log Transm. Ring Length */
61: } initblock_t;
62:
63: /* bits in mode */
64: #define IB_PROM 0x8000
65: #define IB_INTL 0x0040
66: #define IB_DRTY 0x0020
67: #define IB_COLL 0x0010
68: #define IB_DTCR 0x0008
69: #define IB_LOOP 0x0004
70: #define IB_DTX 0x0002
71: #define IB_DRX 0x0001
72:
73: /*
74: * A receive message descriptor entry
75: */
76: typedef struct {
77: u_short rmd_ladr; /* low 16 bits of bufaddr */
78: char rmd_hadr; /* high 8 bits of bufaddr */
79: char rmd_flags; /* see below */
80: short rmd_bcnt; /* two's complement of buffer byte count */
81: u_short rmd_mcnt; /* message byte count */
82: } rmde_t;
83:
84: /* bits in flags */
85: #define RMD_OWN 0x80
86: #define RMD_ERR 0x40
87: #define RMD_FRAM 0x20
88: #define RMD_OFLO 0x10
89: #define RMD_CRC 0x08
90: #define RMD_BUFF 0x04
91: #define RMD_STP 0x02
92: #define RMD_ENP 0x01
93:
94: /*
95: * A transmit message descriptor entry
96: */
97: typedef struct {
98: u_short tmd_ladr; /* low 16 bits of bufaddr */
99: u_char tmd_hadr; /* high 8 bits of bufaddr */
100: u_char tmd_flags; /* see below */
101: short tmd_bcnt; /* two's complement of buffer byte count */
102: u_short tmd_err; /* more error bits + TDR */
103: } tmde_t;
104:
105: /* bits in flags */
106: #define TMD_OWN 0x80
107: #define TMD_ERR 0x40
108: #define TMD_MORE 0x10
109: #define TMD_ONE 0x08
110: #define TMD_DEF 0x04
111: #define TMD_STP 0x02
112: #define TMD_ENP 0x01
113:
114: /* bits in tmd_err */
115: #define TMDE_BUFF 0x8000
116: #define TMDE_UFLO 0x4000
117: #define TMDE_LCOL 0x1000
118: #define TMDE_LCAR 0x0800
119: #define TMDE_RTRY 0x0400
120: #define TMDE_TDR 0x003F /* mask for TDR */
121:
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