Return to hdreg.h CVS log

Up to [Net/2] / Net2 / arch / tahoe / vba

Annotation of Net2/arch/tahoe/vba/hdreg.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1988 The Regents of the University of California.
        !             3:  * All rights reserved.
        !             4:  *
        !             5:  * This code is derived from software contributed to Berkeley by
        !             6:  * Harris Corp.
        !             7:  *
        !             8:  * Redistribution and use in source and binary forms, with or without
        !             9:  * modification, are permitted provided that the following conditions
        !            10:  * are met:
        !            11:  * 1. Redistributions of source code must retain the above copyright
        !            12:  *    notice, this list of conditions and the following disclaimer.
        !            13:  * 2. Redistributions in binary form must reproduce the above copyright
        !            14:  *    notice, this list of conditions and the following disclaimer in the
        !            15:  *    documentation and/or other materials provided with the distribution.
        !            16:  * 3. All advertising materials mentioning features or use of this software
        !            17:  *    must display the following acknowledgement:
        !            18:  *     This product includes software developed by the University of
        !            19:  *     California, Berkeley and its contributors.
        !            20:  * 4. Neither the name of the University nor the names of its contributors
        !            21:  *    may be used to endorse or promote products derived from this software
        !            22:  *    without specific prior written permission.
        !            23:  *
        !            24:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
        !            25:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
        !            26:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
        !            27:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
        !            28:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
        !            29:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
        !            30:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            31:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
        !            32:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
        !            33:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
        !            34:  * SUCH DAMAGE.
        !            35:  *
        !            36:  *     @(#)hdreg.h     7.4 (Berkeley) 6/28/90
        !            37:  */
        !            38: 
        !            39: #ifndef COMPAT_42
        !            40: #define        COMPAT_42
        !            41: #endif
        !            42: 
        !            43: #define        HDC_READ        0
        !            44: #define        HDC_WRITE       1
        !            45: 
        !            46: #define        HDC_MAXBUS      2               /* max# buses */
        !            47: #define        HDC_MAXCTLR     21              /* max# hdc controllers per bus */
        !            48: #define        HDC_MAXDRIVE    4               /* max# drives per hdc controller */
        !            49: #define        HDC_MAXMCBS     32              /* max# mcb's the hdc can handle */
        !            50: #define        HDC_MAXCHAIN    64              /* max# of data chains */
        !            51: #define        HDC_MAXBC       64*1024         /* max# byte count per data chain */
        !            52: #define        HDC_MAXFLAWS    8000            /* max# flaws per hdc disk */
        !            53: 
        !            54: #define        HDC_SPB         2               /* sectors per block for hdc's */
        !            55: #define        HDC_VDATA_SIZE  16              /* vendor data size (long words) */
        !            56: 
        !            57: #define        HDC_REG(x)      (hd->reg->x)    /* set an HDC register */
        !            58:                                        /* number of blocks per dump record */
        !            59: #define        HDC_DUMPSIZE    (HDC_MAXBC/DEV_BSIZE*HDC_MAXCHAIN)
        !            60: 
        !            61: /*
        !            62:  * These are the 4 hdc i/o register addresses.  Writing to "master_mcb"
        !            63:  * tells the hdc controller where the master mcb is and initiates hdc
        !            64:  * operation. The hdc then reads the master mcb and all new mcb's in the
        !            65:  * active mcb queue.  Writing to "module_id" causes the hdc to return the
        !            66:  * hdc's module id word in the location specified by the address written
        !            67:  * into the register.  "soft_reset" causes orderly shutdown of HDC; it's
        !            68:  * unclear from the manual what "hard_reset" does, but it should never be
        !            69:  * used as use while the HDC is active may cause format errors.
        !            70:  */
        !            71: struct registers {
        !            72:        u_long  master_mcb,             /* set the master mcb address */
        !            73:                module_id,              /* returns hdc's module id (hdc_mid) */
        !            74:                soft_reset,             /* shut down the hdc */
        !            75:                hard_reset;             /* send a system reset to the hdc */
        !            76: };
        !            77: 
        !            78: /*
        !            79:  * Definition for the module id returned by the hdc when "module_id"
        !            80:  * is written to.  The format is defined by the hdc microcode.
        !            81:  */
        !            82: #define        HID_HDC         0x01            /* hvme_id for HDC */
        !            83: #define        HDC_MID         HID_HDC         /* module id code for hdc's */
        !            84: struct module_id {
        !            85:        u_char  module_id,              /* module id; hdc's return HDC_MID */
        !            86:                reserved,
        !            87:                code_rev,               /* micro-code rev#; FF= not loaded */
        !            88:                fit;                    /* FIT test result; FF= no error */
        !            89: };
        !            90: 
        !            91: /*
        !            92:  * This structure defines the mcb's.  A portion of this structure is used
        !            93:  * only by the software.  The other portion is set up by software and sent
        !            94:  * to the hdc firmware to perform an operation; the order of this part of
        !            95:  * the mcb is determined by the controller firmware.
        !            96:  *
        !            97:  * "context" is the software context word.  The hdc firmware copies the
        !            98:  * contents of this word to the master mcb whenever the mcb has been
        !            99:  * completed.  The virtual address of the mcb is usually saved here.
        !           100:  *
        !           101:  * "forw_phaddr" forms a linked list of mcbs.  The addresses are physical
        !           102:  * since they are used by the hdc firmware.
        !           103:  *
        !           104:  * Bits in device control word #1 define the hdc command and control the
        !           105:  * operation of the hdc.  Bits in device control word #2 define the disk
        !           106:  * sector address for the operation defined in control word #1.
        !           107:  */
        !           108: #define        LWC_DATA_CHAIN  0x80000000      /* mask for data chain bit in wcount */
        !           109: struct mcb {
        !           110:        u_long  forw_phaddr;            /* phys address of next mcb */
        !           111:        u_int   priority  :  8,         /* device control word #1 */
        !           112:                interrupt :  1,         /*        "               */
        !           113:                drive     :  7,         /*        "               */
        !           114:                command   : 16,         /*        "   (see HCMD_) */
        !           115:                cyl       : 13,         /* device control word #2 */
        !           116:                head      :  9,         /*        "               */
        !           117:                sector    : 10;         /*        "               */
        !           118:        u_long  r1, r2,
        !           119:                context;                /* software context word */
        !           120:        struct chain {
        !           121:                long    wcount,         /* word count */
        !           122:                        memadr;         /* transfer address */
        !           123:        } chain[HDC_MAXCHAIN];          /* data chain */
        !           124: };
        !           125:                                        /* defines for the "command"s */
        !           126: #define        HCMD_STATUS     0x40            /* command: read drive status */
        !           127: #define        HCMD_READ       0x60            /* command: read data */
        !           128: #define        HCMD_VENDOR     0x6a            /* command: read vendor data */
        !           129: #define        HCMD_VERIFY     0x6d            /* command: verify a track */
        !           130: #define        HCMD_WRITE      0x70            /* command: write data */
        !           131: #define        HCMD_FORMAT     0x7e            /* command: format a track */
        !           132: #define        HCMD_CERTIFY    0x7f            /* command: certify a track */
        !           133: #define        HCMD_WCS        0xd0            /* command: write control store */
        !           134: 
        !           135: /*
        !           136:  * This structure defines the master mcb - one per hdc controller.
        !           137:  * The order of this structure is determined by the controller firmware.
        !           138:  * "R" and "W" indicate read-only and write-only.
        !           139:  *
        !           140:  * Bits in the module control long word, "mcl", control the invocation of
        !           141:  * operations on the hdc.
        !           142:  *
        !           143:  * The hdc operates in queued mode or immediate mode.  In queued mode, it
        !           144:  * grabs new mcb's, prioritizes them, and adds them to its queue; it knows
        !           145:  * if we've added any mcb's by checking forw_phaddr to see if any are
        !           146:  * linked off of there.
        !           147:  *
        !           148:  * Bits in the master mcb's status word, "mcs", indicate the status
        !           149:  * of the last-processed mcb.  The MCS_ definitions define these bits.
        !           150:  * This word is set to zero when the mcb queue is passed to the hdc
        !           151:  * controller; the hdc controller then sets bits in this word.
        !           152:  * We cannot modify the mcb queue until the hdc has completed an mcb
        !           153:  * (the hdc sets the MCS_Q_DONE bit).
        !           154:  *
        !           155:  * The "context" word is copied from the context word of the completed
        !           156:  * mcb.  It is currently the virtual pointer to the completed mcb.
        !           157:  */
        !           158:                                        /* definition of master mcb "mcl" */
        !           159: #define        MCL_QUEUED      0x00000010      /* start queued execution of mcb's */
        !           160: #define        MCL_IMMEDIATE   0x00000001      /* start immediate xqt of an mcb */
        !           161:                                        /* definition of master mcb "mcs" */
        !           162: #define        MCS_DONE        0x00000080      /* an mcb is done; status is valid */
        !           163: #define        MCS_FATALERROR  0x00000002      /* a fatal error occurred */
        !           164: #define        MCS_SOFTERROR   0x00000001      /* a recoverable error occurred */
        !           165: 
        !           166: struct master_mcb {
        !           167:        u_long  mcw,                    /* W  module control word (MCL_) */
        !           168:                interrupt,              /* W  interrupt acknowledge word */
        !           169:                forw_phaddr,            /* W  physical address of first mcb */
        !           170:                r1, r2,
        !           171:                mcs,                    /* R  status for last completed mcb */
        !           172:                cmcb_phaddr,            /* W  physical addr of completed mcb */
        !           173:                context,                /* W  software context word */
        !           174: #define        HDC_XSTAT_SIZE  128             /* size of extended status (lwords) */
        !           175:                xstatus[HDC_XSTAT_SIZE];/* R  xstatus of last mcb */
        !           176: };
        !           177: 
        !           178: /*
        !           179:  * This structure defines the information returned by the hdc controller for
        !           180:  * a "read drive status" (HCMD_STATUS) command.  The format of this structure
        !           181:  * is determined by the hdc firmware.  r[1-11] are reserved for future use.
        !           182:  */
        !           183:                                        /* defines for drive_stat drs word */
        !           184: #define        DRS_FAULT       0x00000080      /* drive is reporting a fault */
        !           185: #define        DRS_RESERVED    0x00000040      /* drive is reserved by other port */
        !           186: #define        DRS_WRITE_PROT  0x00000020      /* drive is write protected */
        !           187: #define        DRS_ON_CYLINDER 0x00000002      /* drive heads are not moving now */
        !           188: #define        DRS_ONLINE      0x00000001      /* drive is available for operation */
        !           189: 
        !           190: struct status {
        !           191:        u_long  drs,                    /* drive status (see DRS_) */
        !           192:                r1, r2, r3;
        !           193:        u_short max_cyl,                /* max logical cylinder address */
        !           194:                max_head,               /* max logical head address */
        !           195:                r4,
        !           196:                max_sector,             /* max logical sector address */
        !           197:                def_cyl,                /* definition track cylinder address */
        !           198:                def_cyl_count,          /* definition track cylinder count */
        !           199:                diag_cyl,               /* diagnostic track cylinder address */
        !           200:                diag_cyl_count,         /* diagnostic track cylinder count */
        !           201:                max_phys_cyl,           /* max physical cylinder address */
        !           202:                max_phys_head,          /* max physical head address */
        !           203:                r5,
        !           204:                max_phys_sector,        /* max physical sector address */
        !           205:                r6,
        !           206:                id,                     /* drive id (drive model) */
        !           207:                r7,
        !           208:                bytes_per_sec,          /* bytes/sector -vendorflaw conversn */
        !           209:                r8,
        !           210:                rpm;                    /* disk revolutions per minute */
        !           211:        u_long  r9, r10, r11;
        !           212: };
        !           213: 
        !           214: #ifdef COMPAT_42
        !           215: #define        GB_ID           "geometry"
        !           216: #define        GB_ID_LEN       sizeof(GB_ID)-1
        !           217: #define        GB_MAXPART      8
        !           218: #define        GB_VERSION      1
        !           219: 
        !           220: #define        HDC_DEFPART     GB_MAXPART-1    /* partition# of def and diag cyls */
        !           221: #define        BPS             512             /* bytes per sector */
        !           222: 
        !           223: /*
        !           224:  * Geometry Block:
        !           225:  *
        !           226:  * The geometry block defines partition offsets and information about the
        !           227:  * flaw maps on the flaw map track.  It resides on the first sector of the
        !           228:  * flaw map track.  This structure is also used by vddc disk controllers.
        !           229:  * In this case, the block resides at sector 0 of the disk.
        !           230:  *
        !           231:  * The geometry_sector structure defines the sector containing the geometry
        !           232:  * block.  This sector is checksumed independent of the geometry information.
        !           233:  * The fields in these structured which should never be moved are the id and
        !           234:  * version fields in the geometry_block structure and the checksum field in
        !           235:  * the geometry_sector structure.  This will provide for easy extensions in
        !           236:  * the future.
        !           237:  */
        !           238: 
        !           239: #define        DRIVE_TYPE      flaw_offset     /* For VDDC Geometry Blocks Only */
        !           240: 
        !           241: typedef struct {
        !           242:        char    id[GB_ID_LEN];          /* identifies the geometry block */
        !           243:        long    version,                /* geometry block version number */
        !           244:                flaw_offset,            /* flaw map byte offset in partition7 */
        !           245:                flaw_size,              /* harris flaw map size in bytes */
        !           246:                flaw_checksum,          /* sum of bytes in harris flaw map */
        !           247:                unused[3];              /* --- available for use */
        !           248:        struct par_tab {
        !           249:                long    start,          /* starting 1K block number */
        !           250:                        length;         /* partition size in 1K blocks */
        !           251:        } partition[GB_MAXPART];        /* partition definitions */
        !           252: } geometry_block;
        !           253: 
        !           254: typedef struct {
        !           255:        geometry_block  geometry_block; /* disk geometry */
        !           256:        char    filler[BPS - sizeof(geometry_block) - sizeof(long)];
        !           257:        long    checksum;               /* sector checksum */
        !           258: } geometry_sector;
        !           259: 
        !           260: /*
        !           261:  * GB_CHECKSUM:
        !           262:  *
        !           263:  * This macro computes the checksum for the geometry sector and returns the
        !           264:  * value.  Input to this macro is a pointer to the geometry_sector.  Pretty
        !           265:  * useless, should at least have done an XOR.
        !           266:  */
        !           267: #define GB_CHECKSUM(_gs_ptr, _checksum) { \
        !           268:        register u_char *_ptr; \
        !           269:        register u_long _i, _xsum; \
        !           270:        _xsum = 0; \
        !           271:        _ptr = (u_char *)(_gs_ptr); \
        !           272:        for (_i = 0; _i < (sizeof(geometry_sector) - sizeof(long)); _i++) \
        !           273:                _xsum += * _ptr++; \
        !           274:        _checksum = _xsum; \
        !           275: }
        !           276: #endif /* COMPAT_42 */

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.