|
|
1.1 ! root 1: /* ! 2: * Copyright (c) 1988 Regents of the University of California. ! 3: * All rights reserved. ! 4: * ! 5: * Redistribution and use in source and binary forms, with or without ! 6: * modification, are permitted provided that the following conditions ! 7: * are met: ! 8: * 1. Redistributions of source code must retain the above copyright ! 9: * notice, this list of conditions and the following disclaimer. ! 10: * 2. Redistributions in binary form must reproduce the above copyright ! 11: * notice, this list of conditions and the following disclaimer in the ! 12: * documentation and/or other materials provided with the distribution. ! 13: * 3. All advertising materials mentioning features or use of this software ! 14: * must display the following acknowledgement: ! 15: * This product includes software developed by the University of ! 16: * California, Berkeley and its contributors. ! 17: * 4. Neither the name of the University nor the names of its contributors ! 18: * may be used to endorse or promote products derived from this software ! 19: * without specific prior written permission. ! 20: * ! 21: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ! 22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ! 23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ! 24: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ! 25: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ! 26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ! 27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ! 28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ! 29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ! 30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ! 31: * SUCH DAMAGE. ! 32: * ! 33: * @(#)vbaparam.h 7.3 (Berkeley) 6/28/90 ! 34: */ ! 35: ! 36: /* ! 37: * Parameters related to the VERSAbus i/o configuration. ! 38: */ ! 39: ! 40: /* ! 41: * VERSAbus i/o devices use either memory mapped interfaces ! 42: * or mapped i/o register banks, or some of both. Page tables ! 43: * are allocated at boot time by each device driver, as needed. ! 44: * VMEMmap is used to map a fixed size portion of the VERSAbus ! 45: * i/o space, while VMEMmap1 maps dynamically defined portions ! 46: * for devices which utilize shared i/o memory. VBmap is used ! 47: * for mapping kernel intermediate buffers for DMA devices which ! 48: * are incapable of utilizing user virtual addresses or which ! 49: * require page aligned i/o buffers. The size of the VMEMmap1 ! 50: * VBmap tables must be large enough for the needs of all devices ! 51: * in the system. ! 52: */ ! 53: extern struct pte VMEMmap[], VMEMmap1[]; ! 54: extern caddr_t vmem1, vmemend; ! 55: extern struct pte VBmap[]; ! 56: extern caddr_t vbbase, vbend; ! 57: ! 58: /* ! 59: * The following macros relate to the segmentation of the VERSAbus ! 60: * i/o space. ! 61: * ! 62: * The VERSAbus adapter segments the i/o space (as seen by the cpu) ! 63: * into three regions. Cpu accesses to the upper 64Kb of the i/o space ! 64: * generate VERSAbus cycles with a 16-bit address and a non-privileged ! 65: * short i/o space address modifier. Accesses to the next 1Mb - 64Kb ! 66: * generate 24-bit addresses and a non-privileged standard address ! 67: * modifier. Accesses to the remainder of the 1Gb i/o space generate ! 68: * 32-bit addresses with a non-privileged extended address modifier. ! 69: * Beware that 32-bit addresses generated from this region always have ! 70: * zero in the upper 2 bits; e.g. a reference to physical address fe000000 ! 71: * results in a VERSAbus address of 3e000000. ! 72: */ ! 73: #define VBIO16BIT(a) ((unsigned)0xfffe0000 <= ((unsigned)(a))) ! 74: #define VBIO24BIT(a) ((unsigned)0xff000000 <= ((unsigned)(a)) && \ ! 75: ((unsigned)(a)) < (unsigned)0xfffe0000) ! 76: #define VBIO32BIT(a) (((unsigned)(a)) < (unsigned)0xff000000) ! 77: ! 78: /* ! 79: * The following constants define the fixed size map of the ! 80: * VERSAbus i/o space. The values should reflect the range ! 81: * of i/o addresses used by all the controllers unprepared ! 82: * to allocate and initialize their own page maps. ! 83: */ ! 84: #define VBIOBASE 0xfff00000 /* base of VERSAbus address space */ ! 85: #define VBIOEND 0xffffee45 /* last address in mapped space */ ! 86: /* number of entries in the system page table for i/o space */ ! 87: #define VBIOSIZE btoc(VBIOEND-VBIOBASE) ! 88: /* is device in mapped region */ ! 89: #define VBIOMAPPED(a) ((unsigned)VBIOBASE <= ((unsigned)(a)) && \ ! 90: ((unsigned)(a)) <= (unsigned)VBIOEND) ! 91: #define vboff(addr) ((int)(((caddr_t)(addr)) - VBIOBASE))
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.