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1.1 root 1: /*
2: * Copyright (c) 1988 Regents of the University of California.
3: * All rights reserved.
4: *
5: * This code is derived from software contributed to Berkeley by
6: * Chris Torek.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. All advertising materials mentioning features or use of this software
17: * must display the following acknowledgement:
18: * This product includes software developed by the University of
19: * California, Berkeley and its contributors.
20: * 4. Neither the name of the University nor the names of its contributors
21: * may be used to endorse or promote products derived from this software
22: * without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34: * SUCH DAMAGE.
35: *
36: * @(#)nireg.h 7.3 (Berkeley) 6/28/90
37: */
38:
39: /*
40: * Registers for the DEBNA and DEBNK Ethernet interfaces
41: * (DEC calls these Network Interfaces, hence nireg.h)
42: */
43:
44: /*
45: * this seems to be intended to be more general, but I have no details,
46: * so it goes here for now
47: *
48: * BI Vax Port (BVP) stuff first:
49: */
50: struct bvpregs {
51: u_long p_pcr; /* port control register */
52: u_long p_psr; /* port status register */
53: u_long p_per; /* port error register */
54: u_long p_pdr; /* port data register */
55: };
56:
57: /*
58: * BI node space registers
59: */
60: struct ni_regs {
61: struct biiregs ni_bi; /* BIIC registers, except GPRs */
62: struct bvpregs ni_tkp; /* tk50 port control via BIIC GPRs */
63: u_long ni_xxx[64]; /* unused */
64: u_long ni_rxcd; /* receive console data */
65: struct bvpregs ni_nip; /* NI port control via BCI3 GPRs */
66: u_long ni_pudr; /* power-up diagnostic register */
67: };
68:
69: /* bits in ni_pudr */
70: #define PUDR_TAPE 0x40000000 /* tk50 & assoc logic ok */
71: #define PUDR_PATCH 0x20000000 /* patch logic ok */
72: #define PUDR_VRAM 0x10000000 /* DEBNx onboard RAM ok */
73: #define PUDR_VROM1 0x08000000 /* uVax ROM 1 ok */ /* ? */
74: #define PUDR_VROM2 0x04000000 /* uVax ROM 2 ok */
75: #define PUDR_VROM3 0x02000000 /* uVax ROM 3 ok */
76: #define PUDR_VROM4 0x01000000 /* uVax ROM 4 ok */
77: #define PUDR_UVAX 0x00800000 /* uVax passes self test */
78: #define PUDR_BI 0x00400000 /* BIIC and BCI3 chips ok */
79: #define PUDR_TMR 0x00200000 /* interval timer ok */
80: #define PUDR_IRQ 0x00100000 /* no IRQ lines stuck */
81: #define PUDR_NI 0x00080000 /* Ethernet ctlr ok */
82: #define PUDR_TK50 0x00040000 /* tk50 present */
83: #define PUDR_PRES 0x00001000 /* tk50 present (again?!) */
84: #define PUDR_UVINT 0x00000800 /* uVax-to-80186 intr logic ok */
85: #define PUDR_BUSHD 0x00000400 /* no bus hold errors */
86: #define PUDR_II32 0x00000200 /* II32 transceivers ok */
87: #define PUDR_MPSC 0x00000100 /* MPSC logic ok */
88: #define PUDR_GAP 0x00000080 /* gap-detect logic ok */
89: #define PUDR_MISC 0x00000040 /* misc. registers ok */
90: #define PUDR_UNEXP 0x00000020 /* unexpected interrupt trapped */
91: #define PUDR_80186 0x00000010 /* 80186 ok */
92: #define PUDR_PATCH 0x00000008 /* patch logic ok (again) */
93: #define PUDR_8RAM 0x00000004 /* 80186 RAM ok */
94: #define PUDR_8ROM2 0x00000002 /* 80186 ROM1 ok */
95: #define PUDR_8ROM1 0x00000001 /* 80186 ROM2 ok */
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