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Annotation of Net2/arch/vax/if/if_ecreg.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1982, 1986 Regents of the University of California.
        !             3:  * All rights reserved.
        !             4:  *
        !             5:  * Redistribution and use in source and binary forms, with or without
        !             6:  * modification, are permitted provided that the following conditions
        !             7:  * are met:
        !             8:  * 1. Redistributions of source code must retain the above copyright
        !             9:  *    notice, this list of conditions and the following disclaimer.
        !            10:  * 2. Redistributions in binary form must reproduce the above copyright
        !            11:  *    notice, this list of conditions and the following disclaimer in the
        !            12:  *    documentation and/or other materials provided with the distribution.
        !            13:  * 3. All advertising materials mentioning features or use of this software
        !            14:  *    must display the following acknowledgement:
        !            15:  *     This product includes software developed by the University of
        !            16:  *     California, Berkeley and its contributors.
        !            17:  * 4. Neither the name of the University nor the names of its contributors
        !            18:  *    may be used to endorse or promote products derived from this software
        !            19:  *    without specific prior written permission.
        !            20:  *
        !            21:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
        !            22:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
        !            23:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
        !            24:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
        !            25:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
        !            26:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
        !            27:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            28:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
        !            29:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
        !            30:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
        !            31:  * SUCH DAMAGE.
        !            32:  *
        !            33:  *     @(#)if_ecreg.h  7.4 (Berkeley) 6/28/90
        !            34:  */
        !            35: 
        !            36: /*
        !            37:  * 3Com Ethernet controller registers.
        !            38:  */
        !            39: struct ecdevice {
        !            40:        short   ec_rcr;         /* Receive Control Register */
        !            41:        short   ec_xcr;         /* Transmit Control Register */
        !            42: };
        !            43: 
        !            44: /*
        !            45:  * Control and status bits -- rcr
        !            46:  */
        !            47: #define        EC_SPIE         0x8000          /* set parity interrupt enable */
        !            48: #define        EC_ASTEP        0x4000          /* increment address counter */
        !            49: #define        EC_AROM         0x2000          /* 1: Use address ROM, 0: use RAM */
        !            50: #define        EC_PE           0x2000          /* Parity error */
        !            51: #define        EC_AWCLK        0x1000          /* address write clock bit */
        !            52: #define        EC_PIE          0x1000          /* Parity interrupt enable (read) */
        !            53: #define        EC_ADATA        0x0f00          /* address/filtering */
        !            54: #define        EC_RDONE        0x0080          /* receive done */
        !            55: #define        EC_MDISAB       0x0080          /* memory disable */
        !            56: #define        EC_RINTEN       0x0040          /* receive interrupt enable */
        !            57: #define        EC_RCLR         0x0020          /* clear RDONE bit */
        !            58: #define        EC_RWBN         0x0010          /* submit buffer for receive */
        !            59: #define        EC_RBN          0x000f          /* buffer number */
        !            60: 
        !            61: #define        EC_RBITS        "\10\16PE\15PIE\10RDONE\7RINTEN"
        !            62: 
        !            63: /*
        !            64:  * Control and status bits -- xcr
        !            65:  */
        !            66: #define        EC_JAM          0x8000          /* collision dectected */
        !            67: #define        EC_JINTEN       0x4000          /* collision interrupt enable */
        !            68: #define        EC_JCLR         0x2000          /* clear collision detect */
        !            69: #define        EC_UECLR        0x0100          /* reset controller */
        !            70: #define        EC_XDONE        0x0080          /* transmit done */
        !            71: #define        EC_XINTEN       0x0040          /* transmit interrupt enable */
        !            72: #define        EC_XCLR         0x0020          /* clear XDONE bit */
        !            73: #define        EC_XWBN         0x0010          /* submit buffer for transmit */
        !            74: #define        EC_XBN          0x000f          /* buffer number */
        !            75: 
        !            76: #define        EC_XBITS        "\10\20JAM\17JINTEN\10XDONE\7XINTEN"
        !            77: 
        !            78: /*
        !            79:  * Useful combinations
        !            80:  */
        !            81: #define        EC_READ         (0x600|EC_RINTEN|EC_RWBN)
        !            82: #define        EC_MULTI        (0x700|EC_RINTEN|EC_RWBN)
        !            83: #define EC_PROMISC     (0x000|EC_RINTEN|EC_RWBN)
        !            84: #define        EC_WRITE        (EC_JINTEN|EC_XINTEN|EC_XWBN)
        !            85: #define        EC_CLEAR        (EC_JINTEN|EC_XINTEN|EC_JCLR)
        !            86: 
        !            87: /*
        !            88:  * Buffer number definitions
        !            89:  */
        !            90: #define        ECTBF           0               /* Buffer for transmit */
        !            91: #define        ECRLBF          1               /* First buffer for receive */
        !            92: #define        ECRHBF          15              /* Last buffer for receive */
        !            93: 
        !            94: #define        ECRDOFF         528             /* Packet offset in read buffer */

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