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1.1 root 1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by the University of
16: * California, Berkeley and its contributors.
17: * 4. Neither the name of the University nor the names of its contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
33: * @(#)if_enreg.h 7.3 (Berkeley) 6/28/90
34: */
35:
36: /*
37: * Xerox experimental ethernet registers.
38: *
39: * N.B.: status register and device address are read/write,
40: * device address is read-only, rest are WRITE ONLY!
41: */
42: struct endevice {
43: short en_owc; /* output word count (10 bits) */
44: short en_oba; /* output buffer address */
45: short en_ostat; /* output control and status */
46: short en_odelay; /* output start delay, 25usec units */
47: short en_iwc; /* input word count */
48: short en_iba; /* input buffer address */
49: short en_istat; /* input csr */
50: short en_addr; /* ~device address (low 8 bits) */
51: };
52:
53: /*
54: * Control and status bits.
55: */
56: #define EN_IERROR 0x8000 /* CRC error, buf ovflo or overrun */
57: #define EN_OERROR 0x8000 /* collision or output underrun */
58: #define EN_OPDONE 0x0080 /* previous operation completed */
59: #define EN_IEN 0x0040 /* enable interrupt when DONE */
60: #define EN_PROMISCUOUS 0x0002 /* promiscuous, input any packet */
61: #define EN_GO 0x0001 /* start op bit */
62:
63: #define EN_BITS "\10\20ERR\10OPDONE\7IEN\2PROM\1GO"
64:
65: #define spl_enet() spl5()
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