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1.1 root 1: /*
2: * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * Copyright (c) 1998 Apple Computer, Inc. All rights reserved.
24: *
25: * Interface definition for the keylargo I2C interface
26: *
27: * HISTORY
28: *
29: */
30:
31: #ifndef _PPCI2CINTERFACE_H
32: #define _PPCI2CINTERFACE_H
33:
34: #include <IOKit/IOTypes.h>
35: #include <IOKit/IOLib.h>
36:
37: class PPCI2CInterface
38: {
39: // Add here the default constructors
40:
41:
42: private:
43: // These are the possible states the driver can be in:
44: typedef enum {
45: ki2cStateIdle = 0,
46: ki2cStateWaitingForIADDR,
47: ki2cStateWaitingForIDATA,
48: ki2cStateWaitingForISTOP,
49: ki2cStateWaitingForISTART,
50: } PPCI2CState;
51:
52: // Constansts for the mode register:
53: typedef enum {
54: kDumbMode = 0x00, //
55: kStandardMode = 0x01, //
56: kStandardSubMode = 0x02, //
57: kCombinedMode = 0x03, //
58: kModeMask = 0x03 //
59: } I2CMode;
60:
61: typedef enum {
62: k100KhzMode = 0x00, //
63: k50KhzMode = 0x01, //
64: k25KhzMode = 0x02, //
65: kReservedMode = 0x03, //
66: kSpeedMask = 0x03 //
67: } I2CSpeed;
68:
69: enum {
70: I2CModeShift = 2
71: };
72:
73: enum {
74: I2CSpeedShift = 0
75: };
76:
77: // Constants for the Control register
78: typedef enum {
79: kClrCNTRL = 0x00, // 0 -> Clears all the control bits
80: kAakCNTRL = 0x01, // 1 -> AAK sent, 0 -> not AAK sent
81: kXAddrCNTRL = 0x02, // when set -> transmit address phase (not used by manual mode)
82: kStopCNTRL = 0x04, // when set -> transmit stop condition
83: kStartCNTRL = 0x08, // when set -> transmit start condition (manual mode only)
84: kCNTRLMask = 0x0F // Masks all the control bits
85: } I2CControl;
86:
87: enum {
88: I2CControlShift = 0
89: };
90:
91: // Constants for the STATUS register
92: typedef enum {
93: kBusySTATUS = 0x01, // 1 -> busy
94: kLastAakSTATUS = 0x02, // value of last AAK bit
95: kLastReadWriteSTATUS = 0x04, // value of last R/W bit transmitted
96: kIsdaSTATUS = 0x08, // data line SDA
97: kSclSTATUS = 0x10, // clock line SCL
98: kSTATUSMask = 0x1F // Mask all the status bits
99: } I2CStatus;
100:
101: enum {
102: I2CStatusShift = 0
103: };
104:
105: // Constants for the ISR register
106: typedef enum {
107: kIDataISR = 0x01, // Data Byte Sent or Received Interrupt
108: kIAddrISR = 0x02, // Address Phase Sent Interrupt
109: kIStopISR = 0x04, // Stop Condition Sent Interrupt
110: kIStartISR = 0x08, // Start Condition Sent Interrupt
111: kISRMask = 0x0F
112: } I2CInterruptStatus;
113:
114: enum {
115: I2CInterruptStatusShift = 0
116: };
117:
118: // Constants for the IER register
119: typedef enum {
120: kEDataIER = 0x01, // Enable Data Byte Sent or Received Interrupt
121: kEAddrIER = 0x02, // Enable AAddress Phase Sent Interrupt
122: kEStopIER = 0x04, // Enable Stop Condition Sent Interrupt
123: kEStartIER = 0x08, // Enable Start Condition Sent Interrupt
124: kIERMask = 0x0F
125: } I2CInterruptEnable;
126:
127: enum {
128: I2CInterruptEnableShift = 0
129: };
130:
131: // Constants for the Address register
132: enum I2CAddress {
133: kADDRMask = 0x7F //
134: };
135:
136: typedef enum {
137: kWriteADDR = 0x00, //
138: kReadADDR = 0x01, //
139: kRWMask = 0x01 //
140: } I2CRWMode;
141:
142: enum {
143: I2CAddressShift = 1
144: };
145:
146: enum {
147: I2CRWShift = 0
148: };
149:
150: // redefine the types so it makes easyer to handle
151: // new i2c if they have wider registers.
152: typedef UInt8 *I2CRegister;
153: typedef UInt32 *I2CLongRegister;
154:
155: // These are the keylargo registers to access to the
156: // i2c bus:
157: I2CRegister mode; // Configure the transmission mode of the i2c cell and the databit rate.
158: I2CRegister control; // Holds the 4 bits used to start the operations on the i2c interface.
159: I2CRegister status; // Status bits for the i2 cell and the i2c interface.
160: I2CRegister ISR; // Holds the status bits for the interrupt conditions.
161: I2CRegister IER; // Eneables the bits that allow the four interrupt status conditions.
162: I2CRegister address; // Holds the 7 bits address and the R/W bit.
163: I2CRegister subAddr; // the 8bit subaddress..
164: I2CRegister data; // the byte to sents or the last byte received
165:
166: // This is a parameter used in memory cells and useless for
167: // the mac-io.
168: UInt8 portSelect;
169:
170: // This is the current state for the driver:
171: PPCI2CState currentState;
172:
173: // This interface does not need to be attached to an interrrupt. (it is obvoiusly
174: // better to be, but it is not NECESSARY). When it is not attached to an interrupt
175: // it works in polling mode. The following bool flag sets the default behavior.
176: bool pollingMode;
177:
178: protected:
179: // Chaches the last mode set (I would not do this, but each access to getMode requires a mask and a shift):
180: I2CMode lastMode;
181:
182: // pointer to the data to be transfered
183: UInt8 *dataBuffer;
184:
185: // and the number of bytes still to transfer
186: UInt16 nBytes;
187:
188: // the current transfer address:
189: UInt8 currentAddress;
190:
191: // the current transfer subAddress:
192: UInt8 currentSubaddress;
193:
194: // Direction of the data
195: bool isReading;
196:
197: // prints the content of the registers:
198: void dumpI2CRegisters();
199:
200: // Given the base of the i2c registers inits all the registers.
201: void SetI2CBase(UInt8 *baseAddress, UInt8 steps);
202:
203: // Returns the mask to use with the register:
204: UInt8 shiftedMask(UInt8 mask, UInt8 shift);
205:
206: // Returns the complement of the mask
207: UInt8 shiftedCompMask(UInt8 mask, UInt8 shift);
208:
209: // Generic read and write for register fields:
210: UInt8 readRegisterField(I2CRegister, UInt8, UInt8);
211: void writeRegisterField(I2CRegister, UInt8, UInt8, UInt8);
212:
213: // Intermediate methods to access to each field of all the registers:
214:
215: // Mode register:
216: void setMode(I2CMode);
217: I2CMode getMode();
218: void setSpeed(I2CSpeed);
219: I2CSpeed getSpeed();
220:
221: // Control register
222: void setControl(I2CControl);
223: I2CControl getControl();
224:
225: // Status register
226: void setStatus(I2CStatus);
227: I2CStatus getStatus();
228:
229: // Interrupt status
230: void setInterruptStatus(I2CInterruptStatus);
231: I2CInterruptStatus getInterruptStatus();
232:
233: // Interrupt enable
234: void setInterruptEnable(I2CInterruptEnable);
235: I2CInterruptEnable setInterruptEnable();
236:
237: // Address Register:
238: void setAddressRegister(UInt8, I2CRWMode);
239: void setAddress(UInt8);
240: UInt8 getAddress();
241:
242: void setReadWrite(I2CRWMode);
243: I2CRWMode getReadWrite();
244:
245: // SubAddress register
246: void setSubAddress(UInt8);
247: UInt8 getSubAddress();
248:
249: // Data register
250: void setData(UInt8);
251: UInt8 getData();
252:
253: // Waits for the completion of a read or write
254: // operation:
255: bool waitForCompletion();
256:
257: // Each mode requires a specific interrupt handler (since the states are different for each mode)
258: // so here it is the one for the Standard + SubAddress mode:
259: bool i2cStandardSubModeInterrupts(UInt8 interruptStatus);
260:
261: public:
262: // Initialize the address of the registers and the registers themselfs:
263: virtual bool initI2CBus(UInt8 *baseAddress, UInt8 steps);
264:
265: // These are to setup the mode for the I2C bus:
266: virtual void setPollingMode(bool);
267: virtual void setDumbMode();
268: virtual void setStandardMode();
269: virtual void setStandardSubMode();
270: virtual void setCombinedMode();
271:
272: // These instead set the speed:
273: virtual bool setKhzSpeed(UInt);
274:
275: // Test to read the values set by the funtions above:
276: virtual bool isInDumbMode();
277: virtual bool isInStandardMode();
278: virtual bool isInStandardSubMode();
279: virtual bool isInCombinedMode();
280:
281: // These instead returns the speed:
282: virtual UInt getKhzSpeed();
283:
284: // Starts the use of the interface:
285: virtual bool openI2CBus(UInt8 port);
286:
287: // Writes a block of data at a given address:
288: virtual bool writeI2CBus(UInt8 address, UInt8 subAddress, UInt8 *data, UInt16 len);
289:
290: // Reads a block of data at a given address:
291: virtual bool readI2CBus(UInt8 address, UInt8 subAddress, UInt8 *data, UInt16 len);
292:
293: // End using the interface:
294: virtual bool closei2CBus();
295:
296: // The interrupt handler:
297: // (inheriting classes must call the parten method)
298: virtual bool handleI2CInterrupt();
299:
300: // methods to setup and abort a transfer:
301: // (inheriting classes must call the parten method)
302: virtual bool setAddressAndDirection();
303: virtual bool abortTransfer();
304: };
305:
306: #endif //_PPCI2CINTERFACE_H
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