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1.1 root 1: /*
2: * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * Copyright (c) 1998-1999 by Apple Computer, Inc., All rights reserved.
24: *
25: * Miscellaneous definitions for the BMac Ethernet controller.
26: *
27: * HISTORY
28: *
29: */
30:
31: #include "BMacEnetRegisters.h"
32: #include "BMacEnetPrivate.h"
33: #include <libkern/OSByteOrder.h>
34:
35: void WriteBigMacRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset, u_int16_t data )
36: {
37: OSWriteSwapInt16( ioBaseEnet, reg_offset, data );
38: eieio();
39: }
40:
41:
42: volatile u_int16_t ReadBigMacRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset )
43: {
44: return OSReadSwapInt16( ioBaseEnet, reg_offset );
45: }
46:
47: /*
48: * Procedure for reading EEPROM
49: */
50: #define kSROMAddressLength 5
51: #define kDataInOn 0x0008
52: #define kDataInOff 0x0000
53: #define kClk 0x0002
54: #define kChipSelect 0x0001
55: #define kSDIShiftCount 3
56: #define kSD0ShiftCount 2
57: #define kDelayValue 1000 // number of microseconds
58:
59: #define kSROMStartOffset 10 // this is in words
60: #define kSROMReadCount 3 // number of words to read from SROM
61:
62: static unsigned char clock_out_bit(IOPPCAddress base)
63: {
64: u_int16_t data;
65: u_int16_t val;
66:
67: WriteBigMacRegister(base, kSROMCSR, kChipSelect | kClk);
68: IODelay(kDelayValue);
69:
70: data = ReadBigMacRegister(base, kSROMCSR);
71: IODelay(kDelayValue);
72: val = (data >> kSD0ShiftCount) & 1;
73:
74: WriteBigMacRegister(base, kSROMCSR, kChipSelect);
75: IODelay(kDelayValue);
76:
77: return val;
78: }
79:
80: static void clock_in_bit(IOPPCAddress base, unsigned int val)
81: {
82: u_int16_t data;
83:
84: if (val != 0 && val != 1)
85: {
86: IOLog("bogus data in clock_in_bit\n");
87: return;
88: }
89:
90: data = (val << kSDIShiftCount);
91: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect );
92: IODelay(kDelayValue);
93:
94: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect | kClk );
95: IODelay(kDelayValue);
96:
97: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect);
98: IODelay(kDelayValue);
99: }
100:
101: void reset_and_select_srom(IOPPCAddress base)
102: {
103: /* first reset */
104: WriteBigMacRegister(base, kSROMCSR, 0);
105: IODelay(kDelayValue);
106:
107: /* send it the read command (110) */
108: clock_in_bit(base, 1);
109: clock_in_bit(base, 1);
110: clock_in_bit(base, 0);
111: }
112:
113: unsigned short read_srom(IOPPCAddress base, unsigned int addr,
114: unsigned int addr_len)
115: {
116: unsigned short data, val;
117: unsigned int i;
118:
119: /* send out the address we want to read from */
120: for (i = 0; i < addr_len; i++) {
121: val = addr >> (addr_len-i-1);
122: clock_in_bit(base, val & 1);
123: }
124:
125: /* Now read in the 16-bit data */
126: data = 0;
127: for (i = 0; i < 16; i++) {
128: val = clock_out_bit(base);
129: data <<= 1;
130: data |= val;
131: }
132: WriteBigMacRegister(base, kSROMCSR, 0);
133:
134: return data;
135: }
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