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1.1 root 1: /*
2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * @OSF_COPYRIGHT@
24: */
25: /*
26: * Mach Operating System
27: * Copyright (c) 1991,1990 Carnegie Mellon University
28: * All Rights Reserved.
29: *
30: * Permission to use, copy, modify and distribute this software and its
31: * documentation is hereby granted, provided that both the copyright
32: * notice and this permission notice appear in all copies of the
33: * software, derivative works or modified versions, and any portions
34: * thereof, and that both notices appear in supporting documentation.
35: *
36: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39: *
40: * Carnegie Mellon requests users of this software to return to
41: *
42: * Software Distribution Coordinator or [email protected]
43: * School of Computer Science
44: * Carnegie Mellon University
45: * Pittsburgh PA 15213-3890
46: *
47: * any improvements or extensions that they make and grant Carnegie Mellon
48: * the rights to redistribute these changes.
49: */
50:
51: /*
52: */
53:
54: /*
55: * Machine-dependent definitions for cpu identification.
56: *
57: */
58: #ifndef _I386_CPU_NUMBER_H_
59: #define _I386_CPU_NUMBER_H_
60:
61: extern int cpu_number(void);
62:
63: #ifdef MACH_KERNEL_PRIVATE
64:
65: #include <platforms.h>
66: #include <cpus.h>
67:
68: #include <mp_v1_1.h>
69:
70: #if MP_V1_1
71: #include <i386/apic.h>
72: #include <i386/asm.h>
73:
74: extern int lapic_id;
75:
76: extern __inline__ int cpu_number(void)
77: {
78: register int cpu;
79:
80: __asm__ volatile ("movl " CC_SYM_PREFIX "lapic_id, %0\n"
81: " movl 0(%0), %0\n"
82: " shrl %1, %0\n"
83: " andl %2, %0"
84: : "=r" (cpu)
85: : "i" (LAPIC_ID_SHIFT), "i" (LAPIC_ID_MASK));
86:
87: return(cpu);
88: }
89: #else /* MP_V1_1 */
90: /*
91: * At least one corollary cpu type does not have local memory at all.
92: * The only way I found to store the cpu number was in some 386/486
93: * system register. cr3 has bits 0, 1, 2 and 5, 6, 7, 8, 9, 10, 11
94: * available. Right now we use 0, 1 and 2. So we are limited to 8 cpus.
95: * For more cpus, we could use bits 5 - 11 with a shift.
96: *
97: * Even for other machines, like COMPAQ this is much faster the inb/outb
98: * 4 cycles instead of 10 to 30.
99: */
100: #if defined(__GNUC__)
101: #if NCPUS > 8
102: #error cpu_number() definition only works for #cpus <= 8
103: #else
104:
105: extern __inline__ int cpu_number(void)
106: {
107: register int cpu;
108:
109: __asm__ volatile ("movl %%cr3, %0\n"
110: " andl $0x7, %0"
111: : "=r" (cpu));
112: return(cpu);
113: }
114: #endif
115: #endif /* defined(__GNUC__) */
116:
117: #endif /* MP_V1_1 */
118:
119: #endif /* MACH_KERNEL_PRIVATE */
120:
121: #endif /* _I386_CPU_NUMBER_H_ */
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