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Annotation of XNU/osfmk/i386/cpuid.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
        !             3:  *
        !             4:  * @APPLE_LICENSE_HEADER_START@
        !             5:  * 
        !             6:  * The contents of this file constitute Original Code as defined in and
        !             7:  * are subject to the Apple Public Source License Version 1.1 (the
        !             8:  * "License").  You may not use this file except in compliance with the
        !             9:  * License.  Please obtain a copy of the License at
        !            10:  * http://www.apple.com/publicsource and read it before using this file.
        !            11:  * 
        !            12:  * This Original Code and all software distributed under the License are
        !            13:  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
        !            14:  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
        !            15:  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
        !            16:  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
        !            17:  * License for the specific language governing rights and limitations
        !            18:  * under the License.
        !            19:  * 
        !            20:  * @APPLE_LICENSE_HEADER_END@
        !            21:  */
        !            22: /*
        !            23:  * @OSF_COPYRIGHT@
        !            24:  */
        !            25: 
        !            26: /*
        !            27:  * x86 CPU identification
        !            28:  *
        !            29:  * TODO : Add TI/Thomson processors
        !            30:  */
        !            31: 
        !            32: #ifndef _MACHINE_CPUID_H_
        !            33: #define _MACHINE_CPUID_H_
        !            34: 
        !            35: #define        CPUID_VID_SIZE          12
        !            36: #define        CPUID_VID_INTEL         "GenuineIntel"
        !            37: #define        CPUID_VID_UMC           "UMC UMC UMC "
        !            38: #define        CPUID_VID_AMD           "AuthenticAMD"
        !            39: #define        CPUID_VID_CYRIX         "CyrixInstead"
        !            40: #define        CPUID_VID_NEXTGEN       "NexGenDriven"
        !            41: 
        !            42: #define        CPUID_FEATURE_FPU    0x00000001 /* Floating point unit on-chip */
        !            43: #define        CPUID_FEATURE_VME    0x00000002 /* Virtual Mode Extension */
        !            44: #define        CPUID_FEATURE_IOB    0x00000004 /* I/O Breakpoints */
        !            45: #define        CPUID_FEATURE_PSE    0x00000008 /* Page Size Extension */
        !            46: #define        CPUID_FEATURE_TSC    0x00000010 /* Time Stamp Counter */
        !            47: #define        CPUID_FEATURE_MSR    0x00000020 /* Model Specific Registers */
        !            48: #define        CPUID_FEATURE_MCE    0x00000080 /* Machine Check Exception */
        !            49: #define        CPUID_FEATURE_CX8    0x00000100 /* CMPXCHG8B */
        !            50: #define        CPUID_FEATURE_APIC   0x00000200 /* On-chip APIC */
        !            51: #define        CPUID_FEATURE_MTRR   0x00001000 /* Memory Type Range Register */
        !            52: #define        CPUID_FEATURE_PGE    0x00002000 /* Page Global Enable */
        !            53: #define        CPUID_FEATURE_MCA    0x00004000 /* Machine Check Architecture */
        !            54: #define        CPUID_FEATURE_CMOV   0x00008000 /* Conditional Move Instruction */
        !            55: 
        !            56: #define        CPUID_TYPE_OEM              0x0 /* Original processor */
        !            57: #define        CPUID_TYPE_OVERDRIVE        0x1 /* Overdrive processor */
        !            58: #define        CPUID_TYPE_DUAL             0x2 /* Can be used as dual processor */
        !            59: #define        CPUID_TYPE_RESERVED         0x3 /* Reserved */
        !            60: 
        !            61: #define        CPUID_FAMILY_386            0x3 /* Intel 386 (not part of CPUID) */
        !            62: #define        CPUID_FAMILY_486            0x4 /* Intel 486 */
        !            63: #define        CPUID_FAMILY_P5             0x5 /* Intel Pentium */
        !            64: #define        CPUID_FAMILY_PPRO           0x6 /* Intel Pentium Pro */
        !            65: 
        !            66: #define        CPUID_MODEL_I386_DX         0x0 /* Intel 386 (not part of CPUID) */
        !            67: 
        !            68: #define        CPUID_MODEL_I486_DX         0x0 /* Intel 486DX */
        !            69: #define        CPUID_MODEL_I486_DX_S       0x1 /* Intel 486DX-S */
        !            70: #define        CPUID_MODEL_I486_SX         0x2 /* Intel 486SX */
        !            71: #define        CPUID_MODEL_I486_DX2        0x3 /* Intel 486DX2 */
        !            72: #define        CPUID_MODEL_I486_SL         0x4 /* Intel 486SL */
        !            73: #define        CPUID_MODEL_I486_SX2        0x5 /* Intel 486SX2 */
        !            74: #define        CPUID_MODEL_I486_DX2WB      0x7 /* Intel 486DX2WB */
        !            75: #define        CPUID_MODEL_I486_DX4        0x8 /* Intel 486DX4 */
        !            76: #define        CPUID_MODEL_I486_DX4WB      0x9 /* Intel 486DX4WB */
        !            77: 
        !            78: #define        CPUID_MODEL_AM486_DX        0x1 /* AMD 486DX */
        !            79: #define        CPUID_MODEL_AM486_DX2       0x3 /* AMD 486DX2 */
        !            80: #define        CPUID_MODEL_AM486_DX2WB     0x7 /* AMD 486DX2WB */
        !            81: #define        CPUID_MODEL_AM486_DX4       0x8 /* AMD 486DX4 */
        !            82: #define        CPUID_MODEL_AM486_DX4WB     0x9 /* AMD 486DX4WB */
        !            83: #define        CPUID_MODEL_AM486_5X86      0xE /* AMD 5x86 */
        !            84: #define        CPUID_MODEL_AM486_5X86WB    0xF /* AMD 5x86WB */
        !            85: 
        !            86: #define        CPUID_MODEL_CYRIX5X86       0x9 /* CYRIX 5X86 */
        !            87: 
        !            88: #define        CPUID_MODEL_UMC5SD          0x1 /* UMC U5SD */
        !            89: #define        CPUID_MODEL_UMC5S           0x2 /* UMC U5S */
        !            90: #define        CPUID_MODEL_UMC486_DX2      0x3 /* UMC U486_DX2 */
        !            91: #define        CPUID_MODEL_UMC486_SX2      0x5 /* UMC U486_SX2 */
        !            92: 
        !            93: #define        CPUID_MODEL_P5A             0x0 /* Intel P5 60/66 Step A */
        !            94: #define        CPUID_MODEL_P5              0x1 /* Intel P5 60/66 */
        !            95: #define        CPUID_MODEL_P54             0x2 /* Intel P5 75/80/100/120/133/166 */
        !            96: #define        CPUID_MODEL_P24T            0x3 /* Intel P5 Overdrive 63/83 */
        !            97: 
        !            98: #define        CPUID_MODEL_P6              0x1 /* Intel P6 */
        !            99: #define        CPUID_MODEL_PII             0x3 /* Intel PII */
        !           100: 
        !           101: #define        CPUID_CACHE_SIZE        16      /* Number of descriptor vales */
        !           102: #define        CPUID_CACHE_VALID        4      /* Index of descriptor validity */
        !           103: 
        !           104: #define        CPUID_CACHE_NULL           0x00 /* NULL */
        !           105: #define        CPUID_CACHE_ITLB_4K        0x01 /* Instruction TLB, 4K pages */
        !           106: #define        CPUID_CACHE_ITLB_4M        0x02 /* Instruction TLB, 4M pages */
        !           107: #define        CPUID_CACHE_DTLB_4K        0x03 /* Data TLB, 4K pages */
        !           108: #define        CPUID_CACHE_DTLB_4M        0x04 /* Data TLB, 4M pages */
        !           109: #define        CPUID_CACHE_ICACHE_8K      0x06 /* Instruction cache, 8K */
        !           110: #define        CPUID_CACHE_DCACHE_8K      0x0A /* Data cache, 8K */
        !           111: #define        CPUID_CACHE_UCACHE_128K    0x41 /* Unified cache, 128K */
        !           112: #define        CPUID_CACHE_UCACHE_256K    0x42 /* Unified cache, 256K */
        !           113: #define        CPUID_CACHE_UCACHE_512K    0x43 /* Unified cache, 512K */
        !           114: 
        !           115: #ifndef ASSEMBLER
        !           116: #include <mach/machine.h>
        !           117: 
        !           118: extern unsigned int    cpuid_value;
        !           119: extern unsigned char   cpuid_type;
        !           120: extern unsigned char   cpuid_family;
        !           121: extern unsigned char   cpuid_model;
        !           122: extern unsigned char   cpuid_stepping;
        !           123: extern unsigned int    cpuid_feature;
        !           124: extern char            cpuid_vid[];
        !           125: extern unsigned char   cpuid_cache[];
        !           126: 
        !           127: /*
        !           128:  * Product ID arrays per vendor
        !           129:  */
        !           130: struct cpuid_product {
        !           131:     unsigned char              type;           /* CPU type */
        !           132:     unsigned char              family;         /* CPU family */
        !           133:     unsigned char              model;          /* CPU model */
        !           134:     unsigned int               delay;          /* 1MHz Delay (scale 1000) */
        !           135:     unsigned int               *frequency;     /* Frequency array */
        !           136:     char                       *name;          /* Model name */
        !           137: };
        !           138: 
        !           139: /*
        !           140:  * Vendor ID structure
        !           141:  */
        !           142: struct cpuid_name {
        !           143:     char                       *name;          /* Vendor ID name */
        !           144:     struct cpuid_product       *product;       /* product array */
        !           145:     unsigned int               size;           /* #elements in product array */
        !           146: };
        !           147: 
        !           148: /*
        !           149:  * Cache ID description structure
        !           150:  */
        !           151: struct cpuid_cache_desc {
        !           152:     unsigned char              value;          /* Descriptor value */
        !           153:     char                       *description;   /* Cache description */
        !           154: };
        !           155: 
        !           156: /*
        !           157:  * External declarations
        !           158:  */
        !           159: extern cpu_type_t      cpuid_cputype(int);
        !           160: extern void            cpuid_cpu_display(char *, int);
        !           161: extern void            cpuid_cache_display(char *, int);
        !           162: 
        !           163: #endif /* ASSEMBLER */
        !           164: #endif /* _MACHINE_CPUID_H_ */

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