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1.1 root 1: /*
2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * @OSF_FREE_COPYRIGHT@
24: */
25: /*
26: * @APPLE_FREE_COPYRIGHT@
27: */
28:
29: /*
30: Firmware.s
31:
32: Handle things that should be treated as an extension of the hardware
33:
34: Lovingly crafted by Bill Angell using traditional methods and only natural or recycled materials.
35: No animal products are used other than rendered otter bile and deep fried pork lard.
36:
37: */
38:
39: #include <cpus.h>
40: #include <ppc/asm.h>
41: #include <ppc/proc_reg.h>
42: #include <ppc/POWERMAC/mp/MPPlugIn.h>
43: #include <ppc/exception.h>
44: #include <mach/machine/vm_param.h>
45: #include <assym.s>
46:
47:
48: /*
49: * Here we generate the table of supported firmware calls
50: */
51:
52:
53:
54: #ifdef __ELF__
55: .section ".data"
56: #else
57: .data
58: #endif
59: .align 5 /* Line up on cache line */
60:
61: .globl EXT(FWtable)
62:
63: #ifdef __ELF__
64: .type EXT(FWtable),@object
65: #endif
66: EXT(FWtable):
67:
68: .globl CutTrace /* Let everyone know 'bout it */
69: .set CutTrace,(.-EXT(FWtable))/4|0x80000000 /* Call number for CutTrace */
70: .long callUnimp /* This was already handled in lowmem_vectors */
71:
72: #include <ppc/FirmwareCalls.h>
73:
74: .set EXT(FirmwareCnt), (.-EXT(FWtable))/4 /* Get the top number */
75:
76: .text
77:
78: #define SIMPLESCC 1
79: #define NOTQUITEASSIMPLE 1
80: /*
81: * This routine handles the firmware call routine. It must be entered with IR and DR off,
82: * interruptions disabled, and in supervisor state.
83: *
84: * When we enter, we expect R0 to have call number, and LR
85: * to point to the return. Also, all registers saved in savearea in R13.
86: * R3 is as passed in by the user. All others must be gotten from the save area
87: */
88:
89: ENTRY(FirmwareCall, TAG_NO_FRAME_USED)
90:
91: rlwinm r1,r0,2,1,29 /* Clear out bit 0 and multiply by 4 */
92: lis r12,HIGH_ADDR(EXT(FWtable)) /* Get the high part of the firmware call table */
93: cmplwi r1,EXT(FirmwareCnt)*4 /* Is it a valid firmware call number */
94: mflr r11 /* Save the return */
95: ori r12,r12,LOW_ADDR(EXT(FWtable)) /* Now the low part */
96: ble+ goodCall /* Yeah, it is... */
97:
98: li r3,T_SYSTEM_CALL /* Tell the vector handler that we know nothing */
99: blr /* Return for errors... */
100:
101: goodCall: mfsprg r10,0 /* Make sure about the per_proc block */
102: lwzx r1,r1,r12 /* Pick up the address of the routine */
103: lwz r4,saver4(r13) /* Pass in caller's R4 */
104: lwz r5,saver5(r13) /* Pass in caller's R5 */
105: rlwinm. r1,r1,0,0,29 /* Make sure the flag bits are clear */
106: stw r11,PP_TEMPWORK1(r10) /* Save our return point */
107:
108: mtlr r1 /* Put it in the LR */
109: beq- callUnimp /* This one was unimplimented... */
110:
111: blrl /* Call the routine... */
112:
113: mfsprg r10,0 /* Make sure about the per_proc again */
114: stw r3,saver3(r13) /* Pass back the return code to caller */
115: lwz r11,PP_TEMPWORK1(r10) /* Get our return point */
116: li r3,T_IN_VAIN /* Tell the vector handler that we took care of it */
117: mtlr r11 /* Set the return */
118: blr /* Bye, dudes... */
119:
120: callUnimp: lwz r11,PP_TEMPWORK1(r10) /* Restore the return address */
121: li r3,T_SYSTEM_CALL /* Tell the vector handler that we know nothing */
122: mtlr r11 /* Restore the LR */
123: blr /* Return for errors... */
124:
125: /*
126: * This routine is used to store using a real address. It stores parmeter1 at parameter2.
127: */
128:
129: ENTRY(StoreReal, TAG_NO_FRAME_USED)
130:
131: lis r0,HIGH_ADDR(StoreRealCall) /* Get the top part of the SC number */
132: ori r0,r0,LOW_ADDR(StoreRealCall) /* and the bottom part */
133: sc /* Do it to it */
134: blr /* Bye bye, Birdie... */
135:
136: ENTRY(StoreRealLL, TAG_NO_FRAME_USED)
137:
138: stw r3,0(r4) /* Store the word */
139: blr /* Leave... */
140:
141: /*
142: * This routine is used to clear a range of physical pages.
143: */
144:
145: ENTRY(ClearReal, TAG_NO_FRAME_USED)
146:
147: lis r0,HIGH_ADDR(ClearRealCall) /* Get the top part of the SC number */
148: ori r0,r0,LOW_ADDR(ClearRealCall) /* and the bottom part */
149: sc /* Do it to it */
150: blr /* Bye bye, Birdie... */
151:
152: ENTRY(ClearRealLL, TAG_NO_FRAME_USED)
153:
154: /*
155: * We take the first parameter as a physical address. The second is the length in bytes.
156: * Being crazy, I'll round the address down, and the length up. We could end up clearing
157: * an extra page at the start and one at the end, but we don't really care. If someone
158: * is stupid enough to give me unaligned addresses and lengths, I am just arrogant enough
159: * to take them at their word and to hell with them.
160: */
161:
162: neg r5,r3 /* Negate the address */
163: addi r4,r4,4095 /* Round length up */
164: rlwinm r5,r5,0,20,31 /* Save extra length */
165: rlwinm r3,r3,0,0,19 /* Round the page on down */
166: add r4,r4,r5 /* Add up all extra lengths */
167: li r6,32 /* Get a displacement */
168: rlwinm r4,r4,0,0,19 /* Round the length back down */
169:
170: clrloop: subi r4,r4,32 /* Back off a cache line */
171: dcbz 0,r3 /* Do the even line */
172: sub. r4,r4,r6 /* Back off a second time (we only do this to generate a CR */
173: dcbz r6,r3 /* Clear the even line */
174: addi r3,r3,64 /* Move up to every other line */
175: bgt+ clrloop /* Go until we've done it all... */
176:
177: blr /* Leave... */
178: /*
179: * This routine will read in 32 byte of real storage.
180: */
181:
182: ENTRY(ReadReal, TAG_NO_FRAME_USED)
183:
184: mfmsr r0 /* Get the MSR */
185: rlwinm r5,r0,0,28,26 /* Clear DR bit */
186: rlwinm r5,r5,0,17,15 /* Clear EE bit */
187: mtmsr r5 /* Disable EE and DR */
188: isync /* Just make sure about it */
189:
190: lwz r5,0(r3) /* Get word 0 */
191: lwz r6,4(r3) /* Get word 1 */
192: lwz r7,8(r3) /* Get word 2 */
193: lwz r8,12(r3) /* Get word 3 */
194: lwz r9,16(r3) /* Get word 4 */
195: lwz r10,20(r3) /* Get word 5 */
196: lwz r11,24(r3) /* Get word 6 */
197: lwz r12,28(r3) /* Get word 7 */
198:
199: mtmsr r0 /* Restore original machine state */
200: isync /* Insure goodness */
201:
202: stw r5,0(r4) /* Set word 0 */
203: stw r6,4(r4) /* Set word 1 */
204: stw r7,8(r4) /* Set word 2 */
205: stw r8,12(r4) /* Set word 3 */
206: stw r9,16(r4) /* Set word 4 */
207: stw r10,20(r4) /* Set word 5 */
208: stw r11,24(r4) /* Set word 6 */
209: stw r12,28(r4) /* Set word 7 */
210:
211: blr
212:
213:
214: /*
215: * This routine is used to load all 4 DBATs.
216: */
217:
218: ENTRY(LoadDBATs, TAG_NO_FRAME_USED)
219:
220: lis r0,HIGH_ADDR(LoadDBATsCall) /* Top half of LoadDBATsCall firmware call number */
221: ori r0,r0,LOW_ADDR(LoadDBATsCall) /* Bottom half */
222: sc /* Do it to it */
223:
224: blr /* Bye bye, Birdie... */
225:
226: ENTRY(xLoadDBATsLL, TAG_NO_FRAME_USED)
227:
228: lwz r4,0(r3) /* Get DBAT 0 high */
229: lwz r5,4(r3) /* Get DBAT 0 low */
230: lwz r6,8(r3) /* Get DBAT 1 high */
231: lwz r7,12(r3) /* Get DBAT 1 low */
232: lwz r8,16(r3) /* Get DBAT 2 high */
233: lwz r9,20(r3) /* Get DBAT 2 low */
234: lwz r10,24(r3) /* Get DBAT 3 high */
235: lwz r11,28(r3) /* Get DBAT 3 low */
236:
237: sync /* Common decency and the state law require you to wash your hands */
238: mtdbatu 0,r4 /* Load DBAT 0 high */
239: mtdbatl 0,r5 /* Load DBAT 0 low */
240: mtdbatu 1,r6 /* Load DBAT 1 high */
241: mtdbatl 1,r7 /* Load DBAT 1 low */
242: mtdbatu 2,r8 /* Load DBAT 2 high */
243: mtdbatl 2,r9 /* Load DBAT 2 low */
244: mtdbatu 3,r10 /* Load DBAT 3 high */
245: mtdbatl 3,r11 /* Load DBAT 3 low */
246: sync /* Make sure it's done */
247: isync /* Toss out anything new */
248:
249: blr /* Leave... */
250:
251: /*
252: * This routine is used to load all 4 IBATs.
253: */
254:
255: ENTRY(LoadIBATs, TAG_NO_FRAME_USED)
256:
257: lis r0,HIGH_ADDR(LoadIBATsCall) /* Top half of CreateFakeIO firmware call number */
258: ori r0,r0,LOW_ADDR(LoadIBATsCall) /* Bottom half */
259: sc /* Do it to it */
260: blr /* Bye bye, Birdie... */
261:
262: ENTRY(xLoadIBATsLL, TAG_NO_FRAME_USED)
263:
264: lwz r4,0(r3) /* Get IBAT 0 high */
265: lwz r5,4(r3) /* Get IBAT 0 low */
266: lwz r6,8(r3) /* Get IBAT 1 high */
267: lwz r7,12(r3) /* Get IBAT 1 low */
268: lwz r8,16(r3) /* Get IBAT 2 high */
269: lwz r9,20(r3) /* Get IBAT 2 low */
270: lwz r10,24(r3) /* Get IBAT 3 high */
271: lwz r11,28(r3) /* Get IBAT 3 low */
272:
273: sync /* Common decency and the state law require you to wash your hands */
274: mtibatu 0,r4 /* Load IBAT 0 high */
275: mtibatl 0,r5 /* Load IBAT 0 low */
276: mtibatu 1,r6 /* Load IBAT 1 high */
277: mtibatl 1,r7 /* Load IBAT 1 low */
278: mtibatu 2,r8 /* Load IBAT 2 high */
279: mtibatl 2,r9 /* Load IBAT 2 low */
280: mtibatu 3,r10 /* Load IBAT 3 high */
281: mtibatl 3,r11 /* Load IBAT 3 low */
282: sync /* Make sure it's done */
283: isync /* Toss out anything new */
284:
285: blr /* Leave... */
286:
287:
288: /*
289: * This is the glue to call the CutTrace firmware call
290: */
291:
292: ENTRY(dbgTrace, TAG_NO_FRAME_USED)
293:
294: lis r0,HIGH_ADDR(CutTrace) /* Top half of CreateFakeIO firmware call number */
295: ori r0,r0,LOW_ADDR(CutTrace) /* Bottom half */
296: sc /* Do it to it */
297: blr /* Bye bye, Birdie... */
298:
299:
300:
301: /*
302: * This is the glue to create a fake I/O interruption
303: */
304:
305: ENTRY(CreateFakeIO, TAG_NO_FRAME_USED)
306:
307: lis r0,HIGH_ADDR(CreateFakeIOCall) /* Top half of CreateFakeIO firmware call number */
308: ori r0,r0,LOW_ADDR(CreateFakeIOCall) /* Bottom half */
309: sc /* Do it to it */
310: blr /* Bye bye, Birdie... */
311:
312: /*
313: * Used to initialize the SCC for debugging output
314: */
315:
316:
317: ENTRY(fwSCCinit, TAG_NO_FRAME_USED)
318:
319: mfmsr r8 /* Save the MSR */
320: mr. r3,r3 /* See if printer or modem */
321: rlwinm r12,r8,0,28,25 /* Turn off translation */
322: lis r10,0xF301 /* Set the top part */
323: rlwinm r12,r12,0,17,15 /* Turn off interruptions */
324: #if 0
325: mtmsr r12 /* Smash the MSR */
326: isync /* Make it clean */
327: #endif
328:
329: ori r10,r10,0x2000 /* Assume the printer (this is the normal one) */
330: beq+ fwSCCprnt /* It sure are... */
331: ori r10,r10,0x0002 /* Move it over to the modem port */
332:
333: fwSCCprnt: dcbf 0,r10 /* Insure it is out */
334: sync
335: eieio
336: dcbi 0,r10 /* Toss it */
337: sync
338:
339:
340: li r7,0x09 /* Set the register */
341: stb r7,0(r10) /* Set the register */
342: dcbf 0,r10 /* Force it out */
343: sync /* Make sure it's out there */
344: dcbi 0,r10
345: eieio
346:
347: li r7,0x80 /* Reset channel A */
348: stb r7,0(r10) /* Set the register */
349: dcbf 0,r10 /* Force it out */
350: sync /* Make sure it's out there */
351: dcbi 0,r10
352: eieio
353:
354: li r7,0x04 /* Set the register */
355: stb r7,0(r10) /* Set the register */
356: dcbf 0,r10 /* Force it out */
357: sync /* Make sure it's out there */
358: dcbi 0,r10
359: eieio
360:
361: li r7,0x44 /* x16 clock, 1 stop bit */
362: stb r7,0(r10) /* Set the register */
363: dcbf 0,r10 /* Force it out */
364: sync /* Make sure it's out there */
365: dcbi 0,r10
366: eieio
367:
368: li r7,0x03 /* Set the register */
369: stb r7,0(r10) /* Set the register */
370: dcbf 0,r10 /* Force it out */
371: sync /* Make sure it's out there */
372: dcbi 0,r10
373: eieio
374:
375: li r7,0xC0 /* 8 bits per char */
376: stb r7,0(r10) /* Set the register */
377: dcbf 0,r10 /* Force it out */
378: sync /* Make sure it's out there */
379: dcbi 0,r10
380: eieio
381:
382: li r7,0x05 /* Set the register */
383: stb r7,0(r10) /* Set the register */
384: dcbf 0,r10 /* Force it out */
385: sync /* Make sure it's out there */
386: dcbi 0,r10
387: eieio
388:
389: li r7,0xE2 /* DTR mode, 8bit/char */
390: stb r7,0(r10) /* Set the register */
391: dcbf 0,r10 /* Force it out */
392: sync /* Make sure it's out there */
393: dcbi 0,r10
394: eieio
395:
396: li r7,0x02 /* Set the register */
397: stb r7,0(r10) /* Set the register */
398: dcbf 0,r10 /* Force it out */
399: sync /* Make sure it's out there */
400: dcbi 0,r10
401: eieio
402:
403: li r7,0x00 /* Vector 0 */
404: stb r7,0(r10) /* Set the register */
405: dcbf 0,r10 /* Force it out */
406: sync /* Make sure it's out there */
407: dcbi 0,r10
408: eieio
409:
410: li r7,0x0A /* Set the register */
411: stb r7,0(r10) /* Set the register */
412: dcbf 0,r10 /* Force it out */
413: sync /* Make sure it's out there */
414: dcbi 0,r10
415: eieio
416:
417: li r7,0x00 /* Clear misc controls */
418: stb r7,0(r10) /* Set the register */
419: dcbf 0,r10 /* Force it out */
420: sync /* Make sure it's out there */
421: dcbi 0,r10
422: eieio
423:
424: li r7,0x0B /* Set the register */
425: stb r7,0(r10) /* Set the register */
426: dcbf 0,r10 /* Force it out */
427: sync /* Make sure it's out there */
428: dcbi 0,r10
429: eieio
430:
431: li r7,0x50 /* B/R gen T/R */
432: stb r7,0(r10) /* Set the register */
433: dcbf 0,r10 /* Force it out */
434: sync /* Make sure it's out there */
435: dcbi 0,r10
436: eieio
437:
438: li r7,0x0C /* Set the register */
439: stb r7,0(r10) /* Set the register */
440: dcbf 0,r10 /* Force it out */
441: sync /* Make sure it's out there */
442: dcbi 0,r10
443: eieio
444:
445: li r7,0x0A /* 9600 baud low */
446: stb r7,0(r10) /* Set the register */
447: dcbf 0,r10 /* Force it out */
448: sync /* Make sure it's out there */
449: dcbi 0,r10
450: eieio
451:
452: li r7,0x0D /* Set the register */
453: stb r7,0(r10) /* Set the register */
454: dcbf 0,r10 /* Force it out */
455: sync /* Make sure it's out there */
456: dcbi 0,r10
457: eieio
458:
459: li r7,0x00 /* 9600 baud high */
460: stb r7,0(r10) /* Set the register */
461: dcbf 0,r10 /* Force it out */
462: sync /* Make sure it's out there */
463: dcbi 0,r10
464: eieio
465:
466: li r7,0x03 /* Set the register */
467: stb r7,0(r10) /* Set the register */
468: dcbf 0,r10 /* Force it out */
469: sync /* Make sure it's out there */
470: dcbi 0,r10
471: eieio
472:
473: li r7,0xC1 /* 8 bits/char, Rx enable */
474: stb r7,0(r10) /* Set the register */
475: dcbf 0,r10 /* Force it out */
476: sync /* Make sure it's out there */
477: dcbi 0,r10
478: eieio
479:
480: li r7,0x05 /* Set the register */
481: stb r7,0(r10) /* Set the register */
482: dcbf 0,r10 /* Force it out */
483: sync /* Make sure it's out there */
484: dcbi 0,r10
485: eieio
486:
487: li r7,0xEA /* 8 bits/char, Tx enable */
488: stb r7,0(r10) /* Set the register */
489: dcbf 0,r10 /* Force it out */
490: sync /* Make sure it's out there */
491: dcbi 0,r10
492: eieio
493:
494: li r7,0x0E /* Set the register */
495: stb r7,0(r10) /* Set the register */
496: dcbf 0,r10 /* Force it out */
497: sync /* Make sure it's out there */
498: dcbi 0,r10
499: eieio
500:
501: li r7,0x01 /* BR rate gen enable */
502: stb r7,0(r10) /* Set the register */
503: dcbf 0,r10 /* Force it out */
504: sync /* Make sure it's out there */
505: dcbi 0,r10
506: eieio
507:
508: li r7,0x0F /* Set the register */
509: stb r7,0(r10) /* Set the register */
510: dcbf 0,r10 /* Force it out */
511: sync /* Make sure it's out there */
512: dcbi 0,r10
513: eieio
514:
515: li r7,0x00 /* ints off */
516: stb r7,0(r10) /* Set the register */
517: dcbf 0,r10 /* Force it out */
518: sync /* Make sure it's out there */
519: dcbi 0,r10
520: eieio
521:
522: li r7,0x10 /* Reset ext/stat ints */
523: stb r7,0(r10) /* Set the register */
524: dcbf 0,r10 /* Force it out */
525: sync /* Make sure it's out there */
526: dcbi 0,r10
527: eieio
528:
529: li r7,0x10 /* Reset ext/stat ints */
530: stb r7,0(r10) /* Set the register */
531: dcbf 0,r10 /* Force it out */
532: sync /* Make sure it's out there */
533: dcbi 0,r10
534: eieio
535:
536: li r7,0x01 /* Set the register */
537: stb r7,0(r10) /* Set the register */
538: dcbf 0,r10 /* Force it out */
539: sync /* Make sure it's out there */
540: dcbi 0,r10
541: eieio
542:
543: li r7,0x10 /* int on Rx, no Tx int enable */
544: stb r7,0(r10) /* Set the register */
545: dcbf 0,r10 /* Force it out */
546: sync /* Make sure it's out there */
547: dcbi 0,r10
548: eieio
549:
550: li r7,0x09 /* Set the register */
551: stb r7,0(r10) /* Set the register */
552: dcbf 0,r10 /* Force it out */
553: sync /* Make sure it's out there */
554: dcbi 0,r10
555: eieio
556:
557: li r7,0x0A /* int on Rx, Tx int enable */
558: stb r7,0(r10) /* Set the register */
559: dcbf 0,r10 /* Force it out */
560: sync /* Master enable, no vector */
561: dcbi 0,r10
562: eieio
563:
564: li r7,0x09 /* Set the register */
565: stb r7,0(r10) /* Set the register */
566: dcbf 0,r10 /* Force it out */
567: sync /* Make sure it's out there */
568: dcbi 0,r10
569: eieio
570:
571: li r7,0x02 /* No vector */
572: stb r7,0(r10) /* Set the register */
573: dcbf 0,r10 /* Force it out */
574: sync /* Master enable, no vector */
575: dcbi 0,r10
576: eieio
577:
578: lbz r7,0(r10) /* Clear interrupts */
579: sync /* Master enable, no vector */
580: dcbi 0,r10
581: eieio
582:
583: wSCCrdy: eieio /* Barricade it */
584: lbz r7,0(r10) /* Get current status */
585: dcbi 0,r10
586: sync
587: andi. r7,r7,0x04 /* Is transmitter empty? */
588: beq wSCCrdy /* Nope... */
589:
590: eieio
591:
592: #if 0
593: mtmsr r8 /* Restore 'rupts and TR */
594: isync
595: #endif
596: blr /* Leave... */
597:
598: /*
599: * This routine is used to write debug output to either the modem or printer port.
600: * parm 1 is printer (0) or modem (1); parm 2 is ID (printed directly); parm 3 converted to hex
601: */
602:
603: ENTRY(dbgDisp, TAG_NO_FRAME_USED)
604:
605: mr r12,r0 /* Keep R0 pristene */
606: lis r0,HIGH_ADDR(dbgDispCall) /* Top half of dbgDispCall firmware call number */
607: ori r0,r0,LOW_ADDR(dbgDispCall) /* Bottom half */
608:
609: sc /* Go display the stuff */
610:
611: mr r0,r12 /* Restore R0 */
612: blr /* Return... */
613:
614: /* Here's the low-level part of dbgDisp */
615:
616: ENTRY(dbgDispLL, TAG_NO_FRAME_USED)
617:
618: dbgDispInt: mfmsr r8 /* Save the MSR */
619:
620: #if 0
621: lis r10,0xF301 /* (TEST/DEBUG) */
622: ori r10,r10,0x2002 /* (TEST/DEBUG) */
623: dcbf 0,r10 /* (TEST/DEBUG) */
624: sync /* (TEST/DEBUG) */
625: dcbi 0,r10 /* (TEST/DEBUG) */
626: eieio /* (TEST/DEBUG) */
627: li r7,0x35 /* (TEST/DEBUG) */
628: stb r7,4(r10) /* (TEST/DEBUG) */
629:
630: lis r7,10 /* (TEST/DEBUG) */
631: spw6: addi r7,r7,-1 /* (TEST/DEBUG) */
632: mr. r7,r7 /* (TEST/DEBUG) */
633: bne- spw6 /* (TEST/DEBUG) */
634: dcbf 0,r10 /* (TEST/DEBUG) */
635: sync /* (TEST/DEBUG) */
636: dcbi 0,r10 /* (TEST/DEBUG) */
637: eieio /* (TEST/DEBUG) */
638: #endif
639:
640: rlwinm r12,r8,0,28,25 /* Turn off translation */
641: rlwinm r12,r12,0,17,15 /* Turn off interruptions */
642:
643: mflr r11 /* Save the link register */
644:
645: #if 0
646: mr r7,r12 /* (TEST/DEBUG) */
647: bl dumpr7 /* (TEST/DEBUG) */
648: #endif
649:
650: mr. r3,r3 /* See if printer or modem */
651: lis r10,0xF301 /* Set the top part */
652: mr r3,r4 /* Copy the ID parameter */
653:
654: #if 0
655: mr r9,r12 /* (TEST/DEBUG) */
656:
657: mtmsr r12 /* (TEST/DEBUG) */
658: isync /* (TEST/DEBUG) */
659:
660: #if 0
661: mtmsr r8 /* (TEST/DEBUG) */
662: isync /* (TEST/DEBUG) */
663: #endif
664:
665: lis r12,0xF301 /* (TEST/DEBUG) */
666: ori r12,r12,0x2002 /* (TEST/DEBUG) */
667: #if 1
668: dcbf 0,r12 /* (TEST/DEBUG) */
669: sync /* (TEST/DEBUG) */
670: dcbi 0,r12 /* (TEST/DEBUG) */
671: #endif
672:
673: xqrw1: eieio /* (TEST/DEBUG) */
674: lbz r7,0(r12) /* (TEST/DEBUG) */
675: dcbi 0,r12 /* (TEST/DEBUG) */
676: sync /* (TEST/DEBUG) */
677: andi. r7,r7,0x04 /* (TEST/DEBUG) */
678: beq xqrw1 /* (TEST/DEBUG) */
679:
680: eieio /* (TEST/DEBUG) */
681: li r7,0x36 /* (TEST/DEBUG) */
682: stb r7,4(r12) /* (TEST/DEBUG) */
683: eieio
684: dcbf 0,r12 /* (TEST/DEBUG) */
685: sync /* (TEST/DEBUG) */
686: dcbi 0,r12 /* (TEST/DEBUG) */
687: eieio /* (TEST/DEBUG) */
688:
689:
690: lis r7,10 /* (TEST/DEBUG) */
691: spw7: addi r7,r7,-1 /* (TEST/DEBUG) */
692: mr. r7,r7 /* (TEST/DEBUG) */
693: bne- spw7 /* (TEST/DEBUG) */
694: dcbf 0,r12 /* (TEST/DEBUG) */
695: sync /* (TEST/DEBUG) */
696: dcbi 0,r12 /* (TEST/DEBUG) */
697: eieio /* (TEST/DEBUG) */
698: mr r12,r9 /* (TEST/DEBUG) */
699: #endif
700:
701: mtmsr r12 /* Smash the MSR */
702: isync /* Make it clean */
703:
704:
705: #if SIMPLESCC && !NOTQUITEASSIMPLE
706: ori r10,r10,0x3010 /* Assume the printer (this is the normal one) */
707: #else
708: ori r10,r10,0x2000 /* Assume the printer (this is the normal one) */
709: #endif
710: beq+ dbgDprintr /* It sure are... */
711: #if SIMPLESCC && !NOTQUITEASSIMPLE
712: ori r10,r10,0x0020 /* Move it over to the modem port */
713: #else
714: ori r10,r10,0x0002 /* Move it over to the modem port */
715:
716: #if !NOTQUITEASSIMPLE
717: lis r7,0xF300 /* Address of SCC rounded to 128k */
718: ori r7,r7,0x0032 /* Make it cache inhibited */
719: mtdbatl 3,r7 /* Load DBAT 3 low */
720: lis r7,0xF300 /* Address of SCC rounded to 128k */
721: ori r7,r7,0x0002 /* Make it supervisor only */
722: mtdbatu 3,r7 /* Load DBAT 3 high */
723: ori r12,r12,0x0010 /* Turn on DR */
724: mtmsr r12 /* Smash the MSR */
725: isync /* Make it clean */
726:
727: #endif
728: #endif
729:
730: dbgDprintr: sync
731: #if 0
732: mr r7,r10 /* (TEST/DEBUG) */
733: bl dumpr7 /* (TEST/DEBUG) */
734: #endif
735:
736: dcbi 0,r10 /* Toss it */
737: eieio
738:
739: #if 0
740: lis r12,0xF301 /* (TEST/DEBUG) */
741: ori r12,r12,0x2002 /* (TEST/DEBUG) */
742: dcbf 0,r12 /* (TEST/DEBUG) */
743: sync /* (TEST/DEBUG) */
744: dcbi 0,r12 /* (TEST/DEBUG) */
745: eieio /* (TEST/DEBUG) */
746: li r7,0x37 /* (TEST/DEBUG) */
747: stb r7,4(r12) /* (TEST/DEBUG) */
748:
749: lis r7,12 /* (TEST/DEBUG) */
750: spw8: addi r7,r7,-1 /* (TEST/DEBUG) */
751: mr. r7,r7 /* (TEST/DEBUG) */
752: bne- spw8 /* (TEST/DEBUG) */
753: dcbf 0,r12 /* (TEST/DEBUG) */
754: sync /* (TEST/DEBUG) */
755: dcbi 0,r12 /* (TEST/DEBUG) */
756: eieio /* (TEST/DEBUG) */
757: #endif
758:
759:
760: /* Print the ID parameter */
761:
762: lis r12,HIGH_ADDR(fwdisplock) /* Get the display locker outer */
763: ori r12,r12,LOW_ADDR(fwdisplock) /* Last part */
764:
765: lwarx r7,0,r12 ; ?
766:
767: ddwait0: lwarx r7,0,r12 /* Get the lock */
768: mr. r7,r7 /* Is it locked? */
769: bne- ddwait0 /* Yup... */
770: stwcx. r12,0,r12 /* Try to get it */
771: bne- ddwait0 /* Nope, start all over... */
772:
773: #if 0
774: dcbf 0,r10 /* (TEST/DEBUG) */
775: sync /* (TEST/DEBUG) */
776: dcbi 0,r10 /* (TEST/DEBUG) */
777: eieio /* (TEST/DEBUG) */
778: li r7,0x38 /* (TEST/DEBUG) */
779: stb r7,6(r10) /* (TEST/DEBUG) */
780:
781: lis r7,10 /* (TEST/DEBUG) */
782: spwa: addi r7,r7,-1 /* (TEST/DEBUG) */
783: mr. r7,r7 /* (TEST/DEBUG) */
784: bne- spwa /* (TEST/DEBUG) */
785: dcbf 0,r10 /* (TEST/DEBUG) */
786: sync /* (TEST/DEBUG) */
787: dcbi 0,r10 /* (TEST/DEBUG) */
788: eieio /* (TEST/DEBUG) */
789: #endif
790:
791: rlwinm r3,r3,8,0,31 /* Get the first character */
792: bl dbgDchar /* Print it */
793: rlwinm r3,r3,8,0,31 /* Get the second character */
794: bl dbgDchar /* Print it */
795: rlwinm r3,r3,8,0,31 /* Get the third character */
796: bl dbgDchar /* Print it */
797: rlwinm r3,r3,8,0,31 /* Get the fourth character */
798: bl dbgDchar /* Print it */
799:
800: li r3,0x20 /* Get a space for a separator */
801: bl dbgDchar /* Print it */
802: bl dbg4byte /* Print register 5 in hex */
803:
804: li r3,0x0A /* Linefeed */
805: bl dbgDchar /* Send it */
806: li r3,0x0D /* Carriage return */
807: bl dbgDchar /* Send it */
808:
809: mtlr r11 /* Get back the return */
810: #if !SIMPLESCC && !NOTQUITEASSIMPLE
811: li r7,0 /* Get a zero */
812: mtdbatu 3,r7 /* Invalidate DBAT 3 upper */
813: mtdbatl 3,r7 /* Invalidate DBAT 3 lower */
814: #endif
815: lis r12,HIGH_ADDR(fwdisplock) /* Get the display locker outer */
816: li r7,0 /* Get a zero */
817: ori r12,r12,LOW_ADDR(fwdisplock) /* Last part */
818: dcbi 0,r10 /* ? */
819: stw r7,0(r12) /* Release the display lock */
820: mtmsr r8 /* Restore the MSR */
821: isync /* Wait for it */
822: blr /* Leave... */
823:
824:
825: dbg4byte: mflr r12 /* Save the return */
826:
827: lis r4,HIGH_ADDR(hexTab) /* Point to the top of table */
828: li r6,8 /* Set number of hex digits to dump */
829: ori r4,r4,LOW_ADDR(hexTab) /* Point to the bottom of table */
830:
831: dbgDnext: rlwinm r5,r5,4,0,31 /* Rotate a nybble */
832: subi r6,r6,1 /* Back down the count */
833: rlwinm r3,r5,0,28,31 /* Isolate the last nybble */
834: lbzx r3,r4,r3 /* Convert to ascii */
835: bl dbgDchar /* Print it */
836: mr. r6,r6 /* Any more? */
837: bne+ dbgDnext /* Convert 'em all... */
838:
839: li r3,0x20 /* Space */
840: bl dbgDchar /* Send it */
841: mtlr r12 /* Restore LR */
842: blr /* Return... */
843:
844: /* Write to whichever serial port. Try to leave it clean, but not too hard (this is a hack) */
845:
846: dbgDchar:
847: #if SIMPLESCC && !NOTQUITEASSIMPLE
848: stb r3,0(r10) /* ? */
849: dcbf 0,r10 /* Force it out */
850: sync /* Make sure it's out there */
851:
852: lis r7,3 /* Get enough for about 1ms */
853:
854: dbgDchar0: addi r7,r7,-1 /* Count down */
855: mr. r7,r7 /* Waited long enough? */
856: bgt+ dbgDchar0 /* Nope... */
857: #endif
858: #if NOTQUITEASSIMPLE
859: #if 0
860: li r7,0x01 /* ? */
861: stb r7,0(r10) /* ? */
862: dcbf 0,r10 /* Force it out */
863: sync /* Make sure it's out there */
864: dcbi 0,r10
865: eieio
866:
867: lbz r7,0(r10) /* ? */
868: dcbi 0,r10 /* Force it out */
869: sync /* kill it off */
870: eieio
871:
872: li r7,0x00 /* ? */
873: stb r7,0(r10) /* ? */
874: dcbf 0,r10 /* Force it out */
875: sync /* Make sure it's out there */
876: dcbi 0,r10
877: eieio
878:
879: lbz r7,0(r10) /* ? */
880: dcbi 0,r10 /* Force it out */
881: sync /* kill it off */
882: eieio
883: #endif
884:
885: qrw1: eieio /* Barricade it */
886: lbz r7,0(r10) /* ? */
887: dcbi 0,r10
888: sync
889: andi. r7,r7,0x04 /* ? */
890: beq qrw1 /* Nope... */
891:
892: eieio
893:
894: stb r3,4(r10) /* ? */
895: dcbf 0,r10 /* Force it out */
896: sync /* Make sure it's out there */
897: dcbi 0,r10
898: eieio
899:
900: qrw2: eieio /* Barricade it */
901: lbz r7,0(r10) /* ? */
902: dcbi 0,r10
903: sync
904: andi. r7,r7,0x04 /* ? */
905: beq qrw2 /* Nope... */
906:
907: #if 0
908: eieio
909: li r7,0x10 /* ? */
910: stb r7,0(r10) /* ? */
911: dcbf 0,r10 /* Force it out */
912: sync /* Make sure it's out there */
913: dcbi 0,r10
914: eieio
915:
916: lbz r7,0(r10) /* ? */
917: dcbi 0,r10 /* Force it out */
918: sync /* kill it off */
919: eieio
920: #endif
921:
922: lis r7,0x0080 /* ? */
923: lis r9,0xF300 /* ? */
924: ori r7,r7,0x010F /* ? */
925: stw r7,0x28(r9) /* ? */
926: dcbf 0,r10 /* Force it out */
927: sync /* Make sure it's out there */
928: dcbi 0,r10
929: eieio
930:
931: #endif
932: #if !SIMPLESCC && !NOTQUITEASSIMPLE
933: rlwinm r9,r10,0,0,29 /* Get channel a */
934: eieio /* Barricade it */
935:
936: li r7,0x03 /* ? */
937: stb r7,0(r9) /* ? */
938: eieio /* Barricade it */
939:
940: lbz r7,0(r9) /* ? */
941:
942: eieio /* Barricade it */
943: lbz r7,0(r9) /* ? */
944:
945: dchrw1: eieio /* Barricade it */
946: lbz r7,0(r10) /* ? */
947: andi. r7,r7,0x04 /* ? */
948: beq dchrw1 /* Nope... */
949:
950: stb r3,4(r10) /* ? */
951: sync /* Make sure it's there */
952: eieio /* Don't get confused */
953:
954: dchrw2: eieio /* Barricade it */
955: lbz r7,0(r10) /* ? */
956: andi. r7,r7,0x04 /* ? */
957: beq dchrw2 /* Nope... */
958:
959: eieio /* Avoid confusion */
960: lbz r7,0(r10) /* ? */
961: andi. r7,r7,0x40 /* ? */
962: beq+ nounder /* Nope... */
963:
964: eieio /* Avoid confusion */
965: li r7,0xC0 /* ? */
966: stb r7,0(r10) /* ? */
967:
968: nounder: eieio /* Avoid confusion */
969: li r7,0x10 /* ? */
970: stb r7,0(r10) /* ? */
971:
972: eieio /* Avoid confusion */
973: li r7,0x38 /* ? */
974: stb r7,0(r9) /* ? */
975:
976: eieio /* Avoid confusion */
977: li r7,0x30 /* ? */
978: stb r7,0(r10) /* ? */
979:
980: eieio /* Avoid confusion */
981: li r7,0x20 /* ? */
982: stb r7,0(r10) /* ? */
983: eieio /* Avoid confusion */
984: sync
985:
986: #endif
987: blr /* Return */
988:
989: .globl hexTab
990:
991: #ifdef __ELF__
992: .type hexTab,@object
993: #endif
994:
995: hexTab: STRINGD "0123456789ABCDEF" /* Convert hex numbers to printable hex */
996:
997:
998: /*
999: * Dumps all the registers in the savearea in R13
1000: */
1001:
1002:
1003: ENTRY(dbgRegsLL, TAG_NO_FRAME_USED)
1004:
1005: li r3,0 /* ? */
1006: bl dbgRegsCm /* Join on up... */
1007:
1008: /*
1009: * Note that we bypass the normal return 'cause we don't wanna mess up R3
1010: */
1011: mfsprg r11,0 /* Get the per_proc */
1012: lwz r11,PP_TEMPWORK1(r11) /* Get our return point */
1013: li r3,T_IN_VAIN /* Tell the vector handler that we took care of it */
1014: mtlr r11 /* Set the return */
1015: blr /* Bye, dudes... */
1016:
1017: ENTRY(dbgRegs, TAG_NO_FRAME_USED)
1018:
1019: dbgRegsCm: mfmsr r8 /* Save the MSR */
1020: mr. r3,r3 /* ? */
1021: rlwinm r12,r8,0,28,25 /* Turn off translation */
1022: lis r10,0xF301 /* Set the top part */
1023: rlwinm r12,r12,0,17,15 /* Turn off interruptions */
1024: mtmsr r12 /* Smash the MSR */
1025: isync /* Make it clean */
1026: #if SIMPLESCC && !NOTQUITEASSIMPLE
1027: ori r10,r10,0x3010 /* ? */
1028: #else
1029: ori r10,r10,0x2000 /* ? */
1030: #endif
1031: mflr r11 /* Save the link register */
1032: beq+ dbgDprints /* It sure are... */
1033: #if SIMPLESCC && !NOTQUITEASSIMPLE
1034: ori r10,r10,0x0020 /* ? */
1035: #else
1036: ori r10,r10,0x0002 /* ? */
1037:
1038: dcbf 0,r10 /* Insure it is out */
1039: sync
1040: dcbi 0,r10 /* Toss it */
1041: #if !NOTQUITEASSIMPLE
1042: lis r7,0xF300 /* ? */
1043: ori r7,r7,0x0032 /* ? */
1044: mtdbatl 3,r7 /* ? */
1045: lis r7,0xF300 /* ? */
1046: ori r7,r7,0x0002 /* ? */
1047: mtdbatu 3,r7 /* ? */
1048: ori r12,r12,0x0010 /* ? */
1049: mtmsr r12 /* ? */
1050: isync /* ? */
1051: #endif
1052: #endif
1053:
1054: dbgDprints:
1055: lis r3,HIGH_ADDR(fwdisplock) /* Get the display locker outer */
1056: ori r3,r3,LOW_ADDR(fwdisplock) /* Last part */
1057:
1058: lwarx r5,0,r3 ; ?
1059: ddwait1: lwarx r5,0,r3 /* Get the lock */
1060: mr. r5,r5 /* Is it locked? */
1061: bne- ddwait1 /* Yup... */
1062: stwcx. r3,0,r3 /* Try to get it */
1063: bne- ddwait1 /* Nope, start all over... */
1064:
1065: li r3,0x52 /* Print eyecatcher */
1066: bl dbgDchar /* Send it */
1067: li r3,0x65 /* Print eyecatcher */
1068: bl dbgDchar /* Send it */
1069: li r3,0x67 /* Print eyecatcher */
1070: bl dbgDchar /* Send it */
1071: li r3,0x73 /* Print eyecatcher */
1072: bl dbgDchar /* Send it */
1073: li r3,0x20 /* Print eyecatcher */
1074: bl dbgDchar /* Send it */
1075:
1076: lwz r5,saver0(r13) /* Do register */
1077: bl dbg4byte /* Print */
1078: lwz r5,saver1(r13) /* Do register */
1079: bl dbg4byte /* Print */
1080: lwz r5,saver2(r13) /* Do register */
1081: bl dbg4byte /* Print */
1082: lwz r5,saver3(r13) /* Do register */
1083: bl dbg4byte /* Print */
1084: li r3,0x0A /* Linefeed */
1085: bl dbgDchar /* Send it */
1086: li r3,0x0D /* Carriage return */
1087: bl dbgDchar /* Send it */
1088:
1089: li r3,0x20 /* Print eyecatcher */
1090: bl dbgDchar /* Send it */
1091: li r3,0x20 /* Print eyecatcher */
1092: bl dbgDchar /* Send it */
1093: li r3,0x20 /* Print eyecatcher */
1094: bl dbgDchar /* Send it */
1095: li r3,0x20 /* Print eyecatcher */
1096: bl dbgDchar /* Send it */
1097: li r3,0x20 /* Print eyecatcher */
1098: bl dbgDchar /* Send it */
1099: lwz r5,saver4(r13) /* Do register */
1100: bl dbg4byte /* Print */
1101: lwz r5,saver5(r13) /* Do register */
1102: bl dbg4byte /* Print */
1103: lwz r5,saver6(r13) /* Do register */
1104: bl dbg4byte /* Print */
1105: lwz r5,saver7(r13) /* Do register */
1106: bl dbg4byte /* Print */
1107: li r3,0x0A /* Linefeed */
1108: bl dbgDchar /* Send it */
1109: li r3,0x0D /* Carriage return */
1110: bl dbgDchar /* Send it */
1111:
1112: li r3,0x20 /* Print eyecatcher */
1113: bl dbgDchar /* Send it */
1114: li r3,0x20 /* Print eyecatcher */
1115: bl dbgDchar /* Send it */
1116: li r3,0x20 /* Print eyecatcher */
1117: bl dbgDchar /* Send it */
1118: li r3,0x20 /* Print eyecatcher */
1119: bl dbgDchar /* Send it */
1120: li r3,0x20 /* Print eyecatcher */
1121: bl dbgDchar /* Send it */
1122: lwz r5,saver8(r13) /* Do register */
1123: bl dbg4byte /* Print */
1124: lwz r5,saver9(r13) /* Do register */
1125: bl dbg4byte /* Print */
1126: lwz r5,saver10(r13) /* Do register */
1127: bl dbg4byte /* Print */
1128: lwz r5,saver11(r13) /* Do register */
1129: bl dbg4byte /* Print */
1130: li r3,0x0A /* Linefeed */
1131: bl dbgDchar /* Send it */
1132: li r3,0x0D /* Carriage return */
1133: bl dbgDchar /* Send it */
1134:
1135: li r3,0x20 /* Print eyecatcher */
1136: bl dbgDchar /* Send it */
1137: li r3,0x20 /* Print eyecatcher */
1138: bl dbgDchar /* Send it */
1139: li r3,0x20 /* Print eyecatcher */
1140: bl dbgDchar /* Send it */
1141: li r3,0x20 /* Print eyecatcher */
1142: bl dbgDchar /* Send it */
1143: li r3,0x20 /* Print eyecatcher */
1144: bl dbgDchar /* Send it */
1145: lwz r5,saver12(r13) /* Do register */
1146: bl dbg4byte /* Print */
1147: lwz r5,saver13(r13) /* Do register */
1148: bl dbg4byte /* Print */
1149: lwz r5,saver14(r13) /* Do register */
1150: bl dbg4byte /* Print */
1151: lwz r5,saver15(r13) /* Do register */
1152: bl dbg4byte /* Print */
1153: li r3,0x0A /* Linefeed */
1154: bl dbgDchar /* Send it */
1155: li r3,0x0D /* Carriage return */
1156: bl dbgDchar /* Send it */
1157:
1158: li r3,0x20 /* Print eyecatcher */
1159: bl dbgDchar /* Send it */
1160: li r3,0x20 /* Print eyecatcher */
1161: bl dbgDchar /* Send it */
1162: li r3,0x20 /* Print eyecatcher */
1163: bl dbgDchar /* Send it */
1164: li r3,0x20 /* Print eyecatcher */
1165: bl dbgDchar /* Send it */
1166: li r3,0x20 /* Print eyecatcher */
1167: bl dbgDchar /* Send it */
1168: lwz r5,saver16(r13) /* Do register */
1169: bl dbg4byte /* Print */
1170: lwz r5,saver17(r13) /* Do register */
1171: bl dbg4byte /* Print */
1172: lwz r5,saver18(r13) /* Do register */
1173: bl dbg4byte /* Print */
1174: lwz r5,saver19(r13) /* Do register */
1175: bl dbg4byte /* Print */
1176: li r3,0x0A /* Linefeed */
1177: bl dbgDchar /* Send it */
1178: li r3,0x0D /* Carriage return */
1179: bl dbgDchar /* Send it */
1180:
1181: li r3,0x20 /* Print eyecatcher */
1182: bl dbgDchar /* Send it */
1183: li r3,0x20 /* Print eyecatcher */
1184: bl dbgDchar /* Send it */
1185: li r3,0x20 /* Print eyecatcher */
1186: bl dbgDchar /* Send it */
1187: li r3,0x20 /* Print eyecatcher */
1188: bl dbgDchar /* Send it */
1189: li r3,0x20 /* Print eyecatcher */
1190: bl dbgDchar /* Send it */
1191: lwz r5,saver20(r13) /* Do register */
1192: bl dbg4byte /* Print */
1193: lwz r5,saver21(r13) /* Do register */
1194: bl dbg4byte /* Print */
1195: lwz r5,saver22(r13) /* Do register */
1196: bl dbg4byte /* Print */
1197: lwz r5,saver23(r13) /* Do register */
1198: bl dbg4byte /* Print */
1199: li r3,0x0A /* Linefeed */
1200: bl dbgDchar /* Send it */
1201: li r3,0x0D /* Carriage return */
1202: bl dbgDchar /* Send it */
1203:
1204: li r3,0x20 /* Print eyecatcher */
1205: bl dbgDchar /* Send it */
1206: li r3,0x20 /* Print eyecatcher */
1207: bl dbgDchar /* Send it */
1208: li r3,0x20 /* Print eyecatcher */
1209: bl dbgDchar /* Send it */
1210: li r3,0x20 /* Print eyecatcher */
1211: bl dbgDchar /* Send it */
1212: li r3,0x20 /* Print eyecatcher */
1213: bl dbgDchar /* Send it */
1214: lwz r5,saver24(r13) /* Do register */
1215: bl dbg4byte /* Print */
1216: lwz r5,saver25(r13) /* Do register */
1217: bl dbg4byte /* Print */
1218: lwz r5,saver26(r13) /* Do register */
1219: bl dbg4byte /* Print */
1220: lwz r5,saver27(r13) /* Do register */
1221: bl dbg4byte /* Print */
1222: li r3,0x0A /* Linefeed */
1223: bl dbgDchar /* Send it */
1224: li r3,0x0D /* Carriage return */
1225: bl dbgDchar /* Send it */
1226:
1227: li r3,0x20 /* Print eyecatcher */
1228: bl dbgDchar /* Send it */
1229: li r3,0x20 /* Print eyecatcher */
1230: bl dbgDchar /* Send it */
1231: li r3,0x20 /* Print eyecatcher */
1232: bl dbgDchar /* Send it */
1233: li r3,0x20 /* Print eyecatcher */
1234: bl dbgDchar /* Send it */
1235: li r3,0x20 /* Print eyecatcher */
1236: bl dbgDchar /* Send it */
1237: lwz r5,saver28(r13) /* Do register */
1238: bl dbg4byte /* Print */
1239: lwz r5,saver29(r13) /* Do register */
1240: bl dbg4byte /* Print */
1241: lwz r5,saver30(r13) /* Do register */
1242: bl dbg4byte /* Print */
1243: lwz r5,saver31(r13) /* Do register */
1244: bl dbg4byte /* Print */
1245: li r3,0x0A /* Linefeed */
1246: bl dbgDchar /* Send it */
1247: li r3,0x0D /* Carriage return */
1248: bl dbgDchar /* Send it */
1249:
1250: /* Segment registers */
1251:
1252: li r3,0x53 /* Print eyecatcher */
1253: bl dbgDchar /* Send it */
1254: li r3,0x65 /* Print eyecatcher */
1255: bl dbgDchar /* Send it */
1256: li r3,0x67 /* Print eyecatcher */
1257: bl dbgDchar /* Send it */
1258: li r3,0x73 /* Print eyecatcher */
1259: bl dbgDchar /* Send it */
1260: li r3,0x20 /* Print eyecatcher */
1261: bl dbgDchar /* Send it */
1262:
1263: lwz r5,savesr0(r13) /* Do register */
1264: bl dbg4byte /* Print */
1265: lwz r5,savesr1(r13) /* Do register */
1266: bl dbg4byte /* Print */
1267: lwz r5,savesr2(r13) /* Do register */
1268: bl dbg4byte /* Print */
1269: lwz r5,savesr3(r13) /* Do register */
1270: bl dbg4byte /* Print */
1271: li r3,0x0A /* Linefeed */
1272: bl dbgDchar /* Send it */
1273: li r3,0x0D /* Carriage return */
1274: bl dbgDchar /* Send it */
1275:
1276: li r3,0x20 /* Print eyecatcher */
1277: bl dbgDchar /* Send it */
1278: li r3,0x20 /* Print eyecatcher */
1279: bl dbgDchar /* Send it */
1280: li r3,0x20 /* Print eyecatcher */
1281: bl dbgDchar /* Send it */
1282: li r3,0x20 /* Print eyecatcher */
1283: bl dbgDchar /* Send it */
1284: li r3,0x20 /* Print eyecatcher */
1285: bl dbgDchar /* Send it */
1286: lwz r5,savesr4(r13) /* Do register */
1287: bl dbg4byte /* Print */
1288: lwz r5,savesr5(r13) /* Do register */
1289: bl dbg4byte /* Print */
1290: lwz r5,savesr6(r13) /* Do register */
1291: bl dbg4byte /* Print */
1292: lwz r5,savesr7(r13) /* Do register */
1293: bl dbg4byte /* Print */
1294: li r3,0x0A /* Linefeed */
1295: bl dbgDchar /* Send it */
1296: li r3,0x0D /* Carriage return */
1297: bl dbgDchar /* Send it */
1298:
1299: li r3,0x20 /* Print eyecatcher */
1300: bl dbgDchar /* Send it */
1301: li r3,0x20 /* Print eyecatcher */
1302: bl dbgDchar /* Send it */
1303: li r3,0x20 /* Print eyecatcher */
1304: bl dbgDchar /* Send it */
1305: li r3,0x20 /* Print eyecatcher */
1306: bl dbgDchar /* Send it */
1307: li r3,0x20 /* Print eyecatcher */
1308: bl dbgDchar /* Send it */
1309: lwz r5,savesr8(r13) /* Do register */
1310: bl dbg4byte /* Print */
1311: lwz r5,savesr9(r13) /* Do register */
1312: bl dbg4byte /* Print */
1313: lwz r5,savesr10(r13) /* Do register */
1314: bl dbg4byte /* Print */
1315: lwz r5,savesr11(r13) /* Do register */
1316: bl dbg4byte /* Print */
1317: li r3,0x0A /* Linefeed */
1318: bl dbgDchar /* Send it */
1319: li r3,0x0D /* Carriage return */
1320: bl dbgDchar /* Send it */
1321:
1322: li r3,0x20 /* Print eyecatcher */
1323: bl dbgDchar /* Send it */
1324: li r3,0x20 /* Print eyecatcher */
1325: bl dbgDchar /* Send it */
1326: li r3,0x20 /* Print eyecatcher */
1327: bl dbgDchar /* Send it */
1328: li r3,0x20 /* Print eyecatcher */
1329: bl dbgDchar /* Send it */
1330: li r3,0x20 /* Print eyecatcher */
1331: bl dbgDchar /* Send it */
1332: lwz r5,savesr12(r13) /* Do register */
1333: bl dbg4byte /* Print */
1334: lwz r5,savesr13(r13) /* Do register */
1335: bl dbg4byte /* Print */
1336: lwz r5,savesr14(r13) /* Do register */
1337: bl dbg4byte /* Print */
1338: lwz r5,savesr15(r13) /* Do register */
1339: bl dbg4byte /* Print */
1340: li r3,0x0A /* Linefeed */
1341: bl dbgDchar /* Send it */
1342: li r3,0x0D /* Carriage return */
1343: bl dbgDchar /* Send it */
1344:
1345: li r3,0x30 /* Print eyecatcher */
1346: bl dbgDchar /* Send it */
1347: li r3,0x31 /* Print eyecatcher */
1348: bl dbgDchar /* Send it */
1349: li r3,0x64 /* Print eyecatcher */
1350: bl dbgDchar /* Send it */
1351: li r3,0x64 /* Print eyecatcher */
1352: bl dbgDchar /* Send it */
1353: li r3,0x20 /* Print eyecatcher */
1354: bl dbgDchar /* Send it */
1355: lwz r5,savesrr0(r13) /* Do register */
1356: bl dbg4byte /* Print */
1357: lwz r5,savesrr1(r13) /* Do register */
1358: bl dbg4byte /* Print */
1359: lwz r5,savedar(r13) /* Do register */
1360: bl dbg4byte /* Print */
1361: lwz r5,savedsisr(r13) /* Do register */
1362: bl dbg4byte /* Print */
1363: li r3,0x0A /* Linefeed */
1364: bl dbgDchar /* Send it */
1365: li r3,0x0D /* Carriage return */
1366: bl dbgDchar /* Send it */
1367:
1368: li r3,0x20 /* Print eyecatcher */
1369: bl dbgDchar /* Send it */
1370: li r3,0x6C /* Print eyecatcher */
1371: bl dbgDchar /* Send it */
1372: li r3,0x63 /* Print eyecatcher */
1373: bl dbgDchar /* Send it */
1374: li r3,0x63 /* Print eyecatcher */
1375: bl dbgDchar /* Send it */
1376: li r3,0x20 /* Print eyecatcher */
1377: bl dbgDchar /* Send it */
1378: lwz r5,savelr(r13) /* Do register */
1379: bl dbg4byte /* Print */
1380: lwz r5,savecr(r13) /* Do register */
1381: bl dbg4byte /* Print */
1382: lwz r5,savectr(r13) /* Do register */
1383: bl dbg4byte /* Print */
1384: li r3,0x0A /* Linefeed */
1385: bl dbgDchar /* Send it */
1386: li r3,0x0D /* Carriage return */
1387: bl dbgDchar /* Send it */
1388: mtlr r11 /* Get back the return */
1389: dcbi 0,r10 /* ? */
1390: #if !SIMPLESCC && !NOTQUITEASSIMPLE
1391: li r7,0 /* Get a zero */
1392: mtdbatu 3,r7 /* Invalidate DBAT 3 upper */
1393: mtdbatl 3,r7 /* Invalidate DBAT 3 lower */
1394: #endif
1395: lis r3,HIGH_ADDR(fwdisplock) /* Get the display locker outer */
1396: li r7,0 /* Get a zero */
1397: ori r3,r3,LOW_ADDR(fwdisplock) /* Last part */
1398: stw r7,0(r3) /* Clear display lock */
1399: mtmsr r8 /* Restore the MSR */
1400: isync /* Wait for it */
1401: blr /* Leave... */
1402:
1403:
1404: /*
1405: * Used for debugging to leave stuff in 0x380-0x3FF (128 bytes).
1406: * Mapping is V=R. Stores and loads are real.
1407: */
1408:
1409: ENTRY(dbgCkpt, TAG_NO_FRAME_USED)
1410:
1411: mr r12,r0 /* Keep R0 pristene */
1412: lis r0,HIGH_ADDR(dbgCkptCall) /* Top half of dbgCkptCall firmware call number */
1413: ori r0,r0,LOW_ADDR(dbgCkptCall) /* Bottom half */
1414:
1415: sc /* Go stash the stuff */
1416:
1417: mr r0,r12 /* Restore R0 */
1418: blr /* Return... */
1419:
1420: /* Here's the low-level part of dbgCkpt */
1421:
1422: ENTRY(dbgCkptLL, TAG_NO_FRAME_USED)
1423:
1424: li r12,0x380 /* Point to output area */
1425: li r1,32 /* Get line size */
1426: dcbz 0,r12 /* Make sure we don't fetch a cache line */
1427:
1428: lwz r4,0x00(r3) /* Load up storage to checkpoint */
1429:
1430: dcbt r1,r3 /* Start in the next line */
1431:
1432: lwz r5,0x04(r3) /* Load up storage to checkpoint */
1433: lwz r6,0x08(r3) /* Load up storage to checkpoint */
1434: lwz r7,0x0C(r3) /* Load up storage to checkpoint */
1435: lwz r8,0x10(r3) /* Load up storage to checkpoint */
1436: lwz r9,0x14(r3) /* Load up storage to checkpoint */
1437: lwz r10,0x18(r3) /* Load up storage to checkpoint */
1438: lwz r11,0x1C(r3) /* Load up storage to checkpoint */
1439:
1440: add r3,r3,r1 /* Bump input */
1441:
1442: stw r4,0x00(r12) /* Store it */
1443: stw r5,0x04(r12) /* Store it */
1444: stw r6,0x08(r12) /* Store it */
1445: stw r7,0x0C(r12) /* Store it */
1446: stw r8,0x10(r12) /* Store it */
1447: stw r9,0x14(r12) /* Store it */
1448: stw r10,0x18(r12) /* Store it */
1449: stw r11,0x1C(r12) /* Store it */
1450:
1451: dcbz r1,r12 /* Clear the next line */
1452: add r12,r12,r1 /* Point to next output line */
1453:
1454: lwz r4,0x00(r3) /* Load up storage to checkpoint */
1455: lwz r5,0x04(r3) /* Load up storage to checkpoint */
1456: lwz r6,0x08(r3) /* Load up storage to checkpoint */
1457: lwz r7,0x0C(r3) /* Load up storage to checkpoint */
1458: lwz r8,0x10(r3) /* Load up storage to checkpoint */
1459: lwz r9,0x14(r3) /* Load up storage to checkpoint */
1460: lwz r10,0x18(r3) /* Load up storage to checkpoint */
1461: lwz r11,0x1C(r3) /* Load up storage to checkpoint */
1462:
1463: dcbt r1,r3 /* Touch the next line */
1464: add r3,r3,r1 /* Point to next input line */
1465:
1466: stw r4,0x00(r12) /* Store it */
1467: stw r5,0x04(r12) /* Store it */
1468: stw r6,0x08(r12) /* Store it */
1469: stw r7,0x0C(r12) /* Store it */
1470: stw r8,0x10(r12) /* Store it */
1471: stw r9,0x14(r12) /* Store it */
1472: stw r10,0x18(r12) /* Store it */
1473: stw r11,0x1C(r12) /* Store it */
1474:
1475: dcbz r1,r12 /* Clear the next line */
1476: add r12,r12,r1 /* Point to next output line */
1477:
1478: lwz r4,0x00(r3) /* Load up storage to checkpoint */
1479: lwz r5,0x04(r3) /* Load up storage to checkpoint */
1480: lwz r6,0x08(r3) /* Load up storage to checkpoint */
1481: lwz r7,0x0C(r3) /* Load up storage to checkpoint */
1482: lwz r8,0x10(r3) /* Load up storage to checkpoint */
1483: lwz r9,0x14(r3) /* Load up storage to checkpoint */
1484: lwz r10,0x18(r3) /* Load up storage to checkpoint */
1485: lwz r11,0x1C(r3) /* Load up storage to checkpoint */
1486:
1487: dcbt r1,r3 /* Touch the next line */
1488: add r3,r3,r1 /* Point to next input line */
1489:
1490: stw r4,0x00(r12) /* Store it */
1491: stw r5,0x04(r12) /* Store it */
1492: stw r6,0x08(r12) /* Store it */
1493: stw r7,0x0C(r12) /* Store it */
1494: stw r8,0x10(r12) /* Store it */
1495: stw r9,0x14(r12) /* Store it */
1496: stw r10,0x18(r12) /* Store it */
1497: stw r11,0x1C(r12) /* Store it */
1498:
1499: dcbz r1,r12 /* Clear the next line */
1500: add r12,r12,r1 /* Point to next output line */
1501:
1502: lwz r4,0x00(r3) /* Load up storage to checkpoint */
1503: lwz r5,0x04(r3) /* Load up storage to checkpoint */
1504: lwz r6,0x08(r3) /* Load up storage to checkpoint */
1505: lwz r7,0x0C(r3) /* Load up storage to checkpoint */
1506: lwz r8,0x10(r3) /* Load up storage to checkpoint */
1507: lwz r9,0x14(r3) /* Load up storage to checkpoint */
1508: lwz r10,0x18(r3) /* Load up storage to checkpoint */
1509: lwz r11,0x1C(r3) /* Load up storage to checkpoint */
1510:
1511: stw r4,0x00(r12) /* Store it */
1512: stw r5,0x04(r12) /* Store it */
1513: stw r6,0x08(r12) /* Store it */
1514: stw r7,0x0C(r12) /* Store it */
1515: stw r8,0x10(r12) /* Store it */
1516: stw r9,0x14(r12) /* Store it */
1517: stw r10,0x18(r12) /* Store it */
1518: stw r11,0x1C(r12) /* Store it */
1519:
1520: blr
1521:
1522:
1523: /*
1524: * Do Preemption. Forces a T_PREEMPT trap to allow a preemption to occur.
1525: */
1526:
1527: ENTRY(DoPreemptLL, TAG_NO_FRAME_USED)
1528:
1529: mfsprg r11,0 /* Get the per_proc address */
1530: lwz r11,PP_TEMPWORK1(r11) /* Restore the return address */
1531: li r3,T_PREEMPT /* Set preemption interrupt value */
1532: mtlr r11 /* Restore the LR */
1533: stw r3,saveexception(r13) /* Modify the exception type to preemption */
1534: blr /* Return to interrupt handler */
1535:
1536:
1537: /*
1538: * Force 'rupt handler to dispatch with new context
1539: * R3 at the call contains the new savearea.
1540: * R4 at the call contains a return code to pass back in R3.
1541: * Forces a T_CSWITCH
1542: */
1543:
1544: ENTRY(SwitchContextLL, TAG_NO_FRAME_USED)
1545:
1546: mfsprg r11,0 /* Get the per_proc address */
1547: lwz r11,PP_TEMPWORK1(r11) /* Restore the return address */
1548: li r3,T_CSWITCH /* Set context switch value */
1549: mtlr r11 /* Restore the LR */
1550: stw r3,saveexception(r13) /* Modify the exception type to switch context */
1551: blr /* Return to interrupt handler */
1552:
1553:
1554: /*
1555: * Create a fake I/O 'rupt.
1556: * Forces a T_INTERRUPT trap to pretend that an actual I/O interrupt occurred.
1557: */
1558:
1559: ENTRY(CreateFakeIOLL, TAG_NO_FRAME_USED)
1560:
1561: mfsprg r11,0 /* Get the per_proc address */
1562: lwz r11,PP_TEMPWORK1(r11) /* Restore the return address */
1563: li r3,T_INTERRUPT /* Set external interrupt value */
1564: mtlr r11 /* Restore the LR */
1565: stw r3,saveexception(r13) /* Modify the exception type to external */
1566: blr /* Return to interrupt handler */
1567:
1568: /*
1569: * Create a fake decrementer 'rupt.
1570: * Forces a T_DECREMENTER trap to pretend that an actual decrementer interrupt occurred.
1571: */
1572:
1573: ENTRY(CreateFakeDECLL, TAG_NO_FRAME_USED)
1574:
1575: mfsprg r11,0 /* Get the per_proc address */
1576: lwz r11,PP_TEMPWORK1(r11) /* Restore the return address */
1577: li r3,T_DECREMENTER /* Set decrementer interrupt value */
1578: mtlr r11 /* Restore the LR */
1579: stw r3,saveexception(r13) /* Modify the exception type to external */
1580: blr /* Return to interrupt handler */
1581:
1582: /*
1583: * Choke the system. This is just a dummy for now,
1584: * but we'll eventually do something.
1585: */
1586:
1587: ENTRY(DoChokeLL, TAG_NO_FRAME_USED)
1588:
1589: BREAKPOINT_TRAP /* Dummy for now */
1590:
1591: /*
1592: * Set the low level trace flags
1593: */
1594:
1595: ENTRY(LLTraceSet, TAG_NO_FRAME_USED)
1596:
1597: mfmsr r12 /* Get the MSR */
1598: mr r4,r3 /* Save the new value */
1599: andi. r11,r12,0x01C0 /* Clear interrupts and translation */
1600: mtmsr r11 /* Set 'em all off */
1601: isync
1602:
1603: lwz r3,0x180(br0) /* Get the old trace flags to pass back */
1604: stw r4,0x180(br0) /* Replace with the new ones */
1605:
1606: mtmsr r12 /* Restore the MSR */
1607: isync
1608:
1609: blr /* Leave... */
1610:
1611: #if 1
1612:
1613: /*
1614: ; ***************************************************************************
1615: ;
1616: ; ----------------- Grateful Deb ----------------
1617: ;
1618: ; Debugging: direct draw into main screen menu bar
1619: ;
1620: ; Takes R4 value, converts it to hex characters and displays it.
1621: ;
1622: ; Gotta make sure the DCBST is done to force the pixels from the cache.
1623: ;
1624: ; Position is taken as column, row (0 based) from R3.
1625: ; Characters are from hexfont, and are 16x16 pixels.
1626: ;
1627: ; Only works with two processors so far
1628: ;
1629: ;
1630: ; ***************************************************************************
1631: */
1632:
1633: #define GDfromright 20
1634: #define GDfontsize 16
1635:
1636: ENTRY(GratefulDeb,TAG_NO_FRAME_USED)
1637: mfspr r6,pir /* Get the PIR */
1638: lis r5,HIGH_ADDR(EXT(GratefulDebWork)) /* Point to our work area */
1639: rlwinm r6,r6,8,23,23 /* Get part of the offset to our processors area */
1640: ori r5,r5,LOW_ADDR(EXT(GratefulDebWork)) /* Start building the address */
1641: rlwimi r6,r6,2,21,21 /* Get the rest of the offset to our processors area */
1642: add r6,r6,r5 /* Point at our CPU's work area */
1643: mfmsr r5 /* Get that MSR */
1644: stmw r0,GDsave(r6) /* Save all registers */
1645: lwz r10,GDready(r6) /* See if we're all ready to go */
1646: ori r0,r5,0x2000 /* Turn on the floating point */
1647: mr r31,r6 /* Get a more sane base register */
1648: mr. r10,r10 /* Are we all set? */
1649: mtmsr r0 /* Enable floating point */
1650: isync
1651:
1652: stfd f0,GDfp0(r31) /* Save FP */
1653: stfd f1,GDfp1(r31) /* Save FP */
1654: stfd f2,GDfp2(r31) /* Save FP */
1655: stfd f3,GDfp3(r31) /* Save FP */
1656:
1657: beq- GDbailout /* Go and bail... */
1658:
1659: rlwinm r25,r3,0,16,31 /* Isolate just the row number */
1660: lwz r28,GDtopleft(r31) /* Get the physical address of our line 0 */
1661: rlwinm r3,r3,16,16,31 /* Isolate the column number */
1662: lwz r27,GDrowbytes(r31) /* Get the number of bytes per row */
1663: lwz r9,GDrowchar(r31) /* Get the number of bytes per row of full leaded charactrers */
1664: lwz r26,GDdepth(r31) /* Get the bit depth */
1665: mullw r25,r25,r9 /* get offset to the row to write in bytes */
1666: lwz r24,GDcollgn(r31) /* Get the size of columns in bytes */
1667: add r25,r28,r25 /* Physical address of row */
1668: mullw r3,r3,r24 /* Get byte offset to first output column */
1669:
1670: li r9,32 /* Get the initial shift calc */
1671:
1672: lis r20,HIGH_ADDR(hexfont) /* Point to the font */
1673:
1674: li r18,GDfontsize /* Get the number of rows in the font */
1675: ori r20,r20,LOW_ADDR(hexfont) /* Point to the low part */
1676: add r21,r25,r3 /* Physical address of top left output pixel */
1677: sub r9,r9,r26 /* Get right shift justifier for pixel size */
1678: li r7,32 /* Number of bits per word */
1679:
1680: startNybble:
1681: la r6,GDrowbuf1(r31) /* Point to the row buffer */
1682: li r19,8 /* Get the number of characters in a row */
1683:
1684: getNybble: rlwinm r10,r4,9,23,26 /* Get the top nybble * 32 */
1685: rlwinm r4,r4,4,0,31 /* Rotate a nybble */
1686: add r10,r20,r10 /* Point to the character in the font */
1687:
1688: rlwinm r16,r26,4,0,27 /* Width of row in actual bits */
1689: lhz r15,0(r10) /* Get the next row of the font */
1690:
1691: rendrow: rlwinm r17,r15,16,0,0 /* Get the next font pixel in the row */
1692: rlwinm r15,r15,1,16,31 /* Move in the next font pixel */
1693: srawi r17,r17,31 /* Fill with 1s if black and 0s if white (reversed) */
1694:
1695: slw r14,r14,r26 /* Make room for our pixel in a register */
1696: srw r17,r17,r9 /* Isolate one pixels worth of black or white */
1697: sub. r7,r7,r26 /* See how may bits are left */
1698: sub r16,r16,r26 /* Count how many bits are left to store for this row */
1699: or r14,r14,r17 /* Put in the pixel */
1700: bne+ notfull /* Finish rendering this word */
1701:
1702: not r14,r14 /* Invert to black on white */
1703: stw r14,0(r6) /* Write out the word */
1704: li r7,32 /* Bit per word count */
1705: addi r6,r6,4 /* Point to the next word */
1706:
1707: notfull: mr. r16,r16 /* Have we finished the whole character row? */
1708: bne+ rendrow /* Finish rendering the row */
1709:
1710: addic. r19,r19,-1 /* Are we finished with a whole display row yet? */
1711: bne+ getNybble /* Not yet... */
1712:
1713: la r6,GDrowbuf1(r31) /* Point to the row buffer */
1714: rlwinm r19,r26,31,0,29 /* Number of cache lines (depth/2) */
1715: mr r14,r21 /* Get the frame buffer address */
1716:
1717: // BREAKPOINT_TRAP
1718:
1719: blitrow: lfd f0,0(r6) /* Load a line */
1720: lfd f1,8(r6)
1721: lfd f2,16(r6)
1722: lfd f3,24(r6)
1723:
1724: stfd f0,0(r14) /* Blit a line */
1725: stfd f1,8(r14)
1726: stfd f2,16(r14)
1727: stfd f3,24(r14)
1728:
1729: addi r6,r6,32 /* Next buffered line */
1730:
1731: dcbst 0,r14 /* Force the line to the screen */
1732: sync /* Make sure the line is on it's way */
1733: eieio /* Make sure we beat the invalidate */
1734: dcbi 0,r14 /* Make sure we leave no paradox */
1735:
1736: addic. r19,r19,-1 /* Done all lines yet? */
1737: addi r14,r14,32 /* Point to the next output */
1738: bne+ blitrow /* Nope, do it some more... */
1739:
1740: addic. r18,r18,-1 /* Have we done all the rows in character yet? */
1741: addi r20,r20,2 /* Offset the font to the next row */
1742: add r21,r21,r27 /* Point to start of next row */
1743: bne+ startNybble /* Nope, go through the word one more time... */
1744:
1745: GDbailout: mr r1,r31 /* Move the workarea base */
1746:
1747: lfd f0,GDfp0(r31) /* Restore FP */
1748: lfd f1,GDfp1(r31) /* Restore FP */
1749: lfd f2,GDfp2(r31) /* Restore FP */
1750: lfd f3,GDfp3(r31) /* Restore FP */
1751:
1752: mtmsr r5 /* Disable floating point */
1753: isync
1754:
1755: lmw r3,GDsave+12(r1) /* Restore most registers */
1756: lwz r0,GDsave(r1) /* Restore R0 */
1757: lwz r1,GDsave+4(r1) /* Finally, R1 */
1758: blr /* Leave... */
1759:
1760:
1761: /*
1762: * void GratefulDebDisp(unsigned int coord, unsigned int data);
1763: */
1764:
1765:
1766: ENTRY(GratefulDebDisp,TAG_NO_FRAME_USED)
1767:
1768: mfmsr r9 /* Save the current MSR */
1769: mflr r7 /* Save the return */
1770: andi. r8,r9,0x7FCF /* Clear interrupt and translation */
1771: mtmsr r8 /* Turn 'em really off */
1772: isync /* Make sure about the translation part */
1773: bl EXT(GratefulDeb) /* Display it */
1774: mtmsr r9 /* Restore interrupt and translation */
1775: mtlr r7 /* Restore return */
1776: isync /* Make sure */
1777: blr
1778:
1779:
1780: #endif
1781:
1782: /*
1783: * void checkNMI(void);
1784: */
1785:
1786:
1787: ENTRY(checkNMI,TAG_NO_FRAME_USED)
1788:
1789: mfmsr r9 /* Save it */
1790: andi. r8,r9,0x7FCF /* Clear it */
1791: mtmsr r8 /* Disable it */
1792: isync /* Fence it */
1793: lis r7,0xF300 /* Find it */
1794: ori r7,r7,0x0020 /* Find it */
1795: dcbi 0,r7 /* Toss it */
1796: sync /* Sync it */
1797: eieio /* Get it */
1798: lwz r6,0x000C(r7) /* Check it */
1799: eieio /* Fence it */
1800: dcbi 0,r7 /* Toss it */
1801: rlwinm. r4,r6,0,19,19 /* Check it */
1802: rlwinm r6,r6,0,20,18 /* Clear it */
1803: sync /* Sync it */
1804: eieio /* Fence it */
1805: beq+ xnonmi /* Branch on it */
1806:
1807: stw r6,0x0008(r7) /* Reset it */
1808: sync /* Sync it */
1809: dcbi 0,r6 /* Toss it */
1810: eieio /* Fence it */
1811:
1812: mtmsr r9 /* Restore it */
1813: isync /* Hold it */
1814:
1815: BREAKPOINT_TRAP /* Kill it */
1816: blr /* Return from it */
1817:
1818: xnonmi: /* Label it */
1819: mtmsr r9 /* Restore it */
1820: isync /* Hold it */
1821: blr /* Return from it */
1822:
1823:
1824: /*
1825: * Early debug code
1826: */
1827:
1828: dumpr7: lis r9,HIGH_ADDR(hexTab) /* (TEST/DEBUG) */
1829: li r5,8 /* (TEST/DEBUG) */
1830: ori r9,r9,LOW_ADDR(hexTab) /* (TEST/DEBUG) */
1831:
1832: dumpr7n: rlwinm r7,r7,4,0,31 /* (TEST/DEBUG) */
1833: mr r6,r7 /* (TEST/DEBUG) */
1834: andi. r6,r6,15 /* (TEST/DEBUG) */
1835: lbzx r6,r9,r6 /* (TEST/DEBUG) */
1836: lis r10,0xF301 /* (TEST/DEBUG) */
1837: ori r10,r10,0x2000 /* (TEST/DEBUG) */
1838:
1839: #if 0
1840: xqrw2: eieio /* (TEST/DEBUG) */
1841: lbz r7,0(r10) /* (TEST/DEBUG) */
1842: dcbi 0,r10 /* (TEST/DEBUG) */
1843: sync /* (TEST/DEBUG) */
1844: andi. r7,r7,0x04 /* (TEST/DEBUG) */
1845: beq xqrw2 /* (TEST/DEBUG) */
1846: #endif
1847:
1848: dcbf 0,r10 /* (TEST/DEBUG) */
1849: sync /* (TEST/DEBUG) */
1850: dcbi 0,r10 /* (TEST/DEBUG) */
1851: eieio /* (TEST/DEBUG) */
1852: stb r6,4(r10) /* (TEST/DEBUG) */
1853:
1854: lis r6,10 /* (TEST/DEBUG) */
1855: dumpr7d: addi r6,r6,-1 /* (TEST/DEBUG) */
1856: mr. r6,r6 /* (TEST/DEBUG) */
1857: bne- dumpr7d /* (TEST/DEBUG) */
1858: dcbf 0,r10 /* (TEST/DEBUG) */
1859: sync /* (TEST/DEBUG) */
1860: dcbi 0,r10 /* (TEST/DEBUG) */
1861: eieio /* (TEST/DEBUG) */
1862:
1863: addic. r5,r5,-1 /* (TEST/DEBUG) */
1864: bne+ dumpr7n /* (TEST/DEBUG) */
1865:
1866: blr /* (TEST/DEBUG) */
1867:
1868: ;
1869: ; Log a special entry in physical memory.
1870: ; This assumes that memory size has been significantly lowered using
1871: ; the maxmem boot option. The buffer starts just after the end of mem_size.
1872: ;
1873: ; This is absolutely for special tracing cases. Do not ever leave in...
1874: ;
1875:
1876: ENTRY(dbgLog,TAG_NO_FRAME_USED)
1877:
1878: li r11,0 ; Clear callers callers callers return
1879: li r10,0 ; Clear callers callers callers callers return
1880: li r9,0 ; Clear callers callers callers callers callers return
1881: lwz r2,0(r1) ; Get callers callers stack frame
1882: lis r0,0x4000 ; First invalid address
1883: lwz r12,8(r2) ; Get our callers return
1884: lwz r2,0(r2) ; Back chain
1885:
1886: mr. r2,r2 ; End of chain?
1887: cmplw cr1,r2,r0 ; Valid kernel address?
1888: beq- nosavehere ; Yes, end of chain...
1889: bge- cr1,nosavehere ; No...
1890: lwz r11,8(r2) ; Get our callers return
1891: lwz r2,0(r2) ; Back chain
1892:
1893: mr. r2,r2 ; End of chain?
1894: cmplw cr1,r2,r0 ; Valid kernel address?
1895: beq- nosavehere ; Yes, end of chain...
1896: bge- cr1,nosavehere ; No...
1897: lwz r10,8(r2) ; Get our callers return
1898: lwz r2,0(r2) ; Back chain
1899:
1900: mr. r2,r2 ; End of chain?
1901: cmplw cr1,r2,r0 ; Valid kernel address?
1902: beq- nosavehere ; Yes, end of chain...
1903: bge- cr1,nosavehere ; No...
1904: lwz r9,8(r2) ; Get our callers return
1905:
1906: nosavehere: mfmsr r8 ; Get the MSR
1907: lis r2,hi16(EXT(DebugWork)) ; High part of area
1908: lis r7,hi16(EXT(mem_actual)) ; High part of actual
1909: andi. r0,r8,0x7FCF ; Interrupts and translation off
1910: ori r2,r2,lo16(EXT(DebugWork)) ; Get the entry
1911: mtmsr r0 ; Turn stuff off
1912: ori r7,r7,lo16(EXT(mem_actual)) ; Get the actual
1913: isync
1914:
1915: lwz r0,4(r2) ; Get the flag
1916: mr. r0,r0 ; Should we log?
1917: lwz r0,0(r7) ; Get the end of memory
1918: lwz r7,0(r2) ; Get the position
1919: bne- waytoofar ; No logging...
1920: mr. r7,r7 ; Is this the first?
1921: bne+ gotspot ; Nope...
1922:
1923: lis r7,hi16(EXT(mem_size)) ; High part of defined memory
1924: ori r7,r7,lo16(EXT(mem_size)) ; Low part of defined memory
1925: lwz r7,0(r7) ; Make it end of defined
1926:
1927: gotspot: cmplw r7,r0 ; Do we fit in memory
1928: addi r0,r7,0x0020 ; Next slot
1929: bge- waytoofar ; No fit...
1930:
1931: stw r0,0(r2) ; Set next time slot
1932: dcbz 0,r7 ; Zap it
1933:
1934: stw r3,0(r7) ; First data
1935: li r3,32 ; Disp to next line
1936: stw r4,4(r7) ; Second data
1937: dcbz r3,r7 ; Zap it
1938: stw r5,8(r7) ; Third data
1939: stw r6,12(r7) ; Fourth data
1940:
1941: stw r12,16(r7) ; Callers callers
1942: stw r11,20(r7) ; Callers callers caller
1943: stw r10,24(r7) ; Callers callers callers caller
1944: stw r9,28(r7) ; Callers callers callers callers caller
1945:
1946: waytoofar: mtmsr r8 ; Back to normal
1947: isync
1948: blr
1949:
1950: ;
1951: ; Same as the other, but no traceback and 16 byte entry
1952: ; Trashes R0, R2, R10, R12
1953: ;
1954:
1955: .align 5
1956: .globl EXT(dbgLog2)
1957:
1958: LEXT(dbgLog2)
1959:
1960:
1961: mfmsr r10 ; Get the MSR
1962: lis r2,hi16(EXT(DebugWork)) ; High part of area
1963: lis r12,hi16(EXT(mem_actual)) ; High part of actual
1964: andi. r0,r10,0x7FCF ; Interrupts and translation off
1965: ori r2,r2,lo16(EXT(DebugWork)) ; Get the entry
1966: mtmsr r0 ; Turn stuff off
1967: ori r12,r12,lo16(EXT(mem_actual)) ; Get the actual
1968: isync
1969:
1970: lwz r0,4(r2) ; Get the flag
1971: mr. r0,r0 ; Should we log?
1972: lwz r0,0(r12) ; Get the end of memory
1973: lwz r12,0(r2) ; Get the position
1974: bne- waytoofar2 ; No logging...
1975: mr. r12,r12 ; Is this the first?
1976: bne+ gotspot2 ; Nope...
1977:
1978: lis r12,hi16(EXT(mem_size)) ; High part of defined memory
1979: ori r12,r12,lo16(EXT(mem_size)) ; Low part of defined memory
1980: lwz r12,0(r12) ; Make it end of defined
1981:
1982: gotspot2: cmplw cr1,r12,r0 ; Do we fit in memory
1983: rlwinm. r0,r12,0,27,27 ; Are we on a new line?
1984: bge- cr1,waytoofar2 ; No fit...
1985: addi r0,r12,0x0010 ; Next slot
1986:
1987: bne+ nonewline ; Not on a new line...
1988: dcbz br0,r12 ; Clear it so we do not fetch it
1989:
1990: nonewline: cmplwi r3,68 ; Special place for time stamp?
1991:
1992: stw r0,0(r2) ; Set next time slot
1993: bne+ nospcts ; Nope...
1994:
1995: lwz r0,0x17C(br0) ; Get special saved time stamp
1996: b nospctt ; Skip...
1997:
1998: nospcts: mftb r0 ; Get the current time
1999:
2000: nospctt: stw r3,4(r12) ; First data
2001: stw r4,8(r12) ; Second data
2002: stw r5,12(r12) ; Third data
2003: stw r0,0(r12) ; Time stamp
2004:
2005: waytoofar2: mtmsr r10 ; Back to normal
2006: isync
2007: blr
2008:
2009:
2010: ;
2011: ; Saves floating point registers
2012: ;
2013:
2014: .align 5
2015: .globl EXT(stFloat)
2016:
2017: LEXT(stFloat)
2018:
2019: mfmsr r0 ; Save the MSR
2020: rlwinm r4,r0,0,MSR_EE_BIT,MSR_EE_BIT ; Turn off interruptions
2021: ori r4,r4,lo16(MASK(MSR_FP)) ; Enable floating point
2022: mtmsr r4
2023: isync
2024:
2025: stfd f0,0x00(r3)
2026: stfd f1,0x08(r3)
2027: stfd f2,0x10(r3)
2028: stfd f3,0x18(r3)
2029: stfd f4,0x20(r3)
2030: stfd f5,0x28(r3)
2031: stfd f6,0x30(r3)
2032: stfd f7,0x38(r3)
2033: stfd f8,0x40(r3)
2034: stfd f9,0x48(r3)
2035: stfd f10,0x50(r3)
2036: stfd f11,0x58(r3)
2037: stfd f12,0x60(r3)
2038: stfd f13,0x68(r3)
2039: stfd f14,0x70(r3)
2040: stfd f15,0x78(r3)
2041: stfd f16,0x80(r3)
2042: stfd f17,0x88(r3)
2043: stfd f18,0x90(r3)
2044: stfd f19,0x98(r3)
2045: stfd f20,0xA0(r3)
2046: stfd f21,0xA8(r3)
2047: stfd f22,0xB0(r3)
2048: stfd f23,0xB8(r3)
2049: stfd f24,0xC0(r3)
2050: stfd f25,0xC8(r3)
2051: stfd f26,0xD0(r3)
2052: stfd f27,0xD8(r3)
2053: stfd f28,0xE0(r3)
2054: stfd f29,0xE8(r3)
2055: stfd f30,0xF0(r3)
2056: stfd f31,0xF8(r3)
2057: mffs f0
2058: stfd f0,0x100(r3)
2059: lfd f0,0x00(r3)
2060: mtmsr r0
2061: isync
2062: blr
2063:
2064:
2065: ;
2066: ; Saves vector registers. Returns 0 if non-Altivec machine.
2067: ;
2068:
2069: .align 5
2070: .globl EXT(stVectors)
2071:
2072: LEXT(stVectors)
2073:
2074: mfpvr r6 ; Get machine type
2075: mr r5,r3 ; Save area address
2076: rlwinm r6,r6,16,16,31 ; Rotate on it
2077: li r3,0 ; Assume failure
2078: cmplwi r6,PROCESSOR_VERSION_Max ; Do we have Altivec?
2079: bltlr+ ; No...
2080:
2081: mfmsr r0 ; Save the MSR
2082: rlwinm r4,r0,0,MSR_EE_BIT,MSR_EE_BIT ; Turn off interruptions
2083: oris r4,r4,hi16(MASK(MSR_VEC)) ; Enable vectors
2084: mtmsr r4
2085: isync
2086:
2087: stvxl v0,0,r5
2088: addi r5,r5,16
2089: stvxl v1,0,r5
2090: addi r5,r5,16
2091: stvxl v2,0,r5
2092: addi r5,r5,16
2093: stvxl v3,0,r5
2094: addi r5,r5,16
2095: stvxl v4,0,r5
2096: addi r5,r5,16
2097: stvxl v5,0,r5
2098: addi r5,r5,16
2099: stvxl v6,0,r5
2100: addi r5,r5,16
2101: stvxl v7,0,r5
2102: addi r5,r5,16
2103: stvxl v8,0,r5
2104: addi r5,r5,16
2105: stvxl v9,0,r5
2106: addi r5,r5,16
2107: stvxl v10,0,r5
2108: addi r5,r5,16
2109: stvxl v11,0,r5
2110: addi r5,r5,16
2111: stvxl v12,0,r5
2112: addi r5,r5,16
2113: stvxl v13,0,r5
2114: addi r5,r5,16
2115: stvxl v14,0,r5
2116: addi r5,r5,16
2117: stvxl v15,0,r5
2118: addi r5,r5,16
2119: stvxl v16,0,r5
2120: addi r5,r5,16
2121: stvxl v17,0,r5
2122: addi r5,r5,16
2123: stvxl v18,0,r5
2124: addi r5,r5,16
2125: stvxl v19,0,r5
2126: addi r5,r5,16
2127: stvxl v20,0,r5
2128: addi r5,r5,16
2129: stvxl v21,0,r5
2130: addi r5,r5,16
2131: stvxl v22,0,r5
2132: addi r5,r5,16
2133: stvxl v23,0,r5
2134: addi r5,r5,16
2135: stvxl v24,0,r5
2136: addi r5,r5,16
2137: stvxl v25,0,r5
2138: addi r5,r5,16
2139: stvxl v26,0,r5
2140: addi r5,r5,16
2141: stvxl v27,0,r5
2142: addi r5,r5,16
2143: stvxl v28,0,r5
2144: addi r5,r5,16
2145: stvxl v29,0,r5
2146: addi r5,r5,16
2147: stvxl v30,0,r5
2148: addi r5,r5,16
2149: stvxl v31,0,r5
2150: mfvscr v31
2151: addi r6,r5,16
2152: stvxl v31,0,r6
2153: li r3,1
2154: lvxl v31,0,r5
2155: mtmsr r0
2156: isync
2157: blr
2158:
2159:
2160: ;
2161: ; Saves yet more registers
2162: ;
2163:
2164: .align 5
2165: .globl EXT(stSpecrs)
2166:
2167: LEXT(stSpecrs)
2168:
2169: mfmsr r0 ; Save the MSR
2170: rlwinm r4,r0,0,MSR_EE_BIT,MSR_EE_BIT ; Turn off interruptions
2171: mtmsr r4
2172: isync
2173:
2174: mfspr r4,pir
2175: stw r4,0(r3)
2176:
2177: mfpvr r4
2178: stw r4,4(r3)
2179:
2180: mfdbatu r4,0
2181: mfdbatl r5,0
2182: mfdbatu r6,1
2183: mfdbatl r7,1
2184: mfdbatu r8,2
2185: mfdbatl r9,2
2186: mfdbatu r10,3
2187: mfdbatl r11,3
2188: stw r4,8(r3)
2189: stw r5,12(r3)
2190: stw r6,16(r3)
2191: stw r7,20(r3)
2192: stw r8,24(r3)
2193: stw r9,28(r3)
2194: stw r10,32(r3)
2195: stw r11,36(r3)
2196:
2197: mfibatu r4,0
2198: mfibatl r5,0
2199: mfibatu r6,1
2200: mfibatl r7,1
2201: mfibatu r8,2
2202: mfibatl r9,2
2203: mfibatu r10,3
2204: mfibatl r11,3
2205: stw r4,40(r3)
2206: stw r5,44(r3)
2207: stw r6,48(r3)
2208: stw r7,52(r3)
2209: stw r8,56(r3)
2210: stw r9,60(r3)
2211: stw r10,64(r3)
2212: stw r11,68(r3)
2213:
2214: mfsprg r4,0
2215: mfsprg r5,1
2216: mfsprg r6,2
2217: mfsprg r7,3
2218: stw r4,72(r3)
2219: stw r5,76(r3)
2220: stw r6,80(r3)
2221: stw r7,84(r3)
2222:
2223: mfsdr1 r4
2224: stw r4,88(r3)
2225:
2226: la r4,92(r3)
2227: li r5,0
2228:
2229: stSnsr: mfsrin r6,r5
2230: addis r5,r5,0x1000
2231: stw r6,0(r4)
2232: mr. r5,r5
2233: addi r4,r4,4
2234: bne+ stSnsr
2235:
2236: mtmsr r0
2237: isync
2238: blr
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