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1.1 root 1: /*
2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: #include <debug.h>
23: #include <mach_assert.h>
24: #include <mach/exception_types.h>
25: #include <mach/ppc/vm_param.h>
26:
27: #include <assym.s>
28:
29: #include <ppc/asm.h>
30: #include <ppc/proc_reg.h>
31: #include <ppc/trap.h>
32: #include <ppc/exception.h>
33:
34: /*
35: * void cthread_set_self(cproc_t p)
36: *
37: * set's thread state "user_value"
38: *
39: * This op is invoked as follows:
40: * li r0, CthreadSetSelfNumber // load the fast-trap number
41: * sc // invoke fast-trap
42: * blr
43: *
44: * Entry: VM switched ON
45: * Interrupts OFF
46: * original r1-3 saved in sprg1-3
47: * original srr0 and srr1 saved in per_proc_info structure
48: * original cr saved in per_proc_info structure
49: * exception type saved in per_proc_info structure
50: * r1 = scratch
51: * r2 = virt addr of per_proc_info
52: * r3 = exception type (one of EXC_...)
53: *
54: */
55: .text
56: .align 5
57: ENTRY(CthreadSetSelfNumber, TAG_NO_FRAME_USED)
58: lwz r1, PP_CPU_DATA(r2)
59: lwz r1, CPU_ACTIVE_THREAD(r1)
60: lwz r1, THREAD_TOP_ACT(r1)
61: lwz r1, ACT_MACT_PCB(r1)
62:
63: mfsprg r3, 3
64: stw r3, CTHREAD_SELF(r1)
65:
66: /* Prepare to rfi to the exception exit routine, which is
67: * in physical address space */
68: addis r3, 0, HIGH_CADDR(EXT(exception_exit))
69: addi r3, r3, LOW_ADDR(EXT(exception_exit))
70:
71: lwz r3, 0(r3)
72: mtsrr0 r3
73: li r3, MSR_VM_OFF
74: mtsrr1 r3
75:
76: lwz r3, PP_SAVE_SRR1(r2) /* load the last register... */
77: lwz r2, PP_SAVE_SRR0(r2) /* For trampoline */
78: lwz r1, PCB_SR0(r1) /* For trampoline... */
79:
80: rfi
81:
82:
83: /*
84: * ur_cthread_t ur_cthread_self(void)
85: *
86: * return thread state "user_value"
87: *
88: * This op is invoked as follows:
89: * li r0, UrCthreadSelfNumber // load the fast-trap number
90: * sc // invoke fast-trap
91: * blr
92: *
93: * Entry: VM switched ON
94: * Interrupts OFF
95: * original r1-3 saved in sprg1-3
96: * original srr0 and srr1 saved in per_proc_info structure
97: * original cr saved in per_proc_info structure
98: * exception type saved in per_proc_info structure
99: * r1 = scratch
100: * r2 = virt addr of per_proc_info
101: * r3 = exception type (one of EXC_...)
102: *
103: */
104: .text
105: .align 5
106: ENTRY(UrCthreadSelfNumber, TAG_NO_FRAME_USED)
107: lwz r1, PP_CPU_DATA(r2)
108: lwz r1, CPU_ACTIVE_THREAD(r1)
109: lwz r1, THREAD_TOP_ACT(r1)
110: lwz r1, ACT_MACT_PCB(r1)
111:
112: lwz r3, CTHREAD_SELF(r1)
113: mtsprg 3, r3
114:
115:
116: /* Prepare to rfi to the exception exit routine, which is
117: * in physical address space */
118: addis r3, 0, HIGH_CADDR(EXT(exception_exit))
119: addi r3, r3, LOW_ADDR(EXT(exception_exit))
120: lwz r3, 0(r3)
121: mtsrr0 r3
122: li r3, MSR_VM_OFF
123: mtsrr1 r3
124:
125: lwz r3, PP_SAVE_SRR1(r2) /* load the last register... */
126: lwz r2, PP_SAVE_SRR0(r2) /* For trampoline */
127: lwz r1, PCB_SR0(r1) /* For trampoline... */
128:
129: rfi
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