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1.1 root 1: /*
2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * @OSF_COPYRIGHT@
24: */
25:
26: /* Miscellaneous constants and structures used by the exception
27: * handlers
28: */
29:
30: #ifndef _PPC_EXCEPTION_H_
31: #define _PPC_EXCEPTION_H_
32:
33: #ifndef ASSEMBLER
34:
35: #include <cpus.h>
36: #include <mach_kdb.h>
37: #include <mach_kdp.h>
38:
39: #include <mach/machine/vm_types.h>
40: #include <mach/boolean.h>
41: #include <pexpert/pexpert.h>
42: #include <IOKit/IOInterrupts.h>
43:
44: /* When an exception is taken, this info is accessed via sprg0 */
45: /* We should always have this one on a cache line boundary */
46: struct per_proc_info {
47: unsigned short cpu_number;
48: unsigned short cpu_flags; /* Various low-level flags */
49: vm_offset_t istackptr;
50: vm_offset_t intstack_top_ss;
51:
52: #if MACH_KDP || MACH_KDB
53: vm_offset_t debstackptr;
54: vm_offset_t debstack_top_ss;
55: #else
56: unsigned int ppigas1[2]; /* Take up some space if no KDP or KDB */
57: #endif
58:
59: unsigned int tempwork1; /* Temp work area - monitor use carefully */
60: unsigned int CPUflags; /* Temporary CPU flags */
61: unsigned int userspace; /* Last loaded user memory space ID */
62:
63: /* PPC cache line boundary here - 020 */
64:
65: unsigned int save_exception_type;
66: unsigned int phys_exception_handlers;
67: unsigned int virt_per_proc_info; /* virt addr for our CPU */
68: unsigned int active_kloaded; /* pointer to active_kloaded[CPU_NO] */
69: unsigned int cpu_data; /* pointer to cpu_data[CPU_NO] */
70: unsigned int active_stacks; /* pointer to active_stacks[CPU_NO] */
71: unsigned int need_ast; /* pointer to need_ast[CPU_NO] */
72: unsigned int FPU_thread; /* Thread owning the FPU on this cpu */
73:
74: /* PPC cache line boundary here - 040 */
75: unsigned int VMX_thread; /* Thread owning the VMX on this cpu */
76: unsigned int quickfret; /* Pointer to savearea for exception exit to free */
77: unsigned int BlueBoxDesc; /* Pointer to Blue Box description area */
78: unsigned int LastSpace; /* Last user space loaded into segment registers */
79: unsigned int Uassist; /* User Assist Word */
80: unsigned int liveVRSave; /* VRSave assiciated with live vector registers */
81: unsigned int spcFlags; /* Special thread flags */
82: unsigned int ppigas2;
83:
84: /* PPC cache line boundary here - 060 */
85: boolean_t (*set_interrupts_enabled)(boolean_t);
86: boolean_t (*get_interrupts_enabled)(void);
87: IOInterruptHandler interrupt_handler;
88: void * interrupt_nub;
89: unsigned int interrupt_source;
90: void * interrupt_target;
91: void * interrupt_refCon;
92: unsigned int ppigas3;
93:
94: /* PPC cache line boundary here - 080 */
95: unsigned int MPsigpStat; /* Signal Processor status (interlocked update for this one) */
96: #define MPsigpMsgp 0xC0000000 /* Message pending (busy + pass) */
97: #define MPsigpBusy 0x80000000 /* Processor area busy, i.e., locked */
98: #define MPsigpPass 0x40000000 /* Busy lock passed to receiving processor */
99: #define MPsigpSrc 0x000000FF /* Processor that owns busy, i.e., the ID of */
100: /* whomever set busy. When a busy is passed, */
101: /* this is the requestor of the function. */
102: #define MPsigpFunc 0x0000FF00 /* Current function */
103: #define MPsigpIdle 0x00 /* No function pending */
104: #define MPsigpSigp 0x04 /* Signal a processor */
105: #define SIGPast 0 /* Requests an ast on target processor */
106: #define SIGPdebug 2 /* Requests a debugger entry */
107: #define SIGPwake 3 /* Wake up a sleeping processor */
108: unsigned int MPsigpParm0; /* SIGP parm 0 */
109: unsigned int MPsigpParm1; /* SIGP parm 1 */
110: unsigned int MPsigpParm2; /* SIGP parm 2 */
111: cpu_id_t cpu_id;
112: vm_offset_t start_paddr;
113: unsigned int ppigas4[2];
114:
115: /* PPC cache line boundary here - 0A0 */
116: double emfp0; /* Copies of floating point registers */
117: double emfp1; /* Used for emulation purposes */
118: double emfp2;
119: double emfp3;
120:
121: double emfp4;
122: double emfp5;
123: double emfp6;
124: double emfp7;
125:
126: double emfp8;
127: double emfp9;
128: double emfp10;
129: double emfp11;
130:
131: double emfp12;
132: double emfp13;
133: double emfp14;
134: double emfp15;
135:
136: double emfp16;
137: double emfp17;
138: double emfp18;
139: double emfp19;
140:
141: double emfp20;
142: double emfp21;
143: double emfp22;
144: double emfp23;
145:
146: double emfp24;
147: double emfp25;
148: double emfp26;
149: double emfp27;
150:
151: double emfp28;
152: double emfp29;
153: double emfp30;
154: double emfp31;
155:
156: /* - 1A0 */
157: unsigned int emfpscr_pad;
158: unsigned int emfpscr;
159: unsigned int empadfp[6];
160:
161: /* - 1C0 */
162: unsigned int emvr0[4]; /* Copies of vector registers used both */
163: unsigned int emvr1[4]; /* for full vector emulation or */
164: unsigned int emvr2[4]; /* as saveareas while assisting denorms */
165: unsigned int emvr3[4];
166: unsigned int emvr4[4];
167: unsigned int emvr5[4];
168: unsigned int emvr6[4];
169: unsigned int emvr7[4];
170: unsigned int emvr8[4];
171: unsigned int emvr9[4];
172: unsigned int emvr10[4];
173: unsigned int emvr11[4];
174: unsigned int emvr12[4];
175: unsigned int emvr13[4];
176: unsigned int emvr14[4];
177: unsigned int emvr15[4];
178: unsigned int emvr16[4];
179: unsigned int emvr17[4];
180: unsigned int emvr18[4];
181: unsigned int emvr19[4];
182: unsigned int emvr20[4];
183: unsigned int emvr21[4];
184: unsigned int emvr22[4];
185: unsigned int emvr23[4];
186: unsigned int emvr24[4];
187: unsigned int emvr25[4];
188: unsigned int emvr26[4];
189: unsigned int emvr27[4];
190: unsigned int emvr28[4];
191: unsigned int emvr29[4];
192: unsigned int emvr30[4];
193: unsigned int emvr31[4];
194: unsigned int emvscr[4];
195: unsigned int empadvr[4];
196: /* - 3E0 */
197:
198: };
199:
200:
201: extern struct per_proc_info *per_proc_info;
202: /* extern struct per_proc_info per_proc_info[NCPUS]; */
203:
204: typedef struct savearea {
205:
206: /* The following area corresponds to ppc_saved_state and ppc_thread_state */
207:
208: /* offset 0x0000 */
209: unsigned int save_srr0;
210: unsigned int save_srr1;
211: unsigned int save_r0;
212: unsigned int save_r1;
213: unsigned int save_r2;
214: unsigned int save_r3;
215: unsigned int save_r4;
216: unsigned int save_r5;
217:
218: unsigned int save_r6;
219: unsigned int save_r7;
220: unsigned int save_r8;
221: unsigned int save_r9;
222: unsigned int save_r10;
223: unsigned int save_r11;
224: unsigned int save_r12;
225: unsigned int save_r13;
226:
227: unsigned int save_r14;
228: unsigned int save_r15;
229: unsigned int save_r16;
230: unsigned int save_r17;
231: unsigned int save_r18;
232: unsigned int save_r19;
233: unsigned int save_r20;
234: unsigned int save_r21;
235:
236: unsigned int save_r22;
237: unsigned int save_r23;
238: unsigned int save_r24;
239: unsigned int save_r25;
240: unsigned int save_r26;
241: unsigned int save_r27;
242: unsigned int save_r28;
243: unsigned int save_r29;
244:
245: unsigned int save_r30;
246: unsigned int save_r31;
247: unsigned int save_cr;
248: unsigned int save_xer;
249: unsigned int save_lr;
250: unsigned int save_ctr;
251: unsigned int save_mq;
252: unsigned int save_vrsave;
253:
254: unsigned int save_sr_copyin;
255: unsigned int save_space;
256: unsigned int save_pad2[6];
257:
258:
259: /* The following corresponds to ppc_exception_state */
260:
261: /* offset 0x00C0 */
262: unsigned int save_dar;
263: unsigned int save_dsisr;
264: unsigned int save_exception;
265: unsigned int save_pad3[5];
266:
267: /* The following corresponds to ppc_float_state */
268:
269: /* offset 0x00E0 */
270: double save_fp0;
271: double save_fp1;
272: double save_fp2;
273: double save_fp3;
274:
275: double save_fp4;
276: double save_fp5;
277: double save_fp6;
278: double save_fp7;
279:
280: double save_fp8;
281: double save_fp9;
282: double save_fp10;
283: double save_fp11;
284:
285: double save_fp12;
286: double save_fp13;
287: double save_fp14;
288: double save_fp15;
289:
290: double save_fp16;
291: double save_fp17;
292: double save_fp18;
293: double save_fp19;
294:
295: double save_fp20;
296: double save_fp21;
297: double save_fp22;
298: double save_fp23;
299:
300: double save_fp24;
301: double save_fp25;
302: double save_fp26;
303: double save_fp27;
304:
305: double save_fp28;
306: double save_fp29;
307: double save_fp30;
308: double save_fp31;
309:
310: unsigned int save_fpscr_pad;
311: unsigned int save_fpscr;
312: unsigned int save_pad4[6];
313:
314: /* The following is the save area for the VMX registers */
315:
316: /* offset 0x0200 */
317: unsigned int save_vr0[4];
318: unsigned int save_vr1[4];
319: unsigned int save_vr2[4];
320: unsigned int save_vr3[4];
321: unsigned int save_vr4[4];
322: unsigned int save_vr5[4];
323: unsigned int save_vr6[4];
324: unsigned int save_vr7[4];
325: unsigned int save_vr8[4];
326: unsigned int save_vr9[4];
327: unsigned int save_vr10[4];
328: unsigned int save_vr11[4];
329: unsigned int save_vr12[4];
330: unsigned int save_vr13[4];
331: unsigned int save_vr14[4];
332: unsigned int save_vr15[4];
333: unsigned int save_vr16[4];
334: unsigned int save_vr17[4];
335: unsigned int save_vr18[4];
336: unsigned int save_vr19[4];
337: unsigned int save_vr20[4];
338: unsigned int save_vr21[4];
339: unsigned int save_vr22[4];
340: unsigned int save_vr23[4];
341: unsigned int save_vr24[4];
342: unsigned int save_vr25[4];
343: unsigned int save_vr26[4];
344: unsigned int save_vr27[4];
345: unsigned int save_vr28[4];
346: unsigned int save_vr29[4];
347: unsigned int save_vr30[4];
348: unsigned int save_vr31[4];
349: unsigned int save_vscr[4]; /* Note that this is always valid if VMX has been used */
350: unsigned int save_pad5[4]; /* Insures that vrvalid is on a cache line */
351: unsigned int save_vrvalid; /* VRs that have been saved */
352: unsigned int save_pad6[7];
353:
354: /* The following is the save area for the segment registers */
355:
356: /* offset 0x0440 */
357:
358: unsigned int save_sr0;
359: unsigned int save_sr1;
360: unsigned int save_sr2;
361: unsigned int save_sr3;
362: unsigned int save_sr4;
363: unsigned int save_sr5;
364: unsigned int save_sr6;
365: unsigned int save_sr7;
366:
367: unsigned int save_sr8;
368: unsigned int save_sr9;
369: unsigned int save_sr10;
370: unsigned int save_sr11;
371: unsigned int save_sr12;
372: unsigned int save_sr13;
373: unsigned int save_sr14;
374: unsigned int save_sr15;
375:
376:
377:
378: /* The following are the control area for this save area */
379:
380: /* offset 0x0480 */
381:
382: struct savearea *save_prev; /* The address of the previous normal savearea */
383: struct savearea *save_prev_float; /* The address of the previous floating point savearea */
384: struct savearea *save_prev_vector; /* The address of the previous vector savearea */
385: struct savearea *save_qfret; /* The "quick release" chain */
386: struct savearea *save_phys; /* The physical address of this savearea */
387: struct thread_activation *save_act; /* Pointer to the associated activation */
388: unsigned int save_flags; /* Various flags */
389: #define save_perm 0x80000000 /* Permanent area, cannot be released */
390: unsigned int save_level_fp; /* Level that floating point state belongs to */
391: unsigned int save_level_vec; /* Level that vector state belongs to */
392:
393: } savearea;
394:
395: typedef struct savectl { /* Savearea control */
396:
397: unsigned int *sac_next; /* Points to next savearea page that has a free slot - real */
398: unsigned int sac_vrswap; /* XOR mask to swap V to R or vice versa */
399: unsigned int sac_alloc; /* Bitmap of allocated slots */
400: unsigned int sac_flags; /* Various flags */
401: } savectl;
402:
403: struct Saveanchor {
404: unsigned int savelock; /* Lock word for savearea manipulation */
405: int savecount; /* The total number of save areas allocated */
406: int saveinuse; /* Number of areas in use */
407: int savemin; /* We abend if lower than this */
408: int saveneghyst; /* The negative hysteresis value */
409: int savetarget; /* The target point for free save areas */
410: int saveposhyst; /* The positive hysteresis value */
411: unsigned int savefree; /* Anchor for the freelist queue */
412: /* Cache line (32-byte) boundary */
413: int savextnd; /* Free list extention count */
414: int saveneed; /* Number of savearea's needed. So far, we assume we need 3 per activation */
415: int savespare[6]; /* Spare */
416: };
417:
418:
419: extern char *trap_type[];
420:
421: #endif /* ndef ASSEMBLER */
422:
423: #define sac_empty 0xC0000000 /* Mask with all entries empty */
424: #define sac_cnt 2 /* Number of entries per page */
425: #define sac_busy 0x80000000 /* This page is busy - used during initial allocation */
426: #define sac_perm 0x40000000 /* Page permanently assigned */
427:
428: #define SAVattach 0x80000000 /* Savearea is attached to a thread */
429: #define SAVfpuvalid 0x40000000 /* Savearea contains FPU context */
430: #define SAVvmxvalid 0x20000000 /* Savearea contains VMX context */
431: #define SAVinuse 0xE0000000 /* Save area is inuse */
432: #define SAVrststk 0x00010000 /* Indicates that the current stack should be reset to empty */
433: #define SAVsyscall 0x00020000 /* Indicates that the savearea is associated with a syscall */
434: #define SAVredrive 0x00040000 /* Indicates that the low-level fault handler associated */
435: /* with this savearea should be redriven */
436: #define SIGPactive 0x8000
437: #define needSRload 0x4000
438: #define turnEEon 0x2000
439: #define T_VECTOR_SIZE 4 /* function pointer size */
440: #define InitialSaveMin 4 /* The initial value for the minimum number of saveareas */
441: #define InitialNegHysteresis 5 /* The number off from target before we adjust upwards */
442: #define InitialPosHysteresis 10 /* The number off from target before we adjust downwards */
443: #define InitialSaveTarget 20 /* The number of saveareas for an initial target */
444: #define InitialSaveAreas 20 /* The number of saveareas to allocate at boot */
445: #define InitialSaveBloks (InitialSaveAreas+sac_cnt-1)/sac_cnt /* The number of savearea blocks to allocate at boot */
446:
447: /* Hardware exceptions */
448:
449: #define T_IN_VAIN (0x00 * T_VECTOR_SIZE)
450: #define T_RESET (0x01 * T_VECTOR_SIZE)
451: #define T_MACHINE_CHECK (0x02 * T_VECTOR_SIZE)
452: #define T_DATA_ACCESS (0x03 * T_VECTOR_SIZE)
453: #define T_INSTRUCTION_ACCESS (0x04 * T_VECTOR_SIZE)
454: #define T_INTERRUPT (0x05 * T_VECTOR_SIZE)
455: #define T_ALIGNMENT (0x06 * T_VECTOR_SIZE)
456: #define T_PROGRAM (0x07 * T_VECTOR_SIZE)
457: #define T_FP_UNAVAILABLE (0x08 * T_VECTOR_SIZE)
458: #define T_DECREMENTER (0x09 * T_VECTOR_SIZE)
459: #define T_IO_ERROR (0x0a * T_VECTOR_SIZE)
460: #define T_RESERVED (0x0b * T_VECTOR_SIZE)
461: #define T_SYSTEM_CALL (0x0c * T_VECTOR_SIZE)
462: #define T_TRACE (0x0d * T_VECTOR_SIZE)
463: #define T_FP_ASSIST (0x0e * T_VECTOR_SIZE)
464: #define T_PERF_MON (0x0f * T_VECTOR_SIZE)
465: #define T_VMX (0x10 * T_VECTOR_SIZE)
466: #define T_INVALID_EXCP0 (0x11 * T_VECTOR_SIZE)
467: #define T_INVALID_EXCP1 (0x12 * T_VECTOR_SIZE)
468: #define T_INVALID_EXCP2 (0x13 * T_VECTOR_SIZE)
469: #define T_INSTRUCTION_BKPT (0x14 * T_VECTOR_SIZE)
470: #define T_SYSTEM_MANAGEMENT (0x15 * T_VECTOR_SIZE)
471: #define T_ALTIVEC_ASSIST (0x16 * T_VECTOR_SIZE)
472: #define T_INVALID_EXCP4 (0x17 * T_VECTOR_SIZE)
473: #define T_INVALID_EXCP5 (0x18 * T_VECTOR_SIZE)
474: #define T_INVALID_EXCP6 (0x19 * T_VECTOR_SIZE)
475: #define T_INVALID_EXCP7 (0x1A * T_VECTOR_SIZE)
476: #define T_INVALID_EXCP8 (0x1B * T_VECTOR_SIZE)
477: #define T_INVALID_EXCP9 (0x1C * T_VECTOR_SIZE)
478: #define T_INVALID_EXCP10 (0x1D * T_VECTOR_SIZE)
479: #define T_INVALID_EXCP11 (0x1E * T_VECTOR_SIZE)
480: #define T_INVALID_EXCP12 (0x1F * T_VECTOR_SIZE)
481: #define T_INVALID_EXCP13 (0x20 * T_VECTOR_SIZE)
482:
483: #define T_RUNMODE_TRACE (0x21 * T_VECTOR_SIZE) /* 601 only */
484:
485: #define T_SIGP (0x22 * T_VECTOR_SIZE)
486: #define T_PREEMPT (0x23 * T_VECTOR_SIZE)
487: #define T_CSWITCH (0x24 * T_VECTOR_SIZE)
488:
489: #define T_AST (0x100 * T_VECTOR_SIZE)
490: #define T_MAX T_CSWITCH /* Maximum exception no */
491:
492: #define EXCEPTION_VECTOR(exception) (exception * 0x100 /T_VECTOR_SIZE )
493:
494: #ifndef ASSEMBLER
495:
496: typedef struct resethandler {
497: unsigned int type;
498: vm_offset_t call_paddr;
499: vm_offset_t arg__paddr;
500: } resethandler_t;
501:
502: extern resethandler_t ResetHandler;
503:
504: #endif
505:
506: #define RESET_HANDLER_NULL 0x0
507: #define RESET_HANDLER_START 0x1
508:
509: #endif /* _PPC_EXCEPTION_H_ */
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