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1.1 ! root 1: /* ! 2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. ! 3: * ! 4: * @APPLE_LICENSE_HEADER_START@ ! 5: * ! 6: * The contents of this file constitute Original Code as defined in and ! 7: * are subject to the Apple Public Source License Version 1.1 (the ! 8: * "License"). You may not use this file except in compliance with the ! 9: * License. Please obtain a copy of the License at ! 10: * http://www.apple.com/publicsource and read it before using this file. ! 11: * ! 12: * This Original Code and all software distributed under the License are ! 13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER ! 14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, ! 15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, ! 16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the ! 17: * License for the specific language governing rights and limitations ! 18: * under the License. ! 19: * ! 20: * @APPLE_LICENSE_HEADER_END@ ! 21: */ ! 22: #include <ppc/asm.h> ! 23: #include <ppc/proc_reg.h> ! 24: #include <cpus.h> ! 25: #include <assym.s> ! 26: #include <debug.h> ! 27: #include <mach/ppc/vm_param.h> ! 28: #include <ppc/exception.h> ! 29: ! 30: /* PCI config cycle probing ! 31: * ! 32: * boolean_t ml_probe_read(vm_offset_t paddr, unsigned int *val) ! 33: * ! 34: * Read the memory location at physical address paddr. ! 35: * This is a part of a device probe, so there is a good chance we will ! 36: * have a machine check here. So we have to be able to handle that. ! 37: * We assume that machine checks are enabled both in MSR and HIDs ! 38: */ ! 39: ! 40: ; Force a line boundry here ! 41: .align 5 ! 42: .globl EXT(ml_probe_read) ! 43: ! 44: LEXT(ml_probe_read) ! 45: ! 46: mfmsr r0 ; Save the current MSR ! 47: neg r10,r3 ; Number of bytes to end of page ! 48: rlwinm r2,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear interruptions ! 49: rlwinm. r10,r10,0,20,31 ; Clear excess junk and test for page bndry ! 50: mr r12,r3 ; Save the load address ! 51: cmplwi cr1,r10,4 ; At least 4 bytes left in page? ! 52: rlwinm r2,r2,0,MSR_DR_BIT+1,MSR_IR_BIT-1 ; Clear translation ! 53: li r3,0 ; Assume failure just for now ! 54: beq- mprdoit ; We are right on the boundary... ! 55: bltlr- ; No, just return failure... ! 56: ! 57: mprdoit: mtmsr r2 ; Translation and interrupts off ! 58: isync ; Make sure it is done ! 59: ! 60: ; ! 61: ; We need to insure that there is no more than 1 BAT register that ! 62: ; can get a hit. There could be repercussions beyond the ken ! 63: ; of mortal man. It is best not to tempt fate. ! 64: ; ! 65: li r10,0 ; Clear a register ! 66: mfdbatu r5,0 ; Save DBAT 0 high ! 67: mfdbatl r6,0 ; Save DBAT 0 low ! 68: mfdbatu r7,1 ; Save DBAT 1 high ! 69: mfdbatu r8,2 ; Save DBAT 2 high ! 70: mfdbatu r9,3 ; Save DBAT 3 high ! 71: ! 72: sync ; Make sure all is well ! 73: ! 74: mtdbatu 1,r10 ; Invalidate DBAT 1 ! 75: mtdbatu 2,r10 ; Invalidate DBAT 2 ! 76: mtdbatu 3,r10 ; Invalidate DBAT 3 ! 77: ! 78: rlwinm r10,r12,0,0,14 ; Round down to a 128k boundary ! 79: ori r11,r10,0x32 ; Set uncached, coherent, R/W ! 80: ori r10,r10,2 ; Make the upper half (128k, valid supervisor) ! 81: mtdbatl 0,r11 ; Set lower BAT first ! 82: mtdbatu 0,r10 ; Now the upper ! 83: sync ; Just make sure ! 84: ! 85: ori r11,r2,lo16(MASK(MSR_DR)) ; Turn on data translation ! 86: mtmsr r11 ; Do it for real ! 87: isync ; Make sure of it ! 88: ! 89: eieio ; Make sure of all previous accesses ! 90: sync ; Make sure it is all caught up ! 91: ! 92: lwz r11,0(r12) ; Get it and maybe machine check here ! 93: ! 94: eieio ; Make sure of ordering again ! 95: sync ; Get caught up yet again ! 96: isync ; Do not go further till we are here ! 97: ! 98: mtdbatu 0,r5 ; Restore DBAT 0 high ! 99: mtdbatl 0,r6 ; Restore DBAT 0 low ! 100: mtdbatu 1,r7 ; Restore DBAT 1 high ! 101: mtdbatu 2,r8 ; Restore DBAT 2 high ! 102: mtdbatu 3,r9 ; Restore DBAT 3 high ! 103: sync ! 104: ! 105: li r3,1 ; We made it ! 106: ! 107: mtmsr r0 ; Restore translation and exceptions ! 108: isync ; Toss speculations ! 109: ! 110: stw r11,0(r4) ; Save the loaded value ! 111: blr ; Return... ! 112: ! 113: ; Force a line boundry here. This means we will be able to check addresses better ! 114: .align 5 ! 115: .globl EXT(ml_probe_read_mck) ! 116: LEXT(ml_probe_read_mck) ! 117: ! 118: /* Read physical address ! 119: * ! 120: * unsigned int ml_phys_read(vm_offset_t paddr) ! 121: * ! 122: * Read the word at physical address paddr. Memory should not be cache inhibited. ! 123: */ ! 124: ! 125: ; Force a line boundry here ! 126: .align 5 ! 127: .globl EXT(ml_phys_read) ! 128: ! 129: LEXT(ml_phys_read) ! 130: ! 131: mfmsr r0 ; Save the current MSR ! 132: rlwinm r4,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear interruptions ! 133: rlwinm r4,r4,0,MSR_DR_BIT+1,MSR_IR_BIT-1 ; Clear translation ! 134: mtmsr r4 ; Translation and interrupts off ! 135: isync ; Make sure about it ! 136: ! 137: lwz r3,0(r3) ; Get the word ! 138: sync ! 139: ! 140: mtmsr r0 ; Restore translation and rupts ! 141: isync ! 142: blr ! 143: ! 144: /* Write physical address ! 145: * ! 146: * void ml_phys_write(vm_offset_t paddr, unsigned int data) ! 147: * ! 148: * Write the word at physical address paddr. Memory should not be cache inhibited. ! 149: */ ! 150: ! 151: ; Force a line boundry here ! 152: .align 5 ! 153: .globl EXT(ml_phys_write) ! 154: ! 155: LEXT(ml_phys_write) ! 156: ! 157: mfmsr r0 ; Save the current MSR ! 158: rlwinm r5,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear interruptions ! 159: rlwinm r5,r5,0,MSR_DR_BIT+1,MSR_IR_BIT-1 ; Clear translation ! 160: mtmsr r5 ; Translation and interrupts off ! 161: isync ; Make sure about it ! 162: ! 163: stw r4,0(r3) ; Set the word ! 164: sync ! 165: ! 166: mtmsr r0 ; Restore translation and rupts ! 167: isync ! 168: blr ! 169: ! 170: ! 171: /* set interrupts enabled or disabled ! 172: * ! 173: * boolean_t set_interrupts_enabled(boolean_t enable) ! 174: * ! 175: * Set EE bit to "enable" and return old value as boolean ! 176: */ ! 177: ! 178: ; Force a line boundry here ! 179: .align 5 ! 180: .globl EXT(set_interrupts_enabled) ! 181: ! 182: LEXT(set_interrupts_enabled) ! 183: ! 184: mfmsr r5 ; Get the current MSR ! 185: mr r4,r3 ; Save the old value ! 186: rlwinm r3,r5,17,31,31 ; Set return value ! 187: rlwimi r5,r4,15,16,16 ; Insert new EE bit ! 188: mtmsr r5 ; Slam enablement ! 189: blr ; Like leave... ! 190:
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