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1.1 root 1: /*
2: * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * The contents of this file constitute Original Code as defined in and
7: * are subject to the Apple Public Source License Version 1.1 (the
8: * "License"). You may not use this file except in compliance with the
9: * License. Please obtain a copy of the License at
10: * http://www.apple.com/publicsource and read it before using this file.
11: *
12: * This Original Code and all software distributed under the License are
13: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17: * License for the specific language governing rights and limitations
18: * under the License.
19: *
20: * @APPLE_LICENSE_HEADER_END@
21: */
22: /*
23: * clock_speed_asm.s - Uses the Via timer, decrementer, and counter
24: * to determine the clock and bus rates.
25: *
26: * (c) Apple Computer, Inc. 1998-9
27: *
28: * Writen by: Josh de Cesare
29: *
30: */
31:
32: #include <ppc/asm.h>
33:
34: // constants for the via
35: #define CountLow 0x800
36: #define CountHigh 0xa00
37: #define LatchLow 0xc00
38: #define LatchHigh 0xe00
39:
40:
41: // void pe_run_clock_test(clock_test_data *data)
42: //
43: // data points to the base address of the via and two longs
44: // for storing the via and dec results.
45: //
46: // The basic idea is this...
47: // Use the counter register to execute a loop that will take
48: // 10,000,000 processor clocks. Time it using both the via counter
49: // and the time base. Return the number of ticks for both so the
50: // raw values for processor and bus speed can be calculated.
51: ENTRY(pe_run_clock_test, TAG_NO_FRAME_USED)
52:
53: li r4, 1 ; flag for cache load
54: li r5, 1 ; Only once through this time
55: lwz r9, 0(r3) ; r9 is the via addr
56:
57: L_again:
58: mtctr r5 ; set the count
59: li r5, 0xff ; Start the counter at 0xffff
60: stb r5, CountLow(r9) ; clear the via counter
61: eieio
62: stb r5, CountHigh(r9)
63: eieio
64: mftb r10 ; save starting value of the time base
65: isync
66:
67: L_loop:
68: addi r5, r5, 1 ; 8 adds for 8 cycles
69: addi r5, r5, 2 ; the bdnz should be 0 cycles
70: addi r5, r5, 3
71: addi r5, r5, 4
72: addi r5, r5, 5
73: addi r5, r5, 6
74: addi r5, r5, 7
75: addi r5, r5, 8
76: bdnz L_loop
77:
78: sync
79: mftb r5 ; save the raw time base value
80: lbz r6, CountHigh(r9) ; get the via counter values
81: eieio
82: lbz r7, CountLow(r9)
83: eieio
84: lbz r8, CountHigh(r9)
85: eieio
86:
87: cmpi cr0, r4, 1 ; see if the was the cache run
88: bne L_finish_up ; nope, we are done.
89:
90: li r4, 0 ; set flag for the real test
91: li r5, 0x12d0 ; set the initial count to 1.25e+6
92: oris r5, r5, 0x13
93: b L_again
94:
95: L_finish_up:
96: cmpi cr0, r7, 0 ; if L1 is zero then H1 is good.
97: beq L_use_H1 ; else H2 will be good.
98:
99: mr r6, r8 ; use H2 instead.
100:
101: L_use_H1:
102: rlwimi r7, r6, 8, 16, 23
103: not r6, r7 ; neg - 1 is not
104: andi. r6, r6, 0xffff
105: stw r6, 4(r3) ; save via ticks
106:
107: sub r5, r5, r10 ; r5 is the number of time base ticks
108: stw r5, 8(r3) ; save time base ticks
109:
110: blr
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