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1.1 root 1: /* Console Processor Interface */
2: /* Tahoe version, Nov. 1982 */
3:
4: /****************************************/
5: /* */
6: /* Reduced DCB layout for byte */
7: /* communication. */
8: /* */
9: /****************************************/
10:
11: asm(".set CPMDCB,21");
12: asm(".set DC_OFF,2");
13: asm(".set DC_ON,1");
14: asm(".set DCR,27");
15: asm(".set PDCS,28");
16: asm(".set CTL_SW,0x41b"); /* Addr of switches to turn on Cache, MME, Fault */
17: long tmp_lw;
18:
19:
20: #define CPBUFLEN 200 /* Output buffer length */
21: struct cphdr
22: {
23: char cp_unit; /* Done bit & unit # */
24: char cp_comm; /* Command */
25: short cp_count; /* Counter (when relevant) */
26: };
27:
28: struct cpdcb_o /* Output structure */
29: {
30: struct cphdr cp_hdr;
31: char cp_buf[CPBUFLEN]; /* Buffer for output or 'stty' */
32: };
33:
34: struct cpdcb_i /* Structure for input */
35: {
36: struct cphdr cp_hdr;
37: char cpi_buf[4]; /* Buffer for input */
38: };
39:
40: #define CPDONE 0x80 /* 'Done' bit in cp_unit */
41: #define CPTAKE 0x40 /* CP 'ack' to this cpdcb */
42:
43: /* Values for 'unit' */
44: #define CPUNIT 0 /* The CP itself */
45: #define CPCONS 1 /* Console line */
46: #define CPREMOT 2 /* Remote line */
47:
48: /* Values for 'command' */
49: #define CPRESET 0
50: #define CPWRITE 1
51: #define CPREAD 2
52: #define CPSTTY 3
53: #define CPBOOT 4
54:
55:
56: /* Put a char to CPU2 console */
57:
58: #define NCHAR 1
59:
60: long cpbuf_sz = 1; /* Buffer size */
61: long charcnt = 0;
62: struct cpdcb_o cpout; /* DCB for output */
63:
64: asm(".set HISR,0x410");
65:
66: putchar(c)
67: {
68: cpout.cp_hdr.cp_unit = CPCONS; /* Reset done bit */
69: cpout.cp_hdr.cp_comm = CPWRITE; /* Set command */
70: cpout.cp_buf[charcnt] = c;
71: if (cpbuf_sz <= 1)
72: { /* Char I/O mode */
73: cpout.cp_hdr.cp_count = 1;
74: cp_poll(c);
75: }
76: else
77: {
78: charcnt++;
79: if (((charcnt+1) > cpbuf_sz) || (c == '\n') || (c == '\r'))
80: { /* buffer full, print it */
81: charcnt = 0;
82: cpout.cp_hdr.cp_count = cpbuf_sz;
83: cp_poll(c);
84: }
85: }
86: asm("movl $0,*$HISR"); /* Mask out console xmit int */
87: }
88:
89: cp_poll(c)
90: char c;
91: { register long time;
92:
93: asm("andl3 *$0x418,$0x8,_tmp_lw");
94: if (tmp_lw) /* Data cache ON */
95: asm("mtpr $DC_OFF,$DCR"); /* Turn data cache OFF */
96: time = 0x1ff0000;
97: asm("movab _cpout,r10");
98: asm("andl2 $0xffffff,r10");
99: asm("mtpr r10,$CPMDCB");
100: tmp_lw = (long)(&cpout.cp_hdr.cp_unit);
101: while (time-- && !(cpout.cp_hdr.cp_unit & CPDONE));
102: if (!(cpout.cp_hdr.cp_unit & CPDONE)) cp_hlt(); /* Time out */
103: if (c== '\n') putchar('\r');
104: if (tmp_lw) /* Data cache was ON */
105: asm("mtpr $DC_ON,$DCR"); /* Turn data cache back ON */
106: }
107:
108: cp_hlt()
109: {
110: asm("movl $0xeeeeeeee,r0");
111: asm("movl $0xeeeeeeee,r1");
112: asm("movl $0xeeeeeeee,r2");
113: asm("movl $0xeeeeeeee,r3");
114: asm("movl $0xeeeeeeee,r4");
115: asm("movl $0xeeeeeeee,r5");
116: asm("movl $0xeeeeeeee,r6");
117: asm("movl $0xeeeeeeee,r7");
118: asm("movl $0xeeeeeeee,r8");
119: asm("halt");
120: }
121:
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