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Power 6/32 Unix version 1.2b

#include "definitions"
#include "data.h"


extern long iob0, iob1, ret_adr, savvec4, savvec5, savvec6, savvec7;
extern long *p_ptr, saved_sp, saved_fp, pcb0;
long reipc, exp_pc, act_pc, exp_sp, act_sp, exp_psl, act_psl, act_fvadr;


/* 		Demand paging with register mode
   This test run virtual in P0 space,Kernel Privilege on Interrupt stack.
   Boundery of virtual Page IOB0 and IOB1 are used in this test. Opcode of
   the "clrl r5" instruction is moved to last byte in page IOB0 and operand
   specifier is moved to 1st byte in page IOB1. PTE of Page IOB1 is then set 
   to invalid.
*/

dmp2()
{
	asm("mfpr $SBR,_savvec4");
	savvec4 |= (savvec4 | SADDR);		/* Make it system address */
	asm("mtpr _savvec4,$P0BR");		/* Double map P0PT to SPT */
	asm("mfpr $SLR,_savvec4");
	asm("mtpr _savvec4,$P0LR");

	asm("mtpr $6,$DCK");	
	asm("mtpr $0,$TBIA");	
	asm("mtpr $0,$PADC");	
	asm("mtpr $1,$MME");			/* Enable MME */
	asm("jmp  *$0f");			/* Go virtual */
asm("0:");
	clrlr5();
	asm("mtpr $0,$MME");			/* Back to physical */
	asm("mtpr $0,$P0LR");
}


clrlr5()
{	char *byte_ptr, *msg1, *msg2;
	long ix, hdr_adr, pc_err, saved_pte, saved_vec1, saved_vec2;
	long dummy, exp_fvadr;

	savvec4 = (long)&pcb0;
	asm("mtpr _savvec4,$PCBB");

	/* Move code to boundery of test page */
	exp_pc  = ((TEST_PG-1)<<PGSHIFT)|(NBPG-1);
	exp_fvadr = exp_pc + 1;			/* fault at next byte */
	byte_ptr = (char *)exp_pc;
	for(ix=0;ix<I0;ix++) *byte_ptr++ = CLRL0[ix];
	*byte_ptr++ = KCALL[0];			/* move KCALL instruction */
	*byte_ptr = KCALL[1];

	fixpv_pte(P0BR,(TEST_PG-1),&saved_pte,(PTE_V|PTE_UW));
	fixpv_pte(P0BR,TEST_PG,&saved_pte,PTE_UW);    /* Invalid test page */
	asm("movab trans_f0,_savvec4");     	/* new exception handlers  */
	set_handler(TRANS_VEC,&saved_vec1,savvec4);

	asm("movab (sp),_savvec4");
	savvec4 -= 16;				/* KSP is 4 words below ISP */
	asm("mtpr _savvec4,$KSP");
	/* Set up to execute REI      */
	exp_psl = PSL_USR;			/* PSL : user mode */
	asm("pushl _exp_psl");			/* Push PSL on stack */
	asm("pushl _exp_pc");			/* Push PC on stack */

	/* Use REI to switch to user mode */
	asm("mtpr $1,$PACC");			/* Purge all code cache */
asm("d0rei:");
	asm("rei");
	asm("halt");
asm(".align 2");
asm("rtn_t0:");
	asm("movab d0rei,_reipc");
	if (act_pc != exp_pc)		/* check if PC is backed up */
		{
		msg1 = "** PC pushed on the stack is not correct.\n";
		d2err(msg1,act_pc,exp_pc,exp_pc,reipc,exp_fvadr);
		}
	if (act_fvadr != exp_fvadr)	/* check VA at fault */
		{
		msg1 = "** Fault virtual address pushed on the stack is not correct.\n";
		d2err(msg1,act_fvadr,exp_fvadr,exp_pc,reipc,exp_fvadr);
		}
	set_handler(TRANS_VEC,&dummy,saved_vec1);
	fixpv_pte(P0BR,TEST_PG,&saved_pte,(PTE_V|PTE_UW));
	asm("movab kcall_f0,_savvec4");
	set_handler(CHMK_VEC,&saved_vec2,savvec4);
	asm("pushl _exp_psl");			/* Push PSL on stack */
	asm("pushl _exp_pc");			/* Push PC on stack */
	asm("movl $0xffffffff,r5");
asm("d0rei1:");
	asm("rei");
	asm("halt");
asm(".align 2");
asm("rtn_t01:");
	asm("movl r5,_savvec4");
	asm("movab d0rei1,_reipc");
	if (savvec4 != 0)		/* Error !! */
		{
		msg1 = "\n** Incorrect result in R5 after instruction is restarted.\n";
		d2err(msg1,savvec4,0,exp_pc,reipc,exp_fvadr);
		}
	set_handler(CHMK_VEC,&dummy,saved_vec2);	/* Restore handler */
}

new_hdr0()
{
asm(".align	2");			/* Longword align */
asm("trans_f0:");			/* Handler of translation fault */
	asm("mtpr $0x1f,$IPL");
	asm("movl (sp)+,r12");		/* Pop 1st two parameter */
	asm("movl (sp)+,_act_fvadr");	/* Actual virtual addr at fault */
	asm("movl (sp)+,_act_pc");	/* Actual PC */
	asm("movl (sp)+,_act_psl");	/* Actual PSL */
	asm("svpctx");			/* Switch back to ISP */
	asm("jmp rtn_t0");		/* Return */


asm(".align	2");			/* Longword align */
asm("kcall_f0:");			/* Handler of KCALL */
	asm("mtpr $0x1f,$IPL");
	asm("svpctx");			/* Switch back to ISP */
	asm("jmp rtn_t01");		/* Return */
}

d2err(msg1,act,exp,pc,reipc,fva)
char *msg1;
long act, exp, pc, reipc, fva;
{
	writes(msg1);
	writes("\n** Actual    : "); writeh(act); 
	writes("\n** Expect    : "); writeh(exp);
	writes("\n** PC        : "); writeh(pc);
	writes("\n** PC of REI : "); writeh(reipc);
	writes("\n** VA that should cause fault : "); writeh(fva);
	writec('\n');
	asm("halt");
}

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